1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Device Tree file for Marvell Armada 370 Reference Design board
  4 * (RD-88F6710-A1)
  5 *
  6 *  Copied from arch/arm/boot/dts/armada-370-db.dts
  7 *
  8 *  Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
  9 *
 10 * Note: this Device Tree assumes that the bootloader has remapped the
 11 * internal registers to 0xf1000000 (instead of the default
 12 * 0xd0000000). The 0xf1000000 is the default used by the recent,
 13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
 14 * boards were delivered with an older version of the bootloader that
 15 * left internal registers mapped at 0xd0000000. If you are in this
 16 * situation, you should either update your bootloader (preferred
 17 * solution) or the below Device Tree should be adjusted.
 18 */
 19
 20/dts-v1/;
 21#include <dt-bindings/input/input.h>
 22#include <dt-bindings/interrupt-controller/irq.h>
 23#include <dt-bindings/gpio/gpio.h>
 24#include "armada-370.dtsi"
 25
 26/ {
 27	model = "Marvell Armada 370 Reference Design";
 28	compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp";
 29
 30	chosen {
 31		stdout-path = "serial0:115200n8";
 32	};
 33
 34	memory@0 {
 35		device_type = "memory";
 36		reg = <0x00000000 0x20000000>; /* 512 MB */
 37	};
 38
 39	soc {
 40		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
 41			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
 42			  MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
 43
 44		internal-regs {
 45			serial@12000 {
 46				status = "okay";
 47			};
 48			sata@a0000 {
 49				nr-ports = <2>;
 50				status = "okay";
 51			};
 52
 53			ethernet@70000 {
 54				status = "okay";
 55				phy = <&phy0>;
 56				phy-mode = "sgmii";
 57			};
 58			ethernet@74000 {
 59				pinctrl-0 = <&ge1_rgmii_pins>;
 60				pinctrl-names = "default";
 61				status = "okay";
 62				phy-mode = "rgmii-id";
 63				fixed-link {
 64					speed = <1000>;
 65					full-duplex;
 66				};
 67			};
 68
 69			mvsdio@d4000 {
 70				pinctrl-0 = <&sdio_pins1>;
 71				pinctrl-names = "default";
 72				status = "okay";
 73				/* No CD or WP GPIOs */
 74				broken-cd;
 75			};
 76
 77			usb@50000 {
 78				status = "okay";
 79			};
 80
 81			usb@51000 {
 82				status = "okay";
 83			};
 84
 85			gpio-keys {
 86				compatible = "gpio-keys";
 87				button {
 88					label = "Software Button";
 89					linux,code = <KEY_POWER>;
 90					gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 91				};
 92			};
 93
 94			gpio-fan {
 95				compatible = "gpio-fan";
 96				gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
 97				gpio-fan,speed-map = <0 0 3000 1>;
 98				pinctrl-0 = <&fan_pins>;
 99				pinctrl-names = "default";
100			};
101
102			gpio_leds {
103				compatible = "gpio-leds";
104				pinctrl-names = "default";
105				pinctrl-0 = <&led_pins>;
106
107				sw_led {
108					label = "370rd:green:sw";
109					gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
110					default-state = "keep";
111				};
112			};
113		};
114	};
115};
116
117&pciec {
118	status = "okay";
119
120	/* Internal mini-PCIe connector */
121	pcie@1,0 {
122		/* Port 0, Lane 0 */
123		status = "okay";
124	};
125
126	/* Internal mini-PCIe connector */
127	pcie@2,0 {
128		/* Port 1, Lane 0 */
129		status = "okay";
130	};
131};
132
133&mdio {
134	pinctrl-0 = <&mdio_pins>;
135	pinctrl-names = "default";
136	phy0: ethernet-phy@0 {
137		reg = <0>;
138	};
139
140	switch: switch@10 {
141		compatible = "marvell,mv88e6085";
142		#address-cells = <1>;
143		#size-cells = <0>;
144		reg = <0x10>;
145		interrupt-controller;
146		#interrupt-cells = <2>;
147
148		ports {
149			#address-cells = <1>;
150			#size-cells = <0>;
151
152			port@0 {
153				reg = <0>;
154				label = "lan0";
155			};
156
157			port@1 {
158				reg = <1>;
159				label = "lan1";
160			};
161
162			port@2 {
163				reg = <2>;
164				label = "lan2";
165			};
166
167			port@3 {
168				reg = <3>;
169				label = "lan3";
170			};
171
172			port@5 {
173				reg = <5>;
174				label = "cpu";
175				ethernet = <&eth1>;
176				fixed-link {
177					speed = <1000>;
178					full-duplex;
179				};
180			};
181		};
182
183		mdio {
184			#address-cells = <1>;
185			#size-cells = <0>;
186
187			switchphy0: switchphy@0 {
188				reg = <0>;
189				interrupt-parent = <&switch>;
190				interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
191			};
192
193			switchphy1: switchphy@1 {
194				reg = <1>;
195				interrupt-parent = <&switch>;
196				interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
197			};
198
199			switchphy2: switchphy@2 {
200				reg = <2>;
201				interrupt-parent = <&switch>;
202				interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
203			};
204
205			switchphy3: switchphy@3 {
206				reg = <3>;
207				interrupt-parent = <&switch>;
208				interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
209			};
210		};
211	};
212};
213
214
215&pinctrl {
216	fan_pins: fan-pins {
217		marvell,pins = "mpp8";
218		marvell,function = "gpio";
219	};
220
221	led_pins: led-pins {
222		marvell,pins = "mpp32";
223		marvell,function = "gpio";
224	};
225};
226
227&nand_controller {
228	status = "okay";
229
230	nand@0 {
231		reg = <0>;
232		label = "pxa3xx_nand-0";
233		nand-rb = <0>;
234		marvell,nand-keep-config;
235		nand-on-flash-bbt;
236
237		partitions {
238			compatible = "fixed-partitions";
239			#address-cells = <1>;
240			#size-cells = <1>;
241
242			partition@0 {
243				label = "U-Boot";
244				reg = <0 0x800000>;
245			};
246			partition@800000 {
247				label = "Linux";
248				reg = <0x800000 0x800000>;
249			};
250			partition@1000000 {
251				label = "Filesystem";
252				reg = <0x1000000 0x3f000000>;
253			};
254		};
255	};
256};