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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2014-2017 Phytec Messtechnik GmbH
4 * Author: Wadim Egorov <w.egorov@phytec.de>
5 * Teresa Remmet <t.remmet@phytec.de>
6 */
7
8#include <dt-bindings/input/input.h>
9
10/ {
11 model = "Phytec AM335x PCM-953";
12 compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx";
13
14 /* Power */
15 vcc3v3: fixedregulator1 {
16 compatible = "regulator-fixed";
17 regulator-name = "vcc3v3";
18 regulator-min-microvolt = <3300000>;
19 regulator-max-microvolt = <3300000>;
20 regulator-boot-on;
21 };
22
23 vcc1v8: fixedregulator2 {
24 compatible = "regulator-fixed";
25 regulator-name = "vcc1v8";
26 regulator-min-microvolt = <1800000>;
27 regulator-max-microvolt = <1800000>;
28 regulator-boot-on;
29 };
30
31 /* User IO */
32 user_leds: user_leds {
33 compatible = "gpio-leds";
34 pinctrl-names = "default";
35 pinctrl-0 = <&user_leds_pins>;
36
37 user-led0 {
38 gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
39 linux,default-trigger = "gpio";
40 default-state = "on";
41 };
42
43 user-led1 {
44 gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
45 linux,default-trigger = "gpio";
46 default-state = "on";
47 };
48 };
49
50 user_buttons: user_buttons {
51 compatible = "gpio-keys";
52 pinctrl-names = "default";
53 pinctrl-0 = <&user_buttons_pins>;
54
55 button-0 {
56 label = "home";
57 linux,code = <KEY_HOME>;
58 gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
59 wakeup-source;
60 };
61
62 button-1 {
63 label = "menu";
64 linux,code = <KEY_MENU>;
65 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
66 wakeup-source;
67 };
68
69 };
70};
71
72&am33xx_pinmux {
73 user_buttons_pins: pinmux_user_buttons {
74 pinctrl-single,pins = <
75 AM33XX_PADCONF(AM335X_PIN_EMU0, PIN_INPUT_PULLDOWN, MUX_MODE7) /* emu0.gpio3_7 */
76 AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* emu1.gpio3_8 */
77 >;
78 };
79
80 user_leds_pins: pinmux_user_leds {
81 pinctrl-single,pins = <
82 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_csn1.gpio1_30 */
83 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_csn2.gpio1_31 */
84 >;
85 };
86};
87
88/* CAN */
89&am33xx_pinmux {
90 dcan1_pins: pinmux_dcan1 {
91 pinctrl-single,pins = <
92 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT_PULLUP, MUX_MODE2) /* uart1_rxd.dcan1_tx_mux2 */
93 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLUP, MUX_MODE2) /* uart1_txd.dcan1_rx_mux2 */
94 >;
95 };
96};
97
98&dcan1 {
99 pinctrl-names = "default";
100 pinctrl-0 = <&dcan1_pins>;
101 status = "okay";
102};
103
104/* Ethernet */
105&am33xx_pinmux {
106 ethernet1_pins: pinmux_ethernet1 {
107 pinctrl-single,pins = <
108 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
109 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
110 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
111 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
112 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
113 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
114 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
115 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
116 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
117 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
118 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
119 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
120 >;
121 };
122};
123
124&cpsw_port2 {
125 phy-handle = <&phy1>;
126 phy-mode = "rgmii-id";
127 ti,dual-emac-pvid = <2>;
128 status = "okay";
129};
130
131&davinci_mdio_sw {
132 phy1: ethernet-phy@2 {
133 reg = <2>;
134 };
135};
136
137&mac_sw {
138 pinctrl-names = "default";
139 pinctrl-0 = <ðernet0_pins ðernet1_pins>;
140};
141
142/* Misc */
143&am33xx_pinmux {
144 pinctrl-names = "default";
145 pinctrl-0 = <&cb_gpio_pins>;
146
147 cb_gpio_pins: pinmux_cb_gpio {
148 pinctrl-single,pins = <
149 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* uart0_ctsn.gpio1_8 */
150 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* uart0_rtsn.gpio1_9 */
151 >;
152 };
153};
154
155/* MMC */
156&am33xx_pinmux {
157 mmc1_pins: pinmux_mmc1_pins {
158 pinctrl-single,pins = <
159 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
160 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
161 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
162 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
163 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
164 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
165 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
166 >;
167 };
168};
169
170&mmc1 {
171 vmmc-supply = <&vcc3v3>;
172 bus-width = <4>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&mmc1_pins>;
175 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
176 status = "okay";
177};
178
179/* UARTs */
180&am33xx_pinmux {
181 uart0_pins: pinmux_uart0 {
182 pinctrl-single,pins = <
183 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
184 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
185 >;
186 };
187
188 uart1_pins: pinmux_uart1 {
189 pinctrl-single,pins = <
190 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
191 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
192 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
193 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
194 >;
195 };
196
197 uart2_pins: pinmux_uart2 {
198 pinctrl-single,pins = <
199 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_tx_clk.uart2_rxd */
200 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rx_clk.uart2_txd */
201 >;
202 };
203
204 uart3_pins: pinmux_uart3 {
205 pinctrl-single,pins = <
206 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_rxd3.uart3_rxd */
207 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rxd2.uart3_txd */
208 >;
209 };
210};
211
212&uart0 {
213 pinctrl-names = "default";
214 pinctrl-0 = <&uart0_pins>;
215 status = "okay";
216};
217
218&uart1 {
219 pinctrl-names = "default";
220 pinctrl-0 = <&uart1_pins>;
221};
222
223&uart2 {
224 pinctrl-names = "default";
225 pinctrl-0 = <&uart2_pins>;
226 status = "okay";
227};
228
229&uart3 {
230 pinctrl-names = "default";
231 pinctrl-0 = <&uart3_pins>;
232 status = "okay";
233};
234
235/* USB */
236&usb1 {
237 dr_mode = "host";
238};