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1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_PGTABLE_H
3#define _ASM_X86_PGTABLE_H
4
5#include <linux/mem_encrypt.h>
6#include <asm/page.h>
7#include <asm/pgtable_types.h>
8
9/*
10 * Macro to mark a page protection value as UC-
11 */
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
16 : (prot))
17
18#ifndef __ASSEMBLY__
19#include <linux/spinlock.h>
20#include <asm/x86_init.h>
21#include <asm/pkru.h>
22#include <asm/fpu/api.h>
23#include <asm/coco.h>
24#include <asm-generic/pgtable_uffd.h>
25#include <linux/page_table_check.h>
26
27extern pgd_t early_top_pgt[PTRS_PER_PGD];
28bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd);
29
30void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm);
31void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm,
32 bool user);
33void ptdump_walk_pgd_level_checkwx(void);
34void ptdump_walk_user_pgd_level_checkwx(void);
35
36/*
37 * Macros to add or remove encryption attribute
38 */
39#define pgprot_encrypted(prot) __pgprot(cc_mkenc(pgprot_val(prot)))
40#define pgprot_decrypted(prot) __pgprot(cc_mkdec(pgprot_val(prot)))
41
42#ifdef CONFIG_DEBUG_WX
43#define debug_checkwx() ptdump_walk_pgd_level_checkwx()
44#define debug_checkwx_user() ptdump_walk_user_pgd_level_checkwx()
45#else
46#define debug_checkwx() do { } while (0)
47#define debug_checkwx_user() do { } while (0)
48#endif
49
50/*
51 * ZERO_PAGE is a global shared page that is always zero: used
52 * for zero-mapped memory areas etc..
53 */
54extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
55 __visible;
56#define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page))
57
58extern spinlock_t pgd_lock;
59extern struct list_head pgd_list;
60
61extern struct mm_struct *pgd_page_get_mm(struct page *page);
62
63extern pmdval_t early_pmd_flags;
64
65#ifdef CONFIG_PARAVIRT_XXL
66#include <asm/paravirt.h>
67#else /* !CONFIG_PARAVIRT_XXL */
68#define set_pte(ptep, pte) native_set_pte(ptep, pte)
69
70#define set_pte_atomic(ptep, pte) \
71 native_set_pte_atomic(ptep, pte)
72
73#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
74
75#ifndef __PAGETABLE_P4D_FOLDED
76#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
77#define pgd_clear(pgd) (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0)
78#endif
79
80#ifndef set_p4d
81# define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d)
82#endif
83
84#ifndef __PAGETABLE_PUD_FOLDED
85#define p4d_clear(p4d) native_p4d_clear(p4d)
86#endif
87
88#ifndef set_pud
89# define set_pud(pudp, pud) native_set_pud(pudp, pud)
90#endif
91
92#ifndef __PAGETABLE_PUD_FOLDED
93#define pud_clear(pud) native_pud_clear(pud)
94#endif
95
96#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
97#define pmd_clear(pmd) native_pmd_clear(pmd)
98
99#define pgd_val(x) native_pgd_val(x)
100#define __pgd(x) native_make_pgd(x)
101
102#ifndef __PAGETABLE_P4D_FOLDED
103#define p4d_val(x) native_p4d_val(x)
104#define __p4d(x) native_make_p4d(x)
105#endif
106
107#ifndef __PAGETABLE_PUD_FOLDED
108#define pud_val(x) native_pud_val(x)
109#define __pud(x) native_make_pud(x)
110#endif
111
112#ifndef __PAGETABLE_PMD_FOLDED
113#define pmd_val(x) native_pmd_val(x)
114#define __pmd(x) native_make_pmd(x)
115#endif
116
117#define pte_val(x) native_pte_val(x)
118#define __pte(x) native_make_pte(x)
119
120#define arch_end_context_switch(prev) do {} while(0)
121#endif /* CONFIG_PARAVIRT_XXL */
122
123/*
124 * The following only work if pte_present() is true.
125 * Undefined behaviour if not..
126 */
127static inline int pte_dirty(pte_t pte)
128{
129 return pte_flags(pte) & _PAGE_DIRTY;
130}
131
132static inline int pte_young(pte_t pte)
133{
134 return pte_flags(pte) & _PAGE_ACCESSED;
135}
136
137static inline int pmd_dirty(pmd_t pmd)
138{
139 return pmd_flags(pmd) & _PAGE_DIRTY;
140}
141
142#define pmd_young pmd_young
143static inline int pmd_young(pmd_t pmd)
144{
145 return pmd_flags(pmd) & _PAGE_ACCESSED;
146}
147
148static inline int pud_dirty(pud_t pud)
149{
150 return pud_flags(pud) & _PAGE_DIRTY;
151}
152
153static inline int pud_young(pud_t pud)
154{
155 return pud_flags(pud) & _PAGE_ACCESSED;
156}
157
158static inline int pte_write(pte_t pte)
159{
160 return pte_flags(pte) & _PAGE_RW;
161}
162
163static inline int pte_huge(pte_t pte)
164{
165 return pte_flags(pte) & _PAGE_PSE;
166}
167
168static inline int pte_global(pte_t pte)
169{
170 return pte_flags(pte) & _PAGE_GLOBAL;
171}
172
173static inline int pte_exec(pte_t pte)
174{
175 return !(pte_flags(pte) & _PAGE_NX);
176}
177
178static inline int pte_special(pte_t pte)
179{
180 return pte_flags(pte) & _PAGE_SPECIAL;
181}
182
183/* Entries that were set to PROT_NONE are inverted */
184
185static inline u64 protnone_mask(u64 val);
186
187static inline unsigned long pte_pfn(pte_t pte)
188{
189 phys_addr_t pfn = pte_val(pte);
190 pfn ^= protnone_mask(pfn);
191 return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT;
192}
193
194static inline unsigned long pmd_pfn(pmd_t pmd)
195{
196 phys_addr_t pfn = pmd_val(pmd);
197 pfn ^= protnone_mask(pfn);
198 return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
199}
200
201static inline unsigned long pud_pfn(pud_t pud)
202{
203 phys_addr_t pfn = pud_val(pud);
204 pfn ^= protnone_mask(pfn);
205 return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT;
206}
207
208static inline unsigned long p4d_pfn(p4d_t p4d)
209{
210 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT;
211}
212
213static inline unsigned long pgd_pfn(pgd_t pgd)
214{
215 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT;
216}
217
218#define p4d_leaf p4d_large
219static inline int p4d_large(p4d_t p4d)
220{
221 /* No 512 GiB pages yet */
222 return 0;
223}
224
225#define pte_page(pte) pfn_to_page(pte_pfn(pte))
226
227#define pmd_leaf pmd_large
228static inline int pmd_large(pmd_t pte)
229{
230 return pmd_flags(pte) & _PAGE_PSE;
231}
232
233#ifdef CONFIG_TRANSPARENT_HUGEPAGE
234/* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_large */
235static inline int pmd_trans_huge(pmd_t pmd)
236{
237 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
238}
239
240#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
241static inline int pud_trans_huge(pud_t pud)
242{
243 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
244}
245#endif
246
247#define has_transparent_hugepage has_transparent_hugepage
248static inline int has_transparent_hugepage(void)
249{
250 return boot_cpu_has(X86_FEATURE_PSE);
251}
252
253#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
254static inline int pmd_devmap(pmd_t pmd)
255{
256 return !!(pmd_val(pmd) & _PAGE_DEVMAP);
257}
258
259#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
260static inline int pud_devmap(pud_t pud)
261{
262 return !!(pud_val(pud) & _PAGE_DEVMAP);
263}
264#else
265static inline int pud_devmap(pud_t pud)
266{
267 return 0;
268}
269#endif
270
271static inline int pgd_devmap(pgd_t pgd)
272{
273 return 0;
274}
275#endif
276#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
277
278static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
279{
280 pteval_t v = native_pte_val(pte);
281
282 return native_make_pte(v | set);
283}
284
285static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
286{
287 pteval_t v = native_pte_val(pte);
288
289 return native_make_pte(v & ~clear);
290}
291
292#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
293static inline int pte_uffd_wp(pte_t pte)
294{
295 bool wp = pte_flags(pte) & _PAGE_UFFD_WP;
296
297#ifdef CONFIG_DEBUG_VM
298 /*
299 * Having write bit for wr-protect-marked present ptes is fatal,
300 * because it means the uffd-wp bit will be ignored and write will
301 * just go through.
302 *
303 * Use any chance of pgtable walking to verify this (e.g., when
304 * page swapped out or being migrated for all purposes). It means
305 * something is already wrong. Tell the admin even before the
306 * process crashes. We also nail it with wrong pgtable setup.
307 */
308 WARN_ON_ONCE(wp && pte_write(pte));
309#endif
310
311 return wp;
312}
313
314static inline pte_t pte_mkuffd_wp(pte_t pte)
315{
316 return pte_set_flags(pte, _PAGE_UFFD_WP);
317}
318
319static inline pte_t pte_clear_uffd_wp(pte_t pte)
320{
321 return pte_clear_flags(pte, _PAGE_UFFD_WP);
322}
323#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
324
325static inline pte_t pte_mkclean(pte_t pte)
326{
327 return pte_clear_flags(pte, _PAGE_DIRTY);
328}
329
330static inline pte_t pte_mkold(pte_t pte)
331{
332 return pte_clear_flags(pte, _PAGE_ACCESSED);
333}
334
335static inline pte_t pte_wrprotect(pte_t pte)
336{
337 return pte_clear_flags(pte, _PAGE_RW);
338}
339
340static inline pte_t pte_mkexec(pte_t pte)
341{
342 return pte_clear_flags(pte, _PAGE_NX);
343}
344
345static inline pte_t pte_mkdirty(pte_t pte)
346{
347 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
348}
349
350static inline pte_t pte_mkyoung(pte_t pte)
351{
352 return pte_set_flags(pte, _PAGE_ACCESSED);
353}
354
355static inline pte_t pte_mkwrite(pte_t pte)
356{
357 return pte_set_flags(pte, _PAGE_RW);
358}
359
360static inline pte_t pte_mkhuge(pte_t pte)
361{
362 return pte_set_flags(pte, _PAGE_PSE);
363}
364
365static inline pte_t pte_clrhuge(pte_t pte)
366{
367 return pte_clear_flags(pte, _PAGE_PSE);
368}
369
370static inline pte_t pte_mkglobal(pte_t pte)
371{
372 return pte_set_flags(pte, _PAGE_GLOBAL);
373}
374
375static inline pte_t pte_clrglobal(pte_t pte)
376{
377 return pte_clear_flags(pte, _PAGE_GLOBAL);
378}
379
380static inline pte_t pte_mkspecial(pte_t pte)
381{
382 return pte_set_flags(pte, _PAGE_SPECIAL);
383}
384
385static inline pte_t pte_mkdevmap(pte_t pte)
386{
387 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
388}
389
390static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
391{
392 pmdval_t v = native_pmd_val(pmd);
393
394 return native_make_pmd(v | set);
395}
396
397static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
398{
399 pmdval_t v = native_pmd_val(pmd);
400
401 return native_make_pmd(v & ~clear);
402}
403
404#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
405static inline int pmd_uffd_wp(pmd_t pmd)
406{
407 return pmd_flags(pmd) & _PAGE_UFFD_WP;
408}
409
410static inline pmd_t pmd_mkuffd_wp(pmd_t pmd)
411{
412 return pmd_set_flags(pmd, _PAGE_UFFD_WP);
413}
414
415static inline pmd_t pmd_clear_uffd_wp(pmd_t pmd)
416{
417 return pmd_clear_flags(pmd, _PAGE_UFFD_WP);
418}
419#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
420
421static inline pmd_t pmd_mkold(pmd_t pmd)
422{
423 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
424}
425
426static inline pmd_t pmd_mkclean(pmd_t pmd)
427{
428 return pmd_clear_flags(pmd, _PAGE_DIRTY);
429}
430
431static inline pmd_t pmd_wrprotect(pmd_t pmd)
432{
433 return pmd_clear_flags(pmd, _PAGE_RW);
434}
435
436static inline pmd_t pmd_mkdirty(pmd_t pmd)
437{
438 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
439}
440
441static inline pmd_t pmd_mkdevmap(pmd_t pmd)
442{
443 return pmd_set_flags(pmd, _PAGE_DEVMAP);
444}
445
446static inline pmd_t pmd_mkhuge(pmd_t pmd)
447{
448 return pmd_set_flags(pmd, _PAGE_PSE);
449}
450
451static inline pmd_t pmd_mkyoung(pmd_t pmd)
452{
453 return pmd_set_flags(pmd, _PAGE_ACCESSED);
454}
455
456static inline pmd_t pmd_mkwrite(pmd_t pmd)
457{
458 return pmd_set_flags(pmd, _PAGE_RW);
459}
460
461static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
462{
463 pudval_t v = native_pud_val(pud);
464
465 return native_make_pud(v | set);
466}
467
468static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
469{
470 pudval_t v = native_pud_val(pud);
471
472 return native_make_pud(v & ~clear);
473}
474
475static inline pud_t pud_mkold(pud_t pud)
476{
477 return pud_clear_flags(pud, _PAGE_ACCESSED);
478}
479
480static inline pud_t pud_mkclean(pud_t pud)
481{
482 return pud_clear_flags(pud, _PAGE_DIRTY);
483}
484
485static inline pud_t pud_wrprotect(pud_t pud)
486{
487 return pud_clear_flags(pud, _PAGE_RW);
488}
489
490static inline pud_t pud_mkdirty(pud_t pud)
491{
492 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
493}
494
495static inline pud_t pud_mkdevmap(pud_t pud)
496{
497 return pud_set_flags(pud, _PAGE_DEVMAP);
498}
499
500static inline pud_t pud_mkhuge(pud_t pud)
501{
502 return pud_set_flags(pud, _PAGE_PSE);
503}
504
505static inline pud_t pud_mkyoung(pud_t pud)
506{
507 return pud_set_flags(pud, _PAGE_ACCESSED);
508}
509
510static inline pud_t pud_mkwrite(pud_t pud)
511{
512 return pud_set_flags(pud, _PAGE_RW);
513}
514
515#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
516static inline int pte_soft_dirty(pte_t pte)
517{
518 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
519}
520
521static inline int pmd_soft_dirty(pmd_t pmd)
522{
523 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
524}
525
526static inline int pud_soft_dirty(pud_t pud)
527{
528 return pud_flags(pud) & _PAGE_SOFT_DIRTY;
529}
530
531static inline pte_t pte_mksoft_dirty(pte_t pte)
532{
533 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
534}
535
536static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
537{
538 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
539}
540
541static inline pud_t pud_mksoft_dirty(pud_t pud)
542{
543 return pud_set_flags(pud, _PAGE_SOFT_DIRTY);
544}
545
546static inline pte_t pte_clear_soft_dirty(pte_t pte)
547{
548 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
549}
550
551static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
552{
553 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
554}
555
556static inline pud_t pud_clear_soft_dirty(pud_t pud)
557{
558 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY);
559}
560
561#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
562
563/*
564 * Mask out unsupported bits in a present pgprot. Non-present pgprots
565 * can use those bits for other purposes, so leave them be.
566 */
567static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
568{
569 pgprotval_t protval = pgprot_val(pgprot);
570
571 if (protval & _PAGE_PRESENT)
572 protval &= __supported_pte_mask;
573
574 return protval;
575}
576
577static inline pgprotval_t check_pgprot(pgprot_t pgprot)
578{
579 pgprotval_t massaged_val = massage_pgprot(pgprot);
580
581 /* mmdebug.h can not be included here because of dependencies */
582#ifdef CONFIG_DEBUG_VM
583 WARN_ONCE(pgprot_val(pgprot) != massaged_val,
584 "attempted to set unsupported pgprot: %016llx "
585 "bits: %016llx supported: %016llx\n",
586 (u64)pgprot_val(pgprot),
587 (u64)pgprot_val(pgprot) ^ massaged_val,
588 (u64)__supported_pte_mask);
589#endif
590
591 return massaged_val;
592}
593
594static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
595{
596 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
597 pfn ^= protnone_mask(pgprot_val(pgprot));
598 pfn &= PTE_PFN_MASK;
599 return __pte(pfn | check_pgprot(pgprot));
600}
601
602static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
603{
604 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
605 pfn ^= protnone_mask(pgprot_val(pgprot));
606 pfn &= PHYSICAL_PMD_PAGE_MASK;
607 return __pmd(pfn | check_pgprot(pgprot));
608}
609
610static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
611{
612 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
613 pfn ^= protnone_mask(pgprot_val(pgprot));
614 pfn &= PHYSICAL_PUD_PAGE_MASK;
615 return __pud(pfn | check_pgprot(pgprot));
616}
617
618static inline pmd_t pmd_mkinvalid(pmd_t pmd)
619{
620 return pfn_pmd(pmd_pfn(pmd),
621 __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
622}
623
624static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask);
625
626static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
627{
628 pteval_t val = pte_val(pte), oldval = val;
629
630 /*
631 * Chop off the NX bit (if present), and add the NX portion of
632 * the newprot (if present):
633 */
634 val &= _PAGE_CHG_MASK;
635 val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK;
636 val = flip_protnone_guard(oldval, val, PTE_PFN_MASK);
637 return __pte(val);
638}
639
640static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
641{
642 pmdval_t val = pmd_val(pmd), oldval = val;
643
644 val &= _HPAGE_CHG_MASK;
645 val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK;
646 val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK);
647 return __pmd(val);
648}
649
650/*
651 * mprotect needs to preserve PAT and encryption bits when updating
652 * vm_page_prot
653 */
654#define pgprot_modify pgprot_modify
655static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
656{
657 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
658 pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK;
659 return __pgprot(preservebits | addbits);
660}
661
662#define pte_pgprot(x) __pgprot(pte_flags(x))
663#define pmd_pgprot(x) __pgprot(pmd_flags(x))
664#define pud_pgprot(x) __pgprot(pud_flags(x))
665#define p4d_pgprot(x) __pgprot(p4d_flags(x))
666
667#define canon_pgprot(p) __pgprot(massage_pgprot(p))
668
669static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
670 enum page_cache_mode pcm,
671 enum page_cache_mode new_pcm)
672{
673 /*
674 * PAT type is always WB for untracked ranges, so no need to check.
675 */
676 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
677 return 1;
678
679 /*
680 * Certain new memtypes are not allowed with certain
681 * requested memtype:
682 * - request is uncached, return cannot be write-back
683 * - request is write-combine, return cannot be write-back
684 * - request is write-through, return cannot be write-back
685 * - request is write-through, return cannot be write-combine
686 */
687 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
688 new_pcm == _PAGE_CACHE_MODE_WB) ||
689 (pcm == _PAGE_CACHE_MODE_WC &&
690 new_pcm == _PAGE_CACHE_MODE_WB) ||
691 (pcm == _PAGE_CACHE_MODE_WT &&
692 new_pcm == _PAGE_CACHE_MODE_WB) ||
693 (pcm == _PAGE_CACHE_MODE_WT &&
694 new_pcm == _PAGE_CACHE_MODE_WC)) {
695 return 0;
696 }
697
698 return 1;
699}
700
701pmd_t *populate_extra_pmd(unsigned long vaddr);
702pte_t *populate_extra_pte(unsigned long vaddr);
703
704#ifdef CONFIG_PAGE_TABLE_ISOLATION
705pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd);
706
707/*
708 * Take a PGD location (pgdp) and a pgd value that needs to be set there.
709 * Populates the user and returns the resulting PGD that must be set in
710 * the kernel copy of the page tables.
711 */
712static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
713{
714 if (!static_cpu_has(X86_FEATURE_PTI))
715 return pgd;
716 return __pti_set_user_pgtbl(pgdp, pgd);
717}
718#else /* CONFIG_PAGE_TABLE_ISOLATION */
719static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
720{
721 return pgd;
722}
723#endif /* CONFIG_PAGE_TABLE_ISOLATION */
724
725#endif /* __ASSEMBLY__ */
726
727
728#ifdef CONFIG_X86_32
729# include <asm/pgtable_32.h>
730#else
731# include <asm/pgtable_64.h>
732#endif
733
734#ifndef __ASSEMBLY__
735#include <linux/mm_types.h>
736#include <linux/mmdebug.h>
737#include <linux/log2.h>
738#include <asm/fixmap.h>
739
740static inline int pte_none(pte_t pte)
741{
742 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
743}
744
745#define __HAVE_ARCH_PTE_SAME
746static inline int pte_same(pte_t a, pte_t b)
747{
748 return a.pte == b.pte;
749}
750
751static inline int pte_present(pte_t a)
752{
753 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
754}
755
756#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
757static inline int pte_devmap(pte_t a)
758{
759 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
760}
761#endif
762
763#define pte_accessible pte_accessible
764static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
765{
766 if (pte_flags(a) & _PAGE_PRESENT)
767 return true;
768
769 if ((pte_flags(a) & _PAGE_PROTNONE) &&
770 atomic_read(&mm->tlb_flush_pending))
771 return true;
772
773 return false;
774}
775
776static inline int pmd_present(pmd_t pmd)
777{
778 /*
779 * Checking for _PAGE_PSE is needed too because
780 * split_huge_page will temporarily clear the present bit (but
781 * the _PAGE_PSE flag will remain set at all times while the
782 * _PAGE_PRESENT bit is clear).
783 */
784 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
785}
786
787#ifdef CONFIG_NUMA_BALANCING
788/*
789 * These work without NUMA balancing but the kernel does not care. See the
790 * comment in include/linux/pgtable.h
791 */
792static inline int pte_protnone(pte_t pte)
793{
794 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
795 == _PAGE_PROTNONE;
796}
797
798static inline int pmd_protnone(pmd_t pmd)
799{
800 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
801 == _PAGE_PROTNONE;
802}
803#endif /* CONFIG_NUMA_BALANCING */
804
805static inline int pmd_none(pmd_t pmd)
806{
807 /* Only check low word on 32-bit platforms, since it might be
808 out of sync with upper half. */
809 unsigned long val = native_pmd_val(pmd);
810 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
811}
812
813static inline unsigned long pmd_page_vaddr(pmd_t pmd)
814{
815 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
816}
817
818/*
819 * Currently stuck as a macro due to indirect forward reference to
820 * linux/mmzone.h's __section_mem_map_addr() definition:
821 */
822#define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
823
824/*
825 * Conversion functions: convert a page and protection to a page entry,
826 * and a page entry and page directory to the page they refer to.
827 *
828 * (Currently stuck as a macro because of indirect forward reference
829 * to linux/mm.h:page_to_nid())
830 */
831#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
832
833static inline int pmd_bad(pmd_t pmd)
834{
835 return (pmd_flags(pmd) & ~(_PAGE_USER | _PAGE_ACCESSED)) !=
836 (_KERNPG_TABLE & ~_PAGE_ACCESSED);
837}
838
839static inline unsigned long pages_to_mb(unsigned long npg)
840{
841 return npg >> (20 - PAGE_SHIFT);
842}
843
844#if CONFIG_PGTABLE_LEVELS > 2
845static inline int pud_none(pud_t pud)
846{
847 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
848}
849
850static inline int pud_present(pud_t pud)
851{
852 return pud_flags(pud) & _PAGE_PRESENT;
853}
854
855static inline pmd_t *pud_pgtable(pud_t pud)
856{
857 return (pmd_t *)__va(pud_val(pud) & pud_pfn_mask(pud));
858}
859
860/*
861 * Currently stuck as a macro due to indirect forward reference to
862 * linux/mmzone.h's __section_mem_map_addr() definition:
863 */
864#define pud_page(pud) pfn_to_page(pud_pfn(pud))
865
866#define pud_leaf pud_large
867static inline int pud_large(pud_t pud)
868{
869 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
870 (_PAGE_PSE | _PAGE_PRESENT);
871}
872
873static inline int pud_bad(pud_t pud)
874{
875 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
876}
877#else
878#define pud_leaf pud_large
879static inline int pud_large(pud_t pud)
880{
881 return 0;
882}
883#endif /* CONFIG_PGTABLE_LEVELS > 2 */
884
885#if CONFIG_PGTABLE_LEVELS > 3
886static inline int p4d_none(p4d_t p4d)
887{
888 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
889}
890
891static inline int p4d_present(p4d_t p4d)
892{
893 return p4d_flags(p4d) & _PAGE_PRESENT;
894}
895
896static inline pud_t *p4d_pgtable(p4d_t p4d)
897{
898 return (pud_t *)__va(p4d_val(p4d) & p4d_pfn_mask(p4d));
899}
900
901/*
902 * Currently stuck as a macro due to indirect forward reference to
903 * linux/mmzone.h's __section_mem_map_addr() definition:
904 */
905#define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d))
906
907static inline int p4d_bad(p4d_t p4d)
908{
909 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER;
910
911 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
912 ignore_flags |= _PAGE_NX;
913
914 return (p4d_flags(p4d) & ~ignore_flags) != 0;
915}
916#endif /* CONFIG_PGTABLE_LEVELS > 3 */
917
918static inline unsigned long p4d_index(unsigned long address)
919{
920 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1);
921}
922
923#if CONFIG_PGTABLE_LEVELS > 4
924static inline int pgd_present(pgd_t pgd)
925{
926 if (!pgtable_l5_enabled())
927 return 1;
928 return pgd_flags(pgd) & _PAGE_PRESENT;
929}
930
931static inline unsigned long pgd_page_vaddr(pgd_t pgd)
932{
933 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
934}
935
936/*
937 * Currently stuck as a macro due to indirect forward reference to
938 * linux/mmzone.h's __section_mem_map_addr() definition:
939 */
940#define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd))
941
942/* to find an entry in a page-table-directory. */
943static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address)
944{
945 if (!pgtable_l5_enabled())
946 return (p4d_t *)pgd;
947 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address);
948}
949
950static inline int pgd_bad(pgd_t pgd)
951{
952 unsigned long ignore_flags = _PAGE_USER;
953
954 if (!pgtable_l5_enabled())
955 return 0;
956
957 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
958 ignore_flags |= _PAGE_NX;
959
960 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE;
961}
962
963static inline int pgd_none(pgd_t pgd)
964{
965 if (!pgtable_l5_enabled())
966 return 0;
967 /*
968 * There is no need to do a workaround for the KNL stray
969 * A/D bit erratum here. PGDs only point to page tables
970 * except on 32-bit non-PAE which is not supported on
971 * KNL.
972 */
973 return !native_pgd_val(pgd);
974}
975#endif /* CONFIG_PGTABLE_LEVELS > 4 */
976
977#endif /* __ASSEMBLY__ */
978
979#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
980#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
981
982#ifndef __ASSEMBLY__
983
984extern int direct_gbpages;
985void init_mem_mapping(void);
986void early_alloc_pgt_buf(void);
987extern void memblock_find_dma_reserve(void);
988void __init poking_init(void);
989unsigned long init_memory_mapping(unsigned long start,
990 unsigned long end, pgprot_t prot);
991
992#ifdef CONFIG_X86_64
993extern pgd_t trampoline_pgd_entry;
994#endif
995
996/* local pte updates need not use xchg for locking */
997static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
998{
999 pte_t res = *ptep;
1000
1001 /* Pure native function needs no input for mm, addr */
1002 native_pte_clear(NULL, 0, ptep);
1003 return res;
1004}
1005
1006static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
1007{
1008 pmd_t res = *pmdp;
1009
1010 native_pmd_clear(pmdp);
1011 return res;
1012}
1013
1014static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp)
1015{
1016 pud_t res = *pudp;
1017
1018 native_pud_clear(pudp);
1019 return res;
1020}
1021
1022static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1023 pte_t *ptep, pte_t pte)
1024{
1025 page_table_check_pte_set(mm, addr, ptep, pte);
1026 set_pte(ptep, pte);
1027}
1028
1029static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1030 pmd_t *pmdp, pmd_t pmd)
1031{
1032 page_table_check_pmd_set(mm, addr, pmdp, pmd);
1033 set_pmd(pmdp, pmd);
1034}
1035
1036static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
1037 pud_t *pudp, pud_t pud)
1038{
1039 page_table_check_pud_set(mm, addr, pudp, pud);
1040 native_set_pud(pudp, pud);
1041}
1042
1043/*
1044 * We only update the dirty/accessed state if we set
1045 * the dirty bit by hand in the kernel, since the hardware
1046 * will do the accessed bit for us, and we don't want to
1047 * race with other CPU's that might be updating the dirty
1048 * bit at the same time.
1049 */
1050struct vm_area_struct;
1051
1052#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1053extern int ptep_set_access_flags(struct vm_area_struct *vma,
1054 unsigned long address, pte_t *ptep,
1055 pte_t entry, int dirty);
1056
1057#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1058extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
1059 unsigned long addr, pte_t *ptep);
1060
1061#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1062extern int ptep_clear_flush_young(struct vm_area_struct *vma,
1063 unsigned long address, pte_t *ptep);
1064
1065#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1066static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
1067 pte_t *ptep)
1068{
1069 pte_t pte = native_ptep_get_and_clear(ptep);
1070 page_table_check_pte_clear(mm, addr, pte);
1071 return pte;
1072}
1073
1074#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1075static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1076 unsigned long addr, pte_t *ptep,
1077 int full)
1078{
1079 pte_t pte;
1080 if (full) {
1081 /*
1082 * Full address destruction in progress; paravirt does not
1083 * care about updates and native needs no locking
1084 */
1085 pte = native_local_ptep_get_and_clear(ptep);
1086 page_table_check_pte_clear(mm, addr, pte);
1087 } else {
1088 pte = ptep_get_and_clear(mm, addr, ptep);
1089 }
1090 return pte;
1091}
1092
1093#define __HAVE_ARCH_PTEP_SET_WRPROTECT
1094static inline void ptep_set_wrprotect(struct mm_struct *mm,
1095 unsigned long addr, pte_t *ptep)
1096{
1097 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
1098}
1099
1100#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
1101
1102#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1103
1104#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1105extern int pmdp_set_access_flags(struct vm_area_struct *vma,
1106 unsigned long address, pmd_t *pmdp,
1107 pmd_t entry, int dirty);
1108extern int pudp_set_access_flags(struct vm_area_struct *vma,
1109 unsigned long address, pud_t *pudp,
1110 pud_t entry, int dirty);
1111
1112#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1113extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1114 unsigned long addr, pmd_t *pmdp);
1115extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
1116 unsigned long addr, pud_t *pudp);
1117
1118#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1119extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
1120 unsigned long address, pmd_t *pmdp);
1121
1122
1123#define pmd_write pmd_write
1124static inline int pmd_write(pmd_t pmd)
1125{
1126 return pmd_flags(pmd) & _PAGE_RW;
1127}
1128
1129#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1130static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
1131 pmd_t *pmdp)
1132{
1133 pmd_t pmd = native_pmdp_get_and_clear(pmdp);
1134
1135 page_table_check_pmd_clear(mm, addr, pmd);
1136
1137 return pmd;
1138}
1139
1140#define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
1141static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
1142 unsigned long addr, pud_t *pudp)
1143{
1144 pud_t pud = native_pudp_get_and_clear(pudp);
1145
1146 page_table_check_pud_clear(mm, addr, pud);
1147
1148 return pud;
1149}
1150
1151#define __HAVE_ARCH_PMDP_SET_WRPROTECT
1152static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1153 unsigned long addr, pmd_t *pmdp)
1154{
1155 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
1156}
1157
1158#define pud_write pud_write
1159static inline int pud_write(pud_t pud)
1160{
1161 return pud_flags(pud) & _PAGE_RW;
1162}
1163
1164#ifndef pmdp_establish
1165#define pmdp_establish pmdp_establish
1166static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
1167 unsigned long address, pmd_t *pmdp, pmd_t pmd)
1168{
1169 page_table_check_pmd_set(vma->vm_mm, address, pmdp, pmd);
1170 if (IS_ENABLED(CONFIG_SMP)) {
1171 return xchg(pmdp, pmd);
1172 } else {
1173 pmd_t old = *pmdp;
1174 WRITE_ONCE(*pmdp, pmd);
1175 return old;
1176 }
1177}
1178#endif
1179
1180#define __HAVE_ARCH_PMDP_INVALIDATE_AD
1181extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma,
1182 unsigned long address, pmd_t *pmdp);
1183
1184/*
1185 * Page table pages are page-aligned. The lower half of the top
1186 * level is used for userspace and the top half for the kernel.
1187 *
1188 * Returns true for parts of the PGD that map userspace and
1189 * false for the parts that map the kernel.
1190 */
1191static inline bool pgdp_maps_userspace(void *__ptr)
1192{
1193 unsigned long ptr = (unsigned long)__ptr;
1194
1195 return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START);
1196}
1197
1198#define pgd_leaf pgd_large
1199static inline int pgd_large(pgd_t pgd) { return 0; }
1200
1201#ifdef CONFIG_PAGE_TABLE_ISOLATION
1202/*
1203 * All top-level PAGE_TABLE_ISOLATION page tables are order-1 pages
1204 * (8k-aligned and 8k in size). The kernel one is at the beginning 4k and
1205 * the user one is in the last 4k. To switch between them, you
1206 * just need to flip the 12th bit in their addresses.
1207 */
1208#define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT
1209
1210/*
1211 * This generates better code than the inline assembly in
1212 * __set_bit().
1213 */
1214static inline void *ptr_set_bit(void *ptr, int bit)
1215{
1216 unsigned long __ptr = (unsigned long)ptr;
1217
1218 __ptr |= BIT(bit);
1219 return (void *)__ptr;
1220}
1221static inline void *ptr_clear_bit(void *ptr, int bit)
1222{
1223 unsigned long __ptr = (unsigned long)ptr;
1224
1225 __ptr &= ~BIT(bit);
1226 return (void *)__ptr;
1227}
1228
1229static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp)
1230{
1231 return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT);
1232}
1233
1234static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp)
1235{
1236 return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT);
1237}
1238
1239static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp)
1240{
1241 return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT);
1242}
1243
1244static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp)
1245{
1246 return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT);
1247}
1248#endif /* CONFIG_PAGE_TABLE_ISOLATION */
1249
1250/*
1251 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
1252 *
1253 * dst - pointer to pgd range anywhere on a pgd page
1254 * src - ""
1255 * count - the number of pgds to copy.
1256 *
1257 * dst and src can be on the same page, but the range must not overlap,
1258 * and must not cross a page boundary.
1259 */
1260static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
1261{
1262 memcpy(dst, src, count * sizeof(pgd_t));
1263#ifdef CONFIG_PAGE_TABLE_ISOLATION
1264 if (!static_cpu_has(X86_FEATURE_PTI))
1265 return;
1266 /* Clone the user space pgd as well */
1267 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src),
1268 count * sizeof(pgd_t));
1269#endif
1270}
1271
1272#define PTE_SHIFT ilog2(PTRS_PER_PTE)
1273static inline int page_level_shift(enum pg_level level)
1274{
1275 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
1276}
1277static inline unsigned long page_level_size(enum pg_level level)
1278{
1279 return 1UL << page_level_shift(level);
1280}
1281static inline unsigned long page_level_mask(enum pg_level level)
1282{
1283 return ~(page_level_size(level) - 1);
1284}
1285
1286/*
1287 * The x86 doesn't have any external MMU info: the kernel page
1288 * tables contain all the necessary information.
1289 */
1290static inline void update_mmu_cache(struct vm_area_struct *vma,
1291 unsigned long addr, pte_t *ptep)
1292{
1293}
1294static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1295 unsigned long addr, pmd_t *pmd)
1296{
1297}
1298static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
1299 unsigned long addr, pud_t *pud)
1300{
1301}
1302#ifdef _PAGE_SWP_EXCLUSIVE
1303#define __HAVE_ARCH_PTE_SWP_EXCLUSIVE
1304static inline pte_t pte_swp_mkexclusive(pte_t pte)
1305{
1306 return pte_set_flags(pte, _PAGE_SWP_EXCLUSIVE);
1307}
1308
1309static inline int pte_swp_exclusive(pte_t pte)
1310{
1311 return pte_flags(pte) & _PAGE_SWP_EXCLUSIVE;
1312}
1313
1314static inline pte_t pte_swp_clear_exclusive(pte_t pte)
1315{
1316 return pte_clear_flags(pte, _PAGE_SWP_EXCLUSIVE);
1317}
1318#endif /* _PAGE_SWP_EXCLUSIVE */
1319
1320#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1321static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1322{
1323 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1324}
1325
1326static inline int pte_swp_soft_dirty(pte_t pte)
1327{
1328 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
1329}
1330
1331static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1332{
1333 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1334}
1335
1336#ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
1337static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1338{
1339 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1340}
1341
1342static inline int pmd_swp_soft_dirty(pmd_t pmd)
1343{
1344 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY;
1345}
1346
1347static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1348{
1349 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1350}
1351#endif
1352#endif
1353
1354#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
1355static inline pte_t pte_swp_mkuffd_wp(pte_t pte)
1356{
1357 return pte_set_flags(pte, _PAGE_SWP_UFFD_WP);
1358}
1359
1360static inline int pte_swp_uffd_wp(pte_t pte)
1361{
1362 return pte_flags(pte) & _PAGE_SWP_UFFD_WP;
1363}
1364
1365static inline pte_t pte_swp_clear_uffd_wp(pte_t pte)
1366{
1367 return pte_clear_flags(pte, _PAGE_SWP_UFFD_WP);
1368}
1369
1370static inline pmd_t pmd_swp_mkuffd_wp(pmd_t pmd)
1371{
1372 return pmd_set_flags(pmd, _PAGE_SWP_UFFD_WP);
1373}
1374
1375static inline int pmd_swp_uffd_wp(pmd_t pmd)
1376{
1377 return pmd_flags(pmd) & _PAGE_SWP_UFFD_WP;
1378}
1379
1380static inline pmd_t pmd_swp_clear_uffd_wp(pmd_t pmd)
1381{
1382 return pmd_clear_flags(pmd, _PAGE_SWP_UFFD_WP);
1383}
1384#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
1385
1386static inline u16 pte_flags_pkey(unsigned long pte_flags)
1387{
1388#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1389 /* ifdef to avoid doing 59-bit shift on 32-bit values */
1390 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
1391#else
1392 return 0;
1393#endif
1394}
1395
1396static inline bool __pkru_allows_pkey(u16 pkey, bool write)
1397{
1398 u32 pkru = read_pkru();
1399
1400 if (!__pkru_allows_read(pkru, pkey))
1401 return false;
1402 if (write && !__pkru_allows_write(pkru, pkey))
1403 return false;
1404
1405 return true;
1406}
1407
1408/*
1409 * 'pteval' can come from a PTE, PMD or PUD. We only check
1410 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the
1411 * same value on all 3 types.
1412 */
1413static inline bool __pte_access_permitted(unsigned long pteval, bool write)
1414{
1415 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER;
1416
1417 if (write)
1418 need_pte_bits |= _PAGE_RW;
1419
1420 if ((pteval & need_pte_bits) != need_pte_bits)
1421 return 0;
1422
1423 return __pkru_allows_pkey(pte_flags_pkey(pteval), write);
1424}
1425
1426#define pte_access_permitted pte_access_permitted
1427static inline bool pte_access_permitted(pte_t pte, bool write)
1428{
1429 return __pte_access_permitted(pte_val(pte), write);
1430}
1431
1432#define pmd_access_permitted pmd_access_permitted
1433static inline bool pmd_access_permitted(pmd_t pmd, bool write)
1434{
1435 return __pte_access_permitted(pmd_val(pmd), write);
1436}
1437
1438#define pud_access_permitted pud_access_permitted
1439static inline bool pud_access_permitted(pud_t pud, bool write)
1440{
1441 return __pte_access_permitted(pud_val(pud), write);
1442}
1443
1444#define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1
1445extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot);
1446
1447static inline bool arch_has_pfn_modify_check(void)
1448{
1449 return boot_cpu_has_bug(X86_BUG_L1TF);
1450}
1451
1452#define arch_has_hw_pte_young arch_has_hw_pte_young
1453static inline bool arch_has_hw_pte_young(void)
1454{
1455 return true;
1456}
1457
1458#ifdef CONFIG_XEN_PV
1459#define arch_has_hw_nonleaf_pmd_young arch_has_hw_nonleaf_pmd_young
1460static inline bool arch_has_hw_nonleaf_pmd_young(void)
1461{
1462 return !cpu_feature_enabled(X86_FEATURE_XENPV);
1463}
1464#endif
1465
1466#ifdef CONFIG_PAGE_TABLE_CHECK
1467static inline bool pte_user_accessible_page(pte_t pte)
1468{
1469 return (pte_val(pte) & _PAGE_PRESENT) && (pte_val(pte) & _PAGE_USER);
1470}
1471
1472static inline bool pmd_user_accessible_page(pmd_t pmd)
1473{
1474 return pmd_leaf(pmd) && (pmd_val(pmd) & _PAGE_PRESENT) && (pmd_val(pmd) & _PAGE_USER);
1475}
1476
1477static inline bool pud_user_accessible_page(pud_t pud)
1478{
1479 return pud_leaf(pud) && (pud_val(pud) & _PAGE_PRESENT) && (pud_val(pud) & _PAGE_USER);
1480}
1481#endif
1482
1483#endif /* __ASSEMBLY__ */
1484
1485#endif /* _ASM_X86_PGTABLE_H */
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
3
4#include <asm/page.h>
5#include <asm/e820.h>
6
7#include <asm/pgtable_types.h>
8
9/*
10 * Macro to mark a page protection value as UC-
11 */
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS)) \
15 : (prot))
16
17#ifndef __ASSEMBLY__
18
19#include <asm/x86_init.h>
20
21/*
22 * ZERO_PAGE is a global shared page that is always zero: used
23 * for zero-mapped memory areas etc..
24 */
25extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
26#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
27
28extern spinlock_t pgd_lock;
29extern struct list_head pgd_list;
30
31extern struct mm_struct *pgd_page_get_mm(struct page *page);
32
33#ifdef CONFIG_PARAVIRT
34#include <asm/paravirt.h>
35#else /* !CONFIG_PARAVIRT */
36#define set_pte(ptep, pte) native_set_pte(ptep, pte)
37#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
38#define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
39
40#define set_pte_atomic(ptep, pte) \
41 native_set_pte_atomic(ptep, pte)
42
43#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
44
45#ifndef __PAGETABLE_PUD_FOLDED
46#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
47#define pgd_clear(pgd) native_pgd_clear(pgd)
48#endif
49
50#ifndef set_pud
51# define set_pud(pudp, pud) native_set_pud(pudp, pud)
52#endif
53
54#ifndef __PAGETABLE_PMD_FOLDED
55#define pud_clear(pud) native_pud_clear(pud)
56#endif
57
58#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
59#define pmd_clear(pmd) native_pmd_clear(pmd)
60
61#define pte_update(mm, addr, ptep) do { } while (0)
62#define pte_update_defer(mm, addr, ptep) do { } while (0)
63#define pmd_update(mm, addr, ptep) do { } while (0)
64#define pmd_update_defer(mm, addr, ptep) do { } while (0)
65
66#define pgd_val(x) native_pgd_val(x)
67#define __pgd(x) native_make_pgd(x)
68
69#ifndef __PAGETABLE_PUD_FOLDED
70#define pud_val(x) native_pud_val(x)
71#define __pud(x) native_make_pud(x)
72#endif
73
74#ifndef __PAGETABLE_PMD_FOLDED
75#define pmd_val(x) native_pmd_val(x)
76#define __pmd(x) native_make_pmd(x)
77#endif
78
79#define pte_val(x) native_pte_val(x)
80#define __pte(x) native_make_pte(x)
81
82#define arch_end_context_switch(prev) do {} while(0)
83
84#endif /* CONFIG_PARAVIRT */
85
86/*
87 * The following only work if pte_present() is true.
88 * Undefined behaviour if not..
89 */
90static inline int pte_dirty(pte_t pte)
91{
92 return pte_flags(pte) & _PAGE_DIRTY;
93}
94
95static inline int pte_young(pte_t pte)
96{
97 return pte_flags(pte) & _PAGE_ACCESSED;
98}
99
100static inline int pmd_young(pmd_t pmd)
101{
102 return pmd_flags(pmd) & _PAGE_ACCESSED;
103}
104
105static inline int pte_write(pte_t pte)
106{
107 return pte_flags(pte) & _PAGE_RW;
108}
109
110static inline int pte_file(pte_t pte)
111{
112 return pte_flags(pte) & _PAGE_FILE;
113}
114
115static inline int pte_huge(pte_t pte)
116{
117 return pte_flags(pte) & _PAGE_PSE;
118}
119
120static inline int pte_global(pte_t pte)
121{
122 return pte_flags(pte) & _PAGE_GLOBAL;
123}
124
125static inline int pte_exec(pte_t pte)
126{
127 return !(pte_flags(pte) & _PAGE_NX);
128}
129
130static inline int pte_special(pte_t pte)
131{
132 return pte_flags(pte) & _PAGE_SPECIAL;
133}
134
135static inline unsigned long pte_pfn(pte_t pte)
136{
137 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
138}
139
140static inline unsigned long pmd_pfn(pmd_t pmd)
141{
142 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT;
143}
144
145#define pte_page(pte) pfn_to_page(pte_pfn(pte))
146
147static inline int pmd_large(pmd_t pte)
148{
149 return (pmd_flags(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
150 (_PAGE_PSE | _PAGE_PRESENT);
151}
152
153#ifdef CONFIG_TRANSPARENT_HUGEPAGE
154static inline int pmd_trans_splitting(pmd_t pmd)
155{
156 return pmd_val(pmd) & _PAGE_SPLITTING;
157}
158
159static inline int pmd_trans_huge(pmd_t pmd)
160{
161 return pmd_val(pmd) & _PAGE_PSE;
162}
163
164static inline int has_transparent_hugepage(void)
165{
166 return cpu_has_pse;
167}
168#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
169
170static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
171{
172 pteval_t v = native_pte_val(pte);
173
174 return native_make_pte(v | set);
175}
176
177static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
178{
179 pteval_t v = native_pte_val(pte);
180
181 return native_make_pte(v & ~clear);
182}
183
184static inline pte_t pte_mkclean(pte_t pte)
185{
186 return pte_clear_flags(pte, _PAGE_DIRTY);
187}
188
189static inline pte_t pte_mkold(pte_t pte)
190{
191 return pte_clear_flags(pte, _PAGE_ACCESSED);
192}
193
194static inline pte_t pte_wrprotect(pte_t pte)
195{
196 return pte_clear_flags(pte, _PAGE_RW);
197}
198
199static inline pte_t pte_mkexec(pte_t pte)
200{
201 return pte_clear_flags(pte, _PAGE_NX);
202}
203
204static inline pte_t pte_mkdirty(pte_t pte)
205{
206 return pte_set_flags(pte, _PAGE_DIRTY);
207}
208
209static inline pte_t pte_mkyoung(pte_t pte)
210{
211 return pte_set_flags(pte, _PAGE_ACCESSED);
212}
213
214static inline pte_t pte_mkwrite(pte_t pte)
215{
216 return pte_set_flags(pte, _PAGE_RW);
217}
218
219static inline pte_t pte_mkhuge(pte_t pte)
220{
221 return pte_set_flags(pte, _PAGE_PSE);
222}
223
224static inline pte_t pte_clrhuge(pte_t pte)
225{
226 return pte_clear_flags(pte, _PAGE_PSE);
227}
228
229static inline pte_t pte_mkglobal(pte_t pte)
230{
231 return pte_set_flags(pte, _PAGE_GLOBAL);
232}
233
234static inline pte_t pte_clrglobal(pte_t pte)
235{
236 return pte_clear_flags(pte, _PAGE_GLOBAL);
237}
238
239static inline pte_t pte_mkspecial(pte_t pte)
240{
241 return pte_set_flags(pte, _PAGE_SPECIAL);
242}
243
244static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
245{
246 pmdval_t v = native_pmd_val(pmd);
247
248 return __pmd(v | set);
249}
250
251static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
252{
253 pmdval_t v = native_pmd_val(pmd);
254
255 return __pmd(v & ~clear);
256}
257
258static inline pmd_t pmd_mkold(pmd_t pmd)
259{
260 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
261}
262
263static inline pmd_t pmd_wrprotect(pmd_t pmd)
264{
265 return pmd_clear_flags(pmd, _PAGE_RW);
266}
267
268static inline pmd_t pmd_mkdirty(pmd_t pmd)
269{
270 return pmd_set_flags(pmd, _PAGE_DIRTY);
271}
272
273static inline pmd_t pmd_mkhuge(pmd_t pmd)
274{
275 return pmd_set_flags(pmd, _PAGE_PSE);
276}
277
278static inline pmd_t pmd_mkyoung(pmd_t pmd)
279{
280 return pmd_set_flags(pmd, _PAGE_ACCESSED);
281}
282
283static inline pmd_t pmd_mkwrite(pmd_t pmd)
284{
285 return pmd_set_flags(pmd, _PAGE_RW);
286}
287
288static inline pmd_t pmd_mknotpresent(pmd_t pmd)
289{
290 return pmd_clear_flags(pmd, _PAGE_PRESENT);
291}
292
293/*
294 * Mask out unsupported bits in a present pgprot. Non-present pgprots
295 * can use those bits for other purposes, so leave them be.
296 */
297static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
298{
299 pgprotval_t protval = pgprot_val(pgprot);
300
301 if (protval & _PAGE_PRESENT)
302 protval &= __supported_pte_mask;
303
304 return protval;
305}
306
307static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
308{
309 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
310 massage_pgprot(pgprot));
311}
312
313static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
314{
315 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
316 massage_pgprot(pgprot));
317}
318
319static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
320{
321 pteval_t val = pte_val(pte);
322
323 /*
324 * Chop off the NX bit (if present), and add the NX portion of
325 * the newprot (if present):
326 */
327 val &= _PAGE_CHG_MASK;
328 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
329
330 return __pte(val);
331}
332
333static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
334{
335 pmdval_t val = pmd_val(pmd);
336
337 val &= _HPAGE_CHG_MASK;
338 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
339
340 return __pmd(val);
341}
342
343/* mprotect needs to preserve PAT bits when updating vm_page_prot */
344#define pgprot_modify pgprot_modify
345static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
346{
347 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
348 pgprotval_t addbits = pgprot_val(newprot);
349 return __pgprot(preservebits | addbits);
350}
351
352#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
353
354#define canon_pgprot(p) __pgprot(massage_pgprot(p))
355
356static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
357 unsigned long flags,
358 unsigned long new_flags)
359{
360 /*
361 * PAT type is always WB for untracked ranges, so no need to check.
362 */
363 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
364 return 1;
365
366 /*
367 * Certain new memtypes are not allowed with certain
368 * requested memtype:
369 * - request is uncached, return cannot be write-back
370 * - request is write-combine, return cannot be write-back
371 */
372 if ((flags == _PAGE_CACHE_UC_MINUS &&
373 new_flags == _PAGE_CACHE_WB) ||
374 (flags == _PAGE_CACHE_WC &&
375 new_flags == _PAGE_CACHE_WB)) {
376 return 0;
377 }
378
379 return 1;
380}
381
382pmd_t *populate_extra_pmd(unsigned long vaddr);
383pte_t *populate_extra_pte(unsigned long vaddr);
384#endif /* __ASSEMBLY__ */
385
386#ifdef CONFIG_X86_32
387# include "pgtable_32.h"
388#else
389# include "pgtable_64.h"
390#endif
391
392#ifndef __ASSEMBLY__
393#include <linux/mm_types.h>
394
395static inline int pte_none(pte_t pte)
396{
397 return !pte.pte;
398}
399
400#define __HAVE_ARCH_PTE_SAME
401static inline int pte_same(pte_t a, pte_t b)
402{
403 return a.pte == b.pte;
404}
405
406static inline int pte_present(pte_t a)
407{
408 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
409}
410
411static inline int pte_hidden(pte_t pte)
412{
413 return pte_flags(pte) & _PAGE_HIDDEN;
414}
415
416static inline int pmd_present(pmd_t pmd)
417{
418 return pmd_flags(pmd) & _PAGE_PRESENT;
419}
420
421static inline int pmd_none(pmd_t pmd)
422{
423 /* Only check low word on 32-bit platforms, since it might be
424 out of sync with upper half. */
425 return (unsigned long)native_pmd_val(pmd) == 0;
426}
427
428static inline unsigned long pmd_page_vaddr(pmd_t pmd)
429{
430 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK);
431}
432
433/*
434 * Currently stuck as a macro due to indirect forward reference to
435 * linux/mmzone.h's __section_mem_map_addr() definition:
436 */
437#define pmd_page(pmd) pfn_to_page((pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT)
438
439/*
440 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
441 *
442 * this macro returns the index of the entry in the pmd page which would
443 * control the given virtual address
444 */
445static inline unsigned long pmd_index(unsigned long address)
446{
447 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
448}
449
450/*
451 * Conversion functions: convert a page and protection to a page entry,
452 * and a page entry and page directory to the page they refer to.
453 *
454 * (Currently stuck as a macro because of indirect forward reference
455 * to linux/mm.h:page_to_nid())
456 */
457#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
458
459/*
460 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
461 *
462 * this function returns the index of the entry in the pte page which would
463 * control the given virtual address
464 */
465static inline unsigned long pte_index(unsigned long address)
466{
467 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
468}
469
470static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
471{
472 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
473}
474
475static inline int pmd_bad(pmd_t pmd)
476{
477 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
478}
479
480static inline unsigned long pages_to_mb(unsigned long npg)
481{
482 return npg >> (20 - PAGE_SHIFT);
483}
484
485#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
486 remap_pfn_range(vma, vaddr, pfn, size, prot)
487
488#if PAGETABLE_LEVELS > 2
489static inline int pud_none(pud_t pud)
490{
491 return native_pud_val(pud) == 0;
492}
493
494static inline int pud_present(pud_t pud)
495{
496 return pud_flags(pud) & _PAGE_PRESENT;
497}
498
499static inline unsigned long pud_page_vaddr(pud_t pud)
500{
501 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK);
502}
503
504/*
505 * Currently stuck as a macro due to indirect forward reference to
506 * linux/mmzone.h's __section_mem_map_addr() definition:
507 */
508#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
509
510/* Find an entry in the second-level page table.. */
511static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
512{
513 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
514}
515
516static inline int pud_large(pud_t pud)
517{
518 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
519 (_PAGE_PSE | _PAGE_PRESENT);
520}
521
522static inline int pud_bad(pud_t pud)
523{
524 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
525}
526#else
527static inline int pud_large(pud_t pud)
528{
529 return 0;
530}
531#endif /* PAGETABLE_LEVELS > 2 */
532
533#if PAGETABLE_LEVELS > 3
534static inline int pgd_present(pgd_t pgd)
535{
536 return pgd_flags(pgd) & _PAGE_PRESENT;
537}
538
539static inline unsigned long pgd_page_vaddr(pgd_t pgd)
540{
541 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
542}
543
544/*
545 * Currently stuck as a macro due to indirect forward reference to
546 * linux/mmzone.h's __section_mem_map_addr() definition:
547 */
548#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
549
550/* to find an entry in a page-table-directory. */
551static inline unsigned long pud_index(unsigned long address)
552{
553 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
554}
555
556static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
557{
558 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
559}
560
561static inline int pgd_bad(pgd_t pgd)
562{
563 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
564}
565
566static inline int pgd_none(pgd_t pgd)
567{
568 return !native_pgd_val(pgd);
569}
570#endif /* PAGETABLE_LEVELS > 3 */
571
572#endif /* __ASSEMBLY__ */
573
574/*
575 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
576 *
577 * this macro returns the index of the entry in the pgd page which would
578 * control the given virtual address
579 */
580#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
581
582/*
583 * pgd_offset() returns a (pgd_t *)
584 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
585 */
586#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
587/*
588 * a shortcut which implies the use of the kernel's pgd, instead
589 * of a process's
590 */
591#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
592
593
594#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
595#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
596
597#ifndef __ASSEMBLY__
598
599extern int direct_gbpages;
600
601/* local pte updates need not use xchg for locking */
602static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
603{
604 pte_t res = *ptep;
605
606 /* Pure native function needs no input for mm, addr */
607 native_pte_clear(NULL, 0, ptep);
608 return res;
609}
610
611static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
612{
613 pmd_t res = *pmdp;
614
615 native_pmd_clear(pmdp);
616 return res;
617}
618
619static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
620 pte_t *ptep , pte_t pte)
621{
622 native_set_pte(ptep, pte);
623}
624
625static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
626 pmd_t *pmdp , pmd_t pmd)
627{
628 native_set_pmd(pmdp, pmd);
629}
630
631#ifndef CONFIG_PARAVIRT
632/*
633 * Rules for using pte_update - it must be called after any PTE update which
634 * has not been done using the set_pte / clear_pte interfaces. It is used by
635 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
636 * updates should either be sets, clears, or set_pte_atomic for P->P
637 * transitions, which means this hook should only be called for user PTEs.
638 * This hook implies a P->P protection or access change has taken place, which
639 * requires a subsequent TLB flush. The notification can optionally be delayed
640 * until the TLB flush event by using the pte_update_defer form of the
641 * interface, but care must be taken to assure that the flush happens while
642 * still holding the same page table lock so that the shadow and primary pages
643 * do not become out of sync on SMP.
644 */
645#define pte_update(mm, addr, ptep) do { } while (0)
646#define pte_update_defer(mm, addr, ptep) do { } while (0)
647#endif
648
649/*
650 * We only update the dirty/accessed state if we set
651 * the dirty bit by hand in the kernel, since the hardware
652 * will do the accessed bit for us, and we don't want to
653 * race with other CPU's that might be updating the dirty
654 * bit at the same time.
655 */
656struct vm_area_struct;
657
658#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
659extern int ptep_set_access_flags(struct vm_area_struct *vma,
660 unsigned long address, pte_t *ptep,
661 pte_t entry, int dirty);
662
663#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
664extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
665 unsigned long addr, pte_t *ptep);
666
667#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
668extern int ptep_clear_flush_young(struct vm_area_struct *vma,
669 unsigned long address, pte_t *ptep);
670
671#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
672static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
673 pte_t *ptep)
674{
675 pte_t pte = native_ptep_get_and_clear(ptep);
676 pte_update(mm, addr, ptep);
677 return pte;
678}
679
680#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
681static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
682 unsigned long addr, pte_t *ptep,
683 int full)
684{
685 pte_t pte;
686 if (full) {
687 /*
688 * Full address destruction in progress; paravirt does not
689 * care about updates and native needs no locking
690 */
691 pte = native_local_ptep_get_and_clear(ptep);
692 } else {
693 pte = ptep_get_and_clear(mm, addr, ptep);
694 }
695 return pte;
696}
697
698#define __HAVE_ARCH_PTEP_SET_WRPROTECT
699static inline void ptep_set_wrprotect(struct mm_struct *mm,
700 unsigned long addr, pte_t *ptep)
701{
702 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
703 pte_update(mm, addr, ptep);
704}
705
706#define flush_tlb_fix_spurious_fault(vma, address)
707
708#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
709
710#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
711extern int pmdp_set_access_flags(struct vm_area_struct *vma,
712 unsigned long address, pmd_t *pmdp,
713 pmd_t entry, int dirty);
714
715#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
716extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
717 unsigned long addr, pmd_t *pmdp);
718
719#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
720extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
721 unsigned long address, pmd_t *pmdp);
722
723
724#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
725extern void pmdp_splitting_flush(struct vm_area_struct *vma,
726 unsigned long addr, pmd_t *pmdp);
727
728#define __HAVE_ARCH_PMD_WRITE
729static inline int pmd_write(pmd_t pmd)
730{
731 return pmd_flags(pmd) & _PAGE_RW;
732}
733
734#define __HAVE_ARCH_PMDP_GET_AND_CLEAR
735static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, unsigned long addr,
736 pmd_t *pmdp)
737{
738 pmd_t pmd = native_pmdp_get_and_clear(pmdp);
739 pmd_update(mm, addr, pmdp);
740 return pmd;
741}
742
743#define __HAVE_ARCH_PMDP_SET_WRPROTECT
744static inline void pmdp_set_wrprotect(struct mm_struct *mm,
745 unsigned long addr, pmd_t *pmdp)
746{
747 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
748 pmd_update(mm, addr, pmdp);
749}
750
751/*
752 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
753 *
754 * dst - pointer to pgd range anwhere on a pgd page
755 * src - ""
756 * count - the number of pgds to copy.
757 *
758 * dst and src can be on the same page, but the range must not overlap,
759 * and must not cross a page boundary.
760 */
761static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
762{
763 memcpy(dst, src, count * sizeof(pgd_t));
764}
765
766
767#include <asm-generic/pgtable.h>
768#endif /* __ASSEMBLY__ */
769
770#endif /* _ASM_X86_PGTABLE_H */