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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * An rtc driver for the Dallas DS1511
4 *
5 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
6 * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
7 *
8 * Real time clock driver for the Dallas 1511 chip, which also
9 * contains a watchdog timer. There is a tiny amount of code that
10 * platform code could use to mess with the watchdog device a little
11 * bit, but not a full watchdog driver.
12 */
13
14#include <linux/bcd.h>
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/gfp.h>
18#include <linux/delay.h>
19#include <linux/interrupt.h>
20#include <linux/rtc.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23#include <linux/module.h>
24
25#define DS1511_SEC 0x0
26#define DS1511_MIN 0x1
27#define DS1511_HOUR 0x2
28#define DS1511_DOW 0x3
29#define DS1511_DOM 0x4
30#define DS1511_MONTH 0x5
31#define DS1511_YEAR 0x6
32#define DS1511_CENTURY 0x7
33#define DS1511_AM1_SEC 0x8
34#define DS1511_AM2_MIN 0x9
35#define DS1511_AM3_HOUR 0xa
36#define DS1511_AM4_DATE 0xb
37#define DS1511_WD_MSEC 0xc
38#define DS1511_WD_SEC 0xd
39#define DS1511_CONTROL_A 0xe
40#define DS1511_CONTROL_B 0xf
41#define DS1511_RAMADDR_LSB 0x10
42#define DS1511_RAMDATA 0x13
43
44#define DS1511_BLF1 0x80
45#define DS1511_BLF2 0x40
46#define DS1511_PRS 0x20
47#define DS1511_PAB 0x10
48#define DS1511_TDF 0x08
49#define DS1511_KSF 0x04
50#define DS1511_WDF 0x02
51#define DS1511_IRQF 0x01
52#define DS1511_TE 0x80
53#define DS1511_CS 0x40
54#define DS1511_BME 0x20
55#define DS1511_TPE 0x10
56#define DS1511_TIE 0x08
57#define DS1511_KIE 0x04
58#define DS1511_WDE 0x02
59#define DS1511_WDS 0x01
60#define DS1511_RAM_MAX 0x100
61
62struct ds1511_data {
63 struct rtc_device *rtc;
64 void __iomem *ioaddr; /* virtual base address */
65 int irq;
66 spinlock_t lock;
67};
68
69static DEFINE_SPINLOCK(ds1511_lock);
70
71static __iomem char *ds1511_base;
72static u32 reg_spacing = 1;
73
74static void rtc_write(uint8_t val, uint32_t reg)
75{
76 writeb(val, ds1511_base + (reg * reg_spacing));
77}
78
79static uint8_t rtc_read(uint32_t reg)
80{
81 return readb(ds1511_base + (reg * reg_spacing));
82}
83
84static void rtc_disable_update(void)
85{
86 rtc_write((rtc_read(DS1511_CONTROL_B) & ~DS1511_TE), DS1511_CONTROL_B);
87}
88
89static void rtc_enable_update(void)
90{
91 rtc_write((rtc_read(DS1511_CONTROL_B) | DS1511_TE), DS1511_CONTROL_B);
92}
93
94static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
95{
96 u8 mon, day, dow, hrs, min, sec, yrs, cen;
97 unsigned long flags;
98
99 yrs = rtc_tm->tm_year % 100;
100 cen = 19 + rtc_tm->tm_year / 100;
101 mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
102 day = rtc_tm->tm_mday;
103 dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
104 hrs = rtc_tm->tm_hour;
105 min = rtc_tm->tm_min;
106 sec = rtc_tm->tm_sec;
107
108 /*
109 * each register is a different number of valid bits
110 */
111 sec = bin2bcd(sec) & 0x7f;
112 min = bin2bcd(min) & 0x7f;
113 hrs = bin2bcd(hrs) & 0x3f;
114 day = bin2bcd(day) & 0x3f;
115 mon = bin2bcd(mon) & 0x1f;
116 yrs = bin2bcd(yrs) & 0xff;
117 cen = bin2bcd(cen) & 0xff;
118
119 spin_lock_irqsave(&ds1511_lock, flags);
120 rtc_disable_update();
121 rtc_write(cen, DS1511_CENTURY);
122 rtc_write(yrs, DS1511_YEAR);
123 rtc_write((rtc_read(DS1511_MONTH) & 0xe0) | mon, DS1511_MONTH);
124 rtc_write(day, DS1511_DOM);
125 rtc_write(hrs, DS1511_HOUR);
126 rtc_write(min, DS1511_MIN);
127 rtc_write(sec, DS1511_SEC);
128 rtc_write(dow, DS1511_DOW);
129 rtc_enable_update();
130 spin_unlock_irqrestore(&ds1511_lock, flags);
131
132 return 0;
133}
134
135static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
136{
137 unsigned int century;
138 unsigned long flags;
139
140 spin_lock_irqsave(&ds1511_lock, flags);
141 rtc_disable_update();
142
143 rtc_tm->tm_sec = rtc_read(DS1511_SEC) & 0x7f;
144 rtc_tm->tm_min = rtc_read(DS1511_MIN) & 0x7f;
145 rtc_tm->tm_hour = rtc_read(DS1511_HOUR) & 0x3f;
146 rtc_tm->tm_mday = rtc_read(DS1511_DOM) & 0x3f;
147 rtc_tm->tm_wday = rtc_read(DS1511_DOW) & 0x7;
148 rtc_tm->tm_mon = rtc_read(DS1511_MONTH) & 0x1f;
149 rtc_tm->tm_year = rtc_read(DS1511_YEAR) & 0x7f;
150 century = rtc_read(DS1511_CENTURY);
151
152 rtc_enable_update();
153 spin_unlock_irqrestore(&ds1511_lock, flags);
154
155 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
156 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
157 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
158 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
159 rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
160 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
161 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
162 century = bcd2bin(century) * 100;
163
164 /*
165 * Account for differences between how the RTC uses the values
166 * and how they are defined in a struct rtc_time;
167 */
168 century += rtc_tm->tm_year;
169 rtc_tm->tm_year = century - 1900;
170
171 rtc_tm->tm_mon--;
172
173 return 0;
174}
175
176static void ds1511_rtc_alarm_enable(unsigned int enabled)
177{
178 rtc_write(rtc_read(DS1511_CONTROL_B) | (enabled ? DS1511_TIE : 0), DS1511_CONTROL_B);
179}
180
181static int ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
182{
183 struct ds1511_data *ds1511 = dev_get_drvdata(dev);
184 unsigned long flags;
185
186 spin_lock_irqsave(&ds1511->lock, flags);
187 rtc_write(bin2bcd(alrm->time.tm_mday) & 0x3f, DS1511_AM4_DATE);
188 rtc_write(bin2bcd(alrm->time.tm_hour) & 0x3f, DS1511_AM3_HOUR);
189 rtc_write(bin2bcd(alrm->time.tm_min) & 0x7f, DS1511_AM2_MIN);
190 rtc_write(bin2bcd(alrm->time.tm_sec) & 0x7f, DS1511_AM1_SEC);
191 ds1511_rtc_alarm_enable(alrm->enabled);
192
193 rtc_read(DS1511_CONTROL_A); /* clear interrupts */
194 spin_unlock_irqrestore(&ds1511->lock, flags);
195
196 return 0;
197}
198
199static int ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
200{
201 alrm->time.tm_mday = bcd2bin(rtc_read(DS1511_AM4_DATE) & 0x3f);
202 alrm->time.tm_hour = bcd2bin(rtc_read(DS1511_AM3_HOUR) & 0x3f);
203 alrm->time.tm_min = bcd2bin(rtc_read(DS1511_AM2_MIN) & 0x7f);
204 alrm->time.tm_sec = bcd2bin(rtc_read(DS1511_AM1_SEC) & 0x7f);
205 alrm->enabled = !!(rtc_read(DS1511_CONTROL_B) & DS1511_TIE);
206
207 return 0;
208}
209
210static irqreturn_t ds1511_interrupt(int irq, void *dev_id)
211{
212 struct platform_device *pdev = dev_id;
213 struct ds1511_data *ds1511 = platform_get_drvdata(pdev);
214 unsigned long events = 0;
215
216 spin_lock(&ds1511->lock);
217 /*
218 * read and clear interrupt
219 */
220 if (rtc_read(DS1511_CONTROL_A) & DS1511_IRQF) {
221 events = RTC_IRQF | RTC_AF;
222 rtc_update_irq(ds1511->rtc, 1, events);
223 }
224 spin_unlock(&ds1511->lock);
225 return events ? IRQ_HANDLED : IRQ_NONE;
226}
227
228static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
229{
230 struct ds1511_data *ds1511 = dev_get_drvdata(dev);
231 unsigned long flags;
232
233 spin_lock_irqsave(&ds1511->lock, flags);
234 ds1511_rtc_alarm_enable(enabled);
235 spin_unlock_irqrestore(&ds1511->lock, flags);
236
237 return 0;
238}
239
240static const struct rtc_class_ops ds1511_rtc_ops = {
241 .read_time = ds1511_rtc_read_time,
242 .set_time = ds1511_rtc_set_time,
243 .read_alarm = ds1511_rtc_read_alarm,
244 .set_alarm = ds1511_rtc_set_alarm,
245 .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
246};
247
248static int ds1511_nvram_read(void *priv, unsigned int pos, void *buf,
249 size_t size)
250{
251 int i;
252
253 rtc_write(pos, DS1511_RAMADDR_LSB);
254 for (i = 0; i < size; i++)
255 *(char *)buf++ = rtc_read(DS1511_RAMDATA);
256
257 return 0;
258}
259
260static int ds1511_nvram_write(void *priv, unsigned int pos, void *buf,
261 size_t size)
262{
263 int i;
264
265 rtc_write(pos, DS1511_RAMADDR_LSB);
266 for (i = 0; i < size; i++)
267 rtc_write(*(char *)buf++, DS1511_RAMDATA);
268
269 return 0;
270}
271
272static int ds1511_rtc_probe(struct platform_device *pdev)
273{
274 struct ds1511_data *ds1511;
275 int ret = 0;
276 struct nvmem_config ds1511_nvmem_cfg = {
277 .name = "ds1511_nvram",
278 .word_size = 1,
279 .stride = 1,
280 .size = DS1511_RAM_MAX,
281 .reg_read = ds1511_nvram_read,
282 .reg_write = ds1511_nvram_write,
283 .priv = &pdev->dev,
284 };
285
286 ds1511 = devm_kzalloc(&pdev->dev, sizeof(*ds1511), GFP_KERNEL);
287 if (!ds1511)
288 return -ENOMEM;
289
290 ds1511_base = devm_platform_ioremap_resource(pdev, 0);
291 if (IS_ERR(ds1511_base))
292 return PTR_ERR(ds1511_base);
293 ds1511->ioaddr = ds1511_base;
294 ds1511->irq = platform_get_irq(pdev, 0);
295
296 /*
297 * turn on the clock and the crystal, etc.
298 */
299 rtc_write(DS1511_BME, DS1511_CONTROL_B);
300 rtc_write(0, DS1511_CONTROL_A);
301 /*
302 * clear the wdog counter
303 */
304 rtc_write(0, DS1511_WD_MSEC);
305 rtc_write(0, DS1511_WD_SEC);
306 /*
307 * start the clock
308 */
309 rtc_enable_update();
310
311 /*
312 * check for a dying bat-tree
313 */
314 if (rtc_read(DS1511_CONTROL_A) & DS1511_BLF1)
315 dev_warn(&pdev->dev, "voltage-low detected.\n");
316
317 spin_lock_init(&ds1511->lock);
318 platform_set_drvdata(pdev, ds1511);
319
320 ds1511->rtc = devm_rtc_allocate_device(&pdev->dev);
321 if (IS_ERR(ds1511->rtc))
322 return PTR_ERR(ds1511->rtc);
323
324 ds1511->rtc->ops = &ds1511_rtc_ops;
325 ds1511->rtc->range_max = RTC_TIMESTAMP_END_2099;
326 ds1511->rtc->alarm_offset_max = 28 * 24 * 60 * 60 - 1;
327
328 /*
329 * if the platform has an interrupt in mind for this device,
330 * then by all means, set it
331 */
332 if (ds1511->irq > 0) {
333 rtc_read(DS1511_CONTROL_A);
334 if (devm_request_irq(&pdev->dev, ds1511->irq, ds1511_interrupt,
335 IRQF_SHARED, pdev->name, pdev) < 0) {
336
337 dev_warn(&pdev->dev, "interrupt not available.\n");
338 ds1511->irq = 0;
339 }
340 }
341
342 if (ds1511->irq == 0)
343 clear_bit(RTC_FEATURE_ALARM, ds1511->rtc->features);
344
345 ret = devm_rtc_register_device(ds1511->rtc);
346 if (ret)
347 return ret;
348
349 devm_rtc_nvmem_register(ds1511->rtc, &ds1511_nvmem_cfg);
350
351 return 0;
352}
353
354/* work with hotplug and coldplug */
355MODULE_ALIAS("platform:ds1511");
356
357static struct platform_driver ds1511_rtc_driver = {
358 .probe = ds1511_rtc_probe,
359 .driver = {
360 .name = "ds1511",
361 },
362};
363
364module_platform_driver(ds1511_rtc_driver);
365
366MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
367MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
368MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * An rtc driver for the Dallas DS1511
4 *
5 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
6 * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
7 *
8 * Real time clock driver for the Dallas 1511 chip, which also
9 * contains a watchdog timer. There is a tiny amount of code that
10 * platform code could use to mess with the watchdog device a little
11 * bit, but not a full watchdog driver.
12 */
13
14#include <linux/bcd.h>
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/gfp.h>
18#include <linux/delay.h>
19#include <linux/interrupt.h>
20#include <linux/rtc.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23#include <linux/module.h>
24
25#define DS1511_SEC 0x0
26#define DS1511_MIN 0x1
27#define DS1511_HOUR 0x2
28#define DS1511_DOW 0x3
29#define DS1511_DOM 0x4
30#define DS1511_MONTH 0x5
31#define DS1511_YEAR 0x6
32#define DS1511_CENTURY 0x7
33#define DS1511_AM1_SEC 0x8
34#define DS1511_AM2_MIN 0x9
35#define DS1511_AM3_HOUR 0xa
36#define DS1511_AM4_DATE 0xb
37#define DS1511_WD_MSEC 0xc
38#define DS1511_WD_SEC 0xd
39#define DS1511_CONTROL_A 0xe
40#define DS1511_CONTROL_B 0xf
41#define DS1511_RAMADDR_LSB 0x10
42#define DS1511_RAMDATA 0x13
43
44#define DS1511_BLF1 0x80
45#define DS1511_BLF2 0x40
46#define DS1511_PRS 0x20
47#define DS1511_PAB 0x10
48#define DS1511_TDF 0x08
49#define DS1511_KSF 0x04
50#define DS1511_WDF 0x02
51#define DS1511_IRQF 0x01
52#define DS1511_TE 0x80
53#define DS1511_CS 0x40
54#define DS1511_BME 0x20
55#define DS1511_TPE 0x10
56#define DS1511_TIE 0x08
57#define DS1511_KIE 0x04
58#define DS1511_WDE 0x02
59#define DS1511_WDS 0x01
60#define DS1511_RAM_MAX 0x100
61
62struct ds1511_data {
63 struct rtc_device *rtc;
64 void __iomem *ioaddr; /* virtual base address */
65 int irq;
66 spinlock_t lock;
67};
68
69static DEFINE_SPINLOCK(ds1511_lock);
70
71static __iomem char *ds1511_base;
72static u32 reg_spacing = 1;
73
74static void rtc_write(uint8_t val, uint32_t reg)
75{
76 writeb(val, ds1511_base + (reg * reg_spacing));
77}
78
79static uint8_t rtc_read(uint32_t reg)
80{
81 return readb(ds1511_base + (reg * reg_spacing));
82}
83
84static void rtc_disable_update(void)
85{
86 rtc_write((rtc_read(DS1511_CONTROL_B) & ~DS1511_TE), DS1511_CONTROL_B);
87}
88
89static void rtc_enable_update(void)
90{
91 rtc_write((rtc_read(DS1511_CONTROL_B) | DS1511_TE), DS1511_CONTROL_B);
92}
93
94static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
95{
96 u8 mon, day, dow, hrs, min, sec, yrs, cen;
97 unsigned long flags;
98
99 yrs = rtc_tm->tm_year % 100;
100 cen = 19 + rtc_tm->tm_year / 100;
101 mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
102 day = rtc_tm->tm_mday;
103 dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
104 hrs = rtc_tm->tm_hour;
105 min = rtc_tm->tm_min;
106 sec = rtc_tm->tm_sec;
107
108 /*
109 * each register is a different number of valid bits
110 */
111 sec = bin2bcd(sec) & 0x7f;
112 min = bin2bcd(min) & 0x7f;
113 hrs = bin2bcd(hrs) & 0x3f;
114 day = bin2bcd(day) & 0x3f;
115 mon = bin2bcd(mon) & 0x1f;
116 yrs = bin2bcd(yrs) & 0xff;
117 cen = bin2bcd(cen) & 0xff;
118
119 spin_lock_irqsave(&ds1511_lock, flags);
120 rtc_disable_update();
121 rtc_write(cen, DS1511_CENTURY);
122 rtc_write(yrs, DS1511_YEAR);
123 rtc_write((rtc_read(DS1511_MONTH) & 0xe0) | mon, DS1511_MONTH);
124 rtc_write(day, DS1511_DOM);
125 rtc_write(hrs, DS1511_HOUR);
126 rtc_write(min, DS1511_MIN);
127 rtc_write(sec, DS1511_SEC);
128 rtc_write(dow, DS1511_DOW);
129 rtc_enable_update();
130 spin_unlock_irqrestore(&ds1511_lock, flags);
131
132 return 0;
133}
134
135static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
136{
137 unsigned int century;
138 unsigned long flags;
139
140 spin_lock_irqsave(&ds1511_lock, flags);
141 rtc_disable_update();
142
143 rtc_tm->tm_sec = rtc_read(DS1511_SEC) & 0x7f;
144 rtc_tm->tm_min = rtc_read(DS1511_MIN) & 0x7f;
145 rtc_tm->tm_hour = rtc_read(DS1511_HOUR) & 0x3f;
146 rtc_tm->tm_mday = rtc_read(DS1511_DOM) & 0x3f;
147 rtc_tm->tm_wday = rtc_read(DS1511_DOW) & 0x7;
148 rtc_tm->tm_mon = rtc_read(DS1511_MONTH) & 0x1f;
149 rtc_tm->tm_year = rtc_read(DS1511_YEAR) & 0x7f;
150 century = rtc_read(DS1511_CENTURY);
151
152 rtc_enable_update();
153 spin_unlock_irqrestore(&ds1511_lock, flags);
154
155 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
156 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
157 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
158 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
159 rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
160 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
161 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
162 century = bcd2bin(century) * 100;
163
164 /*
165 * Account for differences between how the RTC uses the values
166 * and how they are defined in a struct rtc_time;
167 */
168 century += rtc_tm->tm_year;
169 rtc_tm->tm_year = century - 1900;
170
171 rtc_tm->tm_mon--;
172
173 return 0;
174}
175
176static void ds1511_rtc_alarm_enable(unsigned int enabled)
177{
178 rtc_write(rtc_read(DS1511_CONTROL_B) | (enabled ? DS1511_TIE : 0), DS1511_CONTROL_B);
179}
180
181static int ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
182{
183 struct ds1511_data *ds1511 = dev_get_drvdata(dev);
184 unsigned long flags;
185
186 spin_lock_irqsave(&ds1511->lock, flags);
187 rtc_write(bin2bcd(alrm->time.tm_mday) & 0x3f, DS1511_AM4_DATE);
188 rtc_write(bin2bcd(alrm->time.tm_hour) & 0x3f, DS1511_AM3_HOUR);
189 rtc_write(bin2bcd(alrm->time.tm_min) & 0x7f, DS1511_AM2_MIN);
190 rtc_write(bin2bcd(alrm->time.tm_sec) & 0x7f, DS1511_AM1_SEC);
191 ds1511_rtc_alarm_enable(alrm->enabled);
192
193 rtc_read(DS1511_CONTROL_A); /* clear interrupts */
194 spin_unlock_irqrestore(&ds1511->lock, flags);
195
196 return 0;
197}
198
199static int ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
200{
201 alrm->time.tm_mday = bcd2bin(rtc_read(DS1511_AM4_DATE) & 0x3f);
202 alrm->time.tm_hour = bcd2bin(rtc_read(DS1511_AM3_HOUR) & 0x3f);
203 alrm->time.tm_min = bcd2bin(rtc_read(DS1511_AM2_MIN) & 0x7f);
204 alrm->time.tm_sec = bcd2bin(rtc_read(DS1511_AM1_SEC) & 0x7f);
205 alrm->enabled = !!(rtc_read(DS1511_CONTROL_B) & DS1511_TIE);
206
207 return 0;
208}
209
210static irqreturn_t ds1511_interrupt(int irq, void *dev_id)
211{
212 struct platform_device *pdev = dev_id;
213 struct ds1511_data *ds1511 = platform_get_drvdata(pdev);
214 unsigned long events = 0;
215
216 spin_lock(&ds1511->lock);
217 /*
218 * read and clear interrupt
219 */
220 if (rtc_read(DS1511_CONTROL_A) & DS1511_IRQF) {
221 events = RTC_IRQF | RTC_AF;
222 rtc_update_irq(ds1511->rtc, 1, events);
223 }
224 spin_unlock(&ds1511->lock);
225 return events ? IRQ_HANDLED : IRQ_NONE;
226}
227
228static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
229{
230 struct ds1511_data *ds1511 = dev_get_drvdata(dev);
231 unsigned long flags;
232
233 spin_lock_irqsave(&ds1511->lock, flags);
234 ds1511_rtc_alarm_enable(enabled);
235 spin_unlock_irqrestore(&ds1511->lock, flags);
236
237 return 0;
238}
239
240static const struct rtc_class_ops ds1511_rtc_ops = {
241 .read_time = ds1511_rtc_read_time,
242 .set_time = ds1511_rtc_set_time,
243 .read_alarm = ds1511_rtc_read_alarm,
244 .set_alarm = ds1511_rtc_set_alarm,
245 .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
246};
247
248static int ds1511_nvram_read(void *priv, unsigned int pos, void *buf,
249 size_t size)
250{
251 int i;
252
253 rtc_write(pos, DS1511_RAMADDR_LSB);
254 for (i = 0; i < size; i++)
255 *(char *)buf++ = rtc_read(DS1511_RAMDATA);
256
257 return 0;
258}
259
260static int ds1511_nvram_write(void *priv, unsigned int pos, void *buf,
261 size_t size)
262{
263 int i;
264
265 rtc_write(pos, DS1511_RAMADDR_LSB);
266 for (i = 0; i < size; i++)
267 rtc_write(*(char *)buf++, DS1511_RAMDATA);
268
269 return 0;
270}
271
272static int ds1511_rtc_probe(struct platform_device *pdev)
273{
274 struct ds1511_data *ds1511;
275 int ret = 0;
276 struct nvmem_config ds1511_nvmem_cfg = {
277 .name = "ds1511_nvram",
278 .word_size = 1,
279 .stride = 1,
280 .size = DS1511_RAM_MAX,
281 .reg_read = ds1511_nvram_read,
282 .reg_write = ds1511_nvram_write,
283 .priv = &pdev->dev,
284 };
285
286 ds1511 = devm_kzalloc(&pdev->dev, sizeof(*ds1511), GFP_KERNEL);
287 if (!ds1511)
288 return -ENOMEM;
289
290 ds1511_base = devm_platform_ioremap_resource(pdev, 0);
291 if (IS_ERR(ds1511_base))
292 return PTR_ERR(ds1511_base);
293 ds1511->ioaddr = ds1511_base;
294 ds1511->irq = platform_get_irq(pdev, 0);
295
296 /*
297 * turn on the clock and the crystal, etc.
298 */
299 rtc_write(DS1511_BME, DS1511_CONTROL_B);
300 rtc_write(0, DS1511_CONTROL_A);
301 /*
302 * clear the wdog counter
303 */
304 rtc_write(0, DS1511_WD_MSEC);
305 rtc_write(0, DS1511_WD_SEC);
306 /*
307 * start the clock
308 */
309 rtc_enable_update();
310
311 /*
312 * check for a dying bat-tree
313 */
314 if (rtc_read(DS1511_CONTROL_A) & DS1511_BLF1)
315 dev_warn(&pdev->dev, "voltage-low detected.\n");
316
317 spin_lock_init(&ds1511->lock);
318 platform_set_drvdata(pdev, ds1511);
319
320 ds1511->rtc = devm_rtc_allocate_device(&pdev->dev);
321 if (IS_ERR(ds1511->rtc))
322 return PTR_ERR(ds1511->rtc);
323
324 ds1511->rtc->ops = &ds1511_rtc_ops;
325 ds1511->rtc->range_max = RTC_TIMESTAMP_END_2099;
326 ds1511->rtc->alarm_offset_max = 28 * 24 * 60 * 60 - 1;
327
328 /*
329 * if the platform has an interrupt in mind for this device,
330 * then by all means, set it
331 */
332 if (ds1511->irq > 0) {
333 rtc_read(DS1511_CONTROL_A);
334 if (devm_request_irq(&pdev->dev, ds1511->irq, ds1511_interrupt,
335 IRQF_SHARED, pdev->name, pdev) < 0) {
336
337 dev_warn(&pdev->dev, "interrupt not available.\n");
338 ds1511->irq = 0;
339 }
340 }
341
342 if (ds1511->irq == 0)
343 clear_bit(RTC_FEATURE_ALARM, ds1511->rtc->features);
344
345 ret = devm_rtc_register_device(ds1511->rtc);
346 if (ret)
347 return ret;
348
349 devm_rtc_nvmem_register(ds1511->rtc, &ds1511_nvmem_cfg);
350
351 return 0;
352}
353
354/* work with hotplug and coldplug */
355MODULE_ALIAS("platform:ds1511");
356
357static struct platform_driver ds1511_rtc_driver = {
358 .probe = ds1511_rtc_probe,
359 .driver = {
360 .name = "ds1511",
361 },
362};
363
364module_platform_driver(ds1511_rtc_driver);
365
366MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
367MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
368MODULE_LICENSE("GPL");