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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * drivers/pwm/pwm-pxa.c
4 *
5 * simple driver for PWM (Pulse Width Modulator) controller
6 *
7 * 2008-02-13 initial version
8 * eric miao <eric.miao@marvell.com>
9 *
10 * Links to reference manuals for some of the supported PWM chips can be found
11 * in Documentation/arch/arm/marvell.rst.
12 *
13 * Limitations:
14 * - When PWM is stopped, the current PWM period stops abruptly at the next
15 * input clock (PWMCR_SD is set) and the output is driven to inactive.
16 */
17
18#include <linux/mod_devicetable.h>
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/platform_device.h>
22#include <linux/slab.h>
23#include <linux/err.h>
24#include <linux/clk.h>
25#include <linux/io.h>
26#include <linux/pwm.h>
27#include <linux/of.h>
28
29#include <asm/div64.h>
30
31#define HAS_SECONDARY_PWM 0x10
32
33static const struct platform_device_id pwm_id_table[] = {
34 /* PWM has_secondary_pwm? */
35 { "pxa25x-pwm", 0 },
36 { "pxa27x-pwm", HAS_SECONDARY_PWM },
37 { "pxa168-pwm", 0 },
38 { "pxa910-pwm", 0 },
39 { },
40};
41MODULE_DEVICE_TABLE(platform, pwm_id_table);
42
43/* PWM registers and bits definitions */
44#define PWMCR (0x00)
45#define PWMDCR (0x04)
46#define PWMPCR (0x08)
47
48#define PWMCR_SD (1 << 6)
49#define PWMDCR_FD (1 << 10)
50
51struct pxa_pwm_chip {
52 struct device *dev;
53
54 struct clk *clk;
55 void __iomem *mmio_base;
56};
57
58static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
59{
60 return pwmchip_get_drvdata(chip);
61}
62
63/*
64 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
65 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
66 */
67static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
68 u64 duty_ns, u64 period_ns)
69{
70 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
71 unsigned long long c;
72 unsigned long period_cycles, prescale, pv, dc;
73 unsigned long offset;
74
75 offset = pwm->hwpwm ? 0x10 : 0;
76
77 c = clk_get_rate(pc->clk);
78 c = c * period_ns;
79 do_div(c, 1000000000);
80 period_cycles = c;
81
82 if (period_cycles < 1)
83 period_cycles = 1;
84 prescale = (period_cycles - 1) / 1024;
85 pv = period_cycles / (prescale + 1) - 1;
86
87 if (prescale > 63)
88 return -EINVAL;
89
90 if (duty_ns == period_ns)
91 dc = PWMDCR_FD;
92 else
93 dc = mul_u64_u64_div_u64(pv + 1, duty_ns, period_ns);
94
95 writel(prescale | PWMCR_SD, pc->mmio_base + offset + PWMCR);
96 writel(dc, pc->mmio_base + offset + PWMDCR);
97 writel(pv, pc->mmio_base + offset + PWMPCR);
98
99 return 0;
100}
101
102static int pxa_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
103 const struct pwm_state *state)
104{
105 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
106 u64 duty_cycle;
107 int err;
108
109 if (state->polarity != PWM_POLARITY_NORMAL)
110 return -EINVAL;
111
112 err = clk_prepare_enable(pc->clk);
113 if (err)
114 return err;
115
116 duty_cycle = state->enabled ? state->duty_cycle : 0;
117
118 err = pxa_pwm_config(chip, pwm, duty_cycle, state->period);
119 if (err) {
120 clk_disable_unprepare(pc->clk);
121 return err;
122 }
123
124 if (state->enabled && !pwm->state.enabled)
125 return 0;
126
127 clk_disable_unprepare(pc->clk);
128
129 if (!state->enabled && pwm->state.enabled)
130 clk_disable_unprepare(pc->clk);
131
132 return 0;
133}
134
135static const struct pwm_ops pxa_pwm_ops = {
136 .apply = pxa_pwm_apply,
137};
138
139#ifdef CONFIG_OF
140/*
141 * Device tree users must create one device instance for each PWM channel.
142 * Hence we dispense with the HAS_SECONDARY_PWM and "tell" the original driver
143 * code that this is a single channel pxa25x-pwm. Currently all devices are
144 * supported identically.
145 */
146static const struct of_device_id pwm_of_match[] = {
147 { .compatible = "marvell,pxa250-pwm", .data = &pwm_id_table[0]},
148 { .compatible = "marvell,pxa270-pwm", .data = &pwm_id_table[0]},
149 { .compatible = "marvell,pxa168-pwm", .data = &pwm_id_table[0]},
150 { .compatible = "marvell,pxa910-pwm", .data = &pwm_id_table[0]},
151 { }
152};
153MODULE_DEVICE_TABLE(of, pwm_of_match);
154#else
155#define pwm_of_match NULL
156#endif
157
158static int pwm_probe(struct platform_device *pdev)
159{
160 const struct platform_device_id *id = platform_get_device_id(pdev);
161 struct pwm_chip *chip;
162 struct pxa_pwm_chip *pc;
163 int ret = 0;
164
165 if (IS_ENABLED(CONFIG_OF) && id == NULL)
166 id = of_device_get_match_data(&pdev->dev);
167
168 if (id == NULL)
169 return -EINVAL;
170
171 chip = devm_pwmchip_alloc(&pdev->dev,
172 (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1,
173 sizeof(*pc));
174 if (IS_ERR(chip))
175 return PTR_ERR(chip);
176 pc = to_pxa_pwm_chip(chip);
177
178 pc->clk = devm_clk_get(&pdev->dev, NULL);
179 if (IS_ERR(pc->clk))
180 return PTR_ERR(pc->clk);
181
182 chip->ops = &pxa_pwm_ops;
183
184 if (IS_ENABLED(CONFIG_OF))
185 chip->of_xlate = of_pwm_single_xlate;
186
187 pc->mmio_base = devm_platform_ioremap_resource(pdev, 0);
188 if (IS_ERR(pc->mmio_base))
189 return PTR_ERR(pc->mmio_base);
190
191 ret = devm_pwmchip_add(&pdev->dev, chip);
192 if (ret < 0) {
193 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
194 return ret;
195 }
196
197 return 0;
198}
199
200static struct platform_driver pwm_driver = {
201 .driver = {
202 .name = "pxa25x-pwm",
203 .of_match_table = pwm_of_match,
204 },
205 .probe = pwm_probe,
206 .id_table = pwm_id_table,
207};
208
209module_platform_driver(pwm_driver);
210
211MODULE_DESCRIPTION("PXA Pulse Width Modulator driver");
212MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * drivers/pwm/pwm-pxa.c
4 *
5 * simple driver for PWM (Pulse Width Modulator) controller
6 *
7 * 2008-02-13 initial version
8 * eric miao <eric.miao@marvell.com>
9 *
10 * Links to reference manuals for some of the supported PWM chips can be found
11 * in Documentation/arch/arm/marvell.rst.
12 *
13 * Limitations:
14 * - When PWM is stopped, the current PWM period stops abruptly at the next
15 * input clock (PWMCR_SD is set) and the output is driven to inactive.
16 */
17
18#include <linux/mod_devicetable.h>
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/platform_device.h>
22#include <linux/slab.h>
23#include <linux/err.h>
24#include <linux/clk.h>
25#include <linux/io.h>
26#include <linux/pwm.h>
27#include <linux/of.h>
28
29#include <asm/div64.h>
30
31#define HAS_SECONDARY_PWM 0x10
32
33static const struct platform_device_id pwm_id_table[] = {
34 /* PWM has_secondary_pwm? */
35 { "pxa25x-pwm", 0 },
36 { "pxa27x-pwm", HAS_SECONDARY_PWM },
37 { "pxa168-pwm", 0 },
38 { "pxa910-pwm", 0 },
39 { },
40};
41MODULE_DEVICE_TABLE(platform, pwm_id_table);
42
43/* PWM registers and bits definitions */
44#define PWMCR (0x00)
45#define PWMDCR (0x04)
46#define PWMPCR (0x08)
47
48#define PWMCR_SD (1 << 6)
49#define PWMDCR_FD (1 << 10)
50
51struct pxa_pwm_chip {
52 struct device *dev;
53
54 struct clk *clk;
55 void __iomem *mmio_base;
56};
57
58static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
59{
60 return pwmchip_get_drvdata(chip);
61}
62
63/*
64 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
65 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
66 */
67static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
68 u64 duty_ns, u64 period_ns)
69{
70 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
71 unsigned long long c;
72 unsigned long period_cycles, prescale, pv, dc;
73 unsigned long offset;
74
75 offset = pwm->hwpwm ? 0x10 : 0;
76
77 c = clk_get_rate(pc->clk);
78 c = c * period_ns;
79 do_div(c, 1000000000);
80 period_cycles = c;
81
82 if (period_cycles < 1)
83 period_cycles = 1;
84 prescale = (period_cycles - 1) / 1024;
85 pv = period_cycles / (prescale + 1) - 1;
86
87 if (prescale > 63)
88 return -EINVAL;
89
90 if (duty_ns == period_ns)
91 dc = PWMDCR_FD;
92 else
93 dc = mul_u64_u64_div_u64(pv + 1, duty_ns, period_ns);
94
95 writel(prescale | PWMCR_SD, pc->mmio_base + offset + PWMCR);
96 writel(dc, pc->mmio_base + offset + PWMDCR);
97 writel(pv, pc->mmio_base + offset + PWMPCR);
98
99 return 0;
100}
101
102static int pxa_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
103 const struct pwm_state *state)
104{
105 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
106 u64 duty_cycle;
107 int err;
108
109 if (state->polarity != PWM_POLARITY_NORMAL)
110 return -EINVAL;
111
112 err = clk_prepare_enable(pc->clk);
113 if (err)
114 return err;
115
116 duty_cycle = state->enabled ? state->duty_cycle : 0;
117
118 err = pxa_pwm_config(chip, pwm, duty_cycle, state->period);
119 if (err) {
120 clk_disable_unprepare(pc->clk);
121 return err;
122 }
123
124 if (state->enabled && !pwm->state.enabled)
125 return 0;
126
127 clk_disable_unprepare(pc->clk);
128
129 if (!state->enabled && pwm->state.enabled)
130 clk_disable_unprepare(pc->clk);
131
132 return 0;
133}
134
135static const struct pwm_ops pxa_pwm_ops = {
136 .apply = pxa_pwm_apply,
137};
138
139#ifdef CONFIG_OF
140/*
141 * Device tree users must create one device instance for each PWM channel.
142 * Hence we dispense with the HAS_SECONDARY_PWM and "tell" the original driver
143 * code that this is a single channel pxa25x-pwm. Currently all devices are
144 * supported identically.
145 */
146static const struct of_device_id pwm_of_match[] = {
147 { .compatible = "marvell,pxa250-pwm", .data = &pwm_id_table[0]},
148 { .compatible = "marvell,pxa270-pwm", .data = &pwm_id_table[0]},
149 { .compatible = "marvell,pxa168-pwm", .data = &pwm_id_table[0]},
150 { .compatible = "marvell,pxa910-pwm", .data = &pwm_id_table[0]},
151 { }
152};
153MODULE_DEVICE_TABLE(of, pwm_of_match);
154#else
155#define pwm_of_match NULL
156#endif
157
158static int pwm_probe(struct platform_device *pdev)
159{
160 const struct platform_device_id *id = platform_get_device_id(pdev);
161 struct pwm_chip *chip;
162 struct pxa_pwm_chip *pc;
163 int ret = 0;
164
165 if (IS_ENABLED(CONFIG_OF) && id == NULL)
166 id = of_device_get_match_data(&pdev->dev);
167
168 if (id == NULL)
169 return -EINVAL;
170
171 chip = devm_pwmchip_alloc(&pdev->dev,
172 (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1,
173 sizeof(*pc));
174 if (IS_ERR(chip))
175 return PTR_ERR(chip);
176 pc = to_pxa_pwm_chip(chip);
177
178 pc->clk = devm_clk_get(&pdev->dev, NULL);
179 if (IS_ERR(pc->clk))
180 return PTR_ERR(pc->clk);
181
182 chip->ops = &pxa_pwm_ops;
183
184 if (IS_ENABLED(CONFIG_OF))
185 chip->of_xlate = of_pwm_single_xlate;
186
187 pc->mmio_base = devm_platform_ioremap_resource(pdev, 0);
188 if (IS_ERR(pc->mmio_base))
189 return PTR_ERR(pc->mmio_base);
190
191 ret = devm_pwmchip_add(&pdev->dev, chip);
192 if (ret < 0) {
193 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
194 return ret;
195 }
196
197 return 0;
198}
199
200static struct platform_driver pwm_driver = {
201 .driver = {
202 .name = "pxa25x-pwm",
203 .of_match_table = pwm_of_match,
204 },
205 .probe = pwm_probe,
206 .id_table = pwm_id_table,
207};
208
209module_platform_driver(pwm_driver);
210
211MODULE_LICENSE("GPL v2");