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1/* SPDX-License-Identifier: ISC */
2/* Copyright (C) 2021 MediaTek Inc. */
3
4#define FIRMWARE_MT7622 "mediatek/mt7622pr2h.bin"
5#define FIRMWARE_MT7663 "mediatek/mt7663pr2h.bin"
6#define FIRMWARE_MT7668 "mediatek/mt7668pr2h.bin"
7#define FIRMWARE_MT7922 "mediatek/BT_RAM_CODE_MT7922_1_1_hdr.bin"
8#define FIRMWARE_MT7961 "mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin"
9#define FIRMWARE_MT7925 "mediatek/mt7925/BT_RAM_CODE_MT7925_1_1_hdr.bin"
10
11#define HCI_EV_WMT 0xe4
12#define HCI_WMT_MAX_EVENT_SIZE 64
13
14#define BTMTK_WMT_REG_WRITE 0x1
15#define BTMTK_WMT_REG_READ 0x2
16
17#define MT7921_BTSYS_RST 0x70002610
18#define MT7921_BTSYS_RST_WITH_GPIO BIT(7)
19
20#define MT7921_PINMUX_0 0x70005050
21#define MT7921_PINMUX_1 0x70005054
22
23#define MT7921_DLSTATUS 0x7c053c10
24#define BT_DL_STATE BIT(1)
25
26#define MTK_COREDUMP_SIZE (1024 * 1000)
27#define MTK_COREDUMP_END "coredump end"
28#define MTK_COREDUMP_END_LEN (sizeof(MTK_COREDUMP_END))
29#define MTK_COREDUMP_NUM 255
30
31/* UHW CR mapping */
32#define MTK_BT_MISC 0x70002510
33#define MTK_BT_SUBSYS_RST 0x70002610
34#define MTK_UDMA_INT_STA_BT 0x74000024
35#define MTK_UDMA_INT_STA_BT1 0x74000308
36#define MTK_BT_WDT_STATUS 0x740003A0
37#define MTK_EP_RST_OPT 0x74011890
38#define MTK_EP_RST_IN_OUT_OPT 0x00010001
39#define MTK_BT_RST_DONE 0x00000100
40#define MTK_BT_RESET_REG_CONNV3 0x70028610
41#define MTK_BT_READ_DEV_ID 0x70010200
42
43/* MediaTek ISO Interface */
44#define MTK_ISO_IFNUM 2
45
46enum {
47 BTMTK_WMT_PATCH_DWNLD = 0x1,
48 BTMTK_WMT_TEST = 0x2,
49 BTMTK_WMT_WAKEUP = 0x3,
50 BTMTK_WMT_HIF = 0x4,
51 BTMTK_WMT_FUNC_CTRL = 0x6,
52 BTMTK_WMT_RST = 0x7,
53 BTMTK_WMT_REGISTER = 0x8,
54 BTMTK_WMT_SEMAPHORE = 0x17,
55};
56
57enum {
58 BTMTK_WMT_INVALID,
59 BTMTK_WMT_PATCH_UNDONE,
60 BTMTK_WMT_PATCH_PROGRESS,
61 BTMTK_WMT_PATCH_DONE,
62 BTMTK_WMT_ON_UNDONE,
63 BTMTK_WMT_ON_DONE,
64 BTMTK_WMT_ON_PROGRESS,
65};
66
67struct btmtk_wmt_hdr {
68 u8 dir;
69 u8 op;
70 __le16 dlen;
71 u8 flag;
72} __packed;
73
74struct btmtk_hci_wmt_cmd {
75 struct btmtk_wmt_hdr hdr;
76 u8 data[];
77} __packed;
78
79struct btmtk_hci_wmt_evt {
80 struct hci_event_hdr hhdr;
81 struct btmtk_wmt_hdr whdr;
82} __packed;
83
84struct btmtk_hci_wmt_evt_funcc {
85 struct btmtk_hci_wmt_evt hwhdr;
86 __be16 status;
87} __packed;
88
89struct btmtk_hci_wmt_evt_reg {
90 struct btmtk_hci_wmt_evt hwhdr;
91 u8 rsv[2];
92 u8 num;
93 __le32 addr;
94 __le32 val;
95} __packed;
96
97struct btmtk_tci_sleep {
98 u8 mode;
99 __le16 duration;
100 __le16 host_duration;
101 u8 host_wakeup_pin;
102 u8 time_compensation;
103} __packed;
104
105struct btmtk_wakeon {
106 u8 mode;
107 u8 gpo;
108 u8 active_high;
109 __le16 enable_delay;
110 __le16 wakeup_delay;
111} __packed;
112
113struct btmtk_sco {
114 u8 clock_config;
115 u8 transmit_format_config;
116 u8 channel_format_config;
117 u8 channel_select_config;
118} __packed;
119
120struct reg_read_cmd {
121 u8 type;
122 u8 rsv;
123 u8 num;
124 __le32 addr;
125} __packed;
126
127struct reg_write_cmd {
128 u8 type;
129 u8 rsv;
130 u8 num;
131 __le32 addr;
132 __le32 data;
133 __le32 mask;
134} __packed;
135
136struct btmtk_hci_wmt_params {
137 u8 op;
138 u8 flag;
139 u16 dlen;
140 const void *data;
141 u32 *status;
142};
143
144enum {
145 BTMTK_TX_WAIT_VND_EVT,
146 BTMTK_FIRMWARE_LOADED,
147 BTMTK_HW_RESET_ACTIVE,
148 BTMTK_ISOPKT_OVER_INTR,
149 BTMTK_ISOPKT_RUNNING,
150};
151
152typedef int (*btmtk_reset_sync_func_t)(struct hci_dev *, void *);
153
154struct btmtk_coredump_info {
155 const char *driver_name;
156 u32 fw_version;
157 u16 cnt;
158 int state;
159};
160
161struct btmtk_data {
162 const char *drv_name;
163 unsigned long flags;
164 u32 dev_id;
165 btmtk_reset_sync_func_t reset_sync;
166 struct btmtk_coredump_info cd_info;
167
168 struct usb_device *udev;
169 struct usb_interface *intf;
170 struct usb_anchor *ctrl_anchor;
171 struct sk_buff *evt_skb;
172 struct usb_endpoint_descriptor *isopkt_tx_ep;
173 struct usb_endpoint_descriptor *isopkt_rx_ep;
174 struct usb_interface *isopkt_intf;
175 struct usb_anchor isopkt_anchor;
176 struct sk_buff *isopkt_skb;
177
178 /* spinlock for ISO data transmission */
179 spinlock_t isorxlock;
180};
181
182typedef int (*wmt_cmd_sync_func_t)(struct hci_dev *,
183 struct btmtk_hci_wmt_params *);
184
185#if IS_ENABLED(CONFIG_BT_MTK)
186
187int btmtk_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
188
189int btmtk_setup_firmware_79xx(struct hci_dev *hdev, const char *fwname,
190 wmt_cmd_sync_func_t wmt_cmd_sync);
191
192int btmtk_setup_firmware(struct hci_dev *hdev, const char *fwname,
193 wmt_cmd_sync_func_t wmt_cmd_sync);
194
195void btmtk_reset_sync(struct hci_dev *hdev);
196
197int btmtk_register_coredump(struct hci_dev *hdev, const char *name,
198 u32 fw_version);
199
200int btmtk_process_coredump(struct hci_dev *hdev, struct sk_buff *skb);
201
202void btmtk_fw_get_filename(char *buf, size_t size, u32 dev_id, u32 fw_ver,
203 u32 fw_flavor);
204
205int btmtk_usb_subsys_reset(struct hci_dev *hdev, u32 dev_id);
206
207int btmtk_usb_recv_acl(struct hci_dev *hdev, struct sk_buff *skb);
208
209struct urb *alloc_mtk_intr_urb(struct hci_dev *hdev, struct sk_buff *skb,
210 usb_complete_t tx_complete);
211
212int btmtk_usb_resume(struct hci_dev *hdev);
213
214int btmtk_usb_suspend(struct hci_dev *hdev);
215
216int btmtk_usb_setup(struct hci_dev *hdev);
217
218int btmtk_usb_shutdown(struct hci_dev *hdev);
219#else
220
221static inline int btmtk_set_bdaddr(struct hci_dev *hdev,
222 const bdaddr_t *bdaddr)
223{
224 return -EOPNOTSUPP;
225}
226
227static inline int btmtk_setup_firmware_79xx(struct hci_dev *hdev,
228 const char *fwname,
229 wmt_cmd_sync_func_t wmt_cmd_sync)
230{
231 return -EOPNOTSUPP;
232}
233
234static inline int btmtk_setup_firmware(struct hci_dev *hdev, const char *fwname,
235 wmt_cmd_sync_func_t wmt_cmd_sync)
236{
237 return -EOPNOTSUPP;
238}
239
240static inline void btmtk_reset_sync(struct hci_dev *hdev)
241{
242}
243
244static inline int btmtk_register_coredump(struct hci_dev *hdev,
245 const char *name, u32 fw_version)
246{
247 return -EOPNOTSUPP;
248}
249
250static inline int btmtk_process_coredump(struct hci_dev *hdev,
251 struct sk_buff *skb)
252{
253 return -EOPNOTSUPP;
254}
255
256static inline void btmtk_fw_get_filename(char *buf, size_t size, u32 dev_id,
257 u32 fw_ver, u32 fw_flavor)
258{
259}
260
261static inline int btmtk_usb_subsys_reset(struct hci_dev *hdev, u32 dev_id)
262{
263 return -EOPNOTSUPP;
264}
265
266static inline int btmtk_usb_recv_acl(struct hci_dev *hdev, struct sk_buff *skb)
267{
268 return -EOPNOTSUPP;
269}
270
271static inline struct urb *alloc_mtk_intr_urb(struct hci_dev *hdev,
272 struct sk_buff *skb,
273 usb_complete_t tx_complete)
274{
275 return ERR_PTR(-EOPNOTSUPP);
276}
277
278static inline int btmtk_usb_resume(struct hci_dev *hdev)
279{
280 return -EOPNOTSUPP;
281}
282
283static inline int btmtk_usb_suspend(struct hci_dev *hdev)
284{
285 return -EOPNOTSUPP;
286}
287
288static inline int btmtk_usb_setup(struct hci_dev *hdev)
289{
290 return -EOPNOTSUPP;
291}
292
293static inline int btmtk_usb_shutdown(struct hci_dev *hdev)
294{
295 return -EOPNOTSUPP;
296}
297#endif
1/* SPDX-License-Identifier: ISC */
2/* Copyright (C) 2021 MediaTek Inc. */
3
4#define FIRMWARE_MT7622 "mediatek/mt7622pr2h.bin"
5#define FIRMWARE_MT7663 "mediatek/mt7663pr2h.bin"
6#define FIRMWARE_MT7668 "mediatek/mt7668pr2h.bin"
7#define FIRMWARE_MT7922 "mediatek/BT_RAM_CODE_MT7922_1_1_hdr.bin"
8#define FIRMWARE_MT7961 "mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin"
9#define FIRMWARE_MT7925 "mediatek/mt7925/BT_RAM_CODE_MT7925_1_1_hdr.bin"
10
11#define HCI_EV_WMT 0xe4
12#define HCI_WMT_MAX_EVENT_SIZE 64
13
14#define BTMTK_WMT_REG_WRITE 0x1
15#define BTMTK_WMT_REG_READ 0x2
16
17#define MT7921_BTSYS_RST 0x70002610
18#define MT7921_BTSYS_RST_WITH_GPIO BIT(7)
19
20#define MT7921_PINMUX_0 0x70005050
21#define MT7921_PINMUX_1 0x70005054
22
23#define MT7921_DLSTATUS 0x7c053c10
24#define BT_DL_STATE BIT(1)
25
26#define MTK_COREDUMP_SIZE (1024 * 1000)
27#define MTK_COREDUMP_END "coredump end"
28#define MTK_COREDUMP_END_LEN (sizeof(MTK_COREDUMP_END))
29#define MTK_COREDUMP_NUM 255
30
31enum {
32 BTMTK_WMT_PATCH_DWNLD = 0x1,
33 BTMTK_WMT_TEST = 0x2,
34 BTMTK_WMT_WAKEUP = 0x3,
35 BTMTK_WMT_HIF = 0x4,
36 BTMTK_WMT_FUNC_CTRL = 0x6,
37 BTMTK_WMT_RST = 0x7,
38 BTMTK_WMT_REGISTER = 0x8,
39 BTMTK_WMT_SEMAPHORE = 0x17,
40};
41
42enum {
43 BTMTK_WMT_INVALID,
44 BTMTK_WMT_PATCH_UNDONE,
45 BTMTK_WMT_PATCH_PROGRESS,
46 BTMTK_WMT_PATCH_DONE,
47 BTMTK_WMT_ON_UNDONE,
48 BTMTK_WMT_ON_DONE,
49 BTMTK_WMT_ON_PROGRESS,
50};
51
52struct btmtk_wmt_hdr {
53 u8 dir;
54 u8 op;
55 __le16 dlen;
56 u8 flag;
57} __packed;
58
59struct btmtk_hci_wmt_cmd {
60 struct btmtk_wmt_hdr hdr;
61 u8 data[];
62} __packed;
63
64struct btmtk_hci_wmt_evt {
65 struct hci_event_hdr hhdr;
66 struct btmtk_wmt_hdr whdr;
67} __packed;
68
69struct btmtk_hci_wmt_evt_funcc {
70 struct btmtk_hci_wmt_evt hwhdr;
71 __be16 status;
72} __packed;
73
74struct btmtk_hci_wmt_evt_reg {
75 struct btmtk_hci_wmt_evt hwhdr;
76 u8 rsv[2];
77 u8 num;
78 __le32 addr;
79 __le32 val;
80} __packed;
81
82struct btmtk_tci_sleep {
83 u8 mode;
84 __le16 duration;
85 __le16 host_duration;
86 u8 host_wakeup_pin;
87 u8 time_compensation;
88} __packed;
89
90struct btmtk_wakeon {
91 u8 mode;
92 u8 gpo;
93 u8 active_high;
94 __le16 enable_delay;
95 __le16 wakeup_delay;
96} __packed;
97
98struct btmtk_sco {
99 u8 clock_config;
100 u8 transmit_format_config;
101 u8 channel_format_config;
102 u8 channel_select_config;
103} __packed;
104
105struct reg_read_cmd {
106 u8 type;
107 u8 rsv;
108 u8 num;
109 __le32 addr;
110} __packed;
111
112struct reg_write_cmd {
113 u8 type;
114 u8 rsv;
115 u8 num;
116 __le32 addr;
117 __le32 data;
118 __le32 mask;
119} __packed;
120
121struct btmtk_hci_wmt_params {
122 u8 op;
123 u8 flag;
124 u16 dlen;
125 const void *data;
126 u32 *status;
127};
128
129typedef int (*btmtk_reset_sync_func_t)(struct hci_dev *, void *);
130
131struct btmtk_coredump_info {
132 const char *driver_name;
133 u32 fw_version;
134 u16 cnt;
135 int state;
136};
137
138struct btmediatek_data {
139 u32 dev_id;
140 btmtk_reset_sync_func_t reset_sync;
141 struct btmtk_coredump_info cd_info;
142};
143
144typedef int (*wmt_cmd_sync_func_t)(struct hci_dev *,
145 struct btmtk_hci_wmt_params *);
146
147#if IS_ENABLED(CONFIG_BT_MTK)
148
149int btmtk_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
150
151int btmtk_setup_firmware_79xx(struct hci_dev *hdev, const char *fwname,
152 wmt_cmd_sync_func_t wmt_cmd_sync);
153
154int btmtk_setup_firmware(struct hci_dev *hdev, const char *fwname,
155 wmt_cmd_sync_func_t wmt_cmd_sync);
156
157void btmtk_reset_sync(struct hci_dev *hdev);
158
159int btmtk_register_coredump(struct hci_dev *hdev, const char *name,
160 u32 fw_version);
161
162int btmtk_process_coredump(struct hci_dev *hdev, struct sk_buff *skb);
163#else
164
165static inline int btmtk_set_bdaddr(struct hci_dev *hdev,
166 const bdaddr_t *bdaddr)
167{
168 return -EOPNOTSUPP;
169}
170
171static int btmtk_setup_firmware_79xx(struct hci_dev *hdev, const char *fwname,
172 wmt_cmd_sync_func_t wmt_cmd_sync)
173{
174 return -EOPNOTSUPP;
175}
176
177static int btmtk_setup_firmware(struct hci_dev *hdev, const char *fwname,
178 wmt_cmd_sync_func_t wmt_cmd_sync)
179{
180 return -EOPNOTSUPP;
181}
182
183static void btmtk_reset_sync(struct hci_dev *hdev)
184{
185}
186
187static int btmtk_register_coredump(struct hci_dev *hdev, const char *name,
188 u32 fw_version)
189{
190 return -EOPNOTSUPP;
191}
192
193static int btmtk_process_coredump(struct hci_dev *hdev, struct sk_buff *skb)
194{
195 return -EOPNOTSUPP;
196}
197#endif