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1// SPDX-License-Identifier: GPL-2.0
2#include <linux/module.h>
3#include <linux/kernel.h>
4#include <linux/init.h>
5#include <linux/platform_device.h>
6#include <linux/clkdev.h>
7#include <linux/clk-provider.h>
8#include <linux/dma-mapping.h>
9#include <linux/dmaengine.h>
10#include <linux/gpio-pxa.h>
11#include <linux/platform_data/i2c-pxa.h>
12#include <linux/soc/pxa/cpu.h>
13
14#include "udc.h"
15#include <linux/platform_data/video-pxafb.h>
16#include <linux/platform_data/mmc-pxamci.h>
17#include "irqs.h"
18#include <linux/platform_data/usb-ohci-pxa27x.h>
19#include <linux/platform_data/mmp_dma.h>
20
21#include "mfp-pxa2xx.h"
22#include "regs-ost.h"
23#include "reset.h"
24#include "devices.h"
25#include "generic.h"
26
27void __init pxa_register_device(struct platform_device *dev, void *data)
28{
29 int ret;
30
31 dev->dev.platform_data = data;
32
33 ret = platform_device_register(dev);
34 if (ret)
35 dev_err(&dev->dev, "unable to register device: %d\n", ret);
36}
37
38static struct resource pxa_resource_pmu = {
39 .start = IRQ_PMU,
40 .end = IRQ_PMU,
41 .flags = IORESOURCE_IRQ,
42};
43
44struct platform_device pxa_device_pmu = {
45 .name = "xscale-pmu",
46 .id = -1,
47 .resource = &pxa_resource_pmu,
48 .num_resources = 1,
49};
50
51static const struct resource pxamci_resources[] = {
52 [0] = {
53 .start = 0x41100000,
54 .end = 0x41100fff,
55 .flags = IORESOURCE_MEM,
56 },
57 [1] = {
58 .start = IRQ_MMC,
59 .end = IRQ_MMC,
60 .flags = IORESOURCE_IRQ,
61 },
62};
63
64void __init pxa_set_mci_info(const struct pxamci_platform_data *info,
65 const struct property_entry *props)
66{
67 const struct platform_device_info mci_info = {
68 .name = "pxa2xx-mci",
69 .id = 0,
70 .res = pxamci_resources,
71 .num_res = ARRAY_SIZE(pxamci_resources),
72 .data = info,
73 .size_data = sizeof(*info),
74 .dma_mask = 0xffffffffUL,
75 .properties = props,
76 };
77 struct platform_device *mci_dev;
78 int err;
79
80 mci_dev = platform_device_register_full(&mci_info);
81 err = PTR_ERR_OR_ZERO(mci_dev);
82 if (err)
83 pr_err("Unable to create mci device: %d\n", err);
84}
85
86static struct pxa2xx_udc_mach_info pxa_udc_info = {
87 .gpio_pullup = -1,
88};
89
90static struct resource pxa2xx_udc_resources[] = {
91 [0] = {
92 .start = 0x40600000,
93 .end = 0x4060ffff,
94 .flags = IORESOURCE_MEM,
95 },
96 [1] = {
97 .start = IRQ_USB,
98 .end = IRQ_USB,
99 .flags = IORESOURCE_IRQ,
100 },
101};
102
103static u64 udc_dma_mask = ~(u32)0;
104
105struct platform_device pxa25x_device_udc = {
106 .name = "pxa25x-udc",
107 .id = -1,
108 .resource = pxa2xx_udc_resources,
109 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
110 .dev = {
111 .platform_data = &pxa_udc_info,
112 .dma_mask = &udc_dma_mask,
113 }
114};
115
116struct platform_device pxa27x_device_udc = {
117 .name = "pxa27x-udc",
118 .id = -1,
119 .resource = pxa2xx_udc_resources,
120 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
121 .dev = {
122 .platform_data = &pxa_udc_info,
123 .dma_mask = &udc_dma_mask,
124 }
125};
126
127static struct resource pxafb_resources[] = {
128 [0] = {
129 .start = 0x44000000,
130 .end = 0x4400ffff,
131 .flags = IORESOURCE_MEM,
132 },
133 [1] = {
134 .start = IRQ_LCD,
135 .end = IRQ_LCD,
136 .flags = IORESOURCE_IRQ,
137 },
138};
139
140static u64 fb_dma_mask = ~(u64)0;
141
142struct platform_device pxa_device_fb = {
143 .name = "pxa2xx-fb",
144 .id = -1,
145 .dev = {
146 .dma_mask = &fb_dma_mask,
147 .coherent_dma_mask = 0xffffffff,
148 },
149 .num_resources = ARRAY_SIZE(pxafb_resources),
150 .resource = pxafb_resources,
151};
152
153void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
154{
155 pxa_device_fb.dev.parent = parent;
156 pxa_register_device(&pxa_device_fb, info);
157}
158
159static struct resource pxa_resource_ffuart[] = {
160 {
161 .start = 0x40100000,
162 .end = 0x40100023,
163 .flags = IORESOURCE_MEM,
164 }, {
165 .start = IRQ_FFUART,
166 .end = IRQ_FFUART,
167 .flags = IORESOURCE_IRQ,
168 }
169};
170
171struct platform_device pxa_device_ffuart = {
172 .name = "pxa2xx-uart",
173 .id = 0,
174 .resource = pxa_resource_ffuart,
175 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
176};
177
178void __init pxa_set_ffuart_info(void *info)
179{
180 pxa_register_device(&pxa_device_ffuart, info);
181}
182
183static struct resource pxa_resource_btuart[] = {
184 {
185 .start = 0x40200000,
186 .end = 0x40200023,
187 .flags = IORESOURCE_MEM,
188 }, {
189 .start = IRQ_BTUART,
190 .end = IRQ_BTUART,
191 .flags = IORESOURCE_IRQ,
192 }
193};
194
195struct platform_device pxa_device_btuart = {
196 .name = "pxa2xx-uart",
197 .id = 1,
198 .resource = pxa_resource_btuart,
199 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
200};
201
202void __init pxa_set_btuart_info(void *info)
203{
204 pxa_register_device(&pxa_device_btuart, info);
205}
206
207static struct resource pxa_resource_stuart[] = {
208 {
209 .start = 0x40700000,
210 .end = 0x40700023,
211 .flags = IORESOURCE_MEM,
212 }, {
213 .start = IRQ_STUART,
214 .end = IRQ_STUART,
215 .flags = IORESOURCE_IRQ,
216 }
217};
218
219struct platform_device pxa_device_stuart = {
220 .name = "pxa2xx-uart",
221 .id = 2,
222 .resource = pxa_resource_stuart,
223 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
224};
225
226void __init pxa_set_stuart_info(void *info)
227{
228 pxa_register_device(&pxa_device_stuart, info);
229}
230
231static struct resource pxa_resource_hwuart[] = {
232 {
233 .start = 0x41600000,
234 .end = 0x4160002F,
235 .flags = IORESOURCE_MEM,
236 }, {
237 .start = IRQ_HWUART,
238 .end = IRQ_HWUART,
239 .flags = IORESOURCE_IRQ,
240 }
241};
242
243struct platform_device pxa_device_hwuart = {
244 .name = "pxa2xx-uart",
245 .id = 3,
246 .resource = pxa_resource_hwuart,
247 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
248};
249
250void __init pxa_set_hwuart_info(void *info)
251{
252 if (cpu_is_pxa255())
253 pxa_register_device(&pxa_device_hwuart, info);
254 else
255 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
256}
257
258static struct resource pxai2c_resources[] = {
259 {
260 .start = 0x40301680,
261 .end = 0x403016a3,
262 .flags = IORESOURCE_MEM,
263 }, {
264 .start = IRQ_I2C,
265 .end = IRQ_I2C,
266 .flags = IORESOURCE_IRQ,
267 },
268};
269
270struct platform_device pxa_device_i2c = {
271 .name = "pxa2xx-i2c",
272 .id = 0,
273 .resource = pxai2c_resources,
274 .num_resources = ARRAY_SIZE(pxai2c_resources),
275};
276
277void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
278{
279 pxa_register_device(&pxa_device_i2c, info);
280}
281
282#ifdef CONFIG_PXA27x
283static struct resource pxa27x_resources_i2c_power[] = {
284 {
285 .start = 0x40f00180,
286 .end = 0x40f001a3,
287 .flags = IORESOURCE_MEM,
288 }, {
289 .start = IRQ_PWRI2C,
290 .end = IRQ_PWRI2C,
291 .flags = IORESOURCE_IRQ,
292 },
293};
294
295struct platform_device pxa27x_device_i2c_power = {
296 .name = "pxa2xx-i2c",
297 .id = 1,
298 .resource = pxa27x_resources_i2c_power,
299 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
300};
301#endif
302
303static struct resource pxai2s_resources[] = {
304 {
305 .start = 0x40400000,
306 .end = 0x40400083,
307 .flags = IORESOURCE_MEM,
308 }, {
309 .start = IRQ_I2S,
310 .end = IRQ_I2S,
311 .flags = IORESOURCE_IRQ,
312 },
313};
314
315struct platform_device pxa_device_i2s = {
316 .name = "pxa2xx-i2s",
317 .id = -1,
318 .resource = pxai2s_resources,
319 .num_resources = ARRAY_SIZE(pxai2s_resources),
320};
321
322struct platform_device pxa_device_asoc_ssp1 = {
323 .name = "pxa-ssp-dai",
324 .id = 0,
325};
326
327struct platform_device pxa_device_asoc_ssp2= {
328 .name = "pxa-ssp-dai",
329 .id = 1,
330};
331
332struct platform_device pxa_device_asoc_ssp3 = {
333 .name = "pxa-ssp-dai",
334 .id = 2,
335};
336
337struct platform_device pxa_device_asoc_ssp4 = {
338 .name = "pxa-ssp-dai",
339 .id = 3,
340};
341
342struct platform_device pxa_device_asoc_platform = {
343 .name = "pxa-pcm-audio",
344 .id = -1,
345};
346
347static struct resource pxa_rtc_resources[] = {
348 [0] = {
349 .start = 0x40900000,
350 .end = 0x40900000 + 0x3b,
351 .flags = IORESOURCE_MEM,
352 },
353 [1] = {
354 .start = IRQ_RTC1Hz,
355 .end = IRQ_RTC1Hz,
356 .name = "rtc 1Hz",
357 .flags = IORESOURCE_IRQ,
358 },
359 [2] = {
360 .start = IRQ_RTCAlrm,
361 .end = IRQ_RTCAlrm,
362 .name = "rtc alarm",
363 .flags = IORESOURCE_IRQ,
364 },
365};
366
367struct platform_device pxa_device_rtc = {
368 .name = "pxa-rtc",
369 .id = -1,
370 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
371 .resource = pxa_rtc_resources,
372};
373
374struct platform_device sa1100_device_rtc = {
375 .name = "sa1100-rtc",
376 .id = -1,
377 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
378 .resource = pxa_rtc_resources,
379};
380
381#ifdef CONFIG_PXA25x
382
383static struct resource pxa25x_resource_pwm0[] = {
384 [0] = {
385 .start = 0x40b00000,
386 .end = 0x40b0000f,
387 .flags = IORESOURCE_MEM,
388 },
389};
390
391struct platform_device pxa25x_device_pwm0 = {
392 .name = "pxa25x-pwm",
393 .id = 0,
394 .resource = pxa25x_resource_pwm0,
395 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
396};
397
398static struct resource pxa25x_resource_pwm1[] = {
399 [0] = {
400 .start = 0x40c00000,
401 .end = 0x40c0000f,
402 .flags = IORESOURCE_MEM,
403 },
404};
405
406struct platform_device pxa25x_device_pwm1 = {
407 .name = "pxa25x-pwm",
408 .id = 1,
409 .resource = pxa25x_resource_pwm1,
410 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
411};
412
413static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
414
415static struct resource pxa25x_resource_ssp[] = {
416 [0] = {
417 .start = 0x41000000,
418 .end = 0x4100001f,
419 .flags = IORESOURCE_MEM,
420 },
421 [1] = {
422 .start = IRQ_SSP,
423 .end = IRQ_SSP,
424 .flags = IORESOURCE_IRQ,
425 },
426};
427
428struct platform_device pxa25x_device_ssp = {
429 .name = "pxa25x-ssp",
430 .id = 0,
431 .dev = {
432 .dma_mask = &pxa25x_ssp_dma_mask,
433 .coherent_dma_mask = DMA_BIT_MASK(32),
434 },
435 .resource = pxa25x_resource_ssp,
436 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
437};
438
439static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
440
441static struct resource pxa25x_resource_nssp[] = {
442 [0] = {
443 .start = 0x41400000,
444 .end = 0x4140002f,
445 .flags = IORESOURCE_MEM,
446 },
447 [1] = {
448 .start = IRQ_NSSP,
449 .end = IRQ_NSSP,
450 .flags = IORESOURCE_IRQ,
451 },
452};
453
454struct platform_device pxa25x_device_nssp = {
455 .name = "pxa25x-nssp",
456 .id = 1,
457 .dev = {
458 .dma_mask = &pxa25x_nssp_dma_mask,
459 .coherent_dma_mask = DMA_BIT_MASK(32),
460 },
461 .resource = pxa25x_resource_nssp,
462 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
463};
464
465static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
466
467static struct resource pxa25x_resource_assp[] = {
468 [0] = {
469 .start = 0x41500000,
470 .end = 0x4150002f,
471 .flags = IORESOURCE_MEM,
472 },
473 [1] = {
474 .start = IRQ_ASSP,
475 .end = IRQ_ASSP,
476 .flags = IORESOURCE_IRQ,
477 },
478};
479
480struct platform_device pxa25x_device_assp = {
481 /* ASSP is basically equivalent to NSSP */
482 .name = "pxa25x-nssp",
483 .id = 2,
484 .dev = {
485 .dma_mask = &pxa25x_assp_dma_mask,
486 .coherent_dma_mask = DMA_BIT_MASK(32),
487 },
488 .resource = pxa25x_resource_assp,
489 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
490};
491#endif /* CONFIG_PXA25x */
492
493#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
494static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
495
496static struct resource pxa27x_resource_ohci[] = {
497 [0] = {
498 .start = 0x4C000000,
499 .end = 0x4C00ff6f,
500 .flags = IORESOURCE_MEM,
501 },
502 [1] = {
503 .start = IRQ_USBH1,
504 .end = IRQ_USBH1,
505 .flags = IORESOURCE_IRQ,
506 },
507};
508
509struct platform_device pxa27x_device_ohci = {
510 .name = "pxa27x-ohci",
511 .id = -1,
512 .dev = {
513 .dma_mask = &pxa27x_ohci_dma_mask,
514 .coherent_dma_mask = DMA_BIT_MASK(32),
515 },
516 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
517 .resource = pxa27x_resource_ohci,
518};
519
520void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
521{
522 pxa_register_device(&pxa27x_device_ohci, info);
523}
524#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
525
526#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
527static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
528
529static struct resource pxa27x_resource_ssp1[] = {
530 [0] = {
531 .start = 0x41000000,
532 .end = 0x4100003f,
533 .flags = IORESOURCE_MEM,
534 },
535 [1] = {
536 .start = IRQ_SSP,
537 .end = IRQ_SSP,
538 .flags = IORESOURCE_IRQ,
539 },
540};
541
542struct platform_device pxa27x_device_ssp1 = {
543 .name = "pxa27x-ssp",
544 .id = 0,
545 .dev = {
546 .dma_mask = &pxa27x_ssp1_dma_mask,
547 .coherent_dma_mask = DMA_BIT_MASK(32),
548 },
549 .resource = pxa27x_resource_ssp1,
550 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
551};
552
553static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
554
555static struct resource pxa27x_resource_ssp2[] = {
556 [0] = {
557 .start = 0x41700000,
558 .end = 0x4170003f,
559 .flags = IORESOURCE_MEM,
560 },
561 [1] = {
562 .start = IRQ_SSP2,
563 .end = IRQ_SSP2,
564 .flags = IORESOURCE_IRQ,
565 },
566};
567
568struct platform_device pxa27x_device_ssp2 = {
569 .name = "pxa27x-ssp",
570 .id = 1,
571 .dev = {
572 .dma_mask = &pxa27x_ssp2_dma_mask,
573 .coherent_dma_mask = DMA_BIT_MASK(32),
574 },
575 .resource = pxa27x_resource_ssp2,
576 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
577};
578
579static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
580
581static struct resource pxa27x_resource_ssp3[] = {
582 [0] = {
583 .start = 0x41900000,
584 .end = 0x4190003f,
585 .flags = IORESOURCE_MEM,
586 },
587 [1] = {
588 .start = IRQ_SSP3,
589 .end = IRQ_SSP3,
590 .flags = IORESOURCE_IRQ,
591 },
592};
593
594struct platform_device pxa27x_device_ssp3 = {
595 .name = "pxa27x-ssp",
596 .id = 2,
597 .dev = {
598 .dma_mask = &pxa27x_ssp3_dma_mask,
599 .coherent_dma_mask = DMA_BIT_MASK(32),
600 },
601 .resource = pxa27x_resource_ssp3,
602 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
603};
604
605static struct resource pxa27x_resource_pwm0[] = {
606 [0] = {
607 .start = 0x40b00000,
608 .end = 0x40b0001f,
609 .flags = IORESOURCE_MEM,
610 },
611};
612
613struct platform_device pxa27x_device_pwm0 = {
614 .name = "pxa27x-pwm",
615 .id = 0,
616 .resource = pxa27x_resource_pwm0,
617 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
618};
619
620static struct resource pxa27x_resource_pwm1[] = {
621 [0] = {
622 .start = 0x40c00000,
623 .end = 0x40c0001f,
624 .flags = IORESOURCE_MEM,
625 },
626};
627
628struct platform_device pxa27x_device_pwm1 = {
629 .name = "pxa27x-pwm",
630 .id = 1,
631 .resource = pxa27x_resource_pwm1,
632 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
633};
634#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
635
636#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
637const struct software_node pxa2xx_gpiochip_node = {
638 .name = "gpio-pxa",
639};
640
641struct resource pxa_resource_gpio[] = {
642 {
643 .start = 0x40e00000,
644 .end = 0x40e0ffff,
645 .flags = IORESOURCE_MEM,
646 }, {
647 .start = IRQ_GPIO0,
648 .end = IRQ_GPIO0,
649 .name = "gpio0",
650 .flags = IORESOURCE_IRQ,
651 }, {
652 .start = IRQ_GPIO1,
653 .end = IRQ_GPIO1,
654 .name = "gpio1",
655 .flags = IORESOURCE_IRQ,
656 }, {
657 .start = IRQ_GPIO_2_x,
658 .end = IRQ_GPIO_2_x,
659 .name = "gpio_mux",
660 .flags = IORESOURCE_IRQ,
661 },
662};
663
664static struct pxa_gpio_platform_data pxa2xx_gpio_info = {
665 .irq_base = PXA_GPIO_TO_IRQ(0),
666 .gpio_set_wake = gpio_set_wake,
667};
668
669struct platform_device pxa25x_device_gpio = {
670 .name = "pxa25x-gpio",
671 .id = -1,
672 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
673 .resource = pxa_resource_gpio,
674 .dev = {
675 .platform_data = &pxa2xx_gpio_info,
676 },
677};
678
679struct platform_device pxa27x_device_gpio = {
680 .name = "pxa27x-gpio",
681 .id = -1,
682 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
683 .resource = pxa_resource_gpio,
684 .dev = {
685 .platform_data = &pxa2xx_gpio_info,
686 },
687};
688#endif /* CONFIG_PXA25x || CONFIG_PXA27x */
689
690static struct resource pxa_dma_resource[] = {
691 [0] = {
692 .start = 0x40000000,
693 .end = 0x4000ffff,
694 .flags = IORESOURCE_MEM,
695 },
696 [1] = {
697 .start = IRQ_DMA,
698 .end = IRQ_DMA,
699 .flags = IORESOURCE_IRQ,
700 },
701};
702
703static u64 pxadma_dmamask = 0xffffffffUL;
704
705static struct platform_device pxa2xx_pxa_dma = {
706 .name = "pxa-dma",
707 .id = 0,
708 .dev = {
709 .dma_mask = &pxadma_dmamask,
710 .coherent_dma_mask = 0xffffffff,
711 },
712 .num_resources = ARRAY_SIZE(pxa_dma_resource),
713 .resource = pxa_dma_resource,
714};
715
716void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
717{
718 pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
719}
720
721void __init pxa_register_wdt(unsigned int reset_status)
722{
723 struct resource res = DEFINE_RES_MEM(OST_PHYS, OST_LEN);
724
725 reset_status &= RESET_STATUS_WATCHDOG;
726 platform_device_register_resndata(NULL, "sa1100_wdt", -1, &res, 1,
727 &reset_status, sizeof(reset_status));
728}
1// SPDX-License-Identifier: GPL-2.0
2#include <linux/module.h>
3#include <linux/kernel.h>
4#include <linux/init.h>
5#include <linux/platform_device.h>
6#include <linux/clkdev.h>
7#include <linux/clk-provider.h>
8#include <linux/dma-mapping.h>
9#include <linux/dmaengine.h>
10#include <linux/spi/pxa2xx_spi.h>
11#include <linux/platform_data/i2c-pxa.h>
12#include <linux/soc/pxa/cpu.h>
13
14#include "udc.h"
15#include <linux/platform_data/video-pxafb.h>
16#include <linux/platform_data/mmc-pxamci.h>
17#include "irqs.h"
18#include <linux/platform_data/usb-ohci-pxa27x.h>
19#include <linux/platform_data/mmp_dma.h>
20
21#include "regs-ost.h"
22#include "reset.h"
23#include "devices.h"
24#include "generic.h"
25
26void __init pxa_register_device(struct platform_device *dev, void *data)
27{
28 int ret;
29
30 dev->dev.platform_data = data;
31
32 ret = platform_device_register(dev);
33 if (ret)
34 dev_err(&dev->dev, "unable to register device: %d\n", ret);
35}
36
37static struct resource pxa_resource_pmu = {
38 .start = IRQ_PMU,
39 .end = IRQ_PMU,
40 .flags = IORESOURCE_IRQ,
41};
42
43struct platform_device pxa_device_pmu = {
44 .name = "xscale-pmu",
45 .id = -1,
46 .resource = &pxa_resource_pmu,
47 .num_resources = 1,
48};
49
50static struct resource pxamci_resources[] = {
51 [0] = {
52 .start = 0x41100000,
53 .end = 0x41100fff,
54 .flags = IORESOURCE_MEM,
55 },
56 [1] = {
57 .start = IRQ_MMC,
58 .end = IRQ_MMC,
59 .flags = IORESOURCE_IRQ,
60 },
61};
62
63static u64 pxamci_dmamask = 0xffffffffUL;
64
65struct platform_device pxa_device_mci = {
66 .name = "pxa2xx-mci",
67 .id = 0,
68 .dev = {
69 .dma_mask = &pxamci_dmamask,
70 .coherent_dma_mask = 0xffffffff,
71 },
72 .num_resources = ARRAY_SIZE(pxamci_resources),
73 .resource = pxamci_resources,
74};
75
76void __init pxa_set_mci_info(struct pxamci_platform_data *info)
77{
78 pxa_register_device(&pxa_device_mci, info);
79}
80
81static struct pxa2xx_udc_mach_info pxa_udc_info = {
82 .gpio_pullup = -1,
83};
84
85static struct resource pxa2xx_udc_resources[] = {
86 [0] = {
87 .start = 0x40600000,
88 .end = 0x4060ffff,
89 .flags = IORESOURCE_MEM,
90 },
91 [1] = {
92 .start = IRQ_USB,
93 .end = IRQ_USB,
94 .flags = IORESOURCE_IRQ,
95 },
96};
97
98static u64 udc_dma_mask = ~(u32)0;
99
100struct platform_device pxa25x_device_udc = {
101 .name = "pxa25x-udc",
102 .id = -1,
103 .resource = pxa2xx_udc_resources,
104 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
105 .dev = {
106 .platform_data = &pxa_udc_info,
107 .dma_mask = &udc_dma_mask,
108 }
109};
110
111struct platform_device pxa27x_device_udc = {
112 .name = "pxa27x-udc",
113 .id = -1,
114 .resource = pxa2xx_udc_resources,
115 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
116 .dev = {
117 .platform_data = &pxa_udc_info,
118 .dma_mask = &udc_dma_mask,
119 }
120};
121
122static struct resource pxafb_resources[] = {
123 [0] = {
124 .start = 0x44000000,
125 .end = 0x4400ffff,
126 .flags = IORESOURCE_MEM,
127 },
128 [1] = {
129 .start = IRQ_LCD,
130 .end = IRQ_LCD,
131 .flags = IORESOURCE_IRQ,
132 },
133};
134
135static u64 fb_dma_mask = ~(u64)0;
136
137struct platform_device pxa_device_fb = {
138 .name = "pxa2xx-fb",
139 .id = -1,
140 .dev = {
141 .dma_mask = &fb_dma_mask,
142 .coherent_dma_mask = 0xffffffff,
143 },
144 .num_resources = ARRAY_SIZE(pxafb_resources),
145 .resource = pxafb_resources,
146};
147
148void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
149{
150 pxa_device_fb.dev.parent = parent;
151 pxa_register_device(&pxa_device_fb, info);
152}
153
154static struct resource pxa_resource_ffuart[] = {
155 {
156 .start = 0x40100000,
157 .end = 0x40100023,
158 .flags = IORESOURCE_MEM,
159 }, {
160 .start = IRQ_FFUART,
161 .end = IRQ_FFUART,
162 .flags = IORESOURCE_IRQ,
163 }
164};
165
166struct platform_device pxa_device_ffuart = {
167 .name = "pxa2xx-uart",
168 .id = 0,
169 .resource = pxa_resource_ffuart,
170 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
171};
172
173void __init pxa_set_ffuart_info(void *info)
174{
175 pxa_register_device(&pxa_device_ffuart, info);
176}
177
178static struct resource pxa_resource_btuart[] = {
179 {
180 .start = 0x40200000,
181 .end = 0x40200023,
182 .flags = IORESOURCE_MEM,
183 }, {
184 .start = IRQ_BTUART,
185 .end = IRQ_BTUART,
186 .flags = IORESOURCE_IRQ,
187 }
188};
189
190struct platform_device pxa_device_btuart = {
191 .name = "pxa2xx-uart",
192 .id = 1,
193 .resource = pxa_resource_btuart,
194 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
195};
196
197void __init pxa_set_btuart_info(void *info)
198{
199 pxa_register_device(&pxa_device_btuart, info);
200}
201
202static struct resource pxa_resource_stuart[] = {
203 {
204 .start = 0x40700000,
205 .end = 0x40700023,
206 .flags = IORESOURCE_MEM,
207 }, {
208 .start = IRQ_STUART,
209 .end = IRQ_STUART,
210 .flags = IORESOURCE_IRQ,
211 }
212};
213
214struct platform_device pxa_device_stuart = {
215 .name = "pxa2xx-uart",
216 .id = 2,
217 .resource = pxa_resource_stuart,
218 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
219};
220
221void __init pxa_set_stuart_info(void *info)
222{
223 pxa_register_device(&pxa_device_stuart, info);
224}
225
226static struct resource pxa_resource_hwuart[] = {
227 {
228 .start = 0x41600000,
229 .end = 0x4160002F,
230 .flags = IORESOURCE_MEM,
231 }, {
232 .start = IRQ_HWUART,
233 .end = IRQ_HWUART,
234 .flags = IORESOURCE_IRQ,
235 }
236};
237
238struct platform_device pxa_device_hwuart = {
239 .name = "pxa2xx-uart",
240 .id = 3,
241 .resource = pxa_resource_hwuart,
242 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
243};
244
245void __init pxa_set_hwuart_info(void *info)
246{
247 if (cpu_is_pxa255())
248 pxa_register_device(&pxa_device_hwuart, info);
249 else
250 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
251}
252
253static struct resource pxai2c_resources[] = {
254 {
255 .start = 0x40301680,
256 .end = 0x403016a3,
257 .flags = IORESOURCE_MEM,
258 }, {
259 .start = IRQ_I2C,
260 .end = IRQ_I2C,
261 .flags = IORESOURCE_IRQ,
262 },
263};
264
265struct platform_device pxa_device_i2c = {
266 .name = "pxa2xx-i2c",
267 .id = 0,
268 .resource = pxai2c_resources,
269 .num_resources = ARRAY_SIZE(pxai2c_resources),
270};
271
272void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
273{
274 pxa_register_device(&pxa_device_i2c, info);
275}
276
277#ifdef CONFIG_PXA27x
278static struct resource pxa27x_resources_i2c_power[] = {
279 {
280 .start = 0x40f00180,
281 .end = 0x40f001a3,
282 .flags = IORESOURCE_MEM,
283 }, {
284 .start = IRQ_PWRI2C,
285 .end = IRQ_PWRI2C,
286 .flags = IORESOURCE_IRQ,
287 },
288};
289
290struct platform_device pxa27x_device_i2c_power = {
291 .name = "pxa2xx-i2c",
292 .id = 1,
293 .resource = pxa27x_resources_i2c_power,
294 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
295};
296#endif
297
298static struct resource pxai2s_resources[] = {
299 {
300 .start = 0x40400000,
301 .end = 0x40400083,
302 .flags = IORESOURCE_MEM,
303 }, {
304 .start = IRQ_I2S,
305 .end = IRQ_I2S,
306 .flags = IORESOURCE_IRQ,
307 },
308};
309
310struct platform_device pxa_device_i2s = {
311 .name = "pxa2xx-i2s",
312 .id = -1,
313 .resource = pxai2s_resources,
314 .num_resources = ARRAY_SIZE(pxai2s_resources),
315};
316
317struct platform_device pxa_device_asoc_ssp1 = {
318 .name = "pxa-ssp-dai",
319 .id = 0,
320};
321
322struct platform_device pxa_device_asoc_ssp2= {
323 .name = "pxa-ssp-dai",
324 .id = 1,
325};
326
327struct platform_device pxa_device_asoc_ssp3 = {
328 .name = "pxa-ssp-dai",
329 .id = 2,
330};
331
332struct platform_device pxa_device_asoc_ssp4 = {
333 .name = "pxa-ssp-dai",
334 .id = 3,
335};
336
337struct platform_device pxa_device_asoc_platform = {
338 .name = "pxa-pcm-audio",
339 .id = -1,
340};
341
342static struct resource pxa_rtc_resources[] = {
343 [0] = {
344 .start = 0x40900000,
345 .end = 0x40900000 + 0x3b,
346 .flags = IORESOURCE_MEM,
347 },
348 [1] = {
349 .start = IRQ_RTC1Hz,
350 .end = IRQ_RTC1Hz,
351 .name = "rtc 1Hz",
352 .flags = IORESOURCE_IRQ,
353 },
354 [2] = {
355 .start = IRQ_RTCAlrm,
356 .end = IRQ_RTCAlrm,
357 .name = "rtc alarm",
358 .flags = IORESOURCE_IRQ,
359 },
360};
361
362struct platform_device pxa_device_rtc = {
363 .name = "pxa-rtc",
364 .id = -1,
365 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
366 .resource = pxa_rtc_resources,
367};
368
369struct platform_device sa1100_device_rtc = {
370 .name = "sa1100-rtc",
371 .id = -1,
372 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
373 .resource = pxa_rtc_resources,
374};
375
376#ifdef CONFIG_PXA25x
377
378static struct resource pxa25x_resource_pwm0[] = {
379 [0] = {
380 .start = 0x40b00000,
381 .end = 0x40b0000f,
382 .flags = IORESOURCE_MEM,
383 },
384};
385
386struct platform_device pxa25x_device_pwm0 = {
387 .name = "pxa25x-pwm",
388 .id = 0,
389 .resource = pxa25x_resource_pwm0,
390 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
391};
392
393static struct resource pxa25x_resource_pwm1[] = {
394 [0] = {
395 .start = 0x40c00000,
396 .end = 0x40c0000f,
397 .flags = IORESOURCE_MEM,
398 },
399};
400
401struct platform_device pxa25x_device_pwm1 = {
402 .name = "pxa25x-pwm",
403 .id = 1,
404 .resource = pxa25x_resource_pwm1,
405 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
406};
407
408static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
409
410static struct resource pxa25x_resource_ssp[] = {
411 [0] = {
412 .start = 0x41000000,
413 .end = 0x4100001f,
414 .flags = IORESOURCE_MEM,
415 },
416 [1] = {
417 .start = IRQ_SSP,
418 .end = IRQ_SSP,
419 .flags = IORESOURCE_IRQ,
420 },
421};
422
423struct platform_device pxa25x_device_ssp = {
424 .name = "pxa25x-ssp",
425 .id = 0,
426 .dev = {
427 .dma_mask = &pxa25x_ssp_dma_mask,
428 .coherent_dma_mask = DMA_BIT_MASK(32),
429 },
430 .resource = pxa25x_resource_ssp,
431 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
432};
433
434static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
435
436static struct resource pxa25x_resource_nssp[] = {
437 [0] = {
438 .start = 0x41400000,
439 .end = 0x4140002f,
440 .flags = IORESOURCE_MEM,
441 },
442 [1] = {
443 .start = IRQ_NSSP,
444 .end = IRQ_NSSP,
445 .flags = IORESOURCE_IRQ,
446 },
447};
448
449struct platform_device pxa25x_device_nssp = {
450 .name = "pxa25x-nssp",
451 .id = 1,
452 .dev = {
453 .dma_mask = &pxa25x_nssp_dma_mask,
454 .coherent_dma_mask = DMA_BIT_MASK(32),
455 },
456 .resource = pxa25x_resource_nssp,
457 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
458};
459
460static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
461
462static struct resource pxa25x_resource_assp[] = {
463 [0] = {
464 .start = 0x41500000,
465 .end = 0x4150002f,
466 .flags = IORESOURCE_MEM,
467 },
468 [1] = {
469 .start = IRQ_ASSP,
470 .end = IRQ_ASSP,
471 .flags = IORESOURCE_IRQ,
472 },
473};
474
475struct platform_device pxa25x_device_assp = {
476 /* ASSP is basically equivalent to NSSP */
477 .name = "pxa25x-nssp",
478 .id = 2,
479 .dev = {
480 .dma_mask = &pxa25x_assp_dma_mask,
481 .coherent_dma_mask = DMA_BIT_MASK(32),
482 },
483 .resource = pxa25x_resource_assp,
484 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
485};
486#endif /* CONFIG_PXA25x */
487
488#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
489static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
490
491static struct resource pxa27x_resource_ohci[] = {
492 [0] = {
493 .start = 0x4C000000,
494 .end = 0x4C00ff6f,
495 .flags = IORESOURCE_MEM,
496 },
497 [1] = {
498 .start = IRQ_USBH1,
499 .end = IRQ_USBH1,
500 .flags = IORESOURCE_IRQ,
501 },
502};
503
504struct platform_device pxa27x_device_ohci = {
505 .name = "pxa27x-ohci",
506 .id = -1,
507 .dev = {
508 .dma_mask = &pxa27x_ohci_dma_mask,
509 .coherent_dma_mask = DMA_BIT_MASK(32),
510 },
511 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
512 .resource = pxa27x_resource_ohci,
513};
514
515void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
516{
517 pxa_register_device(&pxa27x_device_ohci, info);
518}
519#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
520
521#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
522static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
523
524static struct resource pxa27x_resource_ssp1[] = {
525 [0] = {
526 .start = 0x41000000,
527 .end = 0x4100003f,
528 .flags = IORESOURCE_MEM,
529 },
530 [1] = {
531 .start = IRQ_SSP,
532 .end = IRQ_SSP,
533 .flags = IORESOURCE_IRQ,
534 },
535};
536
537struct platform_device pxa27x_device_ssp1 = {
538 .name = "pxa27x-ssp",
539 .id = 0,
540 .dev = {
541 .dma_mask = &pxa27x_ssp1_dma_mask,
542 .coherent_dma_mask = DMA_BIT_MASK(32),
543 },
544 .resource = pxa27x_resource_ssp1,
545 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
546};
547
548static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
549
550static struct resource pxa27x_resource_ssp2[] = {
551 [0] = {
552 .start = 0x41700000,
553 .end = 0x4170003f,
554 .flags = IORESOURCE_MEM,
555 },
556 [1] = {
557 .start = IRQ_SSP2,
558 .end = IRQ_SSP2,
559 .flags = IORESOURCE_IRQ,
560 },
561};
562
563struct platform_device pxa27x_device_ssp2 = {
564 .name = "pxa27x-ssp",
565 .id = 1,
566 .dev = {
567 .dma_mask = &pxa27x_ssp2_dma_mask,
568 .coherent_dma_mask = DMA_BIT_MASK(32),
569 },
570 .resource = pxa27x_resource_ssp2,
571 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
572};
573
574static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
575
576static struct resource pxa27x_resource_ssp3[] = {
577 [0] = {
578 .start = 0x41900000,
579 .end = 0x4190003f,
580 .flags = IORESOURCE_MEM,
581 },
582 [1] = {
583 .start = IRQ_SSP3,
584 .end = IRQ_SSP3,
585 .flags = IORESOURCE_IRQ,
586 },
587};
588
589struct platform_device pxa27x_device_ssp3 = {
590 .name = "pxa27x-ssp",
591 .id = 2,
592 .dev = {
593 .dma_mask = &pxa27x_ssp3_dma_mask,
594 .coherent_dma_mask = DMA_BIT_MASK(32),
595 },
596 .resource = pxa27x_resource_ssp3,
597 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
598};
599
600static struct resource pxa27x_resource_pwm0[] = {
601 [0] = {
602 .start = 0x40b00000,
603 .end = 0x40b0001f,
604 .flags = IORESOURCE_MEM,
605 },
606};
607
608struct platform_device pxa27x_device_pwm0 = {
609 .name = "pxa27x-pwm",
610 .id = 0,
611 .resource = pxa27x_resource_pwm0,
612 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
613};
614
615static struct resource pxa27x_resource_pwm1[] = {
616 [0] = {
617 .start = 0x40c00000,
618 .end = 0x40c0001f,
619 .flags = IORESOURCE_MEM,
620 },
621};
622
623struct platform_device pxa27x_device_pwm1 = {
624 .name = "pxa27x-pwm",
625 .id = 1,
626 .resource = pxa27x_resource_pwm1,
627 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
628};
629#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
630
631struct resource pxa_resource_gpio[] = {
632 {
633 .start = 0x40e00000,
634 .end = 0x40e0ffff,
635 .flags = IORESOURCE_MEM,
636 }, {
637 .start = IRQ_GPIO0,
638 .end = IRQ_GPIO0,
639 .name = "gpio0",
640 .flags = IORESOURCE_IRQ,
641 }, {
642 .start = IRQ_GPIO1,
643 .end = IRQ_GPIO1,
644 .name = "gpio1",
645 .flags = IORESOURCE_IRQ,
646 }, {
647 .start = IRQ_GPIO_2_x,
648 .end = IRQ_GPIO_2_x,
649 .name = "gpio_mux",
650 .flags = IORESOURCE_IRQ,
651 },
652};
653
654struct platform_device pxa25x_device_gpio = {
655 .name = "pxa25x-gpio",
656 .id = -1,
657 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
658 .resource = pxa_resource_gpio,
659};
660
661struct platform_device pxa27x_device_gpio = {
662 .name = "pxa27x-gpio",
663 .id = -1,
664 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
665 .resource = pxa_resource_gpio,
666};
667
668/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
669 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
670void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_controller *info)
671{
672 struct platform_device *pd;
673
674 pd = platform_device_alloc("pxa2xx-spi", id);
675 if (pd == NULL) {
676 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
677 id);
678 return;
679 }
680
681 pd->dev.platform_data = info;
682 platform_device_add(pd);
683}
684
685static struct resource pxa_dma_resource[] = {
686 [0] = {
687 .start = 0x40000000,
688 .end = 0x4000ffff,
689 .flags = IORESOURCE_MEM,
690 },
691 [1] = {
692 .start = IRQ_DMA,
693 .end = IRQ_DMA,
694 .flags = IORESOURCE_IRQ,
695 },
696};
697
698static u64 pxadma_dmamask = 0xffffffffUL;
699
700static struct platform_device pxa2xx_pxa_dma = {
701 .name = "pxa-dma",
702 .id = 0,
703 .dev = {
704 .dma_mask = &pxadma_dmamask,
705 .coherent_dma_mask = 0xffffffff,
706 },
707 .num_resources = ARRAY_SIZE(pxa_dma_resource),
708 .resource = pxa_dma_resource,
709};
710
711void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
712{
713 pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
714}
715
716void __init pxa_register_wdt(unsigned int reset_status)
717{
718 struct resource res = DEFINE_RES_MEM(OST_PHYS, OST_LEN);
719
720 reset_status &= RESET_STATUS_WATCHDOG;
721 platform_device_register_resndata(NULL, "sa1100_wdt", -1, &res, 1,
722 &reset_status, sizeof(reset_status));
723}