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v6.13.7
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * TI/National Semiconductor LP3943 PWM driver
  4 *
  5 * Copyright 2013 Texas Instruments
  6 *
  7 * Author: Milo Kim <milo.kim@ti.com>
  8 */
  9
 10#include <linux/err.h>
 11#include <linux/mfd/lp3943.h>
 12#include <linux/module.h>
 13#include <linux/of.h>
 14#include <linux/platform_device.h>
 15#include <linux/pwm.h>
 16#include <linux/slab.h>
 17
 18#define LP3943_MAX_DUTY			255
 19#define LP3943_MIN_PERIOD		6250
 20#define LP3943_MAX_PERIOD		1600000
 21
 22struct lp3943_pwm {
 
 23	struct lp3943 *lp3943;
 24	struct lp3943_platform_data *pdata;
 25	struct lp3943_pwm_map pwm_map[LP3943_NUM_PWMS];
 26};
 27
 28static inline struct lp3943_pwm *to_lp3943_pwm(struct pwm_chip *chip)
 29{
 30	return pwmchip_get_drvdata(chip);
 31}
 32
 33static struct lp3943_pwm_map *
 34lp3943_pwm_request_map(struct lp3943_pwm *lp3943_pwm, int hwpwm)
 35{
 36	struct lp3943_platform_data *pdata = lp3943_pwm->pdata;
 37	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
 38	struct lp3943_pwm_map *pwm_map = &lp3943_pwm->pwm_map[hwpwm];
 39	int i, offset;
 40
 41	pwm_map->output = pdata->pwms[hwpwm]->output;
 42	pwm_map->num_outputs = pdata->pwms[hwpwm]->num_outputs;
 43
 44	for (i = 0; i < pwm_map->num_outputs; i++) {
 45		offset = pwm_map->output[i];
 46
 47		/* Return an error if the pin is already assigned */
 48		if (test_and_set_bit(offset, &lp3943->pin_used))
 49			return ERR_PTR(-EBUSY);
 50	}
 51
 52	return pwm_map;
 53}
 54
 55static int lp3943_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
 56{
 57	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
 58	struct lp3943_pwm_map *pwm_map;
 59
 60	pwm_map = lp3943_pwm_request_map(lp3943_pwm, pwm->hwpwm);
 61	if (IS_ERR(pwm_map))
 62		return PTR_ERR(pwm_map);
 63
 64	return 0;
 65}
 66
 67static void lp3943_pwm_free_map(struct lp3943_pwm *lp3943_pwm,
 68				struct lp3943_pwm_map *pwm_map)
 69{
 70	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
 71	int i, offset;
 72
 73	for (i = 0; i < pwm_map->num_outputs; i++) {
 74		offset = pwm_map->output[i];
 75		clear_bit(offset, &lp3943->pin_used);
 76	}
 77}
 78
 79static void lp3943_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
 80{
 81	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
 82	struct lp3943_pwm_map *pwm_map = &lp3943_pwm->pwm_map[pwm->hwpwm];
 83
 84	lp3943_pwm_free_map(lp3943_pwm, pwm_map);
 85}
 86
 87static int lp3943_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 88			     u64 duty_ns, u64 period_ns)
 89{
 90	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
 91	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
 92	u8 val, reg_duty, reg_prescale;
 93	int err;
 94
 95	/*
 96	 * How to configure the LP3943 PWMs
 97	 *
 98	 * 1) Period = 6250 ~ 1600000
 99	 * 2) Prescale = period / 6250 -1
100	 * 3) Duty = input duty
101	 *
102	 * Prescale and duty are register values
103	 */
104
105	if (pwm->hwpwm == 0) {
106		reg_prescale = LP3943_REG_PRESCALE0;
107		reg_duty     = LP3943_REG_PWM0;
108	} else {
109		reg_prescale = LP3943_REG_PRESCALE1;
110		reg_duty     = LP3943_REG_PWM1;
111	}
112
113	/*
114	 * Note that after this clamping, period_ns fits into an int. This is
115	 * helpful because we can resort to integer division below instead of
116	 * the (more expensive) 64 bit division.
117	 */
118	period_ns = clamp(period_ns, (u64)LP3943_MIN_PERIOD, (u64)LP3943_MAX_PERIOD);
119	val       = (u8)((int)period_ns / LP3943_MIN_PERIOD - 1);
120
121	err = lp3943_write_byte(lp3943, reg_prescale, val);
122	if (err)
123		return err;
124
125	duty_ns = min(duty_ns, period_ns);
126	val = (u8)((int)duty_ns * LP3943_MAX_DUTY / (int)period_ns);
127
128	return lp3943_write_byte(lp3943, reg_duty, val);
129}
130
131static int lp3943_pwm_set_mode(struct lp3943_pwm *lp3943_pwm,
132			       struct lp3943_pwm_map *pwm_map,
133			       u8 val)
134{
135	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
136	const struct lp3943_reg_cfg *mux = lp3943->mux_cfg;
137	int i, index, err;
138
139	for (i = 0; i < pwm_map->num_outputs; i++) {
140		index = pwm_map->output[i];
141		err = lp3943_update_bits(lp3943, mux[index].reg,
142					 mux[index].mask,
143					 val << mux[index].shift);
144		if (err)
145			return err;
146	}
147
148	return 0;
149}
150
151static int lp3943_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
152{
153	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
154	struct lp3943_pwm_map *pwm_map = &lp3943_pwm->pwm_map[pwm->hwpwm];
155	u8 val;
156
157	if (pwm->hwpwm == 0)
158		val = LP3943_DIM_PWM0;
159	else
160		val = LP3943_DIM_PWM1;
161
162	/*
163	 * Each PWM generator is set to control any of outputs of LP3943.
164	 * To enable/disable the PWM, these output pins should be configured.
165	 */
166
167	return lp3943_pwm_set_mode(lp3943_pwm, pwm_map, val);
168}
169
170static void lp3943_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
171{
172	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
173	struct lp3943_pwm_map *pwm_map = &lp3943_pwm->pwm_map[pwm->hwpwm];
174
175	/*
176	 * LP3943 outputs are open-drain, so the pin should be configured
177	 * when the PWM is disabled.
178	 */
179
180	lp3943_pwm_set_mode(lp3943_pwm, pwm_map, LP3943_GPIO_OUT_HIGH);
181}
182
183static int lp3943_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
184			    const struct pwm_state *state)
185{
186	int err;
187
188	if (state->polarity != PWM_POLARITY_NORMAL)
189		return -EINVAL;
190
191	if (!state->enabled) {
192		if (pwm->state.enabled)
193			lp3943_pwm_disable(chip, pwm);
194		return 0;
195	}
196
197	err = lp3943_pwm_config(chip, pwm, state->duty_cycle, state->period);
198	if (err)
199		return err;
200
201	if (!pwm->state.enabled)
202		err = lp3943_pwm_enable(chip, pwm);
203
204	return err;
205}
206
207static const struct pwm_ops lp3943_pwm_ops = {
208	.request	= lp3943_pwm_request,
209	.free		= lp3943_pwm_free,
210	.apply		= lp3943_pwm_apply,
211};
212
213static int lp3943_pwm_parse_dt(struct device *dev,
214			       struct lp3943_pwm *lp3943_pwm)
215{
216	static const char * const name[] = { "ti,pwm0", "ti,pwm1", };
217	struct device_node *node = dev->of_node;
218	struct lp3943_platform_data *pdata;
219	struct lp3943_pwm_map *pwm_map;
220	enum lp3943_pwm_output *output;
221	int i, err, num_outputs, count = 0;
 
222
223	if (!node)
224		return -EINVAL;
225
226	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
227	if (!pdata)
228		return -ENOMEM;
229
230	/*
231	 * Read the output map configuration from the device tree.
232	 * Each of the two PWM generators can drive zero or more outputs.
233	 */
234
235	for (i = 0; i < LP3943_NUM_PWMS; i++) {
236		num_outputs = of_property_count_u32_elems(node, name[i]);
237		if (num_outputs <= 0)
 
 
 
238			continue;
239
240		output = devm_kcalloc(dev, num_outputs, sizeof(*output),
241				      GFP_KERNEL);
242		if (!output)
243			return -ENOMEM;
244
245		err = of_property_read_u32_array(node, name[i], output,
246						 num_outputs);
247		if (err)
248			return err;
249
250		pwm_map = devm_kzalloc(dev, sizeof(*pwm_map), GFP_KERNEL);
251		if (!pwm_map)
252			return -ENOMEM;
253
254		pwm_map->output = output;
255		pwm_map->num_outputs = num_outputs;
256		pdata->pwms[i] = pwm_map;
257
258		count++;
259	}
260
261	if (count == 0)
262		return -ENODATA;
263
264	lp3943_pwm->pdata = pdata;
265	return 0;
266}
267
268static int lp3943_pwm_probe(struct platform_device *pdev)
269{
270	struct lp3943 *lp3943 = dev_get_drvdata(pdev->dev.parent);
271	struct pwm_chip *chip;
272	struct lp3943_pwm *lp3943_pwm;
273	int ret;
274
275	chip = devm_pwmchip_alloc(&pdev->dev, LP3943_NUM_PWMS, sizeof(*lp3943_pwm));
276	if (IS_ERR(chip))
277		return PTR_ERR(chip);
278	lp3943_pwm = to_lp3943_pwm(chip);
279
280	lp3943_pwm->pdata = lp3943->pdata;
281	if (!lp3943_pwm->pdata) {
282		if (IS_ENABLED(CONFIG_OF))
283			ret = lp3943_pwm_parse_dt(&pdev->dev, lp3943_pwm);
284		else
285			ret = -ENODEV;
286
287		if (ret)
288			return ret;
289	}
290
291	lp3943_pwm->lp3943 = lp3943;
292	chip->ops = &lp3943_pwm_ops;
 
 
293
294	return devm_pwmchip_add(&pdev->dev, chip);
295}
296
297#ifdef CONFIG_OF
298static const struct of_device_id lp3943_pwm_of_match[] = {
299	{ .compatible = "ti,lp3943-pwm", },
300	{ }
301};
302MODULE_DEVICE_TABLE(of, lp3943_pwm_of_match);
303#endif
304
305static struct platform_driver lp3943_pwm_driver = {
306	.probe = lp3943_pwm_probe,
307	.driver = {
308		.name = "lp3943-pwm",
309		.of_match_table = of_match_ptr(lp3943_pwm_of_match),
310	},
311};
312module_platform_driver(lp3943_pwm_driver);
313
314MODULE_DESCRIPTION("LP3943 PWM driver");
315MODULE_ALIAS("platform:lp3943-pwm");
316MODULE_AUTHOR("Milo Kim");
317MODULE_LICENSE("GPL");
v6.8
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * TI/National Semiconductor LP3943 PWM driver
  4 *
  5 * Copyright 2013 Texas Instruments
  6 *
  7 * Author: Milo Kim <milo.kim@ti.com>
  8 */
  9
 10#include <linux/err.h>
 11#include <linux/mfd/lp3943.h>
 12#include <linux/module.h>
 13#include <linux/of.h>
 14#include <linux/platform_device.h>
 15#include <linux/pwm.h>
 16#include <linux/slab.h>
 17
 18#define LP3943_MAX_DUTY			255
 19#define LP3943_MIN_PERIOD		6250
 20#define LP3943_MAX_PERIOD		1600000
 21
 22struct lp3943_pwm {
 23	struct pwm_chip chip;
 24	struct lp3943 *lp3943;
 25	struct lp3943_platform_data *pdata;
 26	struct lp3943_pwm_map pwm_map[LP3943_NUM_PWMS];
 27};
 28
 29static inline struct lp3943_pwm *to_lp3943_pwm(struct pwm_chip *chip)
 30{
 31	return container_of(chip, struct lp3943_pwm, chip);
 32}
 33
 34static struct lp3943_pwm_map *
 35lp3943_pwm_request_map(struct lp3943_pwm *lp3943_pwm, int hwpwm)
 36{
 37	struct lp3943_platform_data *pdata = lp3943_pwm->pdata;
 38	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
 39	struct lp3943_pwm_map *pwm_map = &lp3943_pwm->pwm_map[hwpwm];
 40	int i, offset;
 41
 42	pwm_map->output = pdata->pwms[hwpwm]->output;
 43	pwm_map->num_outputs = pdata->pwms[hwpwm]->num_outputs;
 44
 45	for (i = 0; i < pwm_map->num_outputs; i++) {
 46		offset = pwm_map->output[i];
 47
 48		/* Return an error if the pin is already assigned */
 49		if (test_and_set_bit(offset, &lp3943->pin_used))
 50			return ERR_PTR(-EBUSY);
 51	}
 52
 53	return pwm_map;
 54}
 55
 56static int lp3943_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
 57{
 58	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
 59	struct lp3943_pwm_map *pwm_map;
 60
 61	pwm_map = lp3943_pwm_request_map(lp3943_pwm, pwm->hwpwm);
 62	if (IS_ERR(pwm_map))
 63		return PTR_ERR(pwm_map);
 64
 65	return 0;
 66}
 67
 68static void lp3943_pwm_free_map(struct lp3943_pwm *lp3943_pwm,
 69				struct lp3943_pwm_map *pwm_map)
 70{
 71	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
 72	int i, offset;
 73
 74	for (i = 0; i < pwm_map->num_outputs; i++) {
 75		offset = pwm_map->output[i];
 76		clear_bit(offset, &lp3943->pin_used);
 77	}
 78}
 79
 80static void lp3943_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
 81{
 82	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
 83	struct lp3943_pwm_map *pwm_map = &lp3943_pwm->pwm_map[pwm->hwpwm];
 84
 85	lp3943_pwm_free_map(lp3943_pwm, pwm_map);
 86}
 87
 88static int lp3943_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 89			     u64 duty_ns, u64 period_ns)
 90{
 91	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
 92	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
 93	u8 val, reg_duty, reg_prescale;
 94	int err;
 95
 96	/*
 97	 * How to configure the LP3943 PWMs
 98	 *
 99	 * 1) Period = 6250 ~ 1600000
100	 * 2) Prescale = period / 6250 -1
101	 * 3) Duty = input duty
102	 *
103	 * Prescale and duty are register values
104	 */
105
106	if (pwm->hwpwm == 0) {
107		reg_prescale = LP3943_REG_PRESCALE0;
108		reg_duty     = LP3943_REG_PWM0;
109	} else {
110		reg_prescale = LP3943_REG_PRESCALE1;
111		reg_duty     = LP3943_REG_PWM1;
112	}
113
114	/*
115	 * Note that after this clamping, period_ns fits into an int. This is
116	 * helpful because we can resort to integer division below instead of
117	 * the (more expensive) 64 bit division.
118	 */
119	period_ns = clamp(period_ns, (u64)LP3943_MIN_PERIOD, (u64)LP3943_MAX_PERIOD);
120	val       = (u8)((int)period_ns / LP3943_MIN_PERIOD - 1);
121
122	err = lp3943_write_byte(lp3943, reg_prescale, val);
123	if (err)
124		return err;
125
126	duty_ns = min(duty_ns, period_ns);
127	val = (u8)((int)duty_ns * LP3943_MAX_DUTY / (int)period_ns);
128
129	return lp3943_write_byte(lp3943, reg_duty, val);
130}
131
132static int lp3943_pwm_set_mode(struct lp3943_pwm *lp3943_pwm,
133			       struct lp3943_pwm_map *pwm_map,
134			       u8 val)
135{
136	struct lp3943 *lp3943 = lp3943_pwm->lp3943;
137	const struct lp3943_reg_cfg *mux = lp3943->mux_cfg;
138	int i, index, err;
139
140	for (i = 0; i < pwm_map->num_outputs; i++) {
141		index = pwm_map->output[i];
142		err = lp3943_update_bits(lp3943, mux[index].reg,
143					 mux[index].mask,
144					 val << mux[index].shift);
145		if (err)
146			return err;
147	}
148
149	return 0;
150}
151
152static int lp3943_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
153{
154	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
155	struct lp3943_pwm_map *pwm_map = &lp3943_pwm->pwm_map[pwm->hwpwm];
156	u8 val;
157
158	if (pwm->hwpwm == 0)
159		val = LP3943_DIM_PWM0;
160	else
161		val = LP3943_DIM_PWM1;
162
163	/*
164	 * Each PWM generator is set to control any of outputs of LP3943.
165	 * To enable/disable the PWM, these output pins should be configured.
166	 */
167
168	return lp3943_pwm_set_mode(lp3943_pwm, pwm_map, val);
169}
170
171static void lp3943_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
172{
173	struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip);
174	struct lp3943_pwm_map *pwm_map = &lp3943_pwm->pwm_map[pwm->hwpwm];
175
176	/*
177	 * LP3943 outputs are open-drain, so the pin should be configured
178	 * when the PWM is disabled.
179	 */
180
181	lp3943_pwm_set_mode(lp3943_pwm, pwm_map, LP3943_GPIO_OUT_HIGH);
182}
183
184static int lp3943_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
185			    const struct pwm_state *state)
186{
187	int err;
188
189	if (state->polarity != PWM_POLARITY_NORMAL)
190		return -EINVAL;
191
192	if (!state->enabled) {
193		if (pwm->state.enabled)
194			lp3943_pwm_disable(chip, pwm);
195		return 0;
196	}
197
198	err = lp3943_pwm_config(chip, pwm, state->duty_cycle, state->period);
199	if (err)
200		return err;
201
202	if (!pwm->state.enabled)
203		err = lp3943_pwm_enable(chip, pwm);
204
205	return err;
206}
207
208static const struct pwm_ops lp3943_pwm_ops = {
209	.request	= lp3943_pwm_request,
210	.free		= lp3943_pwm_free,
211	.apply		= lp3943_pwm_apply,
212};
213
214static int lp3943_pwm_parse_dt(struct device *dev,
215			       struct lp3943_pwm *lp3943_pwm)
216{
217	static const char * const name[] = { "ti,pwm0", "ti,pwm1", };
218	struct device_node *node = dev->of_node;
219	struct lp3943_platform_data *pdata;
220	struct lp3943_pwm_map *pwm_map;
221	enum lp3943_pwm_output *output;
222	int i, err, proplen, count = 0;
223	u32 num_outputs;
224
225	if (!node)
226		return -EINVAL;
227
228	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
229	if (!pdata)
230		return -ENOMEM;
231
232	/*
233	 * Read the output map configuration from the device tree.
234	 * Each of the two PWM generators can drive zero or more outputs.
235	 */
236
237	for (i = 0; i < LP3943_NUM_PWMS; i++) {
238		if (!of_get_property(node, name[i], &proplen))
239			continue;
240
241		num_outputs = proplen / sizeof(u32);
242		if (num_outputs == 0)
243			continue;
244
245		output = devm_kcalloc(dev, num_outputs, sizeof(*output),
246				      GFP_KERNEL);
247		if (!output)
248			return -ENOMEM;
249
250		err = of_property_read_u32_array(node, name[i], output,
251						 num_outputs);
252		if (err)
253			return err;
254
255		pwm_map = devm_kzalloc(dev, sizeof(*pwm_map), GFP_KERNEL);
256		if (!pwm_map)
257			return -ENOMEM;
258
259		pwm_map->output = output;
260		pwm_map->num_outputs = num_outputs;
261		pdata->pwms[i] = pwm_map;
262
263		count++;
264	}
265
266	if (count == 0)
267		return -ENODATA;
268
269	lp3943_pwm->pdata = pdata;
270	return 0;
271}
272
273static int lp3943_pwm_probe(struct platform_device *pdev)
274{
275	struct lp3943 *lp3943 = dev_get_drvdata(pdev->dev.parent);
 
276	struct lp3943_pwm *lp3943_pwm;
277	int ret;
278
279	lp3943_pwm = devm_kzalloc(&pdev->dev, sizeof(*lp3943_pwm), GFP_KERNEL);
280	if (!lp3943_pwm)
281		return -ENOMEM;
 
282
283	lp3943_pwm->pdata = lp3943->pdata;
284	if (!lp3943_pwm->pdata) {
285		if (IS_ENABLED(CONFIG_OF))
286			ret = lp3943_pwm_parse_dt(&pdev->dev, lp3943_pwm);
287		else
288			ret = -ENODEV;
289
290		if (ret)
291			return ret;
292	}
293
294	lp3943_pwm->lp3943 = lp3943;
295	lp3943_pwm->chip.dev = &pdev->dev;
296	lp3943_pwm->chip.ops = &lp3943_pwm_ops;
297	lp3943_pwm->chip.npwm = LP3943_NUM_PWMS;
298
299	return devm_pwmchip_add(&pdev->dev, &lp3943_pwm->chip);
300}
301
302#ifdef CONFIG_OF
303static const struct of_device_id lp3943_pwm_of_match[] = {
304	{ .compatible = "ti,lp3943-pwm", },
305	{ }
306};
307MODULE_DEVICE_TABLE(of, lp3943_pwm_of_match);
308#endif
309
310static struct platform_driver lp3943_pwm_driver = {
311	.probe = lp3943_pwm_probe,
312	.driver = {
313		.name = "lp3943-pwm",
314		.of_match_table = of_match_ptr(lp3943_pwm_of_match),
315	},
316};
317module_platform_driver(lp3943_pwm_driver);
318
319MODULE_DESCRIPTION("LP3943 PWM driver");
320MODULE_ALIAS("platform:lp3943-pwm");
321MODULE_AUTHOR("Milo Kim");
322MODULE_LICENSE("GPL");