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v6.13.7
   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * phylink models the MAC to optional PHY connection, supporting
   4 * technologies such as SFP cages where the PHY is hot-pluggable.
   5 *
   6 * Copyright (C) 2015 Russell King
   7 */
   8#include <linux/acpi.h>
   9#include <linux/ethtool.h>
  10#include <linux/export.h>
  11#include <linux/gpio/consumer.h>
  12#include <linux/netdevice.h>
  13#include <linux/of.h>
  14#include <linux/of_mdio.h>
  15#include <linux/phy.h>
  16#include <linux/phy_fixed.h>
  17#include <linux/phylink.h>
  18#include <linux/rtnetlink.h>
  19#include <linux/spinlock.h>
  20#include <linux/timer.h>
  21#include <linux/workqueue.h>
  22
  23#include "sfp.h"
  24#include "swphy.h"
  25
  26#define SUPPORTED_INTERFACES \
  27	(SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
  28	 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
  29#define ADVERTISED_INTERFACES \
  30	(ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
  31	 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
  32
  33enum {
  34	PHYLINK_DISABLE_STOPPED,
  35	PHYLINK_DISABLE_LINK,
  36	PHYLINK_DISABLE_MAC_WOL,
  37
  38	PCS_STATE_DOWN = 0,
  39	PCS_STATE_STARTING,
  40	PCS_STATE_STARTED,
  41};
  42
  43/**
  44 * struct phylink - internal data type for phylink
  45 */
  46struct phylink {
  47	/* private: */
  48	struct net_device *netdev;
  49	const struct phylink_mac_ops *mac_ops;
  50	struct phylink_config *config;
  51	struct phylink_pcs *pcs;
  52	struct device *dev;
  53	unsigned int old_link_state:1;
  54
  55	unsigned long phylink_disable_state; /* bitmask of disables */
  56	struct phy_device *phydev;
  57	phy_interface_t link_interface;	/* PHY_INTERFACE_xxx */
  58	u8 cfg_link_an_mode;		/* MLO_AN_xxx */
  59	u8 cur_link_an_mode;
  60	u8 link_port;			/* The current non-phy ethtool port */
  61	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  62
  63	/* The link configuration settings */
  64	struct phylink_link_state link_config;
  65
  66	/* The current settings */
  67	phy_interface_t cur_interface;
  68
  69	struct gpio_desc *link_gpio;
  70	unsigned int link_irq;
  71	struct timer_list link_poll;
  72	void (*get_fixed_state)(struct net_device *dev,
  73				struct phylink_link_state *s);
  74
  75	struct mutex state_mutex;
  76	struct phylink_link_state phy_state;
  77	struct work_struct resolve;
  78	unsigned int pcs_neg_mode;
  79	unsigned int pcs_state;
  80
  81	bool link_failed;
 
  82
  83	struct sfp_bus *sfp_bus;
  84	bool sfp_may_have_phy;
  85	DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
  86	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
  87	u8 sfp_port;
  88};
  89
  90#define phylink_printk(level, pl, fmt, ...) \
  91	do { \
  92		if ((pl)->config->type == PHYLINK_NETDEV) \
  93			netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
  94		else if ((pl)->config->type == PHYLINK_DEV) \
  95			dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
  96	} while (0)
  97
  98#define phylink_err(pl, fmt, ...) \
  99	phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
 100#define phylink_warn(pl, fmt, ...) \
 101	phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
 102#define phylink_info(pl, fmt, ...) \
 103	phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
 104#if defined(CONFIG_DYNAMIC_DEBUG)
 105#define phylink_dbg(pl, fmt, ...) \
 106do {									\
 107	if ((pl)->config->type == PHYLINK_NETDEV)			\
 108		netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);		\
 109	else if ((pl)->config->type == PHYLINK_DEV)			\
 110		dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);			\
 111} while (0)
 112#elif defined(DEBUG)
 113#define phylink_dbg(pl, fmt, ...)					\
 114	phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
 115#else
 116#define phylink_dbg(pl, fmt, ...)					\
 117({									\
 118	if (0)								\
 119		phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__);	\
 120})
 121#endif
 122
 123static const phy_interface_t phylink_sfp_interface_preference[] = {
 124	PHY_INTERFACE_MODE_25GBASER,
 125	PHY_INTERFACE_MODE_USXGMII,
 126	PHY_INTERFACE_MODE_10GBASER,
 127	PHY_INTERFACE_MODE_5GBASER,
 128	PHY_INTERFACE_MODE_2500BASEX,
 129	PHY_INTERFACE_MODE_SGMII,
 130	PHY_INTERFACE_MODE_1000BASEX,
 131	PHY_INTERFACE_MODE_100BASEX,
 132};
 133
 134static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
 135
 136/**
 137 * phylink_set_port_modes() - set the port type modes in the ethtool mask
 138 * @mask: ethtool link mode mask
 139 *
 140 * Sets all the port type modes in the ethtool mask.  MAC drivers should
 141 * use this in their 'validate' callback.
 142 */
 143void phylink_set_port_modes(unsigned long *mask)
 144{
 145	phylink_set(mask, TP);
 146	phylink_set(mask, AUI);
 147	phylink_set(mask, MII);
 148	phylink_set(mask, FIBRE);
 149	phylink_set(mask, BNC);
 150	phylink_set(mask, Backplane);
 151}
 152EXPORT_SYMBOL_GPL(phylink_set_port_modes);
 153
 154static int phylink_is_empty_linkmode(const unsigned long *linkmode)
 155{
 156	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
 157
 158	phylink_set_port_modes(tmp);
 159	phylink_set(tmp, Autoneg);
 160	phylink_set(tmp, Pause);
 161	phylink_set(tmp, Asym_Pause);
 162
 163	return linkmode_subset(linkmode, tmp);
 164}
 165
 166static const char *phylink_an_mode_str(unsigned int mode)
 167{
 168	static const char *modestr[] = {
 169		[MLO_AN_PHY] = "phy",
 170		[MLO_AN_FIXED] = "fixed",
 171		[MLO_AN_INBAND] = "inband",
 172	};
 173
 174	return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
 175}
 176
 177static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
 178{
 179	switch (interface) {
 180	case PHY_INTERFACE_MODE_SGMII:
 181	case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
 182		return 1250;
 183	case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
 184		return 3125;
 185	case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
 186		return 5156;
 187	case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
 188		return 10313;
 189	default:
 190		return 0;
 191	}
 192}
 193
 194/**
 195 * phylink_interface_max_speed() - get the maximum speed of a phy interface
 196 * @interface: phy interface mode defined by &typedef phy_interface_t
 197 *
 198 * Determine the maximum speed of a phy interface. This is intended to help
 199 * determine the correct speed to pass to the MAC when the phy is performing
 200 * rate matching.
 201 *
 202 * Return: The maximum speed of @interface
 203 */
 204static int phylink_interface_max_speed(phy_interface_t interface)
 205{
 206	switch (interface) {
 207	case PHY_INTERFACE_MODE_100BASEX:
 208	case PHY_INTERFACE_MODE_REVRMII:
 209	case PHY_INTERFACE_MODE_RMII:
 210	case PHY_INTERFACE_MODE_SMII:
 211	case PHY_INTERFACE_MODE_REVMII:
 212	case PHY_INTERFACE_MODE_MII:
 213		return SPEED_100;
 214
 215	case PHY_INTERFACE_MODE_TBI:
 216	case PHY_INTERFACE_MODE_MOCA:
 217	case PHY_INTERFACE_MODE_RTBI:
 218	case PHY_INTERFACE_MODE_1000BASEX:
 219	case PHY_INTERFACE_MODE_1000BASEKX:
 220	case PHY_INTERFACE_MODE_TRGMII:
 221	case PHY_INTERFACE_MODE_RGMII_TXID:
 222	case PHY_INTERFACE_MODE_RGMII_RXID:
 223	case PHY_INTERFACE_MODE_RGMII_ID:
 224	case PHY_INTERFACE_MODE_RGMII:
 225	case PHY_INTERFACE_MODE_PSGMII:
 226	case PHY_INTERFACE_MODE_QSGMII:
 227	case PHY_INTERFACE_MODE_QUSGMII:
 228	case PHY_INTERFACE_MODE_SGMII:
 229	case PHY_INTERFACE_MODE_GMII:
 230		return SPEED_1000;
 231
 232	case PHY_INTERFACE_MODE_2500BASEX:
 233	case PHY_INTERFACE_MODE_10G_QXGMII:
 234		return SPEED_2500;
 235
 236	case PHY_INTERFACE_MODE_5GBASER:
 237		return SPEED_5000;
 238
 239	case PHY_INTERFACE_MODE_XGMII:
 240	case PHY_INTERFACE_MODE_RXAUI:
 241	case PHY_INTERFACE_MODE_XAUI:
 242	case PHY_INTERFACE_MODE_10GBASER:
 243	case PHY_INTERFACE_MODE_10GKR:
 244	case PHY_INTERFACE_MODE_USXGMII:
 245		return SPEED_10000;
 246
 247	case PHY_INTERFACE_MODE_25GBASER:
 248		return SPEED_25000;
 249
 250	case PHY_INTERFACE_MODE_XLGMII:
 251		return SPEED_40000;
 252
 253	case PHY_INTERFACE_MODE_INTERNAL:
 254	case PHY_INTERFACE_MODE_NA:
 255	case PHY_INTERFACE_MODE_MAX:
 256		/* No idea! Garbage in, unknown out */
 257		return SPEED_UNKNOWN;
 258	}
 259
 260	/* If we get here, someone forgot to add an interface mode above */
 261	WARN_ON_ONCE(1);
 262	return SPEED_UNKNOWN;
 263}
 264
 265/**
 266 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
 267 * @linkmodes: ethtool linkmode mask (must be already initialised)
 268 * @caps: bitmask of MAC capabilities
 269 *
 270 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
 271 * supported by the @caps. @linkmodes must have been initialised previously.
 272 */
 273static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
 274				      unsigned long caps)
 275{
 276	if (caps & MAC_SYM_PAUSE)
 277		__set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
 278
 279	if (caps & MAC_ASYM_PAUSE)
 280		__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
 281
 282	if (caps & MAC_10HD) {
 283		__set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
 284		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
 285		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
 286	}
 287
 288	if (caps & MAC_10FD) {
 289		__set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
 290		__set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
 291		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
 292	}
 293
 294	if (caps & MAC_100HD) {
 295		__set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
 296		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
 297	}
 298
 299	if (caps & MAC_100FD) {
 300		__set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
 301		__set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
 302		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
 303	}
 304
 305	if (caps & MAC_1000HD)
 306		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
 307
 308	if (caps & MAC_1000FD) {
 309		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
 310		__set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
 311		__set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
 312		__set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
 313	}
 314
 315	if (caps & MAC_2500FD) {
 316		__set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
 317		__set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
 318	}
 319
 320	if (caps & MAC_5000FD)
 321		__set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
 322
 323	if (caps & MAC_10000FD) {
 324		__set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
 325		__set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
 326		__set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
 327		__set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
 328		__set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
 329		__set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
 330		__set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
 331		__set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
 332		__set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
 333	}
 334
 335	if (caps & MAC_25000FD) {
 336		__set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
 337		__set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
 338		__set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
 339	}
 340
 341	if (caps & MAC_40000FD) {
 342		__set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
 343		__set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
 344		__set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
 345		__set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
 346	}
 347
 348	if (caps & MAC_50000FD) {
 349		__set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
 350		__set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
 351		__set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
 352		__set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
 353		__set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
 354		__set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
 355		__set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
 356			  linkmodes);
 357		__set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
 358	}
 359
 360	if (caps & MAC_56000FD) {
 361		__set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
 362		__set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
 363		__set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
 364		__set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
 365	}
 366
 367	if (caps & MAC_100000FD) {
 368		__set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
 369		__set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
 370		__set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
 371		__set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
 372			  linkmodes);
 373		__set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
 374		__set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
 375		__set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
 376		__set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
 377			  linkmodes);
 378		__set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
 379		__set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
 380		__set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
 381		__set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
 382			  linkmodes);
 383		__set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
 384		__set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
 385	}
 386
 387	if (caps & MAC_200000FD) {
 388		__set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
 389		__set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
 390		__set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 391			  linkmodes);
 392		__set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
 393		__set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
 394		__set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
 395		__set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
 396		__set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
 397			  linkmodes);
 398		__set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
 399		__set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
 400	}
 401
 402	if (caps & MAC_400000FD) {
 403		__set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
 404		__set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
 405		__set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
 406			  linkmodes);
 407		__set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
 408		__set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
 409		__set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
 410		__set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
 411		__set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
 412			  linkmodes);
 413		__set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
 414		__set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
 415	}
 416}
 417
 418static struct {
 419	unsigned long mask;
 420	int speed;
 421	unsigned int duplex;
 422} phylink_caps_params[] = {
 423	{ MAC_400000FD, SPEED_400000, DUPLEX_FULL },
 424	{ MAC_200000FD, SPEED_200000, DUPLEX_FULL },
 425	{ MAC_100000FD, SPEED_100000, DUPLEX_FULL },
 426	{ MAC_56000FD,  SPEED_56000,  DUPLEX_FULL },
 427	{ MAC_50000FD,  SPEED_50000,  DUPLEX_FULL },
 428	{ MAC_40000FD,  SPEED_40000,  DUPLEX_FULL },
 429	{ MAC_25000FD,  SPEED_25000,  DUPLEX_FULL },
 430	{ MAC_20000FD,  SPEED_20000,  DUPLEX_FULL },
 431	{ MAC_10000FD,  SPEED_10000,  DUPLEX_FULL },
 432	{ MAC_5000FD,   SPEED_5000,   DUPLEX_FULL },
 433	{ MAC_2500FD,   SPEED_2500,   DUPLEX_FULL },
 434	{ MAC_1000FD,   SPEED_1000,   DUPLEX_FULL },
 435	{ MAC_1000HD,   SPEED_1000,   DUPLEX_HALF },
 436	{ MAC_100FD,    SPEED_100,    DUPLEX_FULL },
 437	{ MAC_100HD,    SPEED_100,    DUPLEX_HALF },
 438	{ MAC_10FD,     SPEED_10,     DUPLEX_FULL },
 439	{ MAC_10HD,     SPEED_10,     DUPLEX_HALF },
 440};
 441
 442/**
 443 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
 444 * @config: pointer to a &struct phylink_config
 445 * @max_speed: maximum speed
 446 *
 447 * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
 448 * Any further motifications of config.mac_capabilities will override this.
 449 */
 450void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
 451{
 452	int i;
 453
 454	for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
 455		    phylink_caps_params[i].speed > max_speed; i++)
 456		config->mac_capabilities &= ~phylink_caps_params[i].mask;
 457}
 458EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
 459
 460/**
 461 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
 462 * @speed: the speed to search for
 463 * @duplex: the duplex to search for
 464 *
 465 * Find the mac capability for a given speed and duplex.
 466 *
 467 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
 468 *         there were no matches.
 469 */
 470static unsigned long phylink_cap_from_speed_duplex(int speed,
 471						   unsigned int duplex)
 472{
 473	int i;
 474
 475	for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
 476		if (speed == phylink_caps_params[i].speed &&
 477		    duplex == phylink_caps_params[i].duplex)
 478			return phylink_caps_params[i].mask;
 479	}
 480
 481	return 0;
 482}
 483
 484/**
 485 * phylink_get_capabilities() - get capabilities for a given MAC
 486 * @interface: phy interface mode defined by &typedef phy_interface_t
 487 * @mac_capabilities: bitmask of MAC capabilities
 488 * @rate_matching: type of rate matching being performed
 489 *
 490 * Get the MAC capabilities that are supported by the @interface mode and
 491 * @mac_capabilities.
 492 */
 493static unsigned long phylink_get_capabilities(phy_interface_t interface,
 494					      unsigned long mac_capabilities,
 495					      int rate_matching)
 496{
 497	int max_speed = phylink_interface_max_speed(interface);
 498	unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
 499	unsigned long matched_caps = 0;
 500
 501	switch (interface) {
 502	case PHY_INTERFACE_MODE_USXGMII:
 503		caps |= MAC_10000FD | MAC_5000FD;
 504		fallthrough;
 505
 506	case PHY_INTERFACE_MODE_10G_QXGMII:
 507		caps |= MAC_2500FD;
 508		fallthrough;
 509
 510	case PHY_INTERFACE_MODE_RGMII_TXID:
 511	case PHY_INTERFACE_MODE_RGMII_RXID:
 512	case PHY_INTERFACE_MODE_RGMII_ID:
 513	case PHY_INTERFACE_MODE_RGMII:
 514	case PHY_INTERFACE_MODE_PSGMII:
 515	case PHY_INTERFACE_MODE_QSGMII:
 516	case PHY_INTERFACE_MODE_QUSGMII:
 517	case PHY_INTERFACE_MODE_SGMII:
 518	case PHY_INTERFACE_MODE_GMII:
 519		caps |= MAC_1000HD | MAC_1000FD;
 520		fallthrough;
 521
 522	case PHY_INTERFACE_MODE_REVRMII:
 523	case PHY_INTERFACE_MODE_RMII:
 524	case PHY_INTERFACE_MODE_SMII:
 525	case PHY_INTERFACE_MODE_REVMII:
 526	case PHY_INTERFACE_MODE_MII:
 527		caps |= MAC_10HD | MAC_10FD;
 528		fallthrough;
 529
 530	case PHY_INTERFACE_MODE_100BASEX:
 531		caps |= MAC_100HD | MAC_100FD;
 532		break;
 533
 534	case PHY_INTERFACE_MODE_TBI:
 535	case PHY_INTERFACE_MODE_MOCA:
 536	case PHY_INTERFACE_MODE_RTBI:
 537	case PHY_INTERFACE_MODE_1000BASEX:
 538		caps |= MAC_1000HD;
 539		fallthrough;
 540	case PHY_INTERFACE_MODE_1000BASEKX:
 541	case PHY_INTERFACE_MODE_TRGMII:
 542		caps |= MAC_1000FD;
 543		break;
 544
 545	case PHY_INTERFACE_MODE_2500BASEX:
 546		caps |= MAC_2500FD;
 547		break;
 548
 549	case PHY_INTERFACE_MODE_5GBASER:
 550		caps |= MAC_5000FD;
 551		break;
 552
 553	case PHY_INTERFACE_MODE_XGMII:
 554	case PHY_INTERFACE_MODE_RXAUI:
 555	case PHY_INTERFACE_MODE_XAUI:
 556	case PHY_INTERFACE_MODE_10GBASER:
 557	case PHY_INTERFACE_MODE_10GKR:
 558		caps |= MAC_10000FD;
 559		break;
 560
 561	case PHY_INTERFACE_MODE_25GBASER:
 562		caps |= MAC_25000FD;
 563		break;
 564
 565	case PHY_INTERFACE_MODE_XLGMII:
 566		caps |= MAC_40000FD;
 567		break;
 568
 569	case PHY_INTERFACE_MODE_INTERNAL:
 570		caps |= ~0;
 571		break;
 572
 573	case PHY_INTERFACE_MODE_NA:
 574	case PHY_INTERFACE_MODE_MAX:
 575		break;
 576	}
 577
 578	switch (rate_matching) {
 579	case RATE_MATCH_OPEN_LOOP:
 580		/* TODO */
 581		fallthrough;
 582	case RATE_MATCH_NONE:
 583		matched_caps = 0;
 584		break;
 585	case RATE_MATCH_PAUSE: {
 586		/* The MAC must support asymmetric pause towards the local
 587		 * device for this. We could allow just symmetric pause, but
 588		 * then we might have to renegotiate if the link partner
 589		 * doesn't support pause. This is because there's no way to
 590		 * accept pause frames without transmitting them if we only
 591		 * support symmetric pause.
 592		 */
 593		if (!(mac_capabilities & MAC_SYM_PAUSE) ||
 594		    !(mac_capabilities & MAC_ASYM_PAUSE))
 595			break;
 596
 597		/* We can't adapt if the MAC doesn't support the interface's
 598		 * max speed at full duplex.
 599		 */
 600		if (mac_capabilities &
 601		    phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL))
 
 
 
 
 
 602			matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 
 
 603		break;
 604	}
 605	case RATE_MATCH_CRS:
 606		/* The MAC must support half duplex at the interface's max
 607		 * speed.
 608		 */
 609		if (mac_capabilities &
 610		    phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
 611			matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 612			matched_caps &= mac_capabilities;
 613		}
 614		break;
 615	}
 616
 617	return (caps & mac_capabilities) | matched_caps;
 618}
 619
 620/**
 621 * phylink_validate_mask_caps() - Restrict link modes based on caps
 622 * @supported: ethtool bitmask for supported link modes.
 623 * @state: pointer to a &struct phylink_link_state.
 624 * @mac_capabilities: bitmask of MAC capabilities
 625 *
 626 * Calculate the supported link modes based on @mac_capabilities, and restrict
 627 * @supported and @state based on that. Use this function if your capabiliies
 628 * aren't constant, such as if they vary depending on the interface.
 629 */
 630static void phylink_validate_mask_caps(unsigned long *supported,
 631				       struct phylink_link_state *state,
 632				       unsigned long mac_capabilities)
 633{
 634	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 635	unsigned long caps;
 636
 637	phylink_set_port_modes(mask);
 638	phylink_set(mask, Autoneg);
 639	caps = phylink_get_capabilities(state->interface, mac_capabilities,
 640					state->rate_matching);
 641	phylink_caps_to_linkmodes(mask, caps);
 642
 643	linkmode_and(supported, supported, mask);
 644	linkmode_and(state->advertising, state->advertising, mask);
 645}
 646
 647static int phylink_validate_mac_and_pcs(struct phylink *pl,
 648					unsigned long *supported,
 649					struct phylink_link_state *state)
 650{
 651	struct phylink_pcs *pcs = NULL;
 652	unsigned long capabilities;
 
 653	int ret;
 654
 655	/* Get the PCS for this interface mode */
 656	if (pl->mac_ops->mac_select_pcs) {
 657		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
 658		if (IS_ERR(pcs))
 659			return PTR_ERR(pcs);
 
 
 660	}
 661
 662	if (pcs) {
 663		/* The PCS, if present, must be setup before phylink_create()
 664		 * has been called. If the ops is not initialised, print an
 665		 * error and backtrace rather than oopsing the kernel.
 666		 */
 667		if (!pcs->ops) {
 668			phylink_err(pl, "interface %s: uninitialised PCS\n",
 669				    phy_modes(state->interface));
 670			dump_stack();
 671			return -EINVAL;
 672		}
 673
 674		/* Validate the link parameters with the PCS */
 675		if (pcs->ops->pcs_validate) {
 676			ret = pcs->ops->pcs_validate(pcs, supported, state);
 677			if (ret < 0 || phylink_is_empty_linkmode(supported))
 678				return -EINVAL;
 679
 680			/* Ensure the advertising mask is a subset of the
 681			 * supported mask.
 682			 */
 683			linkmode_and(state->advertising, state->advertising,
 684				     supported);
 685		}
 686	}
 687
 688	/* Then validate the link parameters with the MAC */
 689	if (pl->mac_ops->mac_get_caps)
 690		capabilities = pl->mac_ops->mac_get_caps(pl->config,
 691							 state->interface);
 692	else
 693		capabilities = pl->config->mac_capabilities;
 694
 695	phylink_validate_mask_caps(supported, state, capabilities);
 696
 697	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 698}
 699
 700static void phylink_validate_one(struct phylink *pl, struct phy_device *phy,
 701				 const unsigned long *supported,
 702				 const struct phylink_link_state *state,
 703				 phy_interface_t interface,
 704				 unsigned long *accum_supported,
 705				 unsigned long *accum_advertising)
 706{
 707	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported);
 708	struct phylink_link_state tmp_state;
 709
 710	linkmode_copy(tmp_supported, supported);
 711
 712	tmp_state = *state;
 713	tmp_state.interface = interface;
 714
 715	if (phy)
 716		tmp_state.rate_matching = phy_get_rate_matching(phy, interface);
 717
 718	if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) {
 719		phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
 720			    interface, phy_modes(interface),
 721			    phy_rate_matching_to_str(tmp_state.rate_matching),
 722			    __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported);
 723
 724		linkmode_or(accum_supported, accum_supported, tmp_supported);
 725		linkmode_or(accum_advertising, accum_advertising,
 726			    tmp_state.advertising);
 727	}
 728}
 729
 730static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy,
 731				 unsigned long *supported,
 732				 struct phylink_link_state *state,
 733				 const unsigned long *interfaces)
 734{
 735	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
 736	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
 737	int interface;
 738
 739	for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
 740		phylink_validate_one(pl, phy, supported, state, interface,
 741				     all_s, all_adv);
 742
 743	linkmode_copy(supported, all_s);
 744	linkmode_copy(state->advertising, all_adv);
 745
 746	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 747}
 748
 749static int phylink_validate(struct phylink *pl, unsigned long *supported,
 750			    struct phylink_link_state *state)
 751{
 752	const unsigned long *interfaces = pl->config->supported_interfaces;
 753
 754	if (state->interface == PHY_INTERFACE_MODE_NA)
 755		return phylink_validate_mask(pl, NULL, supported, state,
 756					     interfaces);
 757
 758	if (!test_bit(state->interface, interfaces))
 759		return -EINVAL;
 760
 761	return phylink_validate_mac_and_pcs(pl, supported, state);
 762}
 763
 764static int phylink_parse_fixedlink(struct phylink *pl,
 765				   const struct fwnode_handle *fwnode)
 766{
 767	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 768	struct fwnode_handle *fixed_node;
 
 769	const struct phy_setting *s;
 770	struct gpio_desc *desc;
 771	u32 speed;
 772	int ret;
 773
 774	fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
 775	if (fixed_node) {
 776		ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
 777
 778		pl->link_config.speed = speed;
 779		pl->link_config.duplex = DUPLEX_HALF;
 780
 781		if (fwnode_property_read_bool(fixed_node, "full-duplex"))
 782			pl->link_config.duplex = DUPLEX_FULL;
 783
 784		/* We treat the "pause" and "asym-pause" terminology as
 785		 * defining the link partner's ability.
 786		 */
 787		if (fwnode_property_read_bool(fixed_node, "pause"))
 788			__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 789				  pl->link_config.lp_advertising);
 790		if (fwnode_property_read_bool(fixed_node, "asym-pause"))
 791			__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 792				  pl->link_config.lp_advertising);
 793
 794		if (ret == 0) {
 795			desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
 796						      GPIOD_IN, "?");
 797
 798			if (!IS_ERR(desc))
 799				pl->link_gpio = desc;
 800			else if (desc == ERR_PTR(-EPROBE_DEFER))
 801				ret = -EPROBE_DEFER;
 802		}
 803		fwnode_handle_put(fixed_node);
 804
 805		if (ret)
 806			return ret;
 807	} else {
 808		u32 prop[5];
 809
 810		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 811						     NULL, 0);
 812		if (ret != ARRAY_SIZE(prop)) {
 813			phylink_err(pl, "broken fixed-link?\n");
 814			return -EINVAL;
 815		}
 816
 817		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 818						     prop, ARRAY_SIZE(prop));
 819		if (!ret) {
 820			pl->link_config.duplex = prop[1] ?
 821						DUPLEX_FULL : DUPLEX_HALF;
 822			pl->link_config.speed = prop[2];
 823			if (prop[3])
 824				__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 825					  pl->link_config.lp_advertising);
 826			if (prop[4])
 827				__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 828					  pl->link_config.lp_advertising);
 829		}
 830	}
 831
 832	if (pl->link_config.speed > SPEED_1000 &&
 833	    pl->link_config.duplex != DUPLEX_FULL)
 834		phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
 835			     pl->link_config.speed);
 836
 837	linkmode_fill(pl->supported);
 838	linkmode_copy(pl->link_config.advertising, pl->supported);
 839	phylink_validate(pl, pl->supported, &pl->link_config);
 840
 
 
 
 841	s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
 842			       pl->supported, true);
 
 
 843
 844	linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask);
 845	linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask);
 846	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask);
 847	linkmode_and(pl->supported, pl->supported, mask);
 848
 849	phylink_set(pl->supported, MII);
 
 
 
 
 850
 851	if (s) {
 852		__set_bit(s->bit, pl->supported);
 853		__set_bit(s->bit, pl->link_config.lp_advertising);
 854	} else {
 855		phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
 856			     pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
 857			     pl->link_config.speed);
 858	}
 859
 860	linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
 861		     pl->supported);
 862
 863	pl->link_config.link = 1;
 864	pl->link_config.an_complete = 1;
 865
 866	return 0;
 867}
 868
 869static int phylink_parse_mode(struct phylink *pl,
 870			      const struct fwnode_handle *fwnode)
 871{
 872	struct fwnode_handle *dn;
 873	const char *managed;
 874	unsigned long caps;
 875
 876	if (pl->config->default_an_inband)
 877		pl->cfg_link_an_mode = MLO_AN_INBAND;
 878
 879	dn = fwnode_get_named_child_node(fwnode, "fixed-link");
 880	if (dn || fwnode_property_present(fwnode, "fixed-link"))
 881		pl->cfg_link_an_mode = MLO_AN_FIXED;
 882	fwnode_handle_put(dn);
 883
 884	if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
 885	     strcmp(managed, "in-band-status") == 0)) {
 
 886		if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
 887			phylink_err(pl,
 888				    "can't use both fixed-link and in-band-status\n");
 889			return -EINVAL;
 890		}
 891
 892		pl->cfg_link_an_mode = MLO_AN_INBAND;
 893	}
 894
 895	if (pl->cfg_link_an_mode == MLO_AN_INBAND) {
 896		linkmode_zero(pl->supported);
 897		phylink_set(pl->supported, MII);
 898		phylink_set(pl->supported, Autoneg);
 899		phylink_set(pl->supported, Asym_Pause);
 900		phylink_set(pl->supported, Pause);
 
 901
 902		switch (pl->link_config.interface) {
 903		case PHY_INTERFACE_MODE_SGMII:
 904		case PHY_INTERFACE_MODE_PSGMII:
 905		case PHY_INTERFACE_MODE_QSGMII:
 906		case PHY_INTERFACE_MODE_QUSGMII:
 907		case PHY_INTERFACE_MODE_RGMII:
 908		case PHY_INTERFACE_MODE_RGMII_ID:
 909		case PHY_INTERFACE_MODE_RGMII_RXID:
 910		case PHY_INTERFACE_MODE_RGMII_TXID:
 911		case PHY_INTERFACE_MODE_RTBI:
 912		case PHY_INTERFACE_MODE_1000BASEX:
 913		case PHY_INTERFACE_MODE_2500BASEX:
 914		case PHY_INTERFACE_MODE_5GBASER:
 915		case PHY_INTERFACE_MODE_25GBASER:
 916		case PHY_INTERFACE_MODE_USXGMII:
 917		case PHY_INTERFACE_MODE_10G_QXGMII:
 918		case PHY_INTERFACE_MODE_10GKR:
 919		case PHY_INTERFACE_MODE_10GBASER:
 920		case PHY_INTERFACE_MODE_XLGMII:
 921			caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
 922			caps = phylink_get_capabilities(pl->link_config.interface, caps,
 923							RATE_MATCH_NONE);
 924			phylink_caps_to_linkmodes(pl->supported, caps);
 925			break;
 926
 927		default:
 928			phylink_err(pl,
 929				    "incorrect link mode %s for in-band status\n",
 930				    phy_modes(pl->link_config.interface));
 931			return -EINVAL;
 932		}
 933
 934		linkmode_copy(pl->link_config.advertising, pl->supported);
 935
 936		if (phylink_validate(pl, pl->supported, &pl->link_config)) {
 937			phylink_err(pl,
 938				    "failed to validate link configuration for in-band status\n");
 939			return -EINVAL;
 940		}
 941	}
 942
 943	return 0;
 944}
 945
 946static void phylink_apply_manual_flow(struct phylink *pl,
 947				      struct phylink_link_state *state)
 948{
 949	/* If autoneg is disabled, pause AN is also disabled */
 950	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
 951			       state->advertising))
 952		state->pause &= ~MLO_PAUSE_AN;
 953
 954	/* Manual configuration of pause modes */
 955	if (!(pl->link_config.pause & MLO_PAUSE_AN))
 956		state->pause = pl->link_config.pause;
 957}
 958
 959static void phylink_resolve_an_pause(struct phylink_link_state *state)
 960{
 961	bool tx_pause, rx_pause;
 962
 963	if (state->duplex == DUPLEX_FULL) {
 964		linkmode_resolve_pause(state->advertising,
 965				       state->lp_advertising,
 966				       &tx_pause, &rx_pause);
 967		if (tx_pause)
 968			state->pause |= MLO_PAUSE_TX;
 969		if (rx_pause)
 970			state->pause |= MLO_PAUSE_RX;
 971	}
 972}
 973
 974static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
 975				   phy_interface_t interface)
 976{
 977	if (pcs && pcs->ops->pcs_pre_config)
 978		pcs->ops->pcs_pre_config(pcs, interface);
 979}
 980
 981static int phylink_pcs_post_config(struct phylink_pcs *pcs,
 982				   phy_interface_t interface)
 983{
 984	int err = 0;
 985
 986	if (pcs && pcs->ops->pcs_post_config)
 987		err = pcs->ops->pcs_post_config(pcs, interface);
 988
 989	return err;
 990}
 991
 992static void phylink_pcs_disable(struct phylink_pcs *pcs)
 993{
 994	if (pcs && pcs->ops->pcs_disable)
 995		pcs->ops->pcs_disable(pcs);
 996}
 997
 998static int phylink_pcs_enable(struct phylink_pcs *pcs)
 999{
1000	int err = 0;
1001
1002	if (pcs && pcs->ops->pcs_enable)
1003		err = pcs->ops->pcs_enable(pcs);
1004
1005	return err;
1006}
1007
1008static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
1009			      const struct phylink_link_state *state,
1010			      bool permit_pause_to_mac)
1011{
1012	if (!pcs)
1013		return 0;
1014
1015	return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
1016				    state->advertising, permit_pause_to_mac);
1017}
1018
1019static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
1020				phy_interface_t interface, int speed,
1021				int duplex)
1022{
1023	if (pcs && pcs->ops->pcs_link_up)
1024		pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
1025}
1026
1027static void phylink_pcs_poll_stop(struct phylink *pl)
1028{
1029	if (pl->cfg_link_an_mode == MLO_AN_INBAND)
1030		del_timer(&pl->link_poll);
1031}
1032
1033static void phylink_pcs_poll_start(struct phylink *pl)
1034{
1035	if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
1036		mod_timer(&pl->link_poll, jiffies + HZ);
1037}
1038
1039int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs)
1040{
1041	int ret = 0;
1042
1043	/* Signal to PCS driver that MAC requires RX clock for init */
1044	if (pl->config->mac_requires_rxc)
1045		pcs->rxc_always_on = true;
1046
1047	if (pcs->ops->pcs_pre_init)
1048		ret = pcs->ops->pcs_pre_init(pcs);
1049
1050	return ret;
1051}
1052EXPORT_SYMBOL_GPL(phylink_pcs_pre_init);
1053
1054static void phylink_mac_config(struct phylink *pl,
1055			       const struct phylink_link_state *state)
1056{
1057	struct phylink_link_state st = *state;
1058
1059	/* Stop drivers incorrectly using these */
1060	linkmode_zero(st.lp_advertising);
1061	st.speed = SPEED_UNKNOWN;
1062	st.duplex = DUPLEX_UNKNOWN;
1063	st.an_complete = false;
1064	st.link = false;
1065
1066	phylink_dbg(pl,
1067		    "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1068		    __func__, phylink_an_mode_str(pl->cur_link_an_mode),
1069		    phy_modes(st.interface),
1070		    phy_rate_matching_to_str(st.rate_matching),
1071		    __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1072		    st.pause);
1073
1074	pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st);
1075}
1076
1077static void phylink_pcs_an_restart(struct phylink *pl)
1078{
1079	if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1080					 pl->link_config.advertising) &&
1081	    phy_interface_mode_is_8023z(pl->link_config.interface) &&
1082	    phylink_autoneg_inband(pl->cur_link_an_mode))
1083		pl->pcs->ops->pcs_an_restart(pl->pcs);
1084}
1085
1086/**
1087 * phylink_pcs_neg_mode() - helper to determine PCS inband mode
1088 * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND.
1089 * @interface: interface mode to be used
1090 * @advertising: adertisement ethtool link mode mask
1091 *
1092 * Determines the negotiation mode to be used by the PCS, and returns
1093 * one of:
1094 *
1095 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
1096 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
1097 *   will be used.
1098 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
1099 *   disabled
1100 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
1101 *
1102 * Note: this is for cases where the PCS itself is involved in negotiation
1103 * (e.g. Clause 37, SGMII and similar) not Clause 73.
1104 */
1105static unsigned int phylink_pcs_neg_mode(unsigned int mode,
1106					 phy_interface_t interface,
1107					 const unsigned long *advertising)
1108{
1109	unsigned int neg_mode;
1110
1111	switch (interface) {
1112	case PHY_INTERFACE_MODE_SGMII:
1113	case PHY_INTERFACE_MODE_QSGMII:
1114	case PHY_INTERFACE_MODE_QUSGMII:
1115	case PHY_INTERFACE_MODE_USXGMII:
1116	case PHY_INTERFACE_MODE_10G_QXGMII:
1117		/* These protocols are designed for use with a PHY which
1118		 * communicates its negotiation result back to the MAC via
1119		 * inband communication. Note: there exist PHYs that run
1120		 * with SGMII but do not send the inband data.
1121		 */
1122		if (!phylink_autoneg_inband(mode))
1123			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1124		else
1125			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1126		break;
1127
1128	case PHY_INTERFACE_MODE_1000BASEX:
1129	case PHY_INTERFACE_MODE_2500BASEX:
1130		/* 1000base-X is designed for use media-side for Fibre
1131		 * connections, and thus the Autoneg bit needs to be
1132		 * taken into account. We also do this for 2500base-X
1133		 * as well, but drivers may not support this, so may
1134		 * need to override this.
1135		 */
1136		if (!phylink_autoneg_inband(mode))
1137			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1138		else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1139					   advertising))
1140			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1141		else
1142			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1143		break;
1144
1145	default:
1146		neg_mode = PHYLINK_PCS_NEG_NONE;
1147		break;
1148	}
1149
1150	return neg_mode;
1151}
1152
1153static void phylink_major_config(struct phylink *pl, bool restart,
1154				  const struct phylink_link_state *state)
1155{
1156	struct phylink_pcs *pcs = NULL;
1157	bool pcs_changed = false;
1158	unsigned int rate_kbd;
1159	unsigned int neg_mode;
1160	int err;
1161
1162	phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
1163
1164	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1165						state->interface,
1166						state->advertising);
1167
1168	if (pl->mac_ops->mac_select_pcs) {
1169		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1170		if (IS_ERR(pcs)) {
1171			phylink_err(pl,
1172				    "mac_select_pcs unexpectedly failed: %pe\n",
1173				    pcs);
1174			return;
1175		}
1176
1177		pcs_changed = pl->pcs != pcs;
1178	}
1179
1180	phylink_pcs_poll_stop(pl);
1181
1182	if (pl->mac_ops->mac_prepare) {
1183		err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1184					       state->interface);
1185		if (err < 0) {
1186			phylink_err(pl, "mac_prepare failed: %pe\n",
1187				    ERR_PTR(err));
1188			return;
1189		}
1190	}
1191
1192	/* If we have a new PCS, switch to the new PCS after preparing the MAC
1193	 * for the change.
1194	 */
1195	if (pcs_changed) {
1196		phylink_pcs_disable(pl->pcs);
1197
1198		if (pl->pcs)
1199			pl->pcs->phylink = NULL;
1200
1201		pcs->phylink = pl;
1202
1203		pl->pcs = pcs;
1204	}
1205
1206	if (pl->pcs)
1207		phylink_pcs_pre_config(pl->pcs, state->interface);
1208
1209	phylink_mac_config(pl, state);
1210
1211	if (pl->pcs)
1212		phylink_pcs_post_config(pl->pcs, state->interface);
1213
1214	if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1215		phylink_pcs_enable(pl->pcs);
1216
1217	neg_mode = pl->cur_link_an_mode;
1218	if (pl->pcs && pl->pcs->neg_mode)
1219		neg_mode = pl->pcs_neg_mode;
1220
1221	err = phylink_pcs_config(pl->pcs, neg_mode, state,
1222				 !!(pl->link_config.pause & MLO_PAUSE_AN));
1223	if (err < 0)
1224		phylink_err(pl, "pcs_config failed: %pe\n",
1225			    ERR_PTR(err));
1226	else if (err > 0)
1227		restart = true;
1228
1229	if (restart)
1230		phylink_pcs_an_restart(pl);
1231
1232	if (pl->mac_ops->mac_finish) {
1233		err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1234					      state->interface);
1235		if (err < 0)
1236			phylink_err(pl, "mac_finish failed: %pe\n",
1237				    ERR_PTR(err));
1238	}
1239
1240	if (pl->sfp_bus) {
1241		rate_kbd = phylink_interface_signal_rate(state->interface);
1242		if (rate_kbd)
1243			sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1244	}
1245
1246	phylink_pcs_poll_start(pl);
1247}
1248
1249/*
1250 * Reconfigure for a change of inband advertisement.
1251 * If we have a separate PCS, we only need to call its pcs_config() method,
1252 * and then restart AN if it indicates something changed. Otherwise, we do
1253 * the full MAC reconfiguration.
1254 */
1255static int phylink_change_inband_advert(struct phylink *pl)
1256{
1257	unsigned int neg_mode;
1258	int ret;
1259
1260	if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1261		return 0;
1262
1263	phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1264		    phylink_an_mode_str(pl->cur_link_an_mode),
1265		    phy_modes(pl->link_config.interface),
1266		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1267		    pl->link_config.pause);
1268
1269	/* Recompute the PCS neg mode */
1270	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1271					pl->link_config.interface,
1272					pl->link_config.advertising);
1273
1274	neg_mode = pl->cur_link_an_mode;
1275	if (pl->pcs->neg_mode)
1276		neg_mode = pl->pcs_neg_mode;
1277
1278	/* Modern PCS-based method; update the advert at the PCS, and
1279	 * restart negotiation if the pcs_config() helper indicates that
1280	 * the programmed advertisement has changed.
1281	 */
1282	ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config,
1283				 !!(pl->link_config.pause & MLO_PAUSE_AN));
1284	if (ret < 0)
1285		return ret;
1286
1287	if (ret > 0)
1288		phylink_pcs_an_restart(pl);
1289
1290	return 0;
1291}
1292
1293static void phylink_mac_pcs_get_state(struct phylink *pl,
1294				      struct phylink_link_state *state)
1295{
1296	linkmode_copy(state->advertising, pl->link_config.advertising);
1297	linkmode_zero(state->lp_advertising);
1298	state->interface = pl->link_config.interface;
1299	state->rate_matching = pl->link_config.rate_matching;
1300	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1301			      state->advertising)) {
1302		state->speed = SPEED_UNKNOWN;
1303		state->duplex = DUPLEX_UNKNOWN;
1304		state->pause = MLO_PAUSE_NONE;
1305	} else {
1306		state->speed =  pl->link_config.speed;
1307		state->duplex = pl->link_config.duplex;
1308		state->pause = pl->link_config.pause;
1309	}
1310	state->an_complete = 0;
1311	state->link = 1;
1312
1313	if (pl->pcs)
1314		pl->pcs->ops->pcs_get_state(pl->pcs, state);
1315	else
1316		state->link = 0;
1317}
1318
1319/* The fixed state is... fixed except for the link state,
1320 * which may be determined by a GPIO or a callback.
1321 */
1322static void phylink_get_fixed_state(struct phylink *pl,
1323				    struct phylink_link_state *state)
1324{
1325	*state = pl->link_config;
1326	if (pl->config->get_fixed_state)
1327		pl->config->get_fixed_state(pl->config, state);
1328	else if (pl->link_gpio)
1329		state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1330
1331	state->pause = MLO_PAUSE_NONE;
1332	phylink_resolve_an_pause(state);
1333}
1334
1335static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1336{
1337	struct phylink_link_state link_state;
1338
1339	switch (pl->cur_link_an_mode) {
1340	case MLO_AN_PHY:
1341		link_state = pl->phy_state;
1342		break;
1343
1344	case MLO_AN_FIXED:
1345		phylink_get_fixed_state(pl, &link_state);
1346		break;
1347
1348	case MLO_AN_INBAND:
1349		link_state = pl->link_config;
1350		if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1351			link_state.pause = MLO_PAUSE_NONE;
1352		break;
1353
1354	default: /* can't happen */
1355		return;
1356	}
1357
1358	link_state.link = false;
1359
1360	phylink_apply_manual_flow(pl, &link_state);
1361	phylink_major_config(pl, force_restart, &link_state);
1362}
1363
1364static const char *phylink_pause_to_str(int pause)
1365{
1366	switch (pause & MLO_PAUSE_TXRX_MASK) {
1367	case MLO_PAUSE_TX | MLO_PAUSE_RX:
1368		return "rx/tx";
1369	case MLO_PAUSE_TX:
1370		return "tx";
1371	case MLO_PAUSE_RX:
1372		return "rx";
1373	default:
1374		return "off";
1375	}
1376}
1377
1378static void phylink_link_up(struct phylink *pl,
1379			    struct phylink_link_state link_state)
1380{
1381	struct net_device *ndev = pl->netdev;
1382	unsigned int neg_mode;
1383	int speed, duplex;
1384	bool rx_pause;
1385
1386	speed = link_state.speed;
1387	duplex = link_state.duplex;
1388	rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1389
1390	switch (link_state.rate_matching) {
1391	case RATE_MATCH_PAUSE:
1392		/* The PHY is doing rate matchion from the media rate (in
1393		 * the link_state) to the interface speed, and will send
1394		 * pause frames to the MAC to limit its transmission speed.
1395		 */
1396		speed = phylink_interface_max_speed(link_state.interface);
1397		duplex = DUPLEX_FULL;
1398		rx_pause = true;
1399		break;
1400
1401	case RATE_MATCH_CRS:
1402		/* The PHY is doing rate matchion from the media rate (in
1403		 * the link_state) to the interface speed, and will cause
1404		 * collisions to the MAC to limit its transmission speed.
1405		 */
1406		speed = phylink_interface_max_speed(link_state.interface);
1407		duplex = DUPLEX_HALF;
1408		break;
1409	}
1410
1411	pl->cur_interface = link_state.interface;
1412
1413	neg_mode = pl->cur_link_an_mode;
1414	if (pl->pcs && pl->pcs->neg_mode)
1415		neg_mode = pl->pcs_neg_mode;
1416
1417	phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
1418			    duplex);
1419
1420	pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1421				 pl->cur_interface, speed, duplex,
1422				 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1423
1424	if (ndev)
1425		netif_carrier_on(ndev);
1426
1427	phylink_info(pl,
1428		     "Link is Up - %s/%s - flow control %s\n",
1429		     phy_speed_to_str(link_state.speed),
1430		     phy_duplex_to_str(link_state.duplex),
1431		     phylink_pause_to_str(link_state.pause));
1432}
1433
1434static void phylink_link_down(struct phylink *pl)
1435{
1436	struct net_device *ndev = pl->netdev;
1437
1438	if (ndev)
1439		netif_carrier_off(ndev);
1440	pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1441				   pl->cur_interface);
1442	phylink_info(pl, "Link is Down\n");
1443}
1444
1445static void phylink_resolve(struct work_struct *w)
1446{
1447	struct phylink *pl = container_of(w, struct phylink, resolve);
1448	struct phylink_link_state link_state;
1449	struct net_device *ndev = pl->netdev;
1450	bool mac_config = false;
1451	bool retrigger = false;
1452	bool cur_link_state;
1453
1454	mutex_lock(&pl->state_mutex);
1455	if (pl->netdev)
1456		cur_link_state = netif_carrier_ok(ndev);
1457	else
1458		cur_link_state = pl->old_link_state;
1459
1460	if (pl->phylink_disable_state) {
1461		pl->link_failed = false;
1462		link_state.link = false;
1463	} else if (pl->link_failed) {
1464		link_state.link = false;
1465		retrigger = true;
1466	} else if (pl->cur_link_an_mode == MLO_AN_FIXED) {
1467		phylink_get_fixed_state(pl, &link_state);
1468		mac_config = link_state.link;
1469	} else if (pl->cur_link_an_mode == MLO_AN_PHY) {
1470		link_state = pl->phy_state;
1471		mac_config = link_state.link;
1472	} else {
1473		phylink_mac_pcs_get_state(pl, &link_state);
 
 
 
 
 
1474
1475		/* The PCS may have a latching link-fail indicator. If the link
1476		 * was up, bring the link down and re-trigger the resolve.
1477		 * Otherwise, re-read the PCS state to get the current status
1478		 * of the link.
1479		 */
1480		if (!link_state.link) {
1481			if (cur_link_state)
1482				retrigger = true;
1483			else
1484				phylink_mac_pcs_get_state(pl, &link_state);
1485		}
1486
1487		/* If we have a phy, the "up" state is the union of both the
1488		 * PHY and the MAC
1489		 */
1490		if (pl->phydev)
1491			link_state.link &= pl->phy_state.link;
1492
1493		/* Only update if the PHY link is up */
1494		if (pl->phydev && pl->phy_state.link) {
1495			/* If the interface has changed, force a link down
1496			 * event if the link isn't already down, and re-resolve.
1497			 */
1498			if (link_state.interface != pl->phy_state.interface) {
1499				retrigger = true;
1500				link_state.link = false;
 
 
 
1501			}
1502
1503			link_state.interface = pl->phy_state.interface;
1504
1505			/* If we are doing rate matching, then the link
1506			 * speed/duplex comes from the PHY
1507			 */
1508			if (pl->phy_state.rate_matching) {
1509				link_state.rate_matching =
1510					pl->phy_state.rate_matching;
1511				link_state.speed = pl->phy_state.speed;
1512				link_state.duplex = pl->phy_state.duplex;
1513			}
1514
1515			/* If we have a PHY, we need to update with the PHY
1516			 * flow control bits.
1517			 */
1518			link_state.pause = pl->phy_state.pause;
1519			mac_config = true;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1520		}
1521	}
1522
1523	if (pl->cur_link_an_mode != MLO_AN_FIXED)
1524		phylink_apply_manual_flow(pl, &link_state);
1525
1526	if (mac_config) {
1527		if (link_state.interface != pl->link_config.interface) {
1528			/* The interface has changed, force the link down and
1529			 * then reconfigure.
1530			 */
1531			if (cur_link_state) {
1532				phylink_link_down(pl);
1533				cur_link_state = false;
1534			}
1535			phylink_major_config(pl, false, &link_state);
1536			pl->link_config.interface = link_state.interface;
1537		}
1538	}
1539
1540	if (link_state.link != cur_link_state) {
1541		pl->old_link_state = link_state.link;
1542		if (!link_state.link)
1543			phylink_link_down(pl);
1544		else
1545			phylink_link_up(pl, link_state);
1546	}
1547	if (!link_state.link && retrigger) {
1548		pl->link_failed = false;
1549		queue_work(system_power_efficient_wq, &pl->resolve);
1550	}
1551	mutex_unlock(&pl->state_mutex);
1552}
1553
1554static void phylink_run_resolve(struct phylink *pl)
1555{
1556	if (!pl->phylink_disable_state)
1557		queue_work(system_power_efficient_wq, &pl->resolve);
1558}
1559
1560static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1561{
1562	unsigned long state = pl->phylink_disable_state;
1563
1564	set_bit(bit, &pl->phylink_disable_state);
1565	if (state == 0) {
1566		queue_work(system_power_efficient_wq, &pl->resolve);
1567		flush_work(&pl->resolve);
1568	}
1569}
1570
1571static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1572{
1573	clear_bit(bit, &pl->phylink_disable_state);
1574	phylink_run_resolve(pl);
1575}
1576
1577static void phylink_fixed_poll(struct timer_list *t)
1578{
1579	struct phylink *pl = container_of(t, struct phylink, link_poll);
1580
1581	mod_timer(t, jiffies + HZ);
1582
1583	phylink_run_resolve(pl);
1584}
1585
1586static const struct sfp_upstream_ops sfp_phylink_ops;
1587
1588static int phylink_register_sfp(struct phylink *pl,
1589				const struct fwnode_handle *fwnode)
1590{
1591	struct sfp_bus *bus;
1592	int ret;
1593
1594	if (!fwnode)
1595		return 0;
1596
1597	bus = sfp_bus_find_fwnode(fwnode);
1598	if (IS_ERR(bus)) {
1599		phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1600		return PTR_ERR(bus);
1601	}
1602
1603	pl->sfp_bus = bus;
1604
1605	ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1606	sfp_bus_put(bus);
1607
1608	return ret;
1609}
1610
1611/**
1612 * phylink_set_fixed_link() - set the fixed link
1613 * @pl: a pointer to a &struct phylink returned from phylink_create()
1614 * @state: a pointer to a struct phylink_link_state.
1615 *
1616 * This function is used when the link parameters are known and do not change,
1617 * making it suitable for certain types of network connections.
1618 *
1619 * Returns: zero on success or negative error code.
1620 */
1621int phylink_set_fixed_link(struct phylink *pl,
1622			   const struct phylink_link_state *state)
1623{
1624	const struct phy_setting *s;
1625	unsigned long *adv;
1626
1627	if (pl->cfg_link_an_mode != MLO_AN_PHY || !state ||
1628	    !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1629		return -EINVAL;
1630
1631	s = phy_lookup_setting(state->speed, state->duplex,
1632			       pl->supported, true);
1633	if (!s)
1634		return -EINVAL;
1635
1636	adv = pl->link_config.advertising;
1637	linkmode_zero(adv);
1638	linkmode_set_bit(s->bit, adv);
1639	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv);
1640
1641	pl->link_config.speed = state->speed;
1642	pl->link_config.duplex = state->duplex;
1643	pl->link_config.link = 1;
1644	pl->link_config.an_complete = 1;
1645
1646	pl->cfg_link_an_mode = MLO_AN_FIXED;
1647	pl->cur_link_an_mode = pl->cfg_link_an_mode;
1648
1649	return 0;
1650}
1651EXPORT_SYMBOL_GPL(phylink_set_fixed_link);
1652
1653/**
1654 * phylink_create() - create a phylink instance
1655 * @config: a pointer to the target &struct phylink_config
1656 * @fwnode: a pointer to a &struct fwnode_handle describing the network
1657 *	interface
1658 * @iface: the desired link mode defined by &typedef phy_interface_t
1659 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1660 *
1661 * Create a new phylink instance, and parse the link parameters found in @np.
1662 * This will parse in-band modes, fixed-link or SFP configuration.
1663 *
1664 * Note: the rtnl lock must not be held when calling this function.
1665 *
1666 * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1667 * must use IS_ERR() to check for errors from this function.
1668 */
1669struct phylink *phylink_create(struct phylink_config *config,
1670			       const struct fwnode_handle *fwnode,
1671			       phy_interface_t iface,
1672			       const struct phylink_mac_ops *mac_ops)
1673{
 
1674	struct phylink *pl;
1675	int ret;
1676
1677	/* Validate the supplied configuration */
1678	if (phy_interface_empty(config->supported_interfaces)) {
1679		dev_err(config->dev,
1680			"phylink: error: empty supported_interfaces\n");
1681		return ERR_PTR(-EINVAL);
1682	}
1683
 
 
 
 
 
1684	pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1685	if (!pl)
1686		return ERR_PTR(-ENOMEM);
1687
1688	mutex_init(&pl->state_mutex);
1689	INIT_WORK(&pl->resolve, phylink_resolve);
1690
1691	pl->config = config;
1692	if (config->type == PHYLINK_NETDEV) {
1693		pl->netdev = to_net_dev(config->dev);
1694		netif_carrier_off(pl->netdev);
1695	} else if (config->type == PHYLINK_DEV) {
1696		pl->dev = config->dev;
1697	} else {
1698		kfree(pl);
1699		return ERR_PTR(-EINVAL);
1700	}
1701
 
1702	pl->phy_state.interface = iface;
1703	pl->link_interface = iface;
1704	if (iface == PHY_INTERFACE_MODE_MOCA)
1705		pl->link_port = PORT_BNC;
1706	else
1707		pl->link_port = PORT_MII;
1708	pl->link_config.interface = iface;
1709	pl->link_config.pause = MLO_PAUSE_AN;
1710	pl->link_config.speed = SPEED_UNKNOWN;
1711	pl->link_config.duplex = DUPLEX_UNKNOWN;
1712	pl->pcs_state = PCS_STATE_DOWN;
1713	pl->mac_ops = mac_ops;
1714	__set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1715	timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1716
1717	linkmode_fill(pl->supported);
1718	linkmode_copy(pl->link_config.advertising, pl->supported);
1719	phylink_validate(pl, pl->supported, &pl->link_config);
1720
1721	ret = phylink_parse_mode(pl, fwnode);
1722	if (ret < 0) {
1723		kfree(pl);
1724		return ERR_PTR(ret);
1725	}
1726
1727	if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1728		ret = phylink_parse_fixedlink(pl, fwnode);
1729		if (ret < 0) {
1730			kfree(pl);
1731			return ERR_PTR(ret);
1732		}
1733	}
1734
1735	pl->cur_link_an_mode = pl->cfg_link_an_mode;
1736
1737	ret = phylink_register_sfp(pl, fwnode);
1738	if (ret < 0) {
1739		kfree(pl);
1740		return ERR_PTR(ret);
1741	}
1742
1743	return pl;
1744}
1745EXPORT_SYMBOL_GPL(phylink_create);
1746
1747/**
1748 * phylink_destroy() - cleanup and destroy the phylink instance
1749 * @pl: a pointer to a &struct phylink returned from phylink_create()
1750 *
1751 * Destroy a phylink instance. Any PHY that has been attached must have been
1752 * cleaned up via phylink_disconnect_phy() prior to calling this function.
1753 *
1754 * Note: the rtnl lock must not be held when calling this function.
1755 */
1756void phylink_destroy(struct phylink *pl)
1757{
1758	sfp_bus_del_upstream(pl->sfp_bus);
1759	if (pl->link_gpio)
1760		gpiod_put(pl->link_gpio);
1761
1762	cancel_work_sync(&pl->resolve);
1763	kfree(pl);
1764}
1765EXPORT_SYMBOL_GPL(phylink_destroy);
1766
1767/**
1768 * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1769 * @pl: a pointer to a &struct phylink returned from phylink_create()
1770 *
1771 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1772 * no PHY is needed.
1773 *
1774 * Returns true if phylink will be expecting a PHY.
1775 */
1776bool phylink_expects_phy(struct phylink *pl)
1777{
1778	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1779	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1780	     phy_interface_mode_is_8023z(pl->link_config.interface)))
1781		return false;
1782	return true;
1783}
1784EXPORT_SYMBOL_GPL(phylink_expects_phy);
1785
1786static void phylink_phy_change(struct phy_device *phydev, bool up)
1787{
1788	struct phylink *pl = phydev->phylink;
1789	bool tx_pause, rx_pause;
1790
1791	phy_get_pause(phydev, &tx_pause, &rx_pause);
1792
1793	mutex_lock(&pl->state_mutex);
1794	pl->phy_state.speed = phydev->speed;
1795	pl->phy_state.duplex = phydev->duplex;
1796	pl->phy_state.rate_matching = phydev->rate_matching;
1797	pl->phy_state.pause = MLO_PAUSE_NONE;
1798	if (tx_pause)
1799		pl->phy_state.pause |= MLO_PAUSE_TX;
1800	if (rx_pause)
1801		pl->phy_state.pause |= MLO_PAUSE_RX;
1802	pl->phy_state.interface = phydev->interface;
1803	pl->phy_state.link = up;
1804	if (!up)
1805		pl->link_failed = true;
1806	mutex_unlock(&pl->state_mutex);
1807
1808	phylink_run_resolve(pl);
1809
1810	phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1811		    phy_modes(phydev->interface),
1812		    phy_speed_to_str(phydev->speed),
1813		    phy_duplex_to_str(phydev->duplex),
1814		    phy_rate_matching_to_str(phydev->rate_matching),
1815		    phylink_pause_to_str(pl->phy_state.pause));
1816}
1817
1818static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
1819				unsigned long *supported,
1820				struct phylink_link_state *state)
1821{
1822	DECLARE_PHY_INTERFACE_MASK(interfaces);
1823
1824	/* If the PHY provides a bitmap of the interfaces it will be using
1825	 * depending on the negotiated media speeds, use this to validate
1826	 * which ethtool link modes can be used.
1827	 */
1828	if (!phy_interface_empty(phy->possible_interfaces)) {
1829		/* We only care about the union of the PHY's interfaces and
1830		 * those which the host supports.
1831		 */
1832		phy_interface_and(interfaces, phy->possible_interfaces,
1833				  pl->config->supported_interfaces);
1834
1835		if (phy_interface_empty(interfaces)) {
1836			phylink_err(pl, "PHY has no common interfaces\n");
1837			return -EINVAL;
1838		}
1839
1840		if (phy_on_sfp(phy)) {
1841			/* If the PHY is on a SFP, limit the interfaces to
1842			 * those that can be used with a SFP module.
1843			 */
1844			phy_interface_and(interfaces, interfaces,
1845					  phylink_sfp_interfaces);
1846
1847			if (phy_interface_empty(interfaces)) {
1848				phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n");
1849				return -EINVAL;
1850			}
1851		}
1852
1853		phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n",
1854			    phydev_name(phy),
1855			    (int)PHY_INTERFACE_MODE_MAX,
1856			    phy->possible_interfaces,
1857			    (int)PHY_INTERFACE_MODE_MAX, interfaces);
1858
1859		return phylink_validate_mask(pl, phy, supported, state,
1860					     interfaces);
1861	}
1862
1863	phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n",
1864		    phydev_name(phy));
1865
1866	/* Check whether we would use rate matching for the proposed interface
1867	 * mode.
1868	 */
1869	state->rate_matching = phy_get_rate_matching(phy, state->interface);
1870
1871	/* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1872	 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1873	 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1874	 * their Serdes is either unnecessary or not reasonable.
1875	 *
1876	 * For these which switch interface modes, we really need to know which
1877	 * interface modes the PHY supports to properly work out which ethtool
1878	 * linkmodes can be supported. For now, as a work-around, we validate
1879	 * against all interface modes, which may lead to more ethtool link
1880	 * modes being advertised than are actually supported.
1881	 */
1882	if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
1883	    state->interface != PHY_INTERFACE_MODE_RXAUI &&
1884	    state->interface != PHY_INTERFACE_MODE_XAUI &&
1885	    state->interface != PHY_INTERFACE_MODE_USXGMII)
1886		state->interface = PHY_INTERFACE_MODE_NA;
1887
1888	return phylink_validate(pl, supported, state);
1889}
1890
1891static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1892			       phy_interface_t interface)
1893{
1894	struct phylink_link_state config;
1895	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1896	char *irq_str;
1897	int ret;
1898
1899	/*
1900	 * This is the new way of dealing with flow control for PHYs,
1901	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1902	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1903	 * using our validate call to the MAC, we rely upon the MAC
1904	 * clearing the bits from both supported and advertising fields.
1905	 */
1906	phy_support_asym_pause(phy);
1907
1908	memset(&config, 0, sizeof(config));
1909	linkmode_copy(supported, phy->supported);
1910	linkmode_copy(config.advertising, phy->advertising);
1911	config.interface = interface;
1912
1913	ret = phylink_validate_phy(pl, phy, supported, &config);
1914	if (ret) {
1915		phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1916			     phy_modes(config.interface),
1917			     __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1918			     __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1919			     ERR_PTR(ret));
1920		return ret;
1921	}
1922
1923	phy->phylink = pl;
1924	phy->phy_link_change = phylink_phy_change;
1925
1926	irq_str = phy_attached_info_irq(phy);
1927	phylink_info(pl,
1928		     "PHY [%s] driver [%s] (irq=%s)\n",
1929		     dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1930	kfree(irq_str);
1931
1932	mutex_lock(&phy->lock);
1933	mutex_lock(&pl->state_mutex);
1934	pl->phydev = phy;
1935	pl->phy_state.interface = interface;
1936	pl->phy_state.pause = MLO_PAUSE_NONE;
1937	pl->phy_state.speed = SPEED_UNKNOWN;
1938	pl->phy_state.duplex = DUPLEX_UNKNOWN;
1939	pl->phy_state.rate_matching = RATE_MATCH_NONE;
1940	linkmode_copy(pl->supported, supported);
1941	linkmode_copy(pl->link_config.advertising, config.advertising);
1942
1943	/* Restrict the phy advertisement according to the MAC support. */
1944	linkmode_copy(phy->advertising, config.advertising);
1945	mutex_unlock(&pl->state_mutex);
1946	mutex_unlock(&phy->lock);
1947
1948	phylink_dbg(pl,
1949		    "phy: %s setting supported %*pb advertising %*pb\n",
1950		    phy_modes(interface),
1951		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1952		    __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1953
1954	if (phy_interrupt_is_valid(phy))
1955		phy_request_interrupt(phy);
1956
1957	if (pl->config->mac_managed_pm)
1958		phy->mac_managed_pm = true;
1959
1960	return 0;
1961}
1962
1963static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1964			      phy_interface_t interface)
1965{
1966	u32 flags = 0;
1967
1968	if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1969		    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1970		     phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
1971		return -EINVAL;
1972
1973	if (pl->phydev)
1974		return -EBUSY;
1975
1976	if (pl->config->mac_requires_rxc)
1977		flags |= PHY_F_RXC_ALWAYS_ON;
1978
1979	return phy_attach_direct(pl->netdev, phy, flags, interface);
1980}
1981
1982/**
1983 * phylink_connect_phy() - connect a PHY to the phylink instance
1984 * @pl: a pointer to a &struct phylink returned from phylink_create()
1985 * @phy: a pointer to a &struct phy_device.
1986 *
1987 * Connect @phy to the phylink instance specified by @pl by calling
1988 * phy_attach_direct(). Configure the @phy according to the MAC driver's
1989 * capabilities, start the PHYLIB state machine and enable any interrupts
1990 * that the PHY supports.
1991 *
1992 * This updates the phylink's ethtool supported and advertising link mode
1993 * masks.
1994 *
1995 * Returns 0 on success or a negative errno.
1996 */
1997int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1998{
1999	int ret;
2000
2001	/* Use PHY device/driver interface */
2002	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2003		pl->link_interface = phy->interface;
2004		pl->link_config.interface = pl->link_interface;
2005	}
2006
2007	ret = phylink_attach_phy(pl, phy, pl->link_interface);
2008	if (ret < 0)
2009		return ret;
2010
2011	ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
2012	if (ret)
2013		phy_detach(phy);
2014
2015	return ret;
2016}
2017EXPORT_SYMBOL_GPL(phylink_connect_phy);
2018
2019/**
2020 * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
2021 * @pl: a pointer to a &struct phylink returned from phylink_create()
2022 * @dn: a pointer to a &struct device_node.
2023 * @flags: PHY-specific flags to communicate to the PHY device driver
2024 *
2025 * Connect the phy specified in the device node @dn to the phylink instance
2026 * specified by @pl. Actions specified in phylink_connect_phy() will be
2027 * performed.
2028 *
2029 * Returns 0 on success or a negative errno.
2030 */
2031int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
2032			   u32 flags)
2033{
2034	return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
2035}
2036EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
2037
2038/**
2039 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
2040 * @pl: a pointer to a &struct phylink returned from phylink_create()
2041 * @fwnode: a pointer to a &struct fwnode_handle.
2042 * @flags: PHY-specific flags to communicate to the PHY device driver
2043 *
2044 * Connect the phy specified @fwnode to the phylink instance specified
2045 * by @pl.
2046 *
2047 * Returns 0 on success or a negative errno.
2048 */
2049int phylink_fwnode_phy_connect(struct phylink *pl,
2050			       const struct fwnode_handle *fwnode,
2051			       u32 flags)
2052{
2053	struct fwnode_handle *phy_fwnode;
2054	struct phy_device *phy_dev;
2055	int ret;
2056
2057	/* Fixed links and 802.3z are handled without needing a PHY */
2058	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2059	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2060	     phy_interface_mode_is_8023z(pl->link_interface)))
2061		return 0;
2062
2063	phy_fwnode = fwnode_get_phy_node(fwnode);
2064	if (IS_ERR(phy_fwnode)) {
2065		if (pl->cfg_link_an_mode == MLO_AN_PHY)
2066			return -ENODEV;
2067		return 0;
2068	}
2069
2070	phy_dev = fwnode_phy_find_device(phy_fwnode);
2071	/* We're done with the phy_node handle */
2072	fwnode_handle_put(phy_fwnode);
2073	if (!phy_dev)
2074		return -ENODEV;
2075
2076	/* Use PHY device/driver interface */
2077	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2078		pl->link_interface = phy_dev->interface;
2079		pl->link_config.interface = pl->link_interface;
2080	}
2081
2082	if (pl->config->mac_requires_rxc)
2083		flags |= PHY_F_RXC_ALWAYS_ON;
2084
2085	ret = phy_attach_direct(pl->netdev, phy_dev, flags,
2086				pl->link_interface);
2087	phy_device_free(phy_dev);
2088	if (ret)
2089		return ret;
2090
2091	ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
2092	if (ret)
2093		phy_detach(phy_dev);
2094
2095	return ret;
2096}
2097EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
2098
2099/**
2100 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
2101 *   instance.
2102 * @pl: a pointer to a &struct phylink returned from phylink_create()
2103 *
2104 * Disconnect any current PHY from the phylink instance described by @pl.
2105 */
2106void phylink_disconnect_phy(struct phylink *pl)
2107{
2108	struct phy_device *phy;
2109
2110	ASSERT_RTNL();
2111
2112	phy = pl->phydev;
2113	if (phy) {
2114		mutex_lock(&phy->lock);
2115		mutex_lock(&pl->state_mutex);
2116		pl->phydev = NULL;
2117		mutex_unlock(&pl->state_mutex);
2118		mutex_unlock(&phy->lock);
2119		flush_work(&pl->resolve);
2120
2121		phy_disconnect(phy);
2122	}
2123}
2124EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2125
2126static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2127{
2128	if (!up)
2129		pl->link_failed = true;
2130	phylink_run_resolve(pl);
2131	phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2132}
2133
2134/**
2135 * phylink_mac_change() - notify phylink of a change in MAC state
2136 * @pl: a pointer to a &struct phylink returned from phylink_create()
2137 * @up: indicates whether the link is currently up.
2138 *
2139 * The MAC driver should call this driver when the state of its link
2140 * changes (eg, link failure, new negotiation results, etc.)
2141 */
2142void phylink_mac_change(struct phylink *pl, bool up)
2143{
2144	phylink_link_changed(pl, up, "mac");
2145}
2146EXPORT_SYMBOL_GPL(phylink_mac_change);
2147
2148/**
2149 * phylink_pcs_change() - notify phylink of a change to PCS link state
2150 * @pcs: pointer to &struct phylink_pcs
2151 * @up: indicates whether the link is currently up.
2152 *
2153 * The PCS driver should call this when the state of its link changes
2154 * (e.g. link failure, new negotiation results, etc.) Note: it should
2155 * not determine "up" by reading the BMSR. If in doubt about the link
2156 * state at interrupt time, then pass true if pcs_get_state() returns
2157 * the latched link-down state, otherwise pass false.
2158 */
2159void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2160{
2161	struct phylink *pl = pcs->phylink;
2162
2163	if (pl)
2164		phylink_link_changed(pl, up, "pcs");
2165}
2166EXPORT_SYMBOL_GPL(phylink_pcs_change);
2167
2168static irqreturn_t phylink_link_handler(int irq, void *data)
2169{
2170	struct phylink *pl = data;
2171
2172	phylink_run_resolve(pl);
2173
2174	return IRQ_HANDLED;
2175}
2176
2177/**
2178 * phylink_start() - start a phylink instance
2179 * @pl: a pointer to a &struct phylink returned from phylink_create()
2180 *
2181 * Start the phylink instance specified by @pl, configuring the MAC for the
2182 * desired link mode(s) and negotiation style. This should be called from the
2183 * network device driver's &struct net_device_ops ndo_open() method.
2184 */
2185void phylink_start(struct phylink *pl)
2186{
2187	bool poll = false;
2188
2189	ASSERT_RTNL();
2190
2191	phylink_info(pl, "configuring for %s/%s link mode\n",
2192		     phylink_an_mode_str(pl->cur_link_an_mode),
2193		     phy_modes(pl->link_config.interface));
2194
2195	/* Always set the carrier off */
2196	if (pl->netdev)
2197		netif_carrier_off(pl->netdev);
2198
2199	pl->pcs_state = PCS_STATE_STARTING;
2200
2201	/* Apply the link configuration to the MAC when starting. This allows
2202	 * a fixed-link to start with the correct parameters, and also
2203	 * ensures that we set the appropriate advertisement for Serdes links.
2204	 *
2205	 * Restart autonegotiation if using 802.3z to ensure that the link
2206	 * parameters are properly negotiated.  This is necessary for DSA
2207	 * switches using 802.3z negotiation to ensure they see our modes.
2208	 */
2209	phylink_mac_initial_config(pl, true);
2210
2211	pl->pcs_state = PCS_STATE_STARTED;
2212
2213	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2214
2215	if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2216		int irq = gpiod_to_irq(pl->link_gpio);
2217
2218		if (irq > 0) {
2219			if (!request_irq(irq, phylink_link_handler,
2220					 IRQF_TRIGGER_RISING |
2221					 IRQF_TRIGGER_FALLING,
2222					 "netdev link", pl))
2223				pl->link_irq = irq;
2224			else
2225				irq = 0;
2226		}
2227		if (irq <= 0)
2228			poll = true;
2229	}
2230
2231	if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2232		poll |= pl->config->poll_fixed_state;
2233
2234	if (poll)
2235		mod_timer(&pl->link_poll, jiffies + HZ);
2236	if (pl->phydev)
2237		phy_start(pl->phydev);
2238	if (pl->sfp_bus)
2239		sfp_upstream_start(pl->sfp_bus);
2240}
2241EXPORT_SYMBOL_GPL(phylink_start);
2242
2243/**
2244 * phylink_stop() - stop a phylink instance
2245 * @pl: a pointer to a &struct phylink returned from phylink_create()
2246 *
2247 * Stop the phylink instance specified by @pl. This should be called from the
2248 * network device driver's &struct net_device_ops ndo_stop() method.  The
2249 * network device's carrier state should not be changed prior to calling this
2250 * function.
2251 *
2252 * This will synchronously bring down the link if the link is not already
2253 * down (in other words, it will trigger a mac_link_down() method call.)
2254 */
2255void phylink_stop(struct phylink *pl)
2256{
2257	ASSERT_RTNL();
2258
2259	if (pl->sfp_bus)
2260		sfp_upstream_stop(pl->sfp_bus);
2261	if (pl->phydev)
2262		phy_stop(pl->phydev);
2263	del_timer_sync(&pl->link_poll);
2264	if (pl->link_irq) {
2265		free_irq(pl->link_irq, pl);
2266		pl->link_irq = 0;
2267	}
2268
2269	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2270
2271	pl->pcs_state = PCS_STATE_DOWN;
2272
2273	phylink_pcs_disable(pl->pcs);
2274}
2275EXPORT_SYMBOL_GPL(phylink_stop);
2276
2277/**
2278 * phylink_suspend() - handle a network device suspend event
2279 * @pl: a pointer to a &struct phylink returned from phylink_create()
2280 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2281 *
2282 * Handle a network device suspend event. There are several cases:
2283 *
2284 * - If Wake-on-Lan is not active, we can bring down the link between
2285 *   the MAC and PHY by calling phylink_stop().
2286 * - If Wake-on-Lan is active, and being handled only by the PHY, we
2287 *   can also bring down the link between the MAC and PHY.
2288 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2289 *   still needs to receive packets, so we can not bring the link down.
2290 */
2291void phylink_suspend(struct phylink *pl, bool mac_wol)
2292{
2293	ASSERT_RTNL();
2294
2295	if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) {
2296		/* Wake-on-Lan enabled, MAC handling */
2297		mutex_lock(&pl->state_mutex);
2298
2299		/* Stop the resolver bringing the link up */
2300		__set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2301
2302		/* Disable the carrier, to prevent transmit timeouts,
2303		 * but one would hope all packets have been sent. This
2304		 * also means phylink_resolve() will do nothing.
2305		 */
2306		if (pl->netdev)
2307			netif_carrier_off(pl->netdev);
2308		else
2309			pl->old_link_state = false;
2310
2311		/* We do not call mac_link_down() here as we want the
2312		 * link to remain up to receive the WoL packets.
2313		 */
2314		mutex_unlock(&pl->state_mutex);
2315	} else {
2316		phylink_stop(pl);
2317	}
2318}
2319EXPORT_SYMBOL_GPL(phylink_suspend);
2320
2321/**
2322 * phylink_resume() - handle a network device resume event
2323 * @pl: a pointer to a &struct phylink returned from phylink_create()
2324 *
2325 * Undo the effects of phylink_suspend(), returning the link to an
2326 * operational state.
2327 */
2328void phylink_resume(struct phylink *pl)
2329{
2330	ASSERT_RTNL();
2331
2332	if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2333		/* Wake-on-Lan enabled, MAC handling */
2334
2335		/* Call mac_link_down() so we keep the overall state balanced.
2336		 * Do this under the state_mutex lock for consistency. This
2337		 * will cause a "Link Down" message to be printed during
2338		 * resume, which is harmless - the true link state will be
2339		 * printed when we run a resolve.
2340		 */
2341		mutex_lock(&pl->state_mutex);
2342		phylink_link_down(pl);
2343		mutex_unlock(&pl->state_mutex);
2344
2345		/* Re-apply the link parameters so that all the settings get
2346		 * restored to the MAC.
2347		 */
2348		phylink_mac_initial_config(pl, true);
2349
2350		/* Re-enable and re-resolve the link parameters */
2351		phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2352	} else {
2353		phylink_start(pl);
2354	}
2355}
2356EXPORT_SYMBOL_GPL(phylink_resume);
2357
2358/**
2359 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2360 * @pl: a pointer to a &struct phylink returned from phylink_create()
2361 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2362 *
2363 * Read the wake on lan parameters from the PHY attached to the phylink
2364 * instance specified by @pl. If no PHY is currently attached, report no
2365 * support for wake on lan.
2366 */
2367void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2368{
2369	ASSERT_RTNL();
2370
2371	wol->supported = 0;
2372	wol->wolopts = 0;
2373
2374	if (pl->phydev)
2375		phy_ethtool_get_wol(pl->phydev, wol);
2376}
2377EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2378
2379/**
2380 * phylink_ethtool_set_wol() - set wake on lan parameters
2381 * @pl: a pointer to a &struct phylink returned from phylink_create()
2382 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2383 *
2384 * Set the wake on lan parameters for the PHY attached to the phylink
2385 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2386 * error.
2387 *
2388 * Returns zero on success or negative errno code.
2389 */
2390int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2391{
2392	int ret = -EOPNOTSUPP;
2393
2394	ASSERT_RTNL();
2395
2396	if (pl->phydev)
2397		ret = phy_ethtool_set_wol(pl->phydev, wol);
2398
2399	return ret;
2400}
2401EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2402
2403static phy_interface_t phylink_sfp_select_interface(struct phylink *pl,
2404						const unsigned long *link_modes)
2405{
2406	phy_interface_t interface;
2407
2408	interface = sfp_select_interface(pl->sfp_bus, link_modes);
2409	if (interface == PHY_INTERFACE_MODE_NA) {
2410		phylink_err(pl,
2411			    "selection of interface failed, advertisement %*pb\n",
2412			    __ETHTOOL_LINK_MODE_MASK_NBITS,
2413			    link_modes);
2414		return interface;
2415	}
2416
2417	if (!test_bit(interface, pl->config->supported_interfaces)) {
2418		phylink_err(pl,
2419			    "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n",
2420			    phy_modes(interface), interface,
2421			    (int)PHY_INTERFACE_MODE_MAX,
2422			    pl->config->supported_interfaces);
2423		return PHY_INTERFACE_MODE_NA;
2424	}
2425
2426	return interface;
2427}
2428
2429static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2430{
2431	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2432
2433	linkmode_zero(mask);
2434	phylink_set_port_modes(mask);
2435
2436	linkmode_and(dst, dst, mask);
2437	linkmode_or(dst, dst, b);
2438}
2439
2440static void phylink_get_ksettings(const struct phylink_link_state *state,
2441				  struct ethtool_link_ksettings *kset)
2442{
2443	phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2444	linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2445	if (kset->base.rate_matching == RATE_MATCH_NONE) {
2446		kset->base.speed = state->speed;
2447		kset->base.duplex = state->duplex;
2448	}
2449	kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2450					       state->advertising) ?
2451				AUTONEG_ENABLE : AUTONEG_DISABLE;
2452}
2453
2454/**
2455 * phylink_ethtool_ksettings_get() - get the current link settings
2456 * @pl: a pointer to a &struct phylink returned from phylink_create()
2457 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2458 *
2459 * Read the current link settings for the phylink instance specified by @pl.
2460 * This will be the link settings read from the MAC, PHY or fixed link
2461 * settings depending on the current negotiation mode.
2462 */
2463int phylink_ethtool_ksettings_get(struct phylink *pl,
2464				  struct ethtool_link_ksettings *kset)
2465{
2466	struct phylink_link_state link_state;
2467
2468	ASSERT_RTNL();
2469
2470	if (pl->phydev)
2471		phy_ethtool_ksettings_get(pl->phydev, kset);
2472	else
2473		kset->base.port = pl->link_port;
2474
2475	linkmode_copy(kset->link_modes.supported, pl->supported);
2476
2477	switch (pl->cur_link_an_mode) {
2478	case MLO_AN_FIXED:
2479		/* We are using fixed settings. Report these as the
2480		 * current link settings - and note that these also
2481		 * represent the supported speeds/duplex/pause modes.
2482		 */
2483		phylink_get_fixed_state(pl, &link_state);
2484		phylink_get_ksettings(&link_state, kset);
2485		break;
2486
2487	case MLO_AN_INBAND:
2488		/* If there is a phy attached, then use the reported
2489		 * settings from the phy with no modification.
2490		 */
2491		if (pl->phydev)
2492			break;
2493
2494		phylink_mac_pcs_get_state(pl, &link_state);
2495
2496		/* The MAC is reporting the link results from its own PCS
2497		 * layer via in-band status. Report these as the current
2498		 * link settings.
2499		 */
2500		phylink_get_ksettings(&link_state, kset);
2501		break;
2502	}
2503
2504	return 0;
2505}
2506EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2507
2508/**
2509 * phylink_ethtool_ksettings_set() - set the link settings
2510 * @pl: a pointer to a &struct phylink returned from phylink_create()
2511 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2512 */
2513int phylink_ethtool_ksettings_set(struct phylink *pl,
2514				  const struct ethtool_link_ksettings *kset)
2515{
2516	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2517	struct phylink_link_state config;
2518	const struct phy_setting *s;
2519
2520	ASSERT_RTNL();
2521
2522	if (pl->phydev) {
2523		struct ethtool_link_ksettings phy_kset = *kset;
2524
2525		linkmode_and(phy_kset.link_modes.advertising,
2526			     phy_kset.link_modes.advertising,
2527			     pl->supported);
2528
2529		/* We can rely on phylib for this update; we also do not need
2530		 * to update the pl->link_config settings:
2531		 * - the configuration returned via ksettings_get() will come
2532		 *   from phylib whenever a PHY is present.
2533		 * - link_config.interface will be updated by the PHY calling
2534		 *   back via phylink_phy_change() and a subsequent resolve.
2535		 * - initial link configuration for PHY mode comes from the
2536		 *   last phy state updated via phylink_phy_change().
2537		 * - other configuration changes (e.g. pause modes) are
2538		 *   performed directly via phylib.
2539		 * - if in in-band mode with a PHY, the link configuration
2540		 *   is passed on the link from the PHY, and all of
2541		 *   link_config.{speed,duplex,an_enabled,pause} are not used.
2542		 * - the only possible use would be link_config.advertising
2543		 *   pause modes when in 1000base-X mode with a PHY, but in
2544		 *   the presence of a PHY, this should not be changed as that
2545		 *   should be determined from the media side advertisement.
2546		 */
2547		return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2548	}
2549
2550	config = pl->link_config;
2551	/* Mask out unsupported advertisements */
2552	linkmode_and(config.advertising, kset->link_modes.advertising,
2553		     pl->supported);
2554
2555	/* FIXME: should we reject autoneg if phy/mac does not support it? */
2556	switch (kset->base.autoneg) {
2557	case AUTONEG_DISABLE:
2558		/* Autonegotiation disabled, select a suitable speed and
2559		 * duplex.
2560		 */
2561		s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2562				       pl->supported, false);
2563		if (!s)
2564			return -EINVAL;
2565
2566		/* If we have a fixed link, refuse to change link parameters.
2567		 * If the link parameters match, accept them but do nothing.
2568		 */
2569		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2570			if (s->speed != pl->link_config.speed ||
2571			    s->duplex != pl->link_config.duplex)
2572				return -EINVAL;
2573			return 0;
2574		}
2575
2576		config.speed = s->speed;
2577		config.duplex = s->duplex;
2578		break;
2579
2580	case AUTONEG_ENABLE:
2581		/* If we have a fixed link, allow autonegotiation (since that
2582		 * is our default case) but do not allow the advertisement to
2583		 * be changed. If the advertisement matches, simply return.
2584		 */
2585		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2586			if (!linkmode_equal(config.advertising,
2587					    pl->link_config.advertising))
2588				return -EINVAL;
2589			return 0;
2590		}
2591
2592		config.speed = SPEED_UNKNOWN;
2593		config.duplex = DUPLEX_UNKNOWN;
2594		break;
2595
2596	default:
2597		return -EINVAL;
2598	}
2599
2600	/* We have ruled out the case with a PHY attached, and the
2601	 * fixed-link cases.  All that is left are in-band links.
2602	 */
2603	linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2604			 kset->base.autoneg == AUTONEG_ENABLE);
2605
2606	/* If this link is with an SFP, ensure that changes to advertised modes
2607	 * also cause the associated interface to be selected such that the
2608	 * link can be configured correctly.
2609	 */
2610	if (pl->sfp_bus) {
2611		config.interface = phylink_sfp_select_interface(pl,
2612							config.advertising);
2613		if (config.interface == PHY_INTERFACE_MODE_NA)
 
 
 
 
2614			return -EINVAL;
 
2615
2616		/* Revalidate with the selected interface */
2617		linkmode_copy(support, pl->supported);
2618		if (phylink_validate(pl, support, &config)) {
2619			phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2620				    phylink_an_mode_str(pl->cur_link_an_mode),
2621				    phy_modes(config.interface),
2622				    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2623			return -EINVAL;
2624		}
2625	} else {
2626		/* Validate without changing the current supported mask. */
2627		linkmode_copy(support, pl->supported);
2628		if (phylink_validate(pl, support, &config))
2629			return -EINVAL;
2630	}
2631
2632	/* If autonegotiation is enabled, we must have an advertisement */
2633	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2634			      config.advertising) &&
2635	    phylink_is_empty_linkmode(config.advertising))
2636		return -EINVAL;
2637
2638	mutex_lock(&pl->state_mutex);
2639	pl->link_config.speed = config.speed;
2640	pl->link_config.duplex = config.duplex;
2641
2642	if (pl->link_config.interface != config.interface) {
2643		/* The interface changed, e.g. 1000base-X <-> 2500base-X */
2644		/* We need to force the link down, then change the interface */
2645		if (pl->old_link_state) {
2646			phylink_link_down(pl);
2647			pl->old_link_state = false;
2648		}
2649		if (!test_bit(PHYLINK_DISABLE_STOPPED,
2650			      &pl->phylink_disable_state))
2651			phylink_major_config(pl, false, &config);
2652		pl->link_config.interface = config.interface;
2653		linkmode_copy(pl->link_config.advertising, config.advertising);
2654	} else if (!linkmode_equal(pl->link_config.advertising,
2655				   config.advertising)) {
2656		linkmode_copy(pl->link_config.advertising, config.advertising);
2657		phylink_change_inband_advert(pl);
2658	}
2659	mutex_unlock(&pl->state_mutex);
2660
2661	return 0;
2662}
2663EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2664
2665/**
2666 * phylink_ethtool_nway_reset() - restart negotiation
2667 * @pl: a pointer to a &struct phylink returned from phylink_create()
2668 *
2669 * Restart negotiation for the phylink instance specified by @pl. This will
2670 * cause any attached phy to restart negotiation with the link partner, and
2671 * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2672 * negotiation.
2673 *
2674 * Returns zero on success, or negative error code.
2675 */
2676int phylink_ethtool_nway_reset(struct phylink *pl)
2677{
2678	int ret = 0;
2679
2680	ASSERT_RTNL();
2681
2682	if (pl->phydev)
2683		ret = phy_restart_aneg(pl->phydev);
2684	phylink_pcs_an_restart(pl);
2685
2686	return ret;
2687}
2688EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2689
2690/**
2691 * phylink_ethtool_get_pauseparam() - get the current pause parameters
2692 * @pl: a pointer to a &struct phylink returned from phylink_create()
2693 * @pause: a pointer to a &struct ethtool_pauseparam
2694 */
2695void phylink_ethtool_get_pauseparam(struct phylink *pl,
2696				    struct ethtool_pauseparam *pause)
2697{
2698	ASSERT_RTNL();
2699
2700	pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2701	pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2702	pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2703}
2704EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2705
2706/**
2707 * phylink_ethtool_set_pauseparam() - set the current pause parameters
2708 * @pl: a pointer to a &struct phylink returned from phylink_create()
2709 * @pause: a pointer to a &struct ethtool_pauseparam
2710 */
2711int phylink_ethtool_set_pauseparam(struct phylink *pl,
2712				   struct ethtool_pauseparam *pause)
2713{
2714	struct phylink_link_state *config = &pl->link_config;
2715	bool manual_changed;
2716	int pause_state;
2717
2718	ASSERT_RTNL();
2719
2720	if (pl->cur_link_an_mode == MLO_AN_FIXED)
2721		return -EOPNOTSUPP;
2722
2723	if (!phylink_test(pl->supported, Pause) &&
2724	    !phylink_test(pl->supported, Asym_Pause))
2725		return -EOPNOTSUPP;
2726
2727	if (!phylink_test(pl->supported, Asym_Pause) &&
2728	    pause->rx_pause != pause->tx_pause)
2729		return -EINVAL;
2730
2731	pause_state = 0;
2732	if (pause->autoneg)
2733		pause_state |= MLO_PAUSE_AN;
2734	if (pause->rx_pause)
2735		pause_state |= MLO_PAUSE_RX;
2736	if (pause->tx_pause)
2737		pause_state |= MLO_PAUSE_TX;
2738
2739	mutex_lock(&pl->state_mutex);
2740	/*
2741	 * See the comments for linkmode_set_pause(), wrt the deficiencies
2742	 * with the current implementation.  A solution to this issue would
2743	 * be:
2744	 * ethtool  Local device
2745	 *  rx  tx  Pause AsymDir
2746	 *  0   0   0     0
2747	 *  1   0   1     1
2748	 *  0   1   0     1
2749	 *  1   1   1     1
2750	 * and then use the ethtool rx/tx enablement status to mask the
2751	 * rx/tx pause resolution.
2752	 */
2753	linkmode_set_pause(config->advertising, pause->tx_pause,
2754			   pause->rx_pause);
2755
2756	manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2757			 (!(pause_state & MLO_PAUSE_AN) &&
2758			   (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2759
2760	config->pause = pause_state;
2761
2762	/* Update our in-band advertisement, triggering a renegotiation if
2763	 * the advertisement changed.
2764	 */
2765	if (!pl->phydev)
2766		phylink_change_inband_advert(pl);
2767
2768	mutex_unlock(&pl->state_mutex);
2769
2770	/* If we have a PHY, a change of the pause frame advertisement will
2771	 * cause phylib to renegotiate (if AN is enabled) which will in turn
2772	 * call our phylink_phy_change() and trigger a resolve.  Note that
2773	 * we can't hold our state mutex while calling phy_set_asym_pause().
2774	 */
2775	if (pl->phydev)
2776		phy_set_asym_pause(pl->phydev, pause->rx_pause,
2777				   pause->tx_pause);
2778
2779	/* If the manual pause settings changed, make sure we trigger a
2780	 * resolve to update their state; we can not guarantee that the
2781	 * link will cycle.
2782	 */
2783	if (manual_changed) {
2784		pl->link_failed = true;
2785		phylink_run_resolve(pl);
2786	}
2787
2788	return 0;
2789}
2790EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2791
2792/**
2793 * phylink_get_eee_err() - read the energy efficient ethernet error
2794 *   counter
2795 * @pl: a pointer to a &struct phylink returned from phylink_create().
2796 *
2797 * Read the Energy Efficient Ethernet error counter from the PHY associated
2798 * with the phylink instance specified by @pl.
2799 *
2800 * Returns positive error counter value, or negative error code.
2801 */
2802int phylink_get_eee_err(struct phylink *pl)
2803{
2804	int ret = 0;
2805
2806	ASSERT_RTNL();
2807
2808	if (pl->phydev)
2809		ret = phy_get_eee_err(pl->phydev);
2810
2811	return ret;
2812}
2813EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2814
2815/**
2816 * phylink_init_eee() - init and check the EEE features
2817 * @pl: a pointer to a &struct phylink returned from phylink_create()
2818 * @clk_stop_enable: allow PHY to stop receive clock
2819 *
2820 * Must be called either with RTNL held or within mac_link_up()
2821 */
2822int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2823{
2824	int ret = -EOPNOTSUPP;
2825
2826	if (pl->phydev)
2827		ret = phy_init_eee(pl->phydev, clk_stop_enable);
2828
2829	return ret;
2830}
2831EXPORT_SYMBOL_GPL(phylink_init_eee);
2832
2833/**
2834 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2835 * @pl: a pointer to a &struct phylink returned from phylink_create()
2836 * @eee: a pointer to a &struct ethtool_keee for the read parameters
2837 */
2838int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee)
2839{
2840	int ret = -EOPNOTSUPP;
2841
2842	ASSERT_RTNL();
2843
2844	if (pl->phydev)
2845		ret = phy_ethtool_get_eee(pl->phydev, eee);
2846
2847	return ret;
2848}
2849EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2850
2851/**
2852 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2853 * @pl: a pointer to a &struct phylink returned from phylink_create()
2854 * @eee: a pointer to a &struct ethtool_keee for the desired parameters
2855 */
2856int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee)
2857{
2858	int ret = -EOPNOTSUPP;
2859
2860	ASSERT_RTNL();
2861
2862	if (pl->phydev)
2863		ret = phy_ethtool_set_eee(pl->phydev, eee);
2864
2865	return ret;
2866}
2867EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2868
2869/* This emulates MII registers for a fixed-mode phy operating as per the
2870 * passed in state. "aneg" defines if we report negotiation is possible.
2871 *
2872 * FIXME: should deal with negotiation state too.
2873 */
2874static int phylink_mii_emul_read(unsigned int reg,
2875				 struct phylink_link_state *state)
2876{
2877	struct fixed_phy_status fs;
2878	unsigned long *lpa = state->lp_advertising;
2879	int val;
2880
2881	fs.link = state->link;
2882	fs.speed = state->speed;
2883	fs.duplex = state->duplex;
2884	fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2885	fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2886
2887	val = swphy_read_reg(reg, &fs);
2888	if (reg == MII_BMSR) {
2889		if (!state->an_complete)
2890			val &= ~BMSR_ANEGCOMPLETE;
2891	}
2892	return val;
2893}
2894
2895static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2896			    unsigned int reg)
2897{
2898	struct phy_device *phydev = pl->phydev;
2899	int prtad, devad;
2900
2901	if (mdio_phy_id_is_c45(phy_id)) {
2902		prtad = mdio_phy_id_prtad(phy_id);
2903		devad = mdio_phy_id_devad(phy_id);
2904		return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2905					reg);
2906	}
2907
2908	if (phydev->is_c45) {
2909		switch (reg) {
2910		case MII_BMCR:
2911		case MII_BMSR:
2912		case MII_PHYSID1:
2913		case MII_PHYSID2:
2914			devad = __ffs(phydev->c45_ids.mmds_present);
2915			break;
2916		case MII_ADVERTISE:
2917		case MII_LPA:
2918			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2919				return -EINVAL;
2920			devad = MDIO_MMD_AN;
2921			if (reg == MII_ADVERTISE)
2922				reg = MDIO_AN_ADVERTISE;
2923			else
2924				reg = MDIO_AN_LPA;
2925			break;
2926		default:
2927			return -EINVAL;
2928		}
2929		prtad = phy_id;
2930		return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2931					reg);
2932	}
2933
2934	return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2935}
2936
2937static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2938			     unsigned int reg, unsigned int val)
2939{
2940	struct phy_device *phydev = pl->phydev;
2941	int prtad, devad;
2942
2943	if (mdio_phy_id_is_c45(phy_id)) {
2944		prtad = mdio_phy_id_prtad(phy_id);
2945		devad = mdio_phy_id_devad(phy_id);
2946		return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2947					 reg, val);
2948	}
2949
2950	if (phydev->is_c45) {
2951		switch (reg) {
2952		case MII_BMCR:
2953		case MII_BMSR:
2954		case MII_PHYSID1:
2955		case MII_PHYSID2:
2956			devad = __ffs(phydev->c45_ids.mmds_present);
2957			break;
2958		case MII_ADVERTISE:
2959		case MII_LPA:
2960			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2961				return -EINVAL;
2962			devad = MDIO_MMD_AN;
2963			if (reg == MII_ADVERTISE)
2964				reg = MDIO_AN_ADVERTISE;
2965			else
2966				reg = MDIO_AN_LPA;
2967			break;
2968		default:
2969			return -EINVAL;
2970		}
2971		return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2972					 reg, val);
2973	}
2974
2975	return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2976}
2977
2978static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2979			    unsigned int reg)
2980{
2981	struct phylink_link_state state;
2982	int val = 0xffff;
2983
2984	switch (pl->cur_link_an_mode) {
2985	case MLO_AN_FIXED:
2986		if (phy_id == 0) {
2987			phylink_get_fixed_state(pl, &state);
2988			val = phylink_mii_emul_read(reg, &state);
2989		}
2990		break;
2991
2992	case MLO_AN_PHY:
2993		return -EOPNOTSUPP;
2994
2995	case MLO_AN_INBAND:
2996		if (phy_id == 0) {
2997			phylink_mac_pcs_get_state(pl, &state);
2998			val = phylink_mii_emul_read(reg, &state);
2999		}
3000		break;
3001	}
3002
3003	return val & 0xffff;
3004}
3005
3006static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
3007			     unsigned int reg, unsigned int val)
3008{
3009	switch (pl->cur_link_an_mode) {
3010	case MLO_AN_FIXED:
3011		break;
3012
3013	case MLO_AN_PHY:
3014		return -EOPNOTSUPP;
3015
3016	case MLO_AN_INBAND:
3017		break;
3018	}
3019
3020	return 0;
3021}
3022
3023/**
3024 * phylink_mii_ioctl() - generic mii ioctl interface
3025 * @pl: a pointer to a &struct phylink returned from phylink_create()
3026 * @ifr: a pointer to a &struct ifreq for socket ioctls
3027 * @cmd: ioctl cmd to execute
3028 *
3029 * Perform the specified MII ioctl on the PHY attached to the phylink instance
3030 * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
3031 *
3032 * Returns: zero on success or negative error code.
3033 *
3034 * %SIOCGMIIPHY:
3035 *  read register from the current PHY.
3036 * %SIOCGMIIREG:
3037 *  read register from the specified PHY.
3038 * %SIOCSMIIREG:
3039 *  set a register on the specified PHY.
3040 */
3041int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
3042{
3043	struct mii_ioctl_data *mii = if_mii(ifr);
3044	int  ret;
3045
3046	ASSERT_RTNL();
3047
3048	if (pl->phydev) {
3049		/* PHYs only exist for MLO_AN_PHY and SGMII */
3050		switch (cmd) {
3051		case SIOCGMIIPHY:
3052			mii->phy_id = pl->phydev->mdio.addr;
3053			fallthrough;
3054
3055		case SIOCGMIIREG:
3056			ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
3057			if (ret >= 0) {
3058				mii->val_out = ret;
3059				ret = 0;
3060			}
3061			break;
3062
3063		case SIOCSMIIREG:
3064			ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
3065						mii->val_in);
3066			break;
3067
3068		default:
3069			ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
3070			break;
3071		}
3072	} else {
3073		switch (cmd) {
3074		case SIOCGMIIPHY:
3075			mii->phy_id = 0;
3076			fallthrough;
3077
3078		case SIOCGMIIREG:
3079			ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
3080			if (ret >= 0) {
3081				mii->val_out = ret;
3082				ret = 0;
3083			}
3084			break;
3085
3086		case SIOCSMIIREG:
3087			ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
3088						mii->val_in);
3089			break;
3090
3091		default:
3092			ret = -EOPNOTSUPP;
3093			break;
3094		}
3095	}
3096
3097	return ret;
3098}
3099EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
3100
3101/**
3102 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
3103 *   link partners
3104 * @pl: a pointer to a &struct phylink returned from phylink_create()
3105 * @sync: perform action synchronously
3106 *
3107 * If we have a PHY that is not part of a SFP module, then set the speed
3108 * as described in the phy_speed_down() function. Please see this function
3109 * for a description of the @sync parameter.
3110 *
3111 * Returns zero if there is no PHY, otherwise as per phy_speed_down().
3112 */
3113int phylink_speed_down(struct phylink *pl, bool sync)
3114{
3115	int ret = 0;
3116
3117	ASSERT_RTNL();
3118
3119	if (!pl->sfp_bus && pl->phydev)
3120		ret = phy_speed_down(pl->phydev, sync);
3121
3122	return ret;
3123}
3124EXPORT_SYMBOL_GPL(phylink_speed_down);
3125
3126/**
3127 * phylink_speed_up() - restore the advertised speeds prior to the call to
3128 *   phylink_speed_down()
3129 * @pl: a pointer to a &struct phylink returned from phylink_create()
3130 *
3131 * If we have a PHY that is not part of a SFP module, then restore the
3132 * PHY speeds as per phy_speed_up().
3133 *
3134 * Returns zero if there is no PHY, otherwise as per phy_speed_up().
3135 */
3136int phylink_speed_up(struct phylink *pl)
3137{
3138	int ret = 0;
3139
3140	ASSERT_RTNL();
3141
3142	if (!pl->sfp_bus && pl->phydev)
3143		ret = phy_speed_up(pl->phydev);
3144
3145	return ret;
3146}
3147EXPORT_SYMBOL_GPL(phylink_speed_up);
3148
3149static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3150{
3151	struct phylink *pl = upstream;
3152
3153	pl->netdev->sfp_bus = bus;
3154}
3155
3156static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3157{
3158	struct phylink *pl = upstream;
3159
3160	pl->netdev->sfp_bus = NULL;
3161}
3162
3163static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3164						    const unsigned long *intf)
3165{
3166	phy_interface_t interface;
3167	size_t i;
3168
3169	interface = PHY_INTERFACE_MODE_NA;
3170	for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3171		if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3172			interface = phylink_sfp_interface_preference[i];
3173			break;
3174		}
3175
3176	return interface;
3177}
3178
3179static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
3180				   unsigned long *supported,
3181				   struct phylink_link_state *state)
3182{
3183	bool changed = false;
3184
3185	phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3186		    phylink_an_mode_str(mode), phy_modes(state->interface),
3187		    __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3188
3189	if (!linkmode_equal(pl->supported, supported)) {
3190		linkmode_copy(pl->supported, supported);
3191		changed = true;
3192	}
3193
3194	if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3195		linkmode_copy(pl->link_config.advertising, state->advertising);
3196		changed = true;
3197	}
3198
3199	if (pl->cur_link_an_mode != mode ||
3200	    pl->link_config.interface != state->interface) {
3201		pl->cur_link_an_mode = mode;
3202		pl->link_config.interface = state->interface;
3203
3204		changed = true;
3205
3206		phylink_info(pl, "switched to %s/%s link mode\n",
3207			     phylink_an_mode_str(mode),
3208			     phy_modes(state->interface));
3209	}
3210
3211	if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3212				 &pl->phylink_disable_state))
3213		phylink_mac_initial_config(pl, false);
3214}
3215
3216static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
3217				  struct phy_device *phy)
3218{
 
3219	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3220	struct phylink_link_state config;
 
3221	int ret;
3222
3223	linkmode_copy(support, phy->supported);
3224
3225	memset(&config, 0, sizeof(config));
3226	linkmode_copy(config.advertising, phy->advertising);
3227	config.interface = PHY_INTERFACE_MODE_NA;
3228	config.speed = SPEED_UNKNOWN;
3229	config.duplex = DUPLEX_UNKNOWN;
3230	config.pause = MLO_PAUSE_AN;
3231
3232	/* Ignore errors if we're expecting a PHY to attach later */
3233	ret = phylink_validate(pl, support, &config);
3234	if (ret) {
3235		phylink_err(pl, "validation with support %*pb failed: %pe\n",
3236			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3237			    ERR_PTR(ret));
3238		return ret;
3239	}
3240
3241	config.interface = phylink_sfp_select_interface(pl, config.advertising);
3242	if (config.interface == PHY_INTERFACE_MODE_NA)
 
 
 
3243		return -EINVAL;
 
3244
3245	/* Attach the PHY so that the PHY is present when we do the major
3246	 * configuration step.
3247	 */
3248	ret = phylink_attach_phy(pl, phy, config.interface);
3249	if (ret < 0)
3250		return ret;
3251
3252	/* This will validate the configuration for us. */
3253	ret = phylink_bringup_phy(pl, phy, config.interface);
3254	if (ret < 0) {
3255		phy_detach(phy);
3256		return ret;
3257	}
3258
3259	pl->link_port = pl->sfp_port;
3260
3261	phylink_sfp_set_config(pl, mode, support, &config);
3262
3263	return 0;
3264}
3265
3266static int phylink_sfp_config_optical(struct phylink *pl)
3267{
3268	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3269	DECLARE_PHY_INTERFACE_MASK(interfaces);
3270	struct phylink_link_state config;
3271	phy_interface_t interface;
3272	int ret;
3273
3274	phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3275		    (int)PHY_INTERFACE_MODE_MAX,
3276		    pl->config->supported_interfaces,
3277		    (int)PHY_INTERFACE_MODE_MAX,
3278		    pl->sfp_interfaces);
3279
3280	/* Find the union of the supported interfaces by the PCS/MAC and
3281	 * the SFP module.
3282	 */
3283	phy_interface_and(interfaces, pl->config->supported_interfaces,
3284			  pl->sfp_interfaces);
3285	if (phy_interface_empty(interfaces)) {
3286		phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3287		return -EINVAL;
3288	}
3289
3290	memset(&config, 0, sizeof(config));
3291	linkmode_copy(support, pl->sfp_support);
3292	linkmode_copy(config.advertising, pl->sfp_support);
3293	config.speed = SPEED_UNKNOWN;
3294	config.duplex = DUPLEX_UNKNOWN;
3295	config.pause = MLO_PAUSE_AN;
3296
3297	/* For all the interfaces that are supported, reduce the sfp_support
3298	 * mask to only those link modes that can be supported.
3299	 */
3300	ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config,
3301				    interfaces);
3302	if (ret) {
3303		phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3304			    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3305		return ret;
3306	}
3307
3308	interface = phylink_choose_sfp_interface(pl, interfaces);
3309	if (interface == PHY_INTERFACE_MODE_NA) {
3310		phylink_err(pl, "failed to select SFP interface\n");
3311		return -EINVAL;
3312	}
3313
3314	phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3315		    phy_modes(interface));
3316
3317	config.interface = interface;
3318
3319	/* Ignore errors if we're expecting a PHY to attach later */
3320	ret = phylink_validate(pl, support, &config);
3321	if (ret) {
3322		phylink_err(pl, "validation with support %*pb failed: %pe\n",
3323			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3324			    ERR_PTR(ret));
3325		return ret;
3326	}
3327
3328	pl->link_port = pl->sfp_port;
3329
3330	phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3331
3332	return 0;
3333}
3334
3335static int phylink_sfp_module_insert(void *upstream,
3336				     const struct sfp_eeprom_id *id)
3337{
3338	struct phylink *pl = upstream;
3339
3340	ASSERT_RTNL();
3341
3342	linkmode_zero(pl->sfp_support);
3343	phy_interface_zero(pl->sfp_interfaces);
3344	sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3345	pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3346
3347	/* If this module may have a PHY connecting later, defer until later */
3348	pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3349	if (pl->sfp_may_have_phy)
3350		return 0;
3351
3352	return phylink_sfp_config_optical(pl);
3353}
3354
3355static int phylink_sfp_module_start(void *upstream)
3356{
3357	struct phylink *pl = upstream;
3358
3359	/* If this SFP module has a PHY, start the PHY now. */
3360	if (pl->phydev) {
3361		phy_start(pl->phydev);
3362		return 0;
3363	}
3364
3365	/* If the module may have a PHY but we didn't detect one we
3366	 * need to configure the MAC here.
3367	 */
3368	if (!pl->sfp_may_have_phy)
3369		return 0;
3370
3371	return phylink_sfp_config_optical(pl);
3372}
3373
3374static void phylink_sfp_module_stop(void *upstream)
3375{
3376	struct phylink *pl = upstream;
3377
3378	/* If this SFP module has a PHY, stop it. */
3379	if (pl->phydev)
3380		phy_stop(pl->phydev);
3381}
3382
3383static void phylink_sfp_link_down(void *upstream)
3384{
3385	struct phylink *pl = upstream;
3386
3387	ASSERT_RTNL();
3388
3389	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3390}
3391
3392static void phylink_sfp_link_up(void *upstream)
3393{
3394	struct phylink *pl = upstream;
3395
3396	ASSERT_RTNL();
3397
3398	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3399}
3400
3401/* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3402 * or 802.3z control word, so inband will not work.
3403 */
3404static bool phylink_phy_no_inband(struct phy_device *phy)
3405{
3406	return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
3407					     0xae025150, 0xfffffff0);
3408}
3409
3410static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3411{
3412	struct phylink *pl = upstream;
 
3413	u8 mode;
 
3414
3415	/*
3416	 * This is the new way of dealing with flow control for PHYs,
3417	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3418	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3419	 * using our validate call to the MAC, we rely upon the MAC
3420	 * clearing the bits from both supported and advertising fields.
3421	 */
3422	phy_support_asym_pause(phy);
3423
3424	if (phylink_phy_no_inband(phy))
3425		mode = MLO_AN_PHY;
3426	else
3427		mode = MLO_AN_INBAND;
3428
3429	/* Set the PHY's host supported interfaces */
3430	phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3431			  pl->config->supported_interfaces);
3432
3433	/* Do the initial configuration */
3434	return phylink_sfp_config_phy(pl, mode, phy);
 
 
 
 
 
 
 
 
 
 
 
 
 
3435}
3436
3437static void phylink_sfp_disconnect_phy(void *upstream,
3438				       struct phy_device *phydev)
3439{
3440	phylink_disconnect_phy(upstream);
3441}
3442
3443static const struct sfp_upstream_ops sfp_phylink_ops = {
3444	.attach = phylink_sfp_attach,
3445	.detach = phylink_sfp_detach,
3446	.module_insert = phylink_sfp_module_insert,
3447	.module_start = phylink_sfp_module_start,
3448	.module_stop = phylink_sfp_module_stop,
3449	.link_up = phylink_sfp_link_up,
3450	.link_down = phylink_sfp_link_down,
3451	.connect_phy = phylink_sfp_connect_phy,
3452	.disconnect_phy = phylink_sfp_disconnect_phy,
3453};
3454
3455/* Helpers for MAC drivers */
3456
3457static struct {
3458	int bit;
3459	int speed;
3460} phylink_c73_priority_resolution[] = {
3461	{ ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3462	{ ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3463	/* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3464	{ ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3465	{ ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3466	{ ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3467	{ ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3468	/* 5GBASE-KR not supported */
3469	{ ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3470	{ ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3471};
3472
3473void phylink_resolve_c73(struct phylink_link_state *state)
3474{
3475	int i;
3476
3477	for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3478		int bit = phylink_c73_priority_resolution[i].bit;
3479		if (linkmode_test_bit(bit, state->advertising) &&
3480		    linkmode_test_bit(bit, state->lp_advertising))
3481			break;
3482	}
3483
3484	if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3485		state->speed = phylink_c73_priority_resolution[i].speed;
3486		state->duplex = DUPLEX_FULL;
3487	} else {
3488		/* negotiation failure */
3489		state->link = false;
3490	}
3491
3492	phylink_resolve_an_pause(state);
3493}
3494EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3495
3496static void phylink_decode_c37_word(struct phylink_link_state *state,
3497				    uint16_t config_reg, int speed)
3498{
3499	int fd_bit;
3500
3501	if (speed == SPEED_2500)
3502		fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3503	else
3504		fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3505
3506	mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3507
3508	if (linkmode_test_bit(fd_bit, state->advertising) &&
3509	    linkmode_test_bit(fd_bit, state->lp_advertising)) {
3510		state->speed = speed;
3511		state->duplex = DUPLEX_FULL;
3512	} else {
3513		/* negotiation failure */
3514		state->link = false;
3515	}
3516
3517	phylink_resolve_an_pause(state);
3518}
3519
3520static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3521				      uint16_t config_reg)
3522{
3523	if (!(config_reg & LPA_SGMII_LINK)) {
3524		state->link = false;
3525		return;
3526	}
3527
3528	switch (config_reg & LPA_SGMII_SPD_MASK) {
3529	case LPA_SGMII_10:
3530		state->speed = SPEED_10;
3531		break;
3532	case LPA_SGMII_100:
3533		state->speed = SPEED_100;
3534		break;
3535	case LPA_SGMII_1000:
3536		state->speed = SPEED_1000;
3537		break;
3538	default:
3539		state->link = false;
3540		return;
3541	}
3542	if (config_reg & LPA_SGMII_FULL_DUPLEX)
3543		state->duplex = DUPLEX_FULL;
3544	else
3545		state->duplex = DUPLEX_HALF;
3546}
3547
3548/**
3549 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3550 * @state: a pointer to a struct phylink_link_state.
3551 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3552 *
3553 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3554 * code word.  Decode the USXGMII code word and populate the corresponding fields
3555 * (speed, duplex) into the phylink_link_state structure.
3556 */
3557void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3558				 uint16_t lpa)
3559{
3560	switch (lpa & MDIO_USXGMII_SPD_MASK) {
3561	case MDIO_USXGMII_10:
3562		state->speed = SPEED_10;
3563		break;
3564	case MDIO_USXGMII_100:
3565		state->speed = SPEED_100;
3566		break;
3567	case MDIO_USXGMII_1000:
3568		state->speed = SPEED_1000;
3569		break;
3570	case MDIO_USXGMII_2500:
3571		state->speed = SPEED_2500;
3572		break;
3573	case MDIO_USXGMII_5000:
3574		state->speed = SPEED_5000;
3575		break;
3576	case MDIO_USXGMII_10G:
3577		state->speed = SPEED_10000;
3578		break;
3579	default:
3580		state->link = false;
3581		return;
3582	}
3583
3584	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3585		state->duplex = DUPLEX_FULL;
3586	else
3587		state->duplex = DUPLEX_HALF;
3588}
3589EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3590
3591/**
3592 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3593 * @state: a pointer to a struct phylink_link_state.
3594 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3595 *
3596 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3597 * code word.  Decode the USGMII code word and populate the corresponding fields
3598 * (speed, duplex) into the phylink_link_state structure. The structure for this
3599 * word is the same as the USXGMII word, except it only supports speeds up to
3600 * 1Gbps.
3601 */
3602static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3603				       uint16_t lpa)
3604{
3605	switch (lpa & MDIO_USXGMII_SPD_MASK) {
3606	case MDIO_USXGMII_10:
3607		state->speed = SPEED_10;
3608		break;
3609	case MDIO_USXGMII_100:
3610		state->speed = SPEED_100;
3611		break;
3612	case MDIO_USXGMII_1000:
3613		state->speed = SPEED_1000;
3614		break;
3615	default:
3616		state->link = false;
3617		return;
3618	}
3619
3620	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3621		state->duplex = DUPLEX_FULL;
3622	else
3623		state->duplex = DUPLEX_HALF;
3624}
3625
3626/**
3627 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3628 * @state: a pointer to a &struct phylink_link_state.
3629 * @bmsr: The value of the %MII_BMSR register
3630 * @lpa: The value of the %MII_LPA register
3631 *
3632 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3633 * clause 37 negotiation and/or SGMII control.
3634 *
3635 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3636 * the phylink @state structure. This is suitable to be used for implementing
3637 * the pcs_get_state() member of the struct phylink_pcs_ops structure if
3638 * accessing @bmsr and @lpa cannot be done with MDIO directly.
3639 */
3640void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3641				      u16 bmsr, u16 lpa)
3642{
3643	state->link = !!(bmsr & BMSR_LSTATUS);
3644	state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3645	/* If there is no link or autonegotiation is disabled, the LP advertisement
3646	 * data is not meaningful, so don't go any further.
3647	 */
3648	if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3649					       state->advertising))
3650		return;
3651
3652	switch (state->interface) {
3653	case PHY_INTERFACE_MODE_1000BASEX:
3654		phylink_decode_c37_word(state, lpa, SPEED_1000);
3655		break;
3656
3657	case PHY_INTERFACE_MODE_2500BASEX:
3658		phylink_decode_c37_word(state, lpa, SPEED_2500);
3659		break;
3660
3661	case PHY_INTERFACE_MODE_SGMII:
3662	case PHY_INTERFACE_MODE_QSGMII:
3663		phylink_decode_sgmii_word(state, lpa);
3664		break;
3665	case PHY_INTERFACE_MODE_QUSGMII:
3666		phylink_decode_usgmii_word(state, lpa);
3667		break;
3668
3669	default:
3670		state->link = false;
3671		break;
3672	}
3673}
3674EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3675
3676/**
3677 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3678 * @pcs: a pointer to a &struct mdio_device.
3679 * @state: a pointer to a &struct phylink_link_state.
3680 *
3681 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3682 * clause 37 negotiation and/or SGMII control.
3683 *
3684 * Read the MAC PCS state from the MII device configured in @config and
3685 * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3686 * the phylink @state structure. This is suitable to be directly plugged
3687 * into the pcs_get_state() member of the struct phylink_pcs_ops
3688 * structure.
3689 */
3690void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3691				   struct phylink_link_state *state)
3692{
3693	int bmsr, lpa;
3694
3695	bmsr = mdiodev_read(pcs, MII_BMSR);
3696	lpa = mdiodev_read(pcs, MII_LPA);
3697	if (bmsr < 0 || lpa < 0) {
3698		state->link = false;
3699		return;
3700	}
3701
3702	phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3703}
3704EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3705
3706/**
3707 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3708 *	advertisement
3709 * @interface: the PHY interface mode being configured
3710 * @advertising: the ethtool advertisement mask
3711 *
3712 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3713 * clause 37 negotiation and/or SGMII control.
3714 *
3715 * Encode the clause 37 PCS advertisement as specified by @interface and
3716 * @advertising.
3717 *
3718 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3719 */
3720int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3721					     const unsigned long *advertising)
3722{
3723	u16 adv;
3724
3725	switch (interface) {
3726	case PHY_INTERFACE_MODE_1000BASEX:
3727	case PHY_INTERFACE_MODE_2500BASEX:
3728		adv = ADVERTISE_1000XFULL;
3729		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3730				      advertising))
3731			adv |= ADVERTISE_1000XPAUSE;
3732		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3733				      advertising))
3734			adv |= ADVERTISE_1000XPSE_ASYM;
3735		return adv;
3736	case PHY_INTERFACE_MODE_SGMII:
3737	case PHY_INTERFACE_MODE_QSGMII:
3738		return 0x0001;
3739	default:
3740		/* Nothing to do for other modes */
3741		return -EINVAL;
3742	}
3743}
3744EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3745
3746/**
3747 * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3748 * @pcs: a pointer to a &struct mdio_device.
3749 * @interface: the PHY interface mode being configured
3750 * @advertising: the ethtool advertisement mask
3751 * @neg_mode: PCS negotiation mode
3752 *
3753 * Configure a Clause 22 PCS PHY with the appropriate negotiation
3754 * parameters for the @mode, @interface and @advertising parameters.
3755 * Returns negative error number on failure, zero if the advertisement
3756 * has not changed, or positive if there is a change.
3757 */
3758int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
3759			       phy_interface_t interface,
3760			       const unsigned long *advertising,
3761			       unsigned int neg_mode)
3762{
3763	bool changed = 0;
3764	u16 bmcr;
3765	int ret, adv;
3766
3767	adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3768	if (adv >= 0) {
3769		ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3770					     MII_ADVERTISE, 0xffff, adv);
3771		if (ret < 0)
3772			return ret;
3773		changed = ret;
3774	}
3775
3776	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
3777		bmcr = BMCR_ANENABLE;
3778	else
3779		bmcr = 0;
3780
3781	/* Configure the inband state. Ensure ISOLATE bit is disabled */
3782	ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3783	if (ret < 0)
3784		return ret;
3785
3786	return changed;
3787}
3788EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3789
3790/**
3791 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3792 * @pcs: a pointer to a &struct mdio_device.
3793 *
3794 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3795 * clause 37 negotiation.
3796 *
3797 * Restart the clause 37 negotiation with the link partner. This is
3798 * suitable to be directly plugged into the pcs_get_state() member
3799 * of the struct phylink_pcs_ops structure.
3800 */
3801void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3802{
3803	int val = mdiodev_read(pcs, MII_BMCR);
3804
3805	if (val >= 0) {
3806		val |= BMCR_ANRESTART;
3807
3808		mdiodev_write(pcs, MII_BMCR, val);
3809	}
3810}
3811EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3812
3813void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3814				   struct phylink_link_state *state)
3815{
3816	struct mii_bus *bus = pcs->bus;
3817	int addr = pcs->addr;
3818	int stat;
3819
3820	stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3821	if (stat < 0) {
3822		state->link = false;
3823		return;
3824	}
3825
3826	state->link = !!(stat & MDIO_STAT1_LSTATUS);
3827	if (!state->link)
3828		return;
3829
3830	switch (state->interface) {
3831	case PHY_INTERFACE_MODE_10GBASER:
3832		state->speed = SPEED_10000;
3833		state->duplex = DUPLEX_FULL;
3834		break;
3835
3836	default:
3837		break;
3838	}
3839}
3840EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3841
3842static int __init phylink_init(void)
3843{
3844	for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3845		__set_bit(phylink_sfp_interface_preference[i],
3846			  phylink_sfp_interfaces);
3847
3848	return 0;
3849}
3850
3851module_init(phylink_init);
3852
3853MODULE_LICENSE("GPL v2");
3854MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection");
v6.8
   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * phylink models the MAC to optional PHY connection, supporting
   4 * technologies such as SFP cages where the PHY is hot-pluggable.
   5 *
   6 * Copyright (C) 2015 Russell King
   7 */
   8#include <linux/acpi.h>
   9#include <linux/ethtool.h>
  10#include <linux/export.h>
  11#include <linux/gpio/consumer.h>
  12#include <linux/netdevice.h>
  13#include <linux/of.h>
  14#include <linux/of_mdio.h>
  15#include <linux/phy.h>
  16#include <linux/phy_fixed.h>
  17#include <linux/phylink.h>
  18#include <linux/rtnetlink.h>
  19#include <linux/spinlock.h>
  20#include <linux/timer.h>
  21#include <linux/workqueue.h>
  22
  23#include "sfp.h"
  24#include "swphy.h"
  25
  26#define SUPPORTED_INTERFACES \
  27	(SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
  28	 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
  29#define ADVERTISED_INTERFACES \
  30	(ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
  31	 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
  32
  33enum {
  34	PHYLINK_DISABLE_STOPPED,
  35	PHYLINK_DISABLE_LINK,
  36	PHYLINK_DISABLE_MAC_WOL,
  37
  38	PCS_STATE_DOWN = 0,
  39	PCS_STATE_STARTING,
  40	PCS_STATE_STARTED,
  41};
  42
  43/**
  44 * struct phylink - internal data type for phylink
  45 */
  46struct phylink {
  47	/* private: */
  48	struct net_device *netdev;
  49	const struct phylink_mac_ops *mac_ops;
  50	struct phylink_config *config;
  51	struct phylink_pcs *pcs;
  52	struct device *dev;
  53	unsigned int old_link_state:1;
  54
  55	unsigned long phylink_disable_state; /* bitmask of disables */
  56	struct phy_device *phydev;
  57	phy_interface_t link_interface;	/* PHY_INTERFACE_xxx */
  58	u8 cfg_link_an_mode;		/* MLO_AN_xxx */
  59	u8 cur_link_an_mode;
  60	u8 link_port;			/* The current non-phy ethtool port */
  61	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  62
  63	/* The link configuration settings */
  64	struct phylink_link_state link_config;
  65
  66	/* The current settings */
  67	phy_interface_t cur_interface;
  68
  69	struct gpio_desc *link_gpio;
  70	unsigned int link_irq;
  71	struct timer_list link_poll;
  72	void (*get_fixed_state)(struct net_device *dev,
  73				struct phylink_link_state *s);
  74
  75	struct mutex state_mutex;
  76	struct phylink_link_state phy_state;
  77	struct work_struct resolve;
  78	unsigned int pcs_neg_mode;
  79	unsigned int pcs_state;
  80
  81	bool mac_link_dropped;
  82	bool using_mac_select_pcs;
  83
  84	struct sfp_bus *sfp_bus;
  85	bool sfp_may_have_phy;
  86	DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
  87	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
  88	u8 sfp_port;
  89};
  90
  91#define phylink_printk(level, pl, fmt, ...) \
  92	do { \
  93		if ((pl)->config->type == PHYLINK_NETDEV) \
  94			netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
  95		else if ((pl)->config->type == PHYLINK_DEV) \
  96			dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
  97	} while (0)
  98
  99#define phylink_err(pl, fmt, ...) \
 100	phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
 101#define phylink_warn(pl, fmt, ...) \
 102	phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
 103#define phylink_info(pl, fmt, ...) \
 104	phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
 105#if defined(CONFIG_DYNAMIC_DEBUG)
 106#define phylink_dbg(pl, fmt, ...) \
 107do {									\
 108	if ((pl)->config->type == PHYLINK_NETDEV)			\
 109		netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);		\
 110	else if ((pl)->config->type == PHYLINK_DEV)			\
 111		dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);			\
 112} while (0)
 113#elif defined(DEBUG)
 114#define phylink_dbg(pl, fmt, ...)					\
 115	phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
 116#else
 117#define phylink_dbg(pl, fmt, ...)					\
 118({									\
 119	if (0)								\
 120		phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__);	\
 121})
 122#endif
 123
 124static const phy_interface_t phylink_sfp_interface_preference[] = {
 125	PHY_INTERFACE_MODE_25GBASER,
 126	PHY_INTERFACE_MODE_USXGMII,
 127	PHY_INTERFACE_MODE_10GBASER,
 128	PHY_INTERFACE_MODE_5GBASER,
 129	PHY_INTERFACE_MODE_2500BASEX,
 130	PHY_INTERFACE_MODE_SGMII,
 131	PHY_INTERFACE_MODE_1000BASEX,
 132	PHY_INTERFACE_MODE_100BASEX,
 133};
 134
 135static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
 136
 137/**
 138 * phylink_set_port_modes() - set the port type modes in the ethtool mask
 139 * @mask: ethtool link mode mask
 140 *
 141 * Sets all the port type modes in the ethtool mask.  MAC drivers should
 142 * use this in their 'validate' callback.
 143 */
 144void phylink_set_port_modes(unsigned long *mask)
 145{
 146	phylink_set(mask, TP);
 147	phylink_set(mask, AUI);
 148	phylink_set(mask, MII);
 149	phylink_set(mask, FIBRE);
 150	phylink_set(mask, BNC);
 151	phylink_set(mask, Backplane);
 152}
 153EXPORT_SYMBOL_GPL(phylink_set_port_modes);
 154
 155static int phylink_is_empty_linkmode(const unsigned long *linkmode)
 156{
 157	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
 158
 159	phylink_set_port_modes(tmp);
 160	phylink_set(tmp, Autoneg);
 161	phylink_set(tmp, Pause);
 162	phylink_set(tmp, Asym_Pause);
 163
 164	return linkmode_subset(linkmode, tmp);
 165}
 166
 167static const char *phylink_an_mode_str(unsigned int mode)
 168{
 169	static const char *modestr[] = {
 170		[MLO_AN_PHY] = "phy",
 171		[MLO_AN_FIXED] = "fixed",
 172		[MLO_AN_INBAND] = "inband",
 173	};
 174
 175	return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
 176}
 177
 178static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
 179{
 180	switch (interface) {
 181	case PHY_INTERFACE_MODE_SGMII:
 182	case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
 183		return 1250;
 184	case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
 185		return 3125;
 186	case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
 187		return 5156;
 188	case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
 189		return 10313;
 190	default:
 191		return 0;
 192	}
 193}
 194
 195/**
 196 * phylink_interface_max_speed() - get the maximum speed of a phy interface
 197 * @interface: phy interface mode defined by &typedef phy_interface_t
 198 *
 199 * Determine the maximum speed of a phy interface. This is intended to help
 200 * determine the correct speed to pass to the MAC when the phy is performing
 201 * rate matching.
 202 *
 203 * Return: The maximum speed of @interface
 204 */
 205static int phylink_interface_max_speed(phy_interface_t interface)
 206{
 207	switch (interface) {
 208	case PHY_INTERFACE_MODE_100BASEX:
 209	case PHY_INTERFACE_MODE_REVRMII:
 210	case PHY_INTERFACE_MODE_RMII:
 211	case PHY_INTERFACE_MODE_SMII:
 212	case PHY_INTERFACE_MODE_REVMII:
 213	case PHY_INTERFACE_MODE_MII:
 214		return SPEED_100;
 215
 216	case PHY_INTERFACE_MODE_TBI:
 217	case PHY_INTERFACE_MODE_MOCA:
 218	case PHY_INTERFACE_MODE_RTBI:
 219	case PHY_INTERFACE_MODE_1000BASEX:
 220	case PHY_INTERFACE_MODE_1000BASEKX:
 221	case PHY_INTERFACE_MODE_TRGMII:
 222	case PHY_INTERFACE_MODE_RGMII_TXID:
 223	case PHY_INTERFACE_MODE_RGMII_RXID:
 224	case PHY_INTERFACE_MODE_RGMII_ID:
 225	case PHY_INTERFACE_MODE_RGMII:
 226	case PHY_INTERFACE_MODE_PSGMII:
 227	case PHY_INTERFACE_MODE_QSGMII:
 228	case PHY_INTERFACE_MODE_QUSGMII:
 229	case PHY_INTERFACE_MODE_SGMII:
 230	case PHY_INTERFACE_MODE_GMII:
 231		return SPEED_1000;
 232
 233	case PHY_INTERFACE_MODE_2500BASEX:
 
 234		return SPEED_2500;
 235
 236	case PHY_INTERFACE_MODE_5GBASER:
 237		return SPEED_5000;
 238
 239	case PHY_INTERFACE_MODE_XGMII:
 240	case PHY_INTERFACE_MODE_RXAUI:
 241	case PHY_INTERFACE_MODE_XAUI:
 242	case PHY_INTERFACE_MODE_10GBASER:
 243	case PHY_INTERFACE_MODE_10GKR:
 244	case PHY_INTERFACE_MODE_USXGMII:
 245		return SPEED_10000;
 246
 247	case PHY_INTERFACE_MODE_25GBASER:
 248		return SPEED_25000;
 249
 250	case PHY_INTERFACE_MODE_XLGMII:
 251		return SPEED_40000;
 252
 253	case PHY_INTERFACE_MODE_INTERNAL:
 254	case PHY_INTERFACE_MODE_NA:
 255	case PHY_INTERFACE_MODE_MAX:
 256		/* No idea! Garbage in, unknown out */
 257		return SPEED_UNKNOWN;
 258	}
 259
 260	/* If we get here, someone forgot to add an interface mode above */
 261	WARN_ON_ONCE(1);
 262	return SPEED_UNKNOWN;
 263}
 264
 265/**
 266 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
 267 * @linkmodes: ethtool linkmode mask (must be already initialised)
 268 * @caps: bitmask of MAC capabilities
 269 *
 270 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
 271 * supported by the @caps. @linkmodes must have been initialised previously.
 272 */
 273static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
 274				      unsigned long caps)
 275{
 276	if (caps & MAC_SYM_PAUSE)
 277		__set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
 278
 279	if (caps & MAC_ASYM_PAUSE)
 280		__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
 281
 282	if (caps & MAC_10HD) {
 283		__set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
 284		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
 285		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
 286	}
 287
 288	if (caps & MAC_10FD) {
 289		__set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
 290		__set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
 291		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
 292	}
 293
 294	if (caps & MAC_100HD) {
 295		__set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
 296		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
 297	}
 298
 299	if (caps & MAC_100FD) {
 300		__set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
 301		__set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
 302		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
 303	}
 304
 305	if (caps & MAC_1000HD)
 306		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
 307
 308	if (caps & MAC_1000FD) {
 309		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
 310		__set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
 311		__set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
 312		__set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
 313	}
 314
 315	if (caps & MAC_2500FD) {
 316		__set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
 317		__set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
 318	}
 319
 320	if (caps & MAC_5000FD)
 321		__set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
 322
 323	if (caps & MAC_10000FD) {
 324		__set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
 325		__set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
 326		__set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
 327		__set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
 328		__set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
 329		__set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
 330		__set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
 331		__set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
 332		__set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
 333	}
 334
 335	if (caps & MAC_25000FD) {
 336		__set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
 337		__set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
 338		__set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
 339	}
 340
 341	if (caps & MAC_40000FD) {
 342		__set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
 343		__set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
 344		__set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
 345		__set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
 346	}
 347
 348	if (caps & MAC_50000FD) {
 349		__set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
 350		__set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
 351		__set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
 352		__set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
 353		__set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
 354		__set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
 355		__set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
 356			  linkmodes);
 357		__set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
 358	}
 359
 360	if (caps & MAC_56000FD) {
 361		__set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
 362		__set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
 363		__set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
 364		__set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
 365	}
 366
 367	if (caps & MAC_100000FD) {
 368		__set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
 369		__set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
 370		__set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
 371		__set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
 372			  linkmodes);
 373		__set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
 374		__set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
 375		__set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
 376		__set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
 377			  linkmodes);
 378		__set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
 379		__set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
 380		__set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
 381		__set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
 382			  linkmodes);
 383		__set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
 384		__set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
 385	}
 386
 387	if (caps & MAC_200000FD) {
 388		__set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
 389		__set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
 390		__set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 391			  linkmodes);
 392		__set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
 393		__set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
 394		__set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
 395		__set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
 396		__set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
 397			  linkmodes);
 398		__set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
 399		__set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
 400	}
 401
 402	if (caps & MAC_400000FD) {
 403		__set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
 404		__set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
 405		__set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
 406			  linkmodes);
 407		__set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
 408		__set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
 409		__set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
 410		__set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
 411		__set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
 412			  linkmodes);
 413		__set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
 414		__set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
 415	}
 416}
 417
 418static struct {
 419	unsigned long mask;
 420	int speed;
 421	unsigned int duplex;
 422} phylink_caps_params[] = {
 423	{ MAC_400000FD, SPEED_400000, DUPLEX_FULL },
 424	{ MAC_200000FD, SPEED_200000, DUPLEX_FULL },
 425	{ MAC_100000FD, SPEED_100000, DUPLEX_FULL },
 426	{ MAC_56000FD,  SPEED_56000,  DUPLEX_FULL },
 427	{ MAC_50000FD,  SPEED_50000,  DUPLEX_FULL },
 428	{ MAC_40000FD,  SPEED_40000,  DUPLEX_FULL },
 429	{ MAC_25000FD,  SPEED_25000,  DUPLEX_FULL },
 430	{ MAC_20000FD,  SPEED_20000,  DUPLEX_FULL },
 431	{ MAC_10000FD,  SPEED_10000,  DUPLEX_FULL },
 432	{ MAC_5000FD,   SPEED_5000,   DUPLEX_FULL },
 433	{ MAC_2500FD,   SPEED_2500,   DUPLEX_FULL },
 434	{ MAC_1000FD,   SPEED_1000,   DUPLEX_FULL },
 435	{ MAC_1000HD,   SPEED_1000,   DUPLEX_HALF },
 436	{ MAC_100FD,    SPEED_100,    DUPLEX_FULL },
 437	{ MAC_100HD,    SPEED_100,    DUPLEX_HALF },
 438	{ MAC_10FD,     SPEED_10,     DUPLEX_FULL },
 439	{ MAC_10HD,     SPEED_10,     DUPLEX_HALF },
 440};
 441
 442/**
 443 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
 444 * @config: pointer to a &struct phylink_config
 445 * @max_speed: maximum speed
 446 *
 447 * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
 448 * Any further motifications of config.mac_capabilities will override this.
 449 */
 450void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
 451{
 452	int i;
 453
 454	for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
 455		    phylink_caps_params[i].speed > max_speed; i++)
 456		config->mac_capabilities &= ~phylink_caps_params[i].mask;
 457}
 458EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
 459
 460/**
 461 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
 462 * @speed: the speed to search for
 463 * @duplex: the duplex to search for
 464 *
 465 * Find the mac capability for a given speed and duplex.
 466 *
 467 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
 468 *         there were no matches.
 469 */
 470static unsigned long phylink_cap_from_speed_duplex(int speed,
 471						   unsigned int duplex)
 472{
 473	int i;
 474
 475	for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
 476		if (speed == phylink_caps_params[i].speed &&
 477		    duplex == phylink_caps_params[i].duplex)
 478			return phylink_caps_params[i].mask;
 479	}
 480
 481	return 0;
 482}
 483
 484/**
 485 * phylink_get_capabilities() - get capabilities for a given MAC
 486 * @interface: phy interface mode defined by &typedef phy_interface_t
 487 * @mac_capabilities: bitmask of MAC capabilities
 488 * @rate_matching: type of rate matching being performed
 489 *
 490 * Get the MAC capabilities that are supported by the @interface mode and
 491 * @mac_capabilities.
 492 */
 493static unsigned long phylink_get_capabilities(phy_interface_t interface,
 494					      unsigned long mac_capabilities,
 495					      int rate_matching)
 496{
 497	int max_speed = phylink_interface_max_speed(interface);
 498	unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
 499	unsigned long matched_caps = 0;
 500
 501	switch (interface) {
 502	case PHY_INTERFACE_MODE_USXGMII:
 503		caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
 
 
 
 
 504		fallthrough;
 505
 506	case PHY_INTERFACE_MODE_RGMII_TXID:
 507	case PHY_INTERFACE_MODE_RGMII_RXID:
 508	case PHY_INTERFACE_MODE_RGMII_ID:
 509	case PHY_INTERFACE_MODE_RGMII:
 510	case PHY_INTERFACE_MODE_PSGMII:
 511	case PHY_INTERFACE_MODE_QSGMII:
 512	case PHY_INTERFACE_MODE_QUSGMII:
 513	case PHY_INTERFACE_MODE_SGMII:
 514	case PHY_INTERFACE_MODE_GMII:
 515		caps |= MAC_1000HD | MAC_1000FD;
 516		fallthrough;
 517
 518	case PHY_INTERFACE_MODE_REVRMII:
 519	case PHY_INTERFACE_MODE_RMII:
 520	case PHY_INTERFACE_MODE_SMII:
 521	case PHY_INTERFACE_MODE_REVMII:
 522	case PHY_INTERFACE_MODE_MII:
 523		caps |= MAC_10HD | MAC_10FD;
 524		fallthrough;
 525
 526	case PHY_INTERFACE_MODE_100BASEX:
 527		caps |= MAC_100HD | MAC_100FD;
 528		break;
 529
 530	case PHY_INTERFACE_MODE_TBI:
 531	case PHY_INTERFACE_MODE_MOCA:
 532	case PHY_INTERFACE_MODE_RTBI:
 533	case PHY_INTERFACE_MODE_1000BASEX:
 534		caps |= MAC_1000HD;
 535		fallthrough;
 536	case PHY_INTERFACE_MODE_1000BASEKX:
 537	case PHY_INTERFACE_MODE_TRGMII:
 538		caps |= MAC_1000FD;
 539		break;
 540
 541	case PHY_INTERFACE_MODE_2500BASEX:
 542		caps |= MAC_2500FD;
 543		break;
 544
 545	case PHY_INTERFACE_MODE_5GBASER:
 546		caps |= MAC_5000FD;
 547		break;
 548
 549	case PHY_INTERFACE_MODE_XGMII:
 550	case PHY_INTERFACE_MODE_RXAUI:
 551	case PHY_INTERFACE_MODE_XAUI:
 552	case PHY_INTERFACE_MODE_10GBASER:
 553	case PHY_INTERFACE_MODE_10GKR:
 554		caps |= MAC_10000FD;
 555		break;
 556
 557	case PHY_INTERFACE_MODE_25GBASER:
 558		caps |= MAC_25000FD;
 559		break;
 560
 561	case PHY_INTERFACE_MODE_XLGMII:
 562		caps |= MAC_40000FD;
 563		break;
 564
 565	case PHY_INTERFACE_MODE_INTERNAL:
 566		caps |= ~0;
 567		break;
 568
 569	case PHY_INTERFACE_MODE_NA:
 570	case PHY_INTERFACE_MODE_MAX:
 571		break;
 572	}
 573
 574	switch (rate_matching) {
 575	case RATE_MATCH_OPEN_LOOP:
 576		/* TODO */
 577		fallthrough;
 578	case RATE_MATCH_NONE:
 579		matched_caps = 0;
 580		break;
 581	case RATE_MATCH_PAUSE: {
 582		/* The MAC must support asymmetric pause towards the local
 583		 * device for this. We could allow just symmetric pause, but
 584		 * then we might have to renegotiate if the link partner
 585		 * doesn't support pause. This is because there's no way to
 586		 * accept pause frames without transmitting them if we only
 587		 * support symmetric pause.
 588		 */
 589		if (!(mac_capabilities & MAC_SYM_PAUSE) ||
 590		    !(mac_capabilities & MAC_ASYM_PAUSE))
 591			break;
 592
 593		/* We can't adapt if the MAC doesn't support the interface's
 594		 * max speed at full duplex.
 595		 */
 596		if (mac_capabilities &
 597		    phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
 598			/* Although a duplex-matching phy might exist, we
 599			 * conservatively remove these modes because the MAC
 600			 * will not be aware of the half-duplex nature of the
 601			 * link.
 602			 */
 603			matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 604			matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
 605		}
 606		break;
 607	}
 608	case RATE_MATCH_CRS:
 609		/* The MAC must support half duplex at the interface's max
 610		 * speed.
 611		 */
 612		if (mac_capabilities &
 613		    phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
 614			matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 615			matched_caps &= mac_capabilities;
 616		}
 617		break;
 618	}
 619
 620	return (caps & mac_capabilities) | matched_caps;
 621}
 622
 623/**
 624 * phylink_validate_mask_caps() - Restrict link modes based on caps
 625 * @supported: ethtool bitmask for supported link modes.
 626 * @state: pointer to a &struct phylink_link_state.
 627 * @mac_capabilities: bitmask of MAC capabilities
 628 *
 629 * Calculate the supported link modes based on @mac_capabilities, and restrict
 630 * @supported and @state based on that. Use this function if your capabiliies
 631 * aren't constant, such as if they vary depending on the interface.
 632 */
 633static void phylink_validate_mask_caps(unsigned long *supported,
 634				       struct phylink_link_state *state,
 635				       unsigned long mac_capabilities)
 636{
 637	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 638	unsigned long caps;
 639
 640	phylink_set_port_modes(mask);
 641	phylink_set(mask, Autoneg);
 642	caps = phylink_get_capabilities(state->interface, mac_capabilities,
 643					state->rate_matching);
 644	phylink_caps_to_linkmodes(mask, caps);
 645
 646	linkmode_and(supported, supported, mask);
 647	linkmode_and(state->advertising, state->advertising, mask);
 648}
 649
 650static int phylink_validate_mac_and_pcs(struct phylink *pl,
 651					unsigned long *supported,
 652					struct phylink_link_state *state)
 653{
 
 654	unsigned long capabilities;
 655	struct phylink_pcs *pcs;
 656	int ret;
 657
 658	/* Get the PCS for this interface mode */
 659	if (pl->using_mac_select_pcs) {
 660		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
 661		if (IS_ERR(pcs))
 662			return PTR_ERR(pcs);
 663	} else {
 664		pcs = pl->pcs;
 665	}
 666
 667	if (pcs) {
 668		/* The PCS, if present, must be setup before phylink_create()
 669		 * has been called. If the ops is not initialised, print an
 670		 * error and backtrace rather than oopsing the kernel.
 671		 */
 672		if (!pcs->ops) {
 673			phylink_err(pl, "interface %s: uninitialised PCS\n",
 674				    phy_modes(state->interface));
 675			dump_stack();
 676			return -EINVAL;
 677		}
 678
 679		/* Validate the link parameters with the PCS */
 680		if (pcs->ops->pcs_validate) {
 681			ret = pcs->ops->pcs_validate(pcs, supported, state);
 682			if (ret < 0 || phylink_is_empty_linkmode(supported))
 683				return -EINVAL;
 684
 685			/* Ensure the advertising mask is a subset of the
 686			 * supported mask.
 687			 */
 688			linkmode_and(state->advertising, state->advertising,
 689				     supported);
 690		}
 691	}
 692
 693	/* Then validate the link parameters with the MAC */
 694	if (pl->mac_ops->mac_get_caps)
 695		capabilities = pl->mac_ops->mac_get_caps(pl->config,
 696							 state->interface);
 697	else
 698		capabilities = pl->config->mac_capabilities;
 699
 700	phylink_validate_mask_caps(supported, state, capabilities);
 701
 702	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 703}
 704
 705static void phylink_validate_one(struct phylink *pl, struct phy_device *phy,
 706				 const unsigned long *supported,
 707				 const struct phylink_link_state *state,
 708				 phy_interface_t interface,
 709				 unsigned long *accum_supported,
 710				 unsigned long *accum_advertising)
 711{
 712	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported);
 713	struct phylink_link_state tmp_state;
 714
 715	linkmode_copy(tmp_supported, supported);
 716
 717	tmp_state = *state;
 718	tmp_state.interface = interface;
 719
 720	if (phy)
 721		tmp_state.rate_matching = phy_get_rate_matching(phy, interface);
 722
 723	if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) {
 724		phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
 725			    interface, phy_modes(interface),
 726			    phy_rate_matching_to_str(tmp_state.rate_matching),
 727			    __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported);
 728
 729		linkmode_or(accum_supported, accum_supported, tmp_supported);
 730		linkmode_or(accum_advertising, accum_advertising,
 731			    tmp_state.advertising);
 732	}
 733}
 734
 735static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy,
 736				 unsigned long *supported,
 737				 struct phylink_link_state *state,
 738				 const unsigned long *interfaces)
 739{
 740	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
 741	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
 742	int interface;
 743
 744	for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
 745		phylink_validate_one(pl, phy, supported, state, interface,
 746				     all_s, all_adv);
 747
 748	linkmode_copy(supported, all_s);
 749	linkmode_copy(state->advertising, all_adv);
 750
 751	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 752}
 753
 754static int phylink_validate(struct phylink *pl, unsigned long *supported,
 755			    struct phylink_link_state *state)
 756{
 757	const unsigned long *interfaces = pl->config->supported_interfaces;
 758
 759	if (state->interface == PHY_INTERFACE_MODE_NA)
 760		return phylink_validate_mask(pl, NULL, supported, state,
 761					     interfaces);
 762
 763	if (!test_bit(state->interface, interfaces))
 764		return -EINVAL;
 765
 766	return phylink_validate_mac_and_pcs(pl, supported, state);
 767}
 768
 769static int phylink_parse_fixedlink(struct phylink *pl,
 770				   const struct fwnode_handle *fwnode)
 771{
 
 772	struct fwnode_handle *fixed_node;
 773	bool pause, asym_pause, autoneg;
 774	const struct phy_setting *s;
 775	struct gpio_desc *desc;
 776	u32 speed;
 777	int ret;
 778
 779	fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
 780	if (fixed_node) {
 781		ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
 782
 783		pl->link_config.speed = speed;
 784		pl->link_config.duplex = DUPLEX_HALF;
 785
 786		if (fwnode_property_read_bool(fixed_node, "full-duplex"))
 787			pl->link_config.duplex = DUPLEX_FULL;
 788
 789		/* We treat the "pause" and "asym-pause" terminology as
 790		 * defining the link partner's ability.
 791		 */
 792		if (fwnode_property_read_bool(fixed_node, "pause"))
 793			__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 794				  pl->link_config.lp_advertising);
 795		if (fwnode_property_read_bool(fixed_node, "asym-pause"))
 796			__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 797				  pl->link_config.lp_advertising);
 798
 799		if (ret == 0) {
 800			desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
 801						      GPIOD_IN, "?");
 802
 803			if (!IS_ERR(desc))
 804				pl->link_gpio = desc;
 805			else if (desc == ERR_PTR(-EPROBE_DEFER))
 806				ret = -EPROBE_DEFER;
 807		}
 808		fwnode_handle_put(fixed_node);
 809
 810		if (ret)
 811			return ret;
 812	} else {
 813		u32 prop[5];
 814
 815		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 816						     NULL, 0);
 817		if (ret != ARRAY_SIZE(prop)) {
 818			phylink_err(pl, "broken fixed-link?\n");
 819			return -EINVAL;
 820		}
 821
 822		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 823						     prop, ARRAY_SIZE(prop));
 824		if (!ret) {
 825			pl->link_config.duplex = prop[1] ?
 826						DUPLEX_FULL : DUPLEX_HALF;
 827			pl->link_config.speed = prop[2];
 828			if (prop[3])
 829				__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 830					  pl->link_config.lp_advertising);
 831			if (prop[4])
 832				__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 833					  pl->link_config.lp_advertising);
 834		}
 835	}
 836
 837	if (pl->link_config.speed > SPEED_1000 &&
 838	    pl->link_config.duplex != DUPLEX_FULL)
 839		phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
 840			     pl->link_config.speed);
 841
 842	linkmode_fill(pl->supported);
 843	linkmode_copy(pl->link_config.advertising, pl->supported);
 844	phylink_validate(pl, pl->supported, &pl->link_config);
 845
 846	pause = phylink_test(pl->supported, Pause);
 847	asym_pause = phylink_test(pl->supported, Asym_Pause);
 848	autoneg = phylink_test(pl->supported, Autoneg);
 849	s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
 850			       pl->supported, true);
 851	linkmode_zero(pl->supported);
 852	phylink_set(pl->supported, MII);
 853
 854	if (pause)
 855		phylink_set(pl->supported, Pause);
 
 
 856
 857	if (asym_pause)
 858		phylink_set(pl->supported, Asym_Pause);
 859
 860	if (autoneg)
 861		phylink_set(pl->supported, Autoneg);
 862
 863	if (s) {
 864		__set_bit(s->bit, pl->supported);
 865		__set_bit(s->bit, pl->link_config.lp_advertising);
 866	} else {
 867		phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
 868			     pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
 869			     pl->link_config.speed);
 870	}
 871
 872	linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
 873		     pl->supported);
 874
 875	pl->link_config.link = 1;
 876	pl->link_config.an_complete = 1;
 877
 878	return 0;
 879}
 880
 881static int phylink_parse_mode(struct phylink *pl,
 882			      const struct fwnode_handle *fwnode)
 883{
 884	struct fwnode_handle *dn;
 885	const char *managed;
 886	unsigned long caps;
 887
 
 
 
 888	dn = fwnode_get_named_child_node(fwnode, "fixed-link");
 889	if (dn || fwnode_property_present(fwnode, "fixed-link"))
 890		pl->cfg_link_an_mode = MLO_AN_FIXED;
 891	fwnode_handle_put(dn);
 892
 893	if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
 894	     strcmp(managed, "in-band-status") == 0) ||
 895	    pl->config->ovr_an_inband) {
 896		if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
 897			phylink_err(pl,
 898				    "can't use both fixed-link and in-band-status\n");
 899			return -EINVAL;
 900		}
 901
 
 
 
 
 902		linkmode_zero(pl->supported);
 903		phylink_set(pl->supported, MII);
 904		phylink_set(pl->supported, Autoneg);
 905		phylink_set(pl->supported, Asym_Pause);
 906		phylink_set(pl->supported, Pause);
 907		pl->cfg_link_an_mode = MLO_AN_INBAND;
 908
 909		switch (pl->link_config.interface) {
 910		case PHY_INTERFACE_MODE_SGMII:
 911		case PHY_INTERFACE_MODE_PSGMII:
 912		case PHY_INTERFACE_MODE_QSGMII:
 913		case PHY_INTERFACE_MODE_QUSGMII:
 914		case PHY_INTERFACE_MODE_RGMII:
 915		case PHY_INTERFACE_MODE_RGMII_ID:
 916		case PHY_INTERFACE_MODE_RGMII_RXID:
 917		case PHY_INTERFACE_MODE_RGMII_TXID:
 918		case PHY_INTERFACE_MODE_RTBI:
 919		case PHY_INTERFACE_MODE_1000BASEX:
 920		case PHY_INTERFACE_MODE_2500BASEX:
 921		case PHY_INTERFACE_MODE_5GBASER:
 922		case PHY_INTERFACE_MODE_25GBASER:
 923		case PHY_INTERFACE_MODE_USXGMII:
 
 924		case PHY_INTERFACE_MODE_10GKR:
 925		case PHY_INTERFACE_MODE_10GBASER:
 926		case PHY_INTERFACE_MODE_XLGMII:
 927			caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
 928			caps = phylink_get_capabilities(pl->link_config.interface, caps,
 929							RATE_MATCH_NONE);
 930			phylink_caps_to_linkmodes(pl->supported, caps);
 931			break;
 932
 933		default:
 934			phylink_err(pl,
 935				    "incorrect link mode %s for in-band status\n",
 936				    phy_modes(pl->link_config.interface));
 937			return -EINVAL;
 938		}
 939
 940		linkmode_copy(pl->link_config.advertising, pl->supported);
 941
 942		if (phylink_validate(pl, pl->supported, &pl->link_config)) {
 943			phylink_err(pl,
 944				    "failed to validate link configuration for in-band status\n");
 945			return -EINVAL;
 946		}
 947	}
 948
 949	return 0;
 950}
 951
 952static void phylink_apply_manual_flow(struct phylink *pl,
 953				      struct phylink_link_state *state)
 954{
 955	/* If autoneg is disabled, pause AN is also disabled */
 956	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
 957			       state->advertising))
 958		state->pause &= ~MLO_PAUSE_AN;
 959
 960	/* Manual configuration of pause modes */
 961	if (!(pl->link_config.pause & MLO_PAUSE_AN))
 962		state->pause = pl->link_config.pause;
 963}
 964
 965static void phylink_resolve_an_pause(struct phylink_link_state *state)
 966{
 967	bool tx_pause, rx_pause;
 968
 969	if (state->duplex == DUPLEX_FULL) {
 970		linkmode_resolve_pause(state->advertising,
 971				       state->lp_advertising,
 972				       &tx_pause, &rx_pause);
 973		if (tx_pause)
 974			state->pause |= MLO_PAUSE_TX;
 975		if (rx_pause)
 976			state->pause |= MLO_PAUSE_RX;
 977	}
 978}
 979
 980static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
 981				   phy_interface_t interface)
 982{
 983	if (pcs && pcs->ops->pcs_pre_config)
 984		pcs->ops->pcs_pre_config(pcs, interface);
 985}
 986
 987static int phylink_pcs_post_config(struct phylink_pcs *pcs,
 988				   phy_interface_t interface)
 989{
 990	int err = 0;
 991
 992	if (pcs && pcs->ops->pcs_post_config)
 993		err = pcs->ops->pcs_post_config(pcs, interface);
 994
 995	return err;
 996}
 997
 998static void phylink_pcs_disable(struct phylink_pcs *pcs)
 999{
1000	if (pcs && pcs->ops->pcs_disable)
1001		pcs->ops->pcs_disable(pcs);
1002}
1003
1004static int phylink_pcs_enable(struct phylink_pcs *pcs)
1005{
1006	int err = 0;
1007
1008	if (pcs && pcs->ops->pcs_enable)
1009		err = pcs->ops->pcs_enable(pcs);
1010
1011	return err;
1012}
1013
1014static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
1015			      const struct phylink_link_state *state,
1016			      bool permit_pause_to_mac)
1017{
1018	if (!pcs)
1019		return 0;
1020
1021	return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
1022				    state->advertising, permit_pause_to_mac);
1023}
1024
1025static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
1026				phy_interface_t interface, int speed,
1027				int duplex)
1028{
1029	if (pcs && pcs->ops->pcs_link_up)
1030		pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
1031}
1032
1033static void phylink_pcs_poll_stop(struct phylink *pl)
1034{
1035	if (pl->cfg_link_an_mode == MLO_AN_INBAND)
1036		del_timer(&pl->link_poll);
1037}
1038
1039static void phylink_pcs_poll_start(struct phylink *pl)
1040{
1041	if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
1042		mod_timer(&pl->link_poll, jiffies + HZ);
1043}
1044
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1045static void phylink_mac_config(struct phylink *pl,
1046			       const struct phylink_link_state *state)
1047{
1048	struct phylink_link_state st = *state;
1049
1050	/* Stop drivers incorrectly using these */
1051	linkmode_zero(st.lp_advertising);
1052	st.speed = SPEED_UNKNOWN;
1053	st.duplex = DUPLEX_UNKNOWN;
1054	st.an_complete = false;
1055	st.link = false;
1056
1057	phylink_dbg(pl,
1058		    "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1059		    __func__, phylink_an_mode_str(pl->cur_link_an_mode),
1060		    phy_modes(st.interface),
1061		    phy_rate_matching_to_str(st.rate_matching),
1062		    __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1063		    st.pause);
1064
1065	pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st);
1066}
1067
1068static void phylink_pcs_an_restart(struct phylink *pl)
1069{
1070	if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1071					 pl->link_config.advertising) &&
1072	    phy_interface_mode_is_8023z(pl->link_config.interface) &&
1073	    phylink_autoneg_inband(pl->cur_link_an_mode))
1074		pl->pcs->ops->pcs_an_restart(pl->pcs);
1075}
1076
1077/**
1078 * phylink_pcs_neg_mode() - helper to determine PCS inband mode
1079 * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND.
1080 * @interface: interface mode to be used
1081 * @advertising: adertisement ethtool link mode mask
1082 *
1083 * Determines the negotiation mode to be used by the PCS, and returns
1084 * one of:
1085 *
1086 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
1087 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
1088 *   will be used.
1089 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
1090 *   disabled
1091 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
1092 *
1093 * Note: this is for cases where the PCS itself is involved in negotiation
1094 * (e.g. Clause 37, SGMII and similar) not Clause 73.
1095 */
1096static unsigned int phylink_pcs_neg_mode(unsigned int mode,
1097					 phy_interface_t interface,
1098					 const unsigned long *advertising)
1099{
1100	unsigned int neg_mode;
1101
1102	switch (interface) {
1103	case PHY_INTERFACE_MODE_SGMII:
1104	case PHY_INTERFACE_MODE_QSGMII:
1105	case PHY_INTERFACE_MODE_QUSGMII:
1106	case PHY_INTERFACE_MODE_USXGMII:
 
1107		/* These protocols are designed for use with a PHY which
1108		 * communicates its negotiation result back to the MAC via
1109		 * inband communication. Note: there exist PHYs that run
1110		 * with SGMII but do not send the inband data.
1111		 */
1112		if (!phylink_autoneg_inband(mode))
1113			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1114		else
1115			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1116		break;
1117
1118	case PHY_INTERFACE_MODE_1000BASEX:
1119	case PHY_INTERFACE_MODE_2500BASEX:
1120		/* 1000base-X is designed for use media-side for Fibre
1121		 * connections, and thus the Autoneg bit needs to be
1122		 * taken into account. We also do this for 2500base-X
1123		 * as well, but drivers may not support this, so may
1124		 * need to override this.
1125		 */
1126		if (!phylink_autoneg_inband(mode))
1127			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1128		else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1129					   advertising))
1130			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1131		else
1132			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1133		break;
1134
1135	default:
1136		neg_mode = PHYLINK_PCS_NEG_NONE;
1137		break;
1138	}
1139
1140	return neg_mode;
1141}
1142
1143static void phylink_major_config(struct phylink *pl, bool restart,
1144				  const struct phylink_link_state *state)
1145{
1146	struct phylink_pcs *pcs = NULL;
1147	bool pcs_changed = false;
1148	unsigned int rate_kbd;
1149	unsigned int neg_mode;
1150	int err;
1151
1152	phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
1153
1154	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1155						state->interface,
1156						state->advertising);
1157
1158	if (pl->using_mac_select_pcs) {
1159		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1160		if (IS_ERR(pcs)) {
1161			phylink_err(pl,
1162				    "mac_select_pcs unexpectedly failed: %pe\n",
1163				    pcs);
1164			return;
1165		}
1166
1167		pcs_changed = pcs && pl->pcs != pcs;
1168	}
1169
1170	phylink_pcs_poll_stop(pl);
1171
1172	if (pl->mac_ops->mac_prepare) {
1173		err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1174					       state->interface);
1175		if (err < 0) {
1176			phylink_err(pl, "mac_prepare failed: %pe\n",
1177				    ERR_PTR(err));
1178			return;
1179		}
1180	}
1181
1182	/* If we have a new PCS, switch to the new PCS after preparing the MAC
1183	 * for the change.
1184	 */
1185	if (pcs_changed) {
1186		phylink_pcs_disable(pl->pcs);
1187
1188		if (pl->pcs)
1189			pl->pcs->phylink = NULL;
1190
1191		pcs->phylink = pl;
1192
1193		pl->pcs = pcs;
1194	}
1195
1196	if (pl->pcs)
1197		phylink_pcs_pre_config(pl->pcs, state->interface);
1198
1199	phylink_mac_config(pl, state);
1200
1201	if (pl->pcs)
1202		phylink_pcs_post_config(pl->pcs, state->interface);
1203
1204	if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1205		phylink_pcs_enable(pl->pcs);
1206
1207	neg_mode = pl->cur_link_an_mode;
1208	if (pl->pcs && pl->pcs->neg_mode)
1209		neg_mode = pl->pcs_neg_mode;
1210
1211	err = phylink_pcs_config(pl->pcs, neg_mode, state,
1212				 !!(pl->link_config.pause & MLO_PAUSE_AN));
1213	if (err < 0)
1214		phylink_err(pl, "pcs_config failed: %pe\n",
1215			    ERR_PTR(err));
1216	else if (err > 0)
1217		restart = true;
1218
1219	if (restart)
1220		phylink_pcs_an_restart(pl);
1221
1222	if (pl->mac_ops->mac_finish) {
1223		err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1224					      state->interface);
1225		if (err < 0)
1226			phylink_err(pl, "mac_finish failed: %pe\n",
1227				    ERR_PTR(err));
1228	}
1229
1230	if (pl->sfp_bus) {
1231		rate_kbd = phylink_interface_signal_rate(state->interface);
1232		if (rate_kbd)
1233			sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1234	}
1235
1236	phylink_pcs_poll_start(pl);
1237}
1238
1239/*
1240 * Reconfigure for a change of inband advertisement.
1241 * If we have a separate PCS, we only need to call its pcs_config() method,
1242 * and then restart AN if it indicates something changed. Otherwise, we do
1243 * the full MAC reconfiguration.
1244 */
1245static int phylink_change_inband_advert(struct phylink *pl)
1246{
1247	unsigned int neg_mode;
1248	int ret;
1249
1250	if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1251		return 0;
1252
1253	phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1254		    phylink_an_mode_str(pl->cur_link_an_mode),
1255		    phy_modes(pl->link_config.interface),
1256		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1257		    pl->link_config.pause);
1258
1259	/* Recompute the PCS neg mode */
1260	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1261					pl->link_config.interface,
1262					pl->link_config.advertising);
1263
1264	neg_mode = pl->cur_link_an_mode;
1265	if (pl->pcs->neg_mode)
1266		neg_mode = pl->pcs_neg_mode;
1267
1268	/* Modern PCS-based method; update the advert at the PCS, and
1269	 * restart negotiation if the pcs_config() helper indicates that
1270	 * the programmed advertisement has changed.
1271	 */
1272	ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config,
1273				 !!(pl->link_config.pause & MLO_PAUSE_AN));
1274	if (ret < 0)
1275		return ret;
1276
1277	if (ret > 0)
1278		phylink_pcs_an_restart(pl);
1279
1280	return 0;
1281}
1282
1283static void phylink_mac_pcs_get_state(struct phylink *pl,
1284				      struct phylink_link_state *state)
1285{
1286	linkmode_copy(state->advertising, pl->link_config.advertising);
1287	linkmode_zero(state->lp_advertising);
1288	state->interface = pl->link_config.interface;
1289	state->rate_matching = pl->link_config.rate_matching;
1290	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1291			      state->advertising)) {
1292		state->speed = SPEED_UNKNOWN;
1293		state->duplex = DUPLEX_UNKNOWN;
1294		state->pause = MLO_PAUSE_NONE;
1295	} else {
1296		state->speed =  pl->link_config.speed;
1297		state->duplex = pl->link_config.duplex;
1298		state->pause = pl->link_config.pause;
1299	}
1300	state->an_complete = 0;
1301	state->link = 1;
1302
1303	if (pl->pcs)
1304		pl->pcs->ops->pcs_get_state(pl->pcs, state);
1305	else
1306		state->link = 0;
1307}
1308
1309/* The fixed state is... fixed except for the link state,
1310 * which may be determined by a GPIO or a callback.
1311 */
1312static void phylink_get_fixed_state(struct phylink *pl,
1313				    struct phylink_link_state *state)
1314{
1315	*state = pl->link_config;
1316	if (pl->config->get_fixed_state)
1317		pl->config->get_fixed_state(pl->config, state);
1318	else if (pl->link_gpio)
1319		state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1320
1321	state->pause = MLO_PAUSE_NONE;
1322	phylink_resolve_an_pause(state);
1323}
1324
1325static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1326{
1327	struct phylink_link_state link_state;
1328
1329	switch (pl->cur_link_an_mode) {
1330	case MLO_AN_PHY:
1331		link_state = pl->phy_state;
1332		break;
1333
1334	case MLO_AN_FIXED:
1335		phylink_get_fixed_state(pl, &link_state);
1336		break;
1337
1338	case MLO_AN_INBAND:
1339		link_state = pl->link_config;
1340		if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1341			link_state.pause = MLO_PAUSE_NONE;
1342		break;
1343
1344	default: /* can't happen */
1345		return;
1346	}
1347
1348	link_state.link = false;
1349
1350	phylink_apply_manual_flow(pl, &link_state);
1351	phylink_major_config(pl, force_restart, &link_state);
1352}
1353
1354static const char *phylink_pause_to_str(int pause)
1355{
1356	switch (pause & MLO_PAUSE_TXRX_MASK) {
1357	case MLO_PAUSE_TX | MLO_PAUSE_RX:
1358		return "rx/tx";
1359	case MLO_PAUSE_TX:
1360		return "tx";
1361	case MLO_PAUSE_RX:
1362		return "rx";
1363	default:
1364		return "off";
1365	}
1366}
1367
1368static void phylink_link_up(struct phylink *pl,
1369			    struct phylink_link_state link_state)
1370{
1371	struct net_device *ndev = pl->netdev;
1372	unsigned int neg_mode;
1373	int speed, duplex;
1374	bool rx_pause;
1375
1376	speed = link_state.speed;
1377	duplex = link_state.duplex;
1378	rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1379
1380	switch (link_state.rate_matching) {
1381	case RATE_MATCH_PAUSE:
1382		/* The PHY is doing rate matchion from the media rate (in
1383		 * the link_state) to the interface speed, and will send
1384		 * pause frames to the MAC to limit its transmission speed.
1385		 */
1386		speed = phylink_interface_max_speed(link_state.interface);
1387		duplex = DUPLEX_FULL;
1388		rx_pause = true;
1389		break;
1390
1391	case RATE_MATCH_CRS:
1392		/* The PHY is doing rate matchion from the media rate (in
1393		 * the link_state) to the interface speed, and will cause
1394		 * collisions to the MAC to limit its transmission speed.
1395		 */
1396		speed = phylink_interface_max_speed(link_state.interface);
1397		duplex = DUPLEX_HALF;
1398		break;
1399	}
1400
1401	pl->cur_interface = link_state.interface;
1402
1403	neg_mode = pl->cur_link_an_mode;
1404	if (pl->pcs && pl->pcs->neg_mode)
1405		neg_mode = pl->pcs_neg_mode;
1406
1407	phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
1408			    duplex);
1409
1410	pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1411				 pl->cur_interface, speed, duplex,
1412				 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1413
1414	if (ndev)
1415		netif_carrier_on(ndev);
1416
1417	phylink_info(pl,
1418		     "Link is Up - %s/%s - flow control %s\n",
1419		     phy_speed_to_str(link_state.speed),
1420		     phy_duplex_to_str(link_state.duplex),
1421		     phylink_pause_to_str(link_state.pause));
1422}
1423
1424static void phylink_link_down(struct phylink *pl)
1425{
1426	struct net_device *ndev = pl->netdev;
1427
1428	if (ndev)
1429		netif_carrier_off(ndev);
1430	pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1431				   pl->cur_interface);
1432	phylink_info(pl, "Link is Down\n");
1433}
1434
1435static void phylink_resolve(struct work_struct *w)
1436{
1437	struct phylink *pl = container_of(w, struct phylink, resolve);
1438	struct phylink_link_state link_state;
1439	struct net_device *ndev = pl->netdev;
1440	bool mac_config = false;
1441	bool retrigger = false;
1442	bool cur_link_state;
1443
1444	mutex_lock(&pl->state_mutex);
1445	if (pl->netdev)
1446		cur_link_state = netif_carrier_ok(ndev);
1447	else
1448		cur_link_state = pl->old_link_state;
1449
1450	if (pl->phylink_disable_state) {
1451		pl->mac_link_dropped = false;
1452		link_state.link = false;
1453	} else if (pl->mac_link_dropped) {
1454		link_state.link = false;
1455		retrigger = true;
 
 
 
 
 
 
1456	} else {
1457		switch (pl->cur_link_an_mode) {
1458		case MLO_AN_PHY:
1459			link_state = pl->phy_state;
1460			phylink_apply_manual_flow(pl, &link_state);
1461			mac_config = link_state.link;
1462			break;
1463
1464		case MLO_AN_FIXED:
1465			phylink_get_fixed_state(pl, &link_state);
1466			mac_config = link_state.link;
1467			break;
 
 
 
 
 
 
 
1468
1469		case MLO_AN_INBAND:
1470			phylink_mac_pcs_get_state(pl, &link_state);
 
 
 
1471
1472			/* The PCS may have a latching link-fail indicator.
1473			 * If the link was up, bring the link down and
1474			 * re-trigger the resolve. Otherwise, re-read the
1475			 * PCS state to get the current status of the link.
1476			 */
1477			if (!link_state.link) {
1478				if (cur_link_state)
1479					retrigger = true;
1480				else
1481					phylink_mac_pcs_get_state(pl,
1482								  &link_state);
1483			}
1484
1485			/* If we have a phy, the "up" state is the union of
1486			 * both the PHY and the MAC
 
 
1487			 */
1488			if (pl->phydev)
1489				link_state.link &= pl->phy_state.link;
 
 
 
 
1490
1491			/* Only update if the PHY link is up */
1492			if (pl->phydev && pl->phy_state.link) {
1493				/* If the interface has changed, force a
1494				 * link down event if the link isn't already
1495				 * down, and re-resolve.
1496				 */
1497				if (link_state.interface !=
1498				    pl->phy_state.interface) {
1499					retrigger = true;
1500					link_state.link = false;
1501				}
1502				link_state.interface = pl->phy_state.interface;
1503
1504				/* If we are doing rate matching, then the
1505				 * link speed/duplex comes from the PHY
1506				 */
1507				if (pl->phy_state.rate_matching) {
1508					link_state.rate_matching =
1509						pl->phy_state.rate_matching;
1510					link_state.speed = pl->phy_state.speed;
1511					link_state.duplex =
1512						pl->phy_state.duplex;
1513				}
1514
1515				/* If we have a PHY, we need to update with
1516				 * the PHY flow control bits.
1517				 */
1518				link_state.pause = pl->phy_state.pause;
1519				mac_config = true;
1520			}
1521			phylink_apply_manual_flow(pl, &link_state);
1522			break;
1523		}
1524	}
1525
 
 
 
1526	if (mac_config) {
1527		if (link_state.interface != pl->link_config.interface) {
1528			/* The interface has changed, force the link down and
1529			 * then reconfigure.
1530			 */
1531			if (cur_link_state) {
1532				phylink_link_down(pl);
1533				cur_link_state = false;
1534			}
1535			phylink_major_config(pl, false, &link_state);
1536			pl->link_config.interface = link_state.interface;
1537		}
1538	}
1539
1540	if (link_state.link != cur_link_state) {
1541		pl->old_link_state = link_state.link;
1542		if (!link_state.link)
1543			phylink_link_down(pl);
1544		else
1545			phylink_link_up(pl, link_state);
1546	}
1547	if (!link_state.link && retrigger) {
1548		pl->mac_link_dropped = false;
1549		queue_work(system_power_efficient_wq, &pl->resolve);
1550	}
1551	mutex_unlock(&pl->state_mutex);
1552}
1553
1554static void phylink_run_resolve(struct phylink *pl)
1555{
1556	if (!pl->phylink_disable_state)
1557		queue_work(system_power_efficient_wq, &pl->resolve);
1558}
1559
1560static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1561{
1562	unsigned long state = pl->phylink_disable_state;
1563
1564	set_bit(bit, &pl->phylink_disable_state);
1565	if (state == 0) {
1566		queue_work(system_power_efficient_wq, &pl->resolve);
1567		flush_work(&pl->resolve);
1568	}
1569}
1570
1571static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1572{
1573	clear_bit(bit, &pl->phylink_disable_state);
1574	phylink_run_resolve(pl);
1575}
1576
1577static void phylink_fixed_poll(struct timer_list *t)
1578{
1579	struct phylink *pl = container_of(t, struct phylink, link_poll);
1580
1581	mod_timer(t, jiffies + HZ);
1582
1583	phylink_run_resolve(pl);
1584}
1585
1586static const struct sfp_upstream_ops sfp_phylink_ops;
1587
1588static int phylink_register_sfp(struct phylink *pl,
1589				const struct fwnode_handle *fwnode)
1590{
1591	struct sfp_bus *bus;
1592	int ret;
1593
1594	if (!fwnode)
1595		return 0;
1596
1597	bus = sfp_bus_find_fwnode(fwnode);
1598	if (IS_ERR(bus)) {
1599		phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1600		return PTR_ERR(bus);
1601	}
1602
1603	pl->sfp_bus = bus;
1604
1605	ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1606	sfp_bus_put(bus);
1607
1608	return ret;
1609}
1610
1611/**
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1612 * phylink_create() - create a phylink instance
1613 * @config: a pointer to the target &struct phylink_config
1614 * @fwnode: a pointer to a &struct fwnode_handle describing the network
1615 *	interface
1616 * @iface: the desired link mode defined by &typedef phy_interface_t
1617 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1618 *
1619 * Create a new phylink instance, and parse the link parameters found in @np.
1620 * This will parse in-band modes, fixed-link or SFP configuration.
1621 *
1622 * Note: the rtnl lock must not be held when calling this function.
1623 *
1624 * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1625 * must use IS_ERR() to check for errors from this function.
1626 */
1627struct phylink *phylink_create(struct phylink_config *config,
1628			       const struct fwnode_handle *fwnode,
1629			       phy_interface_t iface,
1630			       const struct phylink_mac_ops *mac_ops)
1631{
1632	bool using_mac_select_pcs = false;
1633	struct phylink *pl;
1634	int ret;
1635
1636	/* Validate the supplied configuration */
1637	if (phy_interface_empty(config->supported_interfaces)) {
1638		dev_err(config->dev,
1639			"phylink: error: empty supported_interfaces\n");
1640		return ERR_PTR(-EINVAL);
1641	}
1642
1643	if (mac_ops->mac_select_pcs &&
1644	    mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1645	      ERR_PTR(-EOPNOTSUPP))
1646		using_mac_select_pcs = true;
1647
1648	pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1649	if (!pl)
1650		return ERR_PTR(-ENOMEM);
1651
1652	mutex_init(&pl->state_mutex);
1653	INIT_WORK(&pl->resolve, phylink_resolve);
1654
1655	pl->config = config;
1656	if (config->type == PHYLINK_NETDEV) {
1657		pl->netdev = to_net_dev(config->dev);
1658		netif_carrier_off(pl->netdev);
1659	} else if (config->type == PHYLINK_DEV) {
1660		pl->dev = config->dev;
1661	} else {
1662		kfree(pl);
1663		return ERR_PTR(-EINVAL);
1664	}
1665
1666	pl->using_mac_select_pcs = using_mac_select_pcs;
1667	pl->phy_state.interface = iface;
1668	pl->link_interface = iface;
1669	if (iface == PHY_INTERFACE_MODE_MOCA)
1670		pl->link_port = PORT_BNC;
1671	else
1672		pl->link_port = PORT_MII;
1673	pl->link_config.interface = iface;
1674	pl->link_config.pause = MLO_PAUSE_AN;
1675	pl->link_config.speed = SPEED_UNKNOWN;
1676	pl->link_config.duplex = DUPLEX_UNKNOWN;
1677	pl->pcs_state = PCS_STATE_DOWN;
1678	pl->mac_ops = mac_ops;
1679	__set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1680	timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1681
1682	linkmode_fill(pl->supported);
1683	linkmode_copy(pl->link_config.advertising, pl->supported);
1684	phylink_validate(pl, pl->supported, &pl->link_config);
1685
1686	ret = phylink_parse_mode(pl, fwnode);
1687	if (ret < 0) {
1688		kfree(pl);
1689		return ERR_PTR(ret);
1690	}
1691
1692	if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1693		ret = phylink_parse_fixedlink(pl, fwnode);
1694		if (ret < 0) {
1695			kfree(pl);
1696			return ERR_PTR(ret);
1697		}
1698	}
1699
1700	pl->cur_link_an_mode = pl->cfg_link_an_mode;
1701
1702	ret = phylink_register_sfp(pl, fwnode);
1703	if (ret < 0) {
1704		kfree(pl);
1705		return ERR_PTR(ret);
1706	}
1707
1708	return pl;
1709}
1710EXPORT_SYMBOL_GPL(phylink_create);
1711
1712/**
1713 * phylink_destroy() - cleanup and destroy the phylink instance
1714 * @pl: a pointer to a &struct phylink returned from phylink_create()
1715 *
1716 * Destroy a phylink instance. Any PHY that has been attached must have been
1717 * cleaned up via phylink_disconnect_phy() prior to calling this function.
1718 *
1719 * Note: the rtnl lock must not be held when calling this function.
1720 */
1721void phylink_destroy(struct phylink *pl)
1722{
1723	sfp_bus_del_upstream(pl->sfp_bus);
1724	if (pl->link_gpio)
1725		gpiod_put(pl->link_gpio);
1726
1727	cancel_work_sync(&pl->resolve);
1728	kfree(pl);
1729}
1730EXPORT_SYMBOL_GPL(phylink_destroy);
1731
1732/**
1733 * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1734 * @pl: a pointer to a &struct phylink returned from phylink_create()
1735 *
1736 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1737 * no PHY is needed.
1738 *
1739 * Returns true if phylink will be expecting a PHY.
1740 */
1741bool phylink_expects_phy(struct phylink *pl)
1742{
1743	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1744	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1745	     phy_interface_mode_is_8023z(pl->link_config.interface)))
1746		return false;
1747	return true;
1748}
1749EXPORT_SYMBOL_GPL(phylink_expects_phy);
1750
1751static void phylink_phy_change(struct phy_device *phydev, bool up)
1752{
1753	struct phylink *pl = phydev->phylink;
1754	bool tx_pause, rx_pause;
1755
1756	phy_get_pause(phydev, &tx_pause, &rx_pause);
1757
1758	mutex_lock(&pl->state_mutex);
1759	pl->phy_state.speed = phydev->speed;
1760	pl->phy_state.duplex = phydev->duplex;
1761	pl->phy_state.rate_matching = phydev->rate_matching;
1762	pl->phy_state.pause = MLO_PAUSE_NONE;
1763	if (tx_pause)
1764		pl->phy_state.pause |= MLO_PAUSE_TX;
1765	if (rx_pause)
1766		pl->phy_state.pause |= MLO_PAUSE_RX;
1767	pl->phy_state.interface = phydev->interface;
1768	pl->phy_state.link = up;
 
 
1769	mutex_unlock(&pl->state_mutex);
1770
1771	phylink_run_resolve(pl);
1772
1773	phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1774		    phy_modes(phydev->interface),
1775		    phy_speed_to_str(phydev->speed),
1776		    phy_duplex_to_str(phydev->duplex),
1777		    phy_rate_matching_to_str(phydev->rate_matching),
1778		    phylink_pause_to_str(pl->phy_state.pause));
1779}
1780
1781static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
1782				unsigned long *supported,
1783				struct phylink_link_state *state)
1784{
1785	DECLARE_PHY_INTERFACE_MASK(interfaces);
1786
1787	/* If the PHY provides a bitmap of the interfaces it will be using
1788	 * depending on the negotiated media speeds, use this to validate
1789	 * which ethtool link modes can be used.
1790	 */
1791	if (!phy_interface_empty(phy->possible_interfaces)) {
1792		/* We only care about the union of the PHY's interfaces and
1793		 * those which the host supports.
1794		 */
1795		phy_interface_and(interfaces, phy->possible_interfaces,
1796				  pl->config->supported_interfaces);
1797
1798		if (phy_interface_empty(interfaces)) {
1799			phylink_err(pl, "PHY has no common interfaces\n");
1800			return -EINVAL;
1801		}
1802
1803		if (phy_on_sfp(phy)) {
1804			/* If the PHY is on a SFP, limit the interfaces to
1805			 * those that can be used with a SFP module.
1806			 */
1807			phy_interface_and(interfaces, interfaces,
1808					  phylink_sfp_interfaces);
1809
1810			if (phy_interface_empty(interfaces)) {
1811				phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n");
1812				return -EINVAL;
1813			}
1814		}
1815
1816		phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n",
1817			    phydev_name(phy),
1818			    (int)PHY_INTERFACE_MODE_MAX,
1819			    phy->possible_interfaces,
1820			    (int)PHY_INTERFACE_MODE_MAX, interfaces);
1821
1822		return phylink_validate_mask(pl, phy, supported, state,
1823					     interfaces);
1824	}
1825
 
 
 
1826	/* Check whether we would use rate matching for the proposed interface
1827	 * mode.
1828	 */
1829	state->rate_matching = phy_get_rate_matching(phy, state->interface);
1830
1831	/* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1832	 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1833	 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1834	 * their Serdes is either unnecessary or not reasonable.
1835	 *
1836	 * For these which switch interface modes, we really need to know which
1837	 * interface modes the PHY supports to properly work out which ethtool
1838	 * linkmodes can be supported. For now, as a work-around, we validate
1839	 * against all interface modes, which may lead to more ethtool link
1840	 * modes being advertised than are actually supported.
1841	 */
1842	if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
1843	    state->interface != PHY_INTERFACE_MODE_RXAUI &&
1844	    state->interface != PHY_INTERFACE_MODE_XAUI &&
1845	    state->interface != PHY_INTERFACE_MODE_USXGMII)
1846		state->interface = PHY_INTERFACE_MODE_NA;
1847
1848	return phylink_validate(pl, supported, state);
1849}
1850
1851static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1852			       phy_interface_t interface)
1853{
1854	struct phylink_link_state config;
1855	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1856	char *irq_str;
1857	int ret;
1858
1859	/*
1860	 * This is the new way of dealing with flow control for PHYs,
1861	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1862	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1863	 * using our validate call to the MAC, we rely upon the MAC
1864	 * clearing the bits from both supported and advertising fields.
1865	 */
1866	phy_support_asym_pause(phy);
1867
1868	memset(&config, 0, sizeof(config));
1869	linkmode_copy(supported, phy->supported);
1870	linkmode_copy(config.advertising, phy->advertising);
1871	config.interface = interface;
1872
1873	ret = phylink_validate_phy(pl, phy, supported, &config);
1874	if (ret) {
1875		phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1876			     phy_modes(config.interface),
1877			     __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1878			     __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1879			     ERR_PTR(ret));
1880		return ret;
1881	}
1882
1883	phy->phylink = pl;
1884	phy->phy_link_change = phylink_phy_change;
1885
1886	irq_str = phy_attached_info_irq(phy);
1887	phylink_info(pl,
1888		     "PHY [%s] driver [%s] (irq=%s)\n",
1889		     dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1890	kfree(irq_str);
1891
1892	mutex_lock(&phy->lock);
1893	mutex_lock(&pl->state_mutex);
1894	pl->phydev = phy;
1895	pl->phy_state.interface = interface;
1896	pl->phy_state.pause = MLO_PAUSE_NONE;
1897	pl->phy_state.speed = SPEED_UNKNOWN;
1898	pl->phy_state.duplex = DUPLEX_UNKNOWN;
1899	pl->phy_state.rate_matching = RATE_MATCH_NONE;
1900	linkmode_copy(pl->supported, supported);
1901	linkmode_copy(pl->link_config.advertising, config.advertising);
1902
1903	/* Restrict the phy advertisement according to the MAC support. */
1904	linkmode_copy(phy->advertising, config.advertising);
1905	mutex_unlock(&pl->state_mutex);
1906	mutex_unlock(&phy->lock);
1907
1908	phylink_dbg(pl,
1909		    "phy: %s setting supported %*pb advertising %*pb\n",
1910		    phy_modes(interface),
1911		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1912		    __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1913
1914	if (phy_interrupt_is_valid(phy))
1915		phy_request_interrupt(phy);
1916
1917	if (pl->config->mac_managed_pm)
1918		phy->mac_managed_pm = true;
1919
1920	return 0;
1921}
1922
1923static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1924			      phy_interface_t interface)
1925{
 
 
1926	if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1927		    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1928		     phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
1929		return -EINVAL;
1930
1931	if (pl->phydev)
1932		return -EBUSY;
1933
1934	return phy_attach_direct(pl->netdev, phy, 0, interface);
 
 
 
1935}
1936
1937/**
1938 * phylink_connect_phy() - connect a PHY to the phylink instance
1939 * @pl: a pointer to a &struct phylink returned from phylink_create()
1940 * @phy: a pointer to a &struct phy_device.
1941 *
1942 * Connect @phy to the phylink instance specified by @pl by calling
1943 * phy_attach_direct(). Configure the @phy according to the MAC driver's
1944 * capabilities, start the PHYLIB state machine and enable any interrupts
1945 * that the PHY supports.
1946 *
1947 * This updates the phylink's ethtool supported and advertising link mode
1948 * masks.
1949 *
1950 * Returns 0 on success or a negative errno.
1951 */
1952int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1953{
1954	int ret;
1955
1956	/* Use PHY device/driver interface */
1957	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1958		pl->link_interface = phy->interface;
1959		pl->link_config.interface = pl->link_interface;
1960	}
1961
1962	ret = phylink_attach_phy(pl, phy, pl->link_interface);
1963	if (ret < 0)
1964		return ret;
1965
1966	ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1967	if (ret)
1968		phy_detach(phy);
1969
1970	return ret;
1971}
1972EXPORT_SYMBOL_GPL(phylink_connect_phy);
1973
1974/**
1975 * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1976 * @pl: a pointer to a &struct phylink returned from phylink_create()
1977 * @dn: a pointer to a &struct device_node.
1978 * @flags: PHY-specific flags to communicate to the PHY device driver
1979 *
1980 * Connect the phy specified in the device node @dn to the phylink instance
1981 * specified by @pl. Actions specified in phylink_connect_phy() will be
1982 * performed.
1983 *
1984 * Returns 0 on success or a negative errno.
1985 */
1986int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1987			   u32 flags)
1988{
1989	return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
1990}
1991EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1992
1993/**
1994 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
1995 * @pl: a pointer to a &struct phylink returned from phylink_create()
1996 * @fwnode: a pointer to a &struct fwnode_handle.
1997 * @flags: PHY-specific flags to communicate to the PHY device driver
1998 *
1999 * Connect the phy specified @fwnode to the phylink instance specified
2000 * by @pl.
2001 *
2002 * Returns 0 on success or a negative errno.
2003 */
2004int phylink_fwnode_phy_connect(struct phylink *pl,
2005			       const struct fwnode_handle *fwnode,
2006			       u32 flags)
2007{
2008	struct fwnode_handle *phy_fwnode;
2009	struct phy_device *phy_dev;
2010	int ret;
2011
2012	/* Fixed links and 802.3z are handled without needing a PHY */
2013	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2014	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2015	     phy_interface_mode_is_8023z(pl->link_interface)))
2016		return 0;
2017
2018	phy_fwnode = fwnode_get_phy_node(fwnode);
2019	if (IS_ERR(phy_fwnode)) {
2020		if (pl->cfg_link_an_mode == MLO_AN_PHY)
2021			return -ENODEV;
2022		return 0;
2023	}
2024
2025	phy_dev = fwnode_phy_find_device(phy_fwnode);
2026	/* We're done with the phy_node handle */
2027	fwnode_handle_put(phy_fwnode);
2028	if (!phy_dev)
2029		return -ENODEV;
2030
2031	/* Use PHY device/driver interface */
2032	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2033		pl->link_interface = phy_dev->interface;
2034		pl->link_config.interface = pl->link_interface;
2035	}
2036
 
 
 
2037	ret = phy_attach_direct(pl->netdev, phy_dev, flags,
2038				pl->link_interface);
2039	phy_device_free(phy_dev);
2040	if (ret)
2041		return ret;
2042
2043	ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
2044	if (ret)
2045		phy_detach(phy_dev);
2046
2047	return ret;
2048}
2049EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
2050
2051/**
2052 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
2053 *   instance.
2054 * @pl: a pointer to a &struct phylink returned from phylink_create()
2055 *
2056 * Disconnect any current PHY from the phylink instance described by @pl.
2057 */
2058void phylink_disconnect_phy(struct phylink *pl)
2059{
2060	struct phy_device *phy;
2061
2062	ASSERT_RTNL();
2063
2064	phy = pl->phydev;
2065	if (phy) {
2066		mutex_lock(&phy->lock);
2067		mutex_lock(&pl->state_mutex);
2068		pl->phydev = NULL;
2069		mutex_unlock(&pl->state_mutex);
2070		mutex_unlock(&phy->lock);
2071		flush_work(&pl->resolve);
2072
2073		phy_disconnect(phy);
2074	}
2075}
2076EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2077
2078static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2079{
2080	if (!up)
2081		pl->mac_link_dropped = true;
2082	phylink_run_resolve(pl);
2083	phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2084}
2085
2086/**
2087 * phylink_mac_change() - notify phylink of a change in MAC state
2088 * @pl: a pointer to a &struct phylink returned from phylink_create()
2089 * @up: indicates whether the link is currently up.
2090 *
2091 * The MAC driver should call this driver when the state of its link
2092 * changes (eg, link failure, new negotiation results, etc.)
2093 */
2094void phylink_mac_change(struct phylink *pl, bool up)
2095{
2096	phylink_link_changed(pl, up, "mac");
2097}
2098EXPORT_SYMBOL_GPL(phylink_mac_change);
2099
2100/**
2101 * phylink_pcs_change() - notify phylink of a change to PCS link state
2102 * @pcs: pointer to &struct phylink_pcs
2103 * @up: indicates whether the link is currently up.
2104 *
2105 * The PCS driver should call this when the state of its link changes
2106 * (e.g. link failure, new negotiation results, etc.) Note: it should
2107 * not determine "up" by reading the BMSR. If in doubt about the link
2108 * state at interrupt time, then pass true if pcs_get_state() returns
2109 * the latched link-down state, otherwise pass false.
2110 */
2111void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2112{
2113	struct phylink *pl = pcs->phylink;
2114
2115	if (pl)
2116		phylink_link_changed(pl, up, "pcs");
2117}
2118EXPORT_SYMBOL_GPL(phylink_pcs_change);
2119
2120static irqreturn_t phylink_link_handler(int irq, void *data)
2121{
2122	struct phylink *pl = data;
2123
2124	phylink_run_resolve(pl);
2125
2126	return IRQ_HANDLED;
2127}
2128
2129/**
2130 * phylink_start() - start a phylink instance
2131 * @pl: a pointer to a &struct phylink returned from phylink_create()
2132 *
2133 * Start the phylink instance specified by @pl, configuring the MAC for the
2134 * desired link mode(s) and negotiation style. This should be called from the
2135 * network device driver's &struct net_device_ops ndo_open() method.
2136 */
2137void phylink_start(struct phylink *pl)
2138{
2139	bool poll = false;
2140
2141	ASSERT_RTNL();
2142
2143	phylink_info(pl, "configuring for %s/%s link mode\n",
2144		     phylink_an_mode_str(pl->cur_link_an_mode),
2145		     phy_modes(pl->link_config.interface));
2146
2147	/* Always set the carrier off */
2148	if (pl->netdev)
2149		netif_carrier_off(pl->netdev);
2150
2151	pl->pcs_state = PCS_STATE_STARTING;
2152
2153	/* Apply the link configuration to the MAC when starting. This allows
2154	 * a fixed-link to start with the correct parameters, and also
2155	 * ensures that we set the appropriate advertisement for Serdes links.
2156	 *
2157	 * Restart autonegotiation if using 802.3z to ensure that the link
2158	 * parameters are properly negotiated.  This is necessary for DSA
2159	 * switches using 802.3z negotiation to ensure they see our modes.
2160	 */
2161	phylink_mac_initial_config(pl, true);
2162
2163	pl->pcs_state = PCS_STATE_STARTED;
2164
2165	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2166
2167	if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2168		int irq = gpiod_to_irq(pl->link_gpio);
2169
2170		if (irq > 0) {
2171			if (!request_irq(irq, phylink_link_handler,
2172					 IRQF_TRIGGER_RISING |
2173					 IRQF_TRIGGER_FALLING,
2174					 "netdev link", pl))
2175				pl->link_irq = irq;
2176			else
2177				irq = 0;
2178		}
2179		if (irq <= 0)
2180			poll = true;
2181	}
2182
2183	if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2184		poll |= pl->config->poll_fixed_state;
2185
2186	if (poll)
2187		mod_timer(&pl->link_poll, jiffies + HZ);
2188	if (pl->phydev)
2189		phy_start(pl->phydev);
2190	if (pl->sfp_bus)
2191		sfp_upstream_start(pl->sfp_bus);
2192}
2193EXPORT_SYMBOL_GPL(phylink_start);
2194
2195/**
2196 * phylink_stop() - stop a phylink instance
2197 * @pl: a pointer to a &struct phylink returned from phylink_create()
2198 *
2199 * Stop the phylink instance specified by @pl. This should be called from the
2200 * network device driver's &struct net_device_ops ndo_stop() method.  The
2201 * network device's carrier state should not be changed prior to calling this
2202 * function.
2203 *
2204 * This will synchronously bring down the link if the link is not already
2205 * down (in other words, it will trigger a mac_link_down() method call.)
2206 */
2207void phylink_stop(struct phylink *pl)
2208{
2209	ASSERT_RTNL();
2210
2211	if (pl->sfp_bus)
2212		sfp_upstream_stop(pl->sfp_bus);
2213	if (pl->phydev)
2214		phy_stop(pl->phydev);
2215	del_timer_sync(&pl->link_poll);
2216	if (pl->link_irq) {
2217		free_irq(pl->link_irq, pl);
2218		pl->link_irq = 0;
2219	}
2220
2221	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2222
2223	pl->pcs_state = PCS_STATE_DOWN;
2224
2225	phylink_pcs_disable(pl->pcs);
2226}
2227EXPORT_SYMBOL_GPL(phylink_stop);
2228
2229/**
2230 * phylink_suspend() - handle a network device suspend event
2231 * @pl: a pointer to a &struct phylink returned from phylink_create()
2232 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2233 *
2234 * Handle a network device suspend event. There are several cases:
2235 *
2236 * - If Wake-on-Lan is not active, we can bring down the link between
2237 *   the MAC and PHY by calling phylink_stop().
2238 * - If Wake-on-Lan is active, and being handled only by the PHY, we
2239 *   can also bring down the link between the MAC and PHY.
2240 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2241 *   still needs to receive packets, so we can not bring the link down.
2242 */
2243void phylink_suspend(struct phylink *pl, bool mac_wol)
2244{
2245	ASSERT_RTNL();
2246
2247	if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
2248		/* Wake-on-Lan enabled, MAC handling */
2249		mutex_lock(&pl->state_mutex);
2250
2251		/* Stop the resolver bringing the link up */
2252		__set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2253
2254		/* Disable the carrier, to prevent transmit timeouts,
2255		 * but one would hope all packets have been sent. This
2256		 * also means phylink_resolve() will do nothing.
2257		 */
2258		if (pl->netdev)
2259			netif_carrier_off(pl->netdev);
2260		else
2261			pl->old_link_state = false;
2262
2263		/* We do not call mac_link_down() here as we want the
2264		 * link to remain up to receive the WoL packets.
2265		 */
2266		mutex_unlock(&pl->state_mutex);
2267	} else {
2268		phylink_stop(pl);
2269	}
2270}
2271EXPORT_SYMBOL_GPL(phylink_suspend);
2272
2273/**
2274 * phylink_resume() - handle a network device resume event
2275 * @pl: a pointer to a &struct phylink returned from phylink_create()
2276 *
2277 * Undo the effects of phylink_suspend(), returning the link to an
2278 * operational state.
2279 */
2280void phylink_resume(struct phylink *pl)
2281{
2282	ASSERT_RTNL();
2283
2284	if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2285		/* Wake-on-Lan enabled, MAC handling */
2286
2287		/* Call mac_link_down() so we keep the overall state balanced.
2288		 * Do this under the state_mutex lock for consistency. This
2289		 * will cause a "Link Down" message to be printed during
2290		 * resume, which is harmless - the true link state will be
2291		 * printed when we run a resolve.
2292		 */
2293		mutex_lock(&pl->state_mutex);
2294		phylink_link_down(pl);
2295		mutex_unlock(&pl->state_mutex);
2296
2297		/* Re-apply the link parameters so that all the settings get
2298		 * restored to the MAC.
2299		 */
2300		phylink_mac_initial_config(pl, true);
2301
2302		/* Re-enable and re-resolve the link parameters */
2303		phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2304	} else {
2305		phylink_start(pl);
2306	}
2307}
2308EXPORT_SYMBOL_GPL(phylink_resume);
2309
2310/**
2311 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2312 * @pl: a pointer to a &struct phylink returned from phylink_create()
2313 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2314 *
2315 * Read the wake on lan parameters from the PHY attached to the phylink
2316 * instance specified by @pl. If no PHY is currently attached, report no
2317 * support for wake on lan.
2318 */
2319void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2320{
2321	ASSERT_RTNL();
2322
2323	wol->supported = 0;
2324	wol->wolopts = 0;
2325
2326	if (pl->phydev)
2327		phy_ethtool_get_wol(pl->phydev, wol);
2328}
2329EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2330
2331/**
2332 * phylink_ethtool_set_wol() - set wake on lan parameters
2333 * @pl: a pointer to a &struct phylink returned from phylink_create()
2334 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2335 *
2336 * Set the wake on lan parameters for the PHY attached to the phylink
2337 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2338 * error.
2339 *
2340 * Returns zero on success or negative errno code.
2341 */
2342int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2343{
2344	int ret = -EOPNOTSUPP;
2345
2346	ASSERT_RTNL();
2347
2348	if (pl->phydev)
2349		ret = phy_ethtool_set_wol(pl->phydev, wol);
2350
2351	return ret;
2352}
2353EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2354
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2355static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2356{
2357	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2358
2359	linkmode_zero(mask);
2360	phylink_set_port_modes(mask);
2361
2362	linkmode_and(dst, dst, mask);
2363	linkmode_or(dst, dst, b);
2364}
2365
2366static void phylink_get_ksettings(const struct phylink_link_state *state,
2367				  struct ethtool_link_ksettings *kset)
2368{
2369	phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2370	linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2371	if (kset->base.rate_matching == RATE_MATCH_NONE) {
2372		kset->base.speed = state->speed;
2373		kset->base.duplex = state->duplex;
2374	}
2375	kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2376					       state->advertising) ?
2377				AUTONEG_ENABLE : AUTONEG_DISABLE;
2378}
2379
2380/**
2381 * phylink_ethtool_ksettings_get() - get the current link settings
2382 * @pl: a pointer to a &struct phylink returned from phylink_create()
2383 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2384 *
2385 * Read the current link settings for the phylink instance specified by @pl.
2386 * This will be the link settings read from the MAC, PHY or fixed link
2387 * settings depending on the current negotiation mode.
2388 */
2389int phylink_ethtool_ksettings_get(struct phylink *pl,
2390				  struct ethtool_link_ksettings *kset)
2391{
2392	struct phylink_link_state link_state;
2393
2394	ASSERT_RTNL();
2395
2396	if (pl->phydev)
2397		phy_ethtool_ksettings_get(pl->phydev, kset);
2398	else
2399		kset->base.port = pl->link_port;
2400
2401	linkmode_copy(kset->link_modes.supported, pl->supported);
2402
2403	switch (pl->cur_link_an_mode) {
2404	case MLO_AN_FIXED:
2405		/* We are using fixed settings. Report these as the
2406		 * current link settings - and note that these also
2407		 * represent the supported speeds/duplex/pause modes.
2408		 */
2409		phylink_get_fixed_state(pl, &link_state);
2410		phylink_get_ksettings(&link_state, kset);
2411		break;
2412
2413	case MLO_AN_INBAND:
2414		/* If there is a phy attached, then use the reported
2415		 * settings from the phy with no modification.
2416		 */
2417		if (pl->phydev)
2418			break;
2419
2420		phylink_mac_pcs_get_state(pl, &link_state);
2421
2422		/* The MAC is reporting the link results from its own PCS
2423		 * layer via in-band status. Report these as the current
2424		 * link settings.
2425		 */
2426		phylink_get_ksettings(&link_state, kset);
2427		break;
2428	}
2429
2430	return 0;
2431}
2432EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2433
2434/**
2435 * phylink_ethtool_ksettings_set() - set the link settings
2436 * @pl: a pointer to a &struct phylink returned from phylink_create()
2437 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2438 */
2439int phylink_ethtool_ksettings_set(struct phylink *pl,
2440				  const struct ethtool_link_ksettings *kset)
2441{
2442	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2443	struct phylink_link_state config;
2444	const struct phy_setting *s;
2445
2446	ASSERT_RTNL();
2447
2448	if (pl->phydev) {
2449		struct ethtool_link_ksettings phy_kset = *kset;
2450
2451		linkmode_and(phy_kset.link_modes.advertising,
2452			     phy_kset.link_modes.advertising,
2453			     pl->supported);
2454
2455		/* We can rely on phylib for this update; we also do not need
2456		 * to update the pl->link_config settings:
2457		 * - the configuration returned via ksettings_get() will come
2458		 *   from phylib whenever a PHY is present.
2459		 * - link_config.interface will be updated by the PHY calling
2460		 *   back via phylink_phy_change() and a subsequent resolve.
2461		 * - initial link configuration for PHY mode comes from the
2462		 *   last phy state updated via phylink_phy_change().
2463		 * - other configuration changes (e.g. pause modes) are
2464		 *   performed directly via phylib.
2465		 * - if in in-band mode with a PHY, the link configuration
2466		 *   is passed on the link from the PHY, and all of
2467		 *   link_config.{speed,duplex,an_enabled,pause} are not used.
2468		 * - the only possible use would be link_config.advertising
2469		 *   pause modes when in 1000base-X mode with a PHY, but in
2470		 *   the presence of a PHY, this should not be changed as that
2471		 *   should be determined from the media side advertisement.
2472		 */
2473		return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2474	}
2475
2476	config = pl->link_config;
2477	/* Mask out unsupported advertisements */
2478	linkmode_and(config.advertising, kset->link_modes.advertising,
2479		     pl->supported);
2480
2481	/* FIXME: should we reject autoneg if phy/mac does not support it? */
2482	switch (kset->base.autoneg) {
2483	case AUTONEG_DISABLE:
2484		/* Autonegotiation disabled, select a suitable speed and
2485		 * duplex.
2486		 */
2487		s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2488				       pl->supported, false);
2489		if (!s)
2490			return -EINVAL;
2491
2492		/* If we have a fixed link, refuse to change link parameters.
2493		 * If the link parameters match, accept them but do nothing.
2494		 */
2495		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2496			if (s->speed != pl->link_config.speed ||
2497			    s->duplex != pl->link_config.duplex)
2498				return -EINVAL;
2499			return 0;
2500		}
2501
2502		config.speed = s->speed;
2503		config.duplex = s->duplex;
2504		break;
2505
2506	case AUTONEG_ENABLE:
2507		/* If we have a fixed link, allow autonegotiation (since that
2508		 * is our default case) but do not allow the advertisement to
2509		 * be changed. If the advertisement matches, simply return.
2510		 */
2511		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2512			if (!linkmode_equal(config.advertising,
2513					    pl->link_config.advertising))
2514				return -EINVAL;
2515			return 0;
2516		}
2517
2518		config.speed = SPEED_UNKNOWN;
2519		config.duplex = DUPLEX_UNKNOWN;
2520		break;
2521
2522	default:
2523		return -EINVAL;
2524	}
2525
2526	/* We have ruled out the case with a PHY attached, and the
2527	 * fixed-link cases.  All that is left are in-band links.
2528	 */
2529	linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2530			 kset->base.autoneg == AUTONEG_ENABLE);
2531
2532	/* If this link is with an SFP, ensure that changes to advertised modes
2533	 * also cause the associated interface to be selected such that the
2534	 * link can be configured correctly.
2535	 */
2536	if (pl->sfp_bus) {
2537		config.interface = sfp_select_interface(pl->sfp_bus,
2538							config.advertising);
2539		if (config.interface == PHY_INTERFACE_MODE_NA) {
2540			phylink_err(pl,
2541				    "selection of interface failed, advertisement %*pb\n",
2542				    __ETHTOOL_LINK_MODE_MASK_NBITS,
2543				    config.advertising);
2544			return -EINVAL;
2545		}
2546
2547		/* Revalidate with the selected interface */
2548		linkmode_copy(support, pl->supported);
2549		if (phylink_validate(pl, support, &config)) {
2550			phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2551				    phylink_an_mode_str(pl->cur_link_an_mode),
2552				    phy_modes(config.interface),
2553				    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2554			return -EINVAL;
2555		}
2556	} else {
2557		/* Validate without changing the current supported mask. */
2558		linkmode_copy(support, pl->supported);
2559		if (phylink_validate(pl, support, &config))
2560			return -EINVAL;
2561	}
2562
2563	/* If autonegotiation is enabled, we must have an advertisement */
2564	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2565			      config.advertising) &&
2566	    phylink_is_empty_linkmode(config.advertising))
2567		return -EINVAL;
2568
2569	mutex_lock(&pl->state_mutex);
2570	pl->link_config.speed = config.speed;
2571	pl->link_config.duplex = config.duplex;
2572
2573	if (pl->link_config.interface != config.interface) {
2574		/* The interface changed, e.g. 1000base-X <-> 2500base-X */
2575		/* We need to force the link down, then change the interface */
2576		if (pl->old_link_state) {
2577			phylink_link_down(pl);
2578			pl->old_link_state = false;
2579		}
2580		if (!test_bit(PHYLINK_DISABLE_STOPPED,
2581			      &pl->phylink_disable_state))
2582			phylink_major_config(pl, false, &config);
2583		pl->link_config.interface = config.interface;
2584		linkmode_copy(pl->link_config.advertising, config.advertising);
2585	} else if (!linkmode_equal(pl->link_config.advertising,
2586				   config.advertising)) {
2587		linkmode_copy(pl->link_config.advertising, config.advertising);
2588		phylink_change_inband_advert(pl);
2589	}
2590	mutex_unlock(&pl->state_mutex);
2591
2592	return 0;
2593}
2594EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2595
2596/**
2597 * phylink_ethtool_nway_reset() - restart negotiation
2598 * @pl: a pointer to a &struct phylink returned from phylink_create()
2599 *
2600 * Restart negotiation for the phylink instance specified by @pl. This will
2601 * cause any attached phy to restart negotiation with the link partner, and
2602 * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2603 * negotiation.
2604 *
2605 * Returns zero on success, or negative error code.
2606 */
2607int phylink_ethtool_nway_reset(struct phylink *pl)
2608{
2609	int ret = 0;
2610
2611	ASSERT_RTNL();
2612
2613	if (pl->phydev)
2614		ret = phy_restart_aneg(pl->phydev);
2615	phylink_pcs_an_restart(pl);
2616
2617	return ret;
2618}
2619EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2620
2621/**
2622 * phylink_ethtool_get_pauseparam() - get the current pause parameters
2623 * @pl: a pointer to a &struct phylink returned from phylink_create()
2624 * @pause: a pointer to a &struct ethtool_pauseparam
2625 */
2626void phylink_ethtool_get_pauseparam(struct phylink *pl,
2627				    struct ethtool_pauseparam *pause)
2628{
2629	ASSERT_RTNL();
2630
2631	pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2632	pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2633	pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2634}
2635EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2636
2637/**
2638 * phylink_ethtool_set_pauseparam() - set the current pause parameters
2639 * @pl: a pointer to a &struct phylink returned from phylink_create()
2640 * @pause: a pointer to a &struct ethtool_pauseparam
2641 */
2642int phylink_ethtool_set_pauseparam(struct phylink *pl,
2643				   struct ethtool_pauseparam *pause)
2644{
2645	struct phylink_link_state *config = &pl->link_config;
2646	bool manual_changed;
2647	int pause_state;
2648
2649	ASSERT_RTNL();
2650
2651	if (pl->cur_link_an_mode == MLO_AN_FIXED)
2652		return -EOPNOTSUPP;
2653
2654	if (!phylink_test(pl->supported, Pause) &&
2655	    !phylink_test(pl->supported, Asym_Pause))
2656		return -EOPNOTSUPP;
2657
2658	if (!phylink_test(pl->supported, Asym_Pause) &&
2659	    pause->rx_pause != pause->tx_pause)
2660		return -EINVAL;
2661
2662	pause_state = 0;
2663	if (pause->autoneg)
2664		pause_state |= MLO_PAUSE_AN;
2665	if (pause->rx_pause)
2666		pause_state |= MLO_PAUSE_RX;
2667	if (pause->tx_pause)
2668		pause_state |= MLO_PAUSE_TX;
2669
2670	mutex_lock(&pl->state_mutex);
2671	/*
2672	 * See the comments for linkmode_set_pause(), wrt the deficiencies
2673	 * with the current implementation.  A solution to this issue would
2674	 * be:
2675	 * ethtool  Local device
2676	 *  rx  tx  Pause AsymDir
2677	 *  0   0   0     0
2678	 *  1   0   1     1
2679	 *  0   1   0     1
2680	 *  1   1   1     1
2681	 * and then use the ethtool rx/tx enablement status to mask the
2682	 * rx/tx pause resolution.
2683	 */
2684	linkmode_set_pause(config->advertising, pause->tx_pause,
2685			   pause->rx_pause);
2686
2687	manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2688			 (!(pause_state & MLO_PAUSE_AN) &&
2689			   (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2690
2691	config->pause = pause_state;
2692
2693	/* Update our in-band advertisement, triggering a renegotiation if
2694	 * the advertisement changed.
2695	 */
2696	if (!pl->phydev)
2697		phylink_change_inband_advert(pl);
2698
2699	mutex_unlock(&pl->state_mutex);
2700
2701	/* If we have a PHY, a change of the pause frame advertisement will
2702	 * cause phylib to renegotiate (if AN is enabled) which will in turn
2703	 * call our phylink_phy_change() and trigger a resolve.  Note that
2704	 * we can't hold our state mutex while calling phy_set_asym_pause().
2705	 */
2706	if (pl->phydev)
2707		phy_set_asym_pause(pl->phydev, pause->rx_pause,
2708				   pause->tx_pause);
2709
2710	/* If the manual pause settings changed, make sure we trigger a
2711	 * resolve to update their state; we can not guarantee that the
2712	 * link will cycle.
2713	 */
2714	if (manual_changed) {
2715		pl->mac_link_dropped = true;
2716		phylink_run_resolve(pl);
2717	}
2718
2719	return 0;
2720}
2721EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2722
2723/**
2724 * phylink_get_eee_err() - read the energy efficient ethernet error
2725 *   counter
2726 * @pl: a pointer to a &struct phylink returned from phylink_create().
2727 *
2728 * Read the Energy Efficient Ethernet error counter from the PHY associated
2729 * with the phylink instance specified by @pl.
2730 *
2731 * Returns positive error counter value, or negative error code.
2732 */
2733int phylink_get_eee_err(struct phylink *pl)
2734{
2735	int ret = 0;
2736
2737	ASSERT_RTNL();
2738
2739	if (pl->phydev)
2740		ret = phy_get_eee_err(pl->phydev);
2741
2742	return ret;
2743}
2744EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2745
2746/**
2747 * phylink_init_eee() - init and check the EEE features
2748 * @pl: a pointer to a &struct phylink returned from phylink_create()
2749 * @clk_stop_enable: allow PHY to stop receive clock
2750 *
2751 * Must be called either with RTNL held or within mac_link_up()
2752 */
2753int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2754{
2755	int ret = -EOPNOTSUPP;
2756
2757	if (pl->phydev)
2758		ret = phy_init_eee(pl->phydev, clk_stop_enable);
2759
2760	return ret;
2761}
2762EXPORT_SYMBOL_GPL(phylink_init_eee);
2763
2764/**
2765 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2766 * @pl: a pointer to a &struct phylink returned from phylink_create()
2767 * @eee: a pointer to a &struct ethtool_eee for the read parameters
2768 */
2769int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
2770{
2771	int ret = -EOPNOTSUPP;
2772
2773	ASSERT_RTNL();
2774
2775	if (pl->phydev)
2776		ret = phy_ethtool_get_eee(pl->phydev, eee);
2777
2778	return ret;
2779}
2780EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2781
2782/**
2783 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2784 * @pl: a pointer to a &struct phylink returned from phylink_create()
2785 * @eee: a pointer to a &struct ethtool_eee for the desired parameters
2786 */
2787int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
2788{
2789	int ret = -EOPNOTSUPP;
2790
2791	ASSERT_RTNL();
2792
2793	if (pl->phydev)
2794		ret = phy_ethtool_set_eee(pl->phydev, eee);
2795
2796	return ret;
2797}
2798EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2799
2800/* This emulates MII registers for a fixed-mode phy operating as per the
2801 * passed in state. "aneg" defines if we report negotiation is possible.
2802 *
2803 * FIXME: should deal with negotiation state too.
2804 */
2805static int phylink_mii_emul_read(unsigned int reg,
2806				 struct phylink_link_state *state)
2807{
2808	struct fixed_phy_status fs;
2809	unsigned long *lpa = state->lp_advertising;
2810	int val;
2811
2812	fs.link = state->link;
2813	fs.speed = state->speed;
2814	fs.duplex = state->duplex;
2815	fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2816	fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2817
2818	val = swphy_read_reg(reg, &fs);
2819	if (reg == MII_BMSR) {
2820		if (!state->an_complete)
2821			val &= ~BMSR_ANEGCOMPLETE;
2822	}
2823	return val;
2824}
2825
2826static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2827			    unsigned int reg)
2828{
2829	struct phy_device *phydev = pl->phydev;
2830	int prtad, devad;
2831
2832	if (mdio_phy_id_is_c45(phy_id)) {
2833		prtad = mdio_phy_id_prtad(phy_id);
2834		devad = mdio_phy_id_devad(phy_id);
2835		return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2836					reg);
2837	}
2838
2839	if (phydev->is_c45) {
2840		switch (reg) {
2841		case MII_BMCR:
2842		case MII_BMSR:
2843		case MII_PHYSID1:
2844		case MII_PHYSID2:
2845			devad = __ffs(phydev->c45_ids.mmds_present);
2846			break;
2847		case MII_ADVERTISE:
2848		case MII_LPA:
2849			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2850				return -EINVAL;
2851			devad = MDIO_MMD_AN;
2852			if (reg == MII_ADVERTISE)
2853				reg = MDIO_AN_ADVERTISE;
2854			else
2855				reg = MDIO_AN_LPA;
2856			break;
2857		default:
2858			return -EINVAL;
2859		}
2860		prtad = phy_id;
2861		return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2862					reg);
2863	}
2864
2865	return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2866}
2867
2868static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2869			     unsigned int reg, unsigned int val)
2870{
2871	struct phy_device *phydev = pl->phydev;
2872	int prtad, devad;
2873
2874	if (mdio_phy_id_is_c45(phy_id)) {
2875		prtad = mdio_phy_id_prtad(phy_id);
2876		devad = mdio_phy_id_devad(phy_id);
2877		return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2878					 reg, val);
2879	}
2880
2881	if (phydev->is_c45) {
2882		switch (reg) {
2883		case MII_BMCR:
2884		case MII_BMSR:
2885		case MII_PHYSID1:
2886		case MII_PHYSID2:
2887			devad = __ffs(phydev->c45_ids.mmds_present);
2888			break;
2889		case MII_ADVERTISE:
2890		case MII_LPA:
2891			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2892				return -EINVAL;
2893			devad = MDIO_MMD_AN;
2894			if (reg == MII_ADVERTISE)
2895				reg = MDIO_AN_ADVERTISE;
2896			else
2897				reg = MDIO_AN_LPA;
2898			break;
2899		default:
2900			return -EINVAL;
2901		}
2902		return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2903					 reg, val);
2904	}
2905
2906	return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2907}
2908
2909static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2910			    unsigned int reg)
2911{
2912	struct phylink_link_state state;
2913	int val = 0xffff;
2914
2915	switch (pl->cur_link_an_mode) {
2916	case MLO_AN_FIXED:
2917		if (phy_id == 0) {
2918			phylink_get_fixed_state(pl, &state);
2919			val = phylink_mii_emul_read(reg, &state);
2920		}
2921		break;
2922
2923	case MLO_AN_PHY:
2924		return -EOPNOTSUPP;
2925
2926	case MLO_AN_INBAND:
2927		if (phy_id == 0) {
2928			phylink_mac_pcs_get_state(pl, &state);
2929			val = phylink_mii_emul_read(reg, &state);
2930		}
2931		break;
2932	}
2933
2934	return val & 0xffff;
2935}
2936
2937static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
2938			     unsigned int reg, unsigned int val)
2939{
2940	switch (pl->cur_link_an_mode) {
2941	case MLO_AN_FIXED:
2942		break;
2943
2944	case MLO_AN_PHY:
2945		return -EOPNOTSUPP;
2946
2947	case MLO_AN_INBAND:
2948		break;
2949	}
2950
2951	return 0;
2952}
2953
2954/**
2955 * phylink_mii_ioctl() - generic mii ioctl interface
2956 * @pl: a pointer to a &struct phylink returned from phylink_create()
2957 * @ifr: a pointer to a &struct ifreq for socket ioctls
2958 * @cmd: ioctl cmd to execute
2959 *
2960 * Perform the specified MII ioctl on the PHY attached to the phylink instance
2961 * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
2962 *
2963 * Returns: zero on success or negative error code.
2964 *
2965 * %SIOCGMIIPHY:
2966 *  read register from the current PHY.
2967 * %SIOCGMIIREG:
2968 *  read register from the specified PHY.
2969 * %SIOCSMIIREG:
2970 *  set a register on the specified PHY.
2971 */
2972int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
2973{
2974	struct mii_ioctl_data *mii = if_mii(ifr);
2975	int  ret;
2976
2977	ASSERT_RTNL();
2978
2979	if (pl->phydev) {
2980		/* PHYs only exist for MLO_AN_PHY and SGMII */
2981		switch (cmd) {
2982		case SIOCGMIIPHY:
2983			mii->phy_id = pl->phydev->mdio.addr;
2984			fallthrough;
2985
2986		case SIOCGMIIREG:
2987			ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
2988			if (ret >= 0) {
2989				mii->val_out = ret;
2990				ret = 0;
2991			}
2992			break;
2993
2994		case SIOCSMIIREG:
2995			ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
2996						mii->val_in);
2997			break;
2998
2999		default:
3000			ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
3001			break;
3002		}
3003	} else {
3004		switch (cmd) {
3005		case SIOCGMIIPHY:
3006			mii->phy_id = 0;
3007			fallthrough;
3008
3009		case SIOCGMIIREG:
3010			ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
3011			if (ret >= 0) {
3012				mii->val_out = ret;
3013				ret = 0;
3014			}
3015			break;
3016
3017		case SIOCSMIIREG:
3018			ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
3019						mii->val_in);
3020			break;
3021
3022		default:
3023			ret = -EOPNOTSUPP;
3024			break;
3025		}
3026	}
3027
3028	return ret;
3029}
3030EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
3031
3032/**
3033 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
3034 *   link partners
3035 * @pl: a pointer to a &struct phylink returned from phylink_create()
3036 * @sync: perform action synchronously
3037 *
3038 * If we have a PHY that is not part of a SFP module, then set the speed
3039 * as described in the phy_speed_down() function. Please see this function
3040 * for a description of the @sync parameter.
3041 *
3042 * Returns zero if there is no PHY, otherwise as per phy_speed_down().
3043 */
3044int phylink_speed_down(struct phylink *pl, bool sync)
3045{
3046	int ret = 0;
3047
3048	ASSERT_RTNL();
3049
3050	if (!pl->sfp_bus && pl->phydev)
3051		ret = phy_speed_down(pl->phydev, sync);
3052
3053	return ret;
3054}
3055EXPORT_SYMBOL_GPL(phylink_speed_down);
3056
3057/**
3058 * phylink_speed_up() - restore the advertised speeds prior to the call to
3059 *   phylink_speed_down()
3060 * @pl: a pointer to a &struct phylink returned from phylink_create()
3061 *
3062 * If we have a PHY that is not part of a SFP module, then restore the
3063 * PHY speeds as per phy_speed_up().
3064 *
3065 * Returns zero if there is no PHY, otherwise as per phy_speed_up().
3066 */
3067int phylink_speed_up(struct phylink *pl)
3068{
3069	int ret = 0;
3070
3071	ASSERT_RTNL();
3072
3073	if (!pl->sfp_bus && pl->phydev)
3074		ret = phy_speed_up(pl->phydev);
3075
3076	return ret;
3077}
3078EXPORT_SYMBOL_GPL(phylink_speed_up);
3079
3080static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3081{
3082	struct phylink *pl = upstream;
3083
3084	pl->netdev->sfp_bus = bus;
3085}
3086
3087static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3088{
3089	struct phylink *pl = upstream;
3090
3091	pl->netdev->sfp_bus = NULL;
3092}
3093
3094static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3095						    const unsigned long *intf)
3096{
3097	phy_interface_t interface;
3098	size_t i;
3099
3100	interface = PHY_INTERFACE_MODE_NA;
3101	for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3102		if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3103			interface = phylink_sfp_interface_preference[i];
3104			break;
3105		}
3106
3107	return interface;
3108}
3109
3110static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
3111				   unsigned long *supported,
3112				   struct phylink_link_state *state)
3113{
3114	bool changed = false;
3115
3116	phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3117		    phylink_an_mode_str(mode), phy_modes(state->interface),
3118		    __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3119
3120	if (!linkmode_equal(pl->supported, supported)) {
3121		linkmode_copy(pl->supported, supported);
3122		changed = true;
3123	}
3124
3125	if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3126		linkmode_copy(pl->link_config.advertising, state->advertising);
3127		changed = true;
3128	}
3129
3130	if (pl->cur_link_an_mode != mode ||
3131	    pl->link_config.interface != state->interface) {
3132		pl->cur_link_an_mode = mode;
3133		pl->link_config.interface = state->interface;
3134
3135		changed = true;
3136
3137		phylink_info(pl, "switched to %s/%s link mode\n",
3138			     phylink_an_mode_str(mode),
3139			     phy_modes(state->interface));
3140	}
3141
3142	if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3143				 &pl->phylink_disable_state))
3144		phylink_mac_initial_config(pl, false);
3145}
3146
3147static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
3148				  struct phy_device *phy)
3149{
3150	__ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
3151	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3152	struct phylink_link_state config;
3153	phy_interface_t iface;
3154	int ret;
3155
3156	linkmode_copy(support, phy->supported);
3157
3158	memset(&config, 0, sizeof(config));
3159	linkmode_copy(config.advertising, phy->advertising);
3160	config.interface = PHY_INTERFACE_MODE_NA;
3161	config.speed = SPEED_UNKNOWN;
3162	config.duplex = DUPLEX_UNKNOWN;
3163	config.pause = MLO_PAUSE_AN;
3164
3165	/* Ignore errors if we're expecting a PHY to attach later */
3166	ret = phylink_validate(pl, support, &config);
3167	if (ret) {
3168		phylink_err(pl, "validation with support %*pb failed: %pe\n",
3169			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3170			    ERR_PTR(ret));
3171		return ret;
3172	}
3173
3174	iface = sfp_select_interface(pl->sfp_bus, config.advertising);
3175	if (iface == PHY_INTERFACE_MODE_NA) {
3176		phylink_err(pl,
3177			    "selection of interface failed, advertisement %*pb\n",
3178			    __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
3179		return -EINVAL;
3180	}
3181
3182	config.interface = iface;
3183	linkmode_copy(support1, support);
3184	ret = phylink_validate(pl, support1, &config);
3185	if (ret) {
3186		phylink_err(pl,
3187			    "validation of %s/%s with support %*pb failed: %pe\n",
3188			    phylink_an_mode_str(mode),
3189			    phy_modes(config.interface),
3190			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3191			    ERR_PTR(ret));
 
3192		return ret;
3193	}
3194
3195	pl->link_port = pl->sfp_port;
3196
3197	phylink_sfp_set_config(pl, mode, support, &config);
3198
3199	return 0;
3200}
3201
3202static int phylink_sfp_config_optical(struct phylink *pl)
3203{
3204	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3205	DECLARE_PHY_INTERFACE_MASK(interfaces);
3206	struct phylink_link_state config;
3207	phy_interface_t interface;
3208	int ret;
3209
3210	phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3211		    (int)PHY_INTERFACE_MODE_MAX,
3212		    pl->config->supported_interfaces,
3213		    (int)PHY_INTERFACE_MODE_MAX,
3214		    pl->sfp_interfaces);
3215
3216	/* Find the union of the supported interfaces by the PCS/MAC and
3217	 * the SFP module.
3218	 */
3219	phy_interface_and(interfaces, pl->config->supported_interfaces,
3220			  pl->sfp_interfaces);
3221	if (phy_interface_empty(interfaces)) {
3222		phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3223		return -EINVAL;
3224	}
3225
3226	memset(&config, 0, sizeof(config));
3227	linkmode_copy(support, pl->sfp_support);
3228	linkmode_copy(config.advertising, pl->sfp_support);
3229	config.speed = SPEED_UNKNOWN;
3230	config.duplex = DUPLEX_UNKNOWN;
3231	config.pause = MLO_PAUSE_AN;
3232
3233	/* For all the interfaces that are supported, reduce the sfp_support
3234	 * mask to only those link modes that can be supported.
3235	 */
3236	ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config,
3237				    interfaces);
3238	if (ret) {
3239		phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3240			    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3241		return ret;
3242	}
3243
3244	interface = phylink_choose_sfp_interface(pl, interfaces);
3245	if (interface == PHY_INTERFACE_MODE_NA) {
3246		phylink_err(pl, "failed to select SFP interface\n");
3247		return -EINVAL;
3248	}
3249
3250	phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3251		    phy_modes(interface));
3252
3253	config.interface = interface;
3254
3255	/* Ignore errors if we're expecting a PHY to attach later */
3256	ret = phylink_validate(pl, support, &config);
3257	if (ret) {
3258		phylink_err(pl, "validation with support %*pb failed: %pe\n",
3259			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3260			    ERR_PTR(ret));
3261		return ret;
3262	}
3263
3264	pl->link_port = pl->sfp_port;
3265
3266	phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3267
3268	return 0;
3269}
3270
3271static int phylink_sfp_module_insert(void *upstream,
3272				     const struct sfp_eeprom_id *id)
3273{
3274	struct phylink *pl = upstream;
3275
3276	ASSERT_RTNL();
3277
3278	linkmode_zero(pl->sfp_support);
3279	phy_interface_zero(pl->sfp_interfaces);
3280	sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3281	pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3282
3283	/* If this module may have a PHY connecting later, defer until later */
3284	pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3285	if (pl->sfp_may_have_phy)
3286		return 0;
3287
3288	return phylink_sfp_config_optical(pl);
3289}
3290
3291static int phylink_sfp_module_start(void *upstream)
3292{
3293	struct phylink *pl = upstream;
3294
3295	/* If this SFP module has a PHY, start the PHY now. */
3296	if (pl->phydev) {
3297		phy_start(pl->phydev);
3298		return 0;
3299	}
3300
3301	/* If the module may have a PHY but we didn't detect one we
3302	 * need to configure the MAC here.
3303	 */
3304	if (!pl->sfp_may_have_phy)
3305		return 0;
3306
3307	return phylink_sfp_config_optical(pl);
3308}
3309
3310static void phylink_sfp_module_stop(void *upstream)
3311{
3312	struct phylink *pl = upstream;
3313
3314	/* If this SFP module has a PHY, stop it. */
3315	if (pl->phydev)
3316		phy_stop(pl->phydev);
3317}
3318
3319static void phylink_sfp_link_down(void *upstream)
3320{
3321	struct phylink *pl = upstream;
3322
3323	ASSERT_RTNL();
3324
3325	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3326}
3327
3328static void phylink_sfp_link_up(void *upstream)
3329{
3330	struct phylink *pl = upstream;
3331
3332	ASSERT_RTNL();
3333
3334	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3335}
3336
3337/* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3338 * or 802.3z control word, so inband will not work.
3339 */
3340static bool phylink_phy_no_inband(struct phy_device *phy)
3341{
3342	return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
3343					     0xae025150, 0xfffffff0);
3344}
3345
3346static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3347{
3348	struct phylink *pl = upstream;
3349	phy_interface_t interface;
3350	u8 mode;
3351	int ret;
3352
3353	/*
3354	 * This is the new way of dealing with flow control for PHYs,
3355	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3356	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3357	 * using our validate call to the MAC, we rely upon the MAC
3358	 * clearing the bits from both supported and advertising fields.
3359	 */
3360	phy_support_asym_pause(phy);
3361
3362	if (phylink_phy_no_inband(phy))
3363		mode = MLO_AN_PHY;
3364	else
3365		mode = MLO_AN_INBAND;
3366
3367	/* Set the PHY's host supported interfaces */
3368	phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3369			  pl->config->supported_interfaces);
3370
3371	/* Do the initial configuration */
3372	ret = phylink_sfp_config_phy(pl, mode, phy);
3373	if (ret < 0)
3374		return ret;
3375
3376	interface = pl->link_config.interface;
3377	ret = phylink_attach_phy(pl, phy, interface);
3378	if (ret < 0)
3379		return ret;
3380
3381	ret = phylink_bringup_phy(pl, phy, interface);
3382	if (ret)
3383		phy_detach(phy);
3384
3385	return ret;
3386}
3387
3388static void phylink_sfp_disconnect_phy(void *upstream)
 
3389{
3390	phylink_disconnect_phy(upstream);
3391}
3392
3393static const struct sfp_upstream_ops sfp_phylink_ops = {
3394	.attach = phylink_sfp_attach,
3395	.detach = phylink_sfp_detach,
3396	.module_insert = phylink_sfp_module_insert,
3397	.module_start = phylink_sfp_module_start,
3398	.module_stop = phylink_sfp_module_stop,
3399	.link_up = phylink_sfp_link_up,
3400	.link_down = phylink_sfp_link_down,
3401	.connect_phy = phylink_sfp_connect_phy,
3402	.disconnect_phy = phylink_sfp_disconnect_phy,
3403};
3404
3405/* Helpers for MAC drivers */
3406
3407static struct {
3408	int bit;
3409	int speed;
3410} phylink_c73_priority_resolution[] = {
3411	{ ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3412	{ ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3413	/* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3414	{ ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3415	{ ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3416	{ ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3417	{ ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3418	/* 5GBASE-KR not supported */
3419	{ ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3420	{ ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3421};
3422
3423void phylink_resolve_c73(struct phylink_link_state *state)
3424{
3425	int i;
3426
3427	for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3428		int bit = phylink_c73_priority_resolution[i].bit;
3429		if (linkmode_test_bit(bit, state->advertising) &&
3430		    linkmode_test_bit(bit, state->lp_advertising))
3431			break;
3432	}
3433
3434	if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3435		state->speed = phylink_c73_priority_resolution[i].speed;
3436		state->duplex = DUPLEX_FULL;
3437	} else {
3438		/* negotiation failure */
3439		state->link = false;
3440	}
3441
3442	phylink_resolve_an_pause(state);
3443}
3444EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3445
3446static void phylink_decode_c37_word(struct phylink_link_state *state,
3447				    uint16_t config_reg, int speed)
3448{
3449	int fd_bit;
3450
3451	if (speed == SPEED_2500)
3452		fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3453	else
3454		fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3455
3456	mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3457
3458	if (linkmode_test_bit(fd_bit, state->advertising) &&
3459	    linkmode_test_bit(fd_bit, state->lp_advertising)) {
3460		state->speed = speed;
3461		state->duplex = DUPLEX_FULL;
3462	} else {
3463		/* negotiation failure */
3464		state->link = false;
3465	}
3466
3467	phylink_resolve_an_pause(state);
3468}
3469
3470static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3471				      uint16_t config_reg)
3472{
3473	if (!(config_reg & LPA_SGMII_LINK)) {
3474		state->link = false;
3475		return;
3476	}
3477
3478	switch (config_reg & LPA_SGMII_SPD_MASK) {
3479	case LPA_SGMII_10:
3480		state->speed = SPEED_10;
3481		break;
3482	case LPA_SGMII_100:
3483		state->speed = SPEED_100;
3484		break;
3485	case LPA_SGMII_1000:
3486		state->speed = SPEED_1000;
3487		break;
3488	default:
3489		state->link = false;
3490		return;
3491	}
3492	if (config_reg & LPA_SGMII_FULL_DUPLEX)
3493		state->duplex = DUPLEX_FULL;
3494	else
3495		state->duplex = DUPLEX_HALF;
3496}
3497
3498/**
3499 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3500 * @state: a pointer to a struct phylink_link_state.
3501 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3502 *
3503 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3504 * code word.  Decode the USXGMII code word and populate the corresponding fields
3505 * (speed, duplex) into the phylink_link_state structure.
3506 */
3507void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3508				 uint16_t lpa)
3509{
3510	switch (lpa & MDIO_USXGMII_SPD_MASK) {
3511	case MDIO_USXGMII_10:
3512		state->speed = SPEED_10;
3513		break;
3514	case MDIO_USXGMII_100:
3515		state->speed = SPEED_100;
3516		break;
3517	case MDIO_USXGMII_1000:
3518		state->speed = SPEED_1000;
3519		break;
3520	case MDIO_USXGMII_2500:
3521		state->speed = SPEED_2500;
3522		break;
3523	case MDIO_USXGMII_5000:
3524		state->speed = SPEED_5000;
3525		break;
3526	case MDIO_USXGMII_10G:
3527		state->speed = SPEED_10000;
3528		break;
3529	default:
3530		state->link = false;
3531		return;
3532	}
3533
3534	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3535		state->duplex = DUPLEX_FULL;
3536	else
3537		state->duplex = DUPLEX_HALF;
3538}
3539EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3540
3541/**
3542 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3543 * @state: a pointer to a struct phylink_link_state.
3544 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3545 *
3546 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3547 * code word.  Decode the USGMII code word and populate the corresponding fields
3548 * (speed, duplex) into the phylink_link_state structure. The structure for this
3549 * word is the same as the USXGMII word, except it only supports speeds up to
3550 * 1Gbps.
3551 */
3552static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3553				       uint16_t lpa)
3554{
3555	switch (lpa & MDIO_USXGMII_SPD_MASK) {
3556	case MDIO_USXGMII_10:
3557		state->speed = SPEED_10;
3558		break;
3559	case MDIO_USXGMII_100:
3560		state->speed = SPEED_100;
3561		break;
3562	case MDIO_USXGMII_1000:
3563		state->speed = SPEED_1000;
3564		break;
3565	default:
3566		state->link = false;
3567		return;
3568	}
3569
3570	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3571		state->duplex = DUPLEX_FULL;
3572	else
3573		state->duplex = DUPLEX_HALF;
3574}
3575
3576/**
3577 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3578 * @state: a pointer to a &struct phylink_link_state.
3579 * @bmsr: The value of the %MII_BMSR register
3580 * @lpa: The value of the %MII_LPA register
3581 *
3582 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3583 * clause 37 negotiation and/or SGMII control.
3584 *
3585 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3586 * the phylink @state structure. This is suitable to be used for implementing
3587 * the pcs_get_state() member of the struct phylink_pcs_ops structure if
3588 * accessing @bmsr and @lpa cannot be done with MDIO directly.
3589 */
3590void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3591				      u16 bmsr, u16 lpa)
3592{
3593	state->link = !!(bmsr & BMSR_LSTATUS);
3594	state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3595	/* If there is no link or autonegotiation is disabled, the LP advertisement
3596	 * data is not meaningful, so don't go any further.
3597	 */
3598	if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3599					       state->advertising))
3600		return;
3601
3602	switch (state->interface) {
3603	case PHY_INTERFACE_MODE_1000BASEX:
3604		phylink_decode_c37_word(state, lpa, SPEED_1000);
3605		break;
3606
3607	case PHY_INTERFACE_MODE_2500BASEX:
3608		phylink_decode_c37_word(state, lpa, SPEED_2500);
3609		break;
3610
3611	case PHY_INTERFACE_MODE_SGMII:
3612	case PHY_INTERFACE_MODE_QSGMII:
3613		phylink_decode_sgmii_word(state, lpa);
3614		break;
3615	case PHY_INTERFACE_MODE_QUSGMII:
3616		phylink_decode_usgmii_word(state, lpa);
3617		break;
3618
3619	default:
3620		state->link = false;
3621		break;
3622	}
3623}
3624EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3625
3626/**
3627 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3628 * @pcs: a pointer to a &struct mdio_device.
3629 * @state: a pointer to a &struct phylink_link_state.
3630 *
3631 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3632 * clause 37 negotiation and/or SGMII control.
3633 *
3634 * Read the MAC PCS state from the MII device configured in @config and
3635 * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3636 * the phylink @state structure. This is suitable to be directly plugged
3637 * into the pcs_get_state() member of the struct phylink_pcs_ops
3638 * structure.
3639 */
3640void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3641				   struct phylink_link_state *state)
3642{
3643	int bmsr, lpa;
3644
3645	bmsr = mdiodev_read(pcs, MII_BMSR);
3646	lpa = mdiodev_read(pcs, MII_LPA);
3647	if (bmsr < 0 || lpa < 0) {
3648		state->link = false;
3649		return;
3650	}
3651
3652	phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3653}
3654EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3655
3656/**
3657 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3658 *	advertisement
3659 * @interface: the PHY interface mode being configured
3660 * @advertising: the ethtool advertisement mask
3661 *
3662 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3663 * clause 37 negotiation and/or SGMII control.
3664 *
3665 * Encode the clause 37 PCS advertisement as specified by @interface and
3666 * @advertising.
3667 *
3668 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3669 */
3670int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3671					     const unsigned long *advertising)
3672{
3673	u16 adv;
3674
3675	switch (interface) {
3676	case PHY_INTERFACE_MODE_1000BASEX:
3677	case PHY_INTERFACE_MODE_2500BASEX:
3678		adv = ADVERTISE_1000XFULL;
3679		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3680				      advertising))
3681			adv |= ADVERTISE_1000XPAUSE;
3682		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3683				      advertising))
3684			adv |= ADVERTISE_1000XPSE_ASYM;
3685		return adv;
3686	case PHY_INTERFACE_MODE_SGMII:
3687	case PHY_INTERFACE_MODE_QSGMII:
3688		return 0x0001;
3689	default:
3690		/* Nothing to do for other modes */
3691		return -EINVAL;
3692	}
3693}
3694EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3695
3696/**
3697 * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3698 * @pcs: a pointer to a &struct mdio_device.
3699 * @interface: the PHY interface mode being configured
3700 * @advertising: the ethtool advertisement mask
3701 * @neg_mode: PCS negotiation mode
3702 *
3703 * Configure a Clause 22 PCS PHY with the appropriate negotiation
3704 * parameters for the @mode, @interface and @advertising parameters.
3705 * Returns negative error number on failure, zero if the advertisement
3706 * has not changed, or positive if there is a change.
3707 */
3708int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
3709			       phy_interface_t interface,
3710			       const unsigned long *advertising,
3711			       unsigned int neg_mode)
3712{
3713	bool changed = 0;
3714	u16 bmcr;
3715	int ret, adv;
3716
3717	adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3718	if (adv >= 0) {
3719		ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3720					     MII_ADVERTISE, 0xffff, adv);
3721		if (ret < 0)
3722			return ret;
3723		changed = ret;
3724	}
3725
3726	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
3727		bmcr = BMCR_ANENABLE;
3728	else
3729		bmcr = 0;
3730
3731	/* Configure the inband state. Ensure ISOLATE bit is disabled */
3732	ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3733	if (ret < 0)
3734		return ret;
3735
3736	return changed;
3737}
3738EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3739
3740/**
3741 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3742 * @pcs: a pointer to a &struct mdio_device.
3743 *
3744 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3745 * clause 37 negotiation.
3746 *
3747 * Restart the clause 37 negotiation with the link partner. This is
3748 * suitable to be directly plugged into the pcs_get_state() member
3749 * of the struct phylink_pcs_ops structure.
3750 */
3751void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3752{
3753	int val = mdiodev_read(pcs, MII_BMCR);
3754
3755	if (val >= 0) {
3756		val |= BMCR_ANRESTART;
3757
3758		mdiodev_write(pcs, MII_BMCR, val);
3759	}
3760}
3761EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3762
3763void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3764				   struct phylink_link_state *state)
3765{
3766	struct mii_bus *bus = pcs->bus;
3767	int addr = pcs->addr;
3768	int stat;
3769
3770	stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3771	if (stat < 0) {
3772		state->link = false;
3773		return;
3774	}
3775
3776	state->link = !!(stat & MDIO_STAT1_LSTATUS);
3777	if (!state->link)
3778		return;
3779
3780	switch (state->interface) {
3781	case PHY_INTERFACE_MODE_10GBASER:
3782		state->speed = SPEED_10000;
3783		state->duplex = DUPLEX_FULL;
3784		break;
3785
3786	default:
3787		break;
3788	}
3789}
3790EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3791
3792static int __init phylink_init(void)
3793{
3794	for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3795		__set_bit(phylink_sfp_interface_preference[i],
3796			  phylink_sfp_interfaces);
3797
3798	return 0;
3799}
3800
3801module_init(phylink_init);
3802
3803MODULE_LICENSE("GPL v2");
3804MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection");