1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * OMAP2/3 Power Management Routines
  4 *
  5 * Copyright (C) 2008 Nokia Corporation
  6 * Jouni Hogander
  7 */
  8#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
  9#define __ARCH_ARM_MACH_OMAP2_PM_H
 10
 11#include <linux/err.h>
 12
 13#include "powerdomain.h"
 14
 15#ifdef CONFIG_CPU_IDLE
 16extern int __init omap3_idle_init(void);
 17extern int __init omap4_idle_init(void);
 18#else
 19static inline int omap3_idle_init(void)
 20{
 21	return 0;
 22}
 23
 24static inline int omap4_idle_init(void)
 25{
 26	return 0;
 27}
 28#endif
 29
 30extern void *omap3_secure_ram_storage;
 31extern void omap3_pm_off_mode_enable(int);
 32extern void omap_sram_idle(bool rcuidle);
 33extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
 34
 35extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
 36extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
 37
 38extern u32 enable_off_mode;
 39
 40#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
 41extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
 42#else
 43#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
 44#endif /* CONFIG_PM_DEBUG */
 45
 46/* 24xx */
 47extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
 48					void __iomem *sdrc_power);
 49extern unsigned int omap24xx_cpu_suspend_sz;
 50
 51/* 3xxx */
 52extern void omap34xx_cpu_suspend(int save_state);
 53
 54/* omap3_do_wfi function pointer and size, for copy to SRAM */
 55extern void omap3_do_wfi(void);
 56extern unsigned int omap3_do_wfi_sz;
 57/* ... and its pointer from SRAM after copy */
 58extern void (*omap3_do_wfi_sram)(void);
 59
 60extern struct am33xx_pm_sram_addr am33xx_pm_sram;
 61extern struct am33xx_pm_sram_addr am43xx_pm_sram;
 62
 63extern void omap3_save_scratchpad_contents(void);
 64
 65#define PM_RTA_ERRATUM_i608		(1 << 0)
 66#define PM_SDRC_WAKEUP_ERRATUM_i583	(1 << 1)
 67#define PM_PER_MEMORIES_ERRATUM_i582	(1 << 2)
 68
 69#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
 70extern u16 pm34xx_errata;
 71#define IS_PM34XX_ERRATUM(id)		(pm34xx_errata & (id))
 72extern void enable_omap3630_toggle_l2_on_restore(void);
 73#else
 74#define IS_PM34XX_ERRATUM(id)		0
 75static inline void enable_omap3630_toggle_l2_on_restore(void) { }
 76#endif		/* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
 77
 78#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD	(1 << 0)
 79#define PM_OMAP4_CPU_OSWR_DISABLE		(1 << 1)
 80
 81#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
 82	   defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
 83extern u16 pm44xx_errata;
 84#define IS_PM44XX_ERRATUM(id)		(pm44xx_errata & (id))
 85#else
 86#define IS_PM44XX_ERRATUM(id)		0
 87#endif
 88
 89#define OMAP4_VP_CONFIG_ERROROFFSET	0x00
 90#define OMAP4_VP_VSTEPMIN_VSTEPMIN	0x01
 91#define OMAP4_VP_VSTEPMAX_VSTEPMAX	0x04
 92#define OMAP4_VP_VLIMITTO_TIMEOUT_US	200
 93
 94#ifdef CONFIG_POWER_AVS_OMAP
 95extern int omap_devinit_smartreflex(void);
 96#else
 97static inline int omap_devinit_smartreflex(void)
 98{
 99	return -EINVAL;
100}
101#endif
102
103#ifdef CONFIG_TWL4030_CORE
104extern int omap3_twl_init(void);
105extern int omap4_twl_init(void);
106#else
107static inline int omap3_twl_init(void)
108{
109	return -EINVAL;
110}
111static inline int omap4_twl_init(void)
112{
113	return -EINVAL;
114}
115#endif
116
117#if IS_ENABLED(CONFIG_MFD_CPCAP)
118extern int omap4_cpcap_init(void);
119#else
120static inline int omap4_cpcap_init(void)
121{
122	return -EINVAL;
123}
124#endif
125
126#ifdef CONFIG_PM
127extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
128#else
129static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
130#endif
131
132#ifdef CONFIG_SUSPEND
133void omap_common_suspend_init(void *pm_suspend);
134#else
135static inline void omap_common_suspend_init(void *pm_suspend)
136{
137}
138#endif /* CONFIG_SUSPEND */
139#endif

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * OMAP2/3 Power Management Routines
  4 *
  5 * Copyright (C) 2008 Nokia Corporation
  6 * Jouni Hogander
  7 */
  8#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
  9#define __ARCH_ARM_MACH_OMAP2_PM_H
 10
 11#include <linux/err.h>
 12
 13#include "powerdomain.h"
 14
 15#ifdef CONFIG_CPU_IDLE
 16extern int __init omap3_idle_init(void);
 17extern int __init omap4_idle_init(void);
 18#else
 19static inline int omap3_idle_init(void)
 20{
 21	return 0;
 22}
 23
 24static inline int omap4_idle_init(void)
 25{
 26	return 0;
 27}
 28#endif
 29
 30extern void *omap3_secure_ram_storage;
 31extern void omap3_pm_off_mode_enable(int);
 32extern void omap_sram_idle(bool rcuidle);
 33extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
 34
 35extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
 36extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
 37
 38extern u32 enable_off_mode;
 39
 40#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
 41extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
 42#else
 43#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
 44#endif /* CONFIG_PM_DEBUG */
 45
 46/* 24xx */
 47extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
 48					void __iomem *sdrc_power);
 49extern unsigned int omap24xx_cpu_suspend_sz;
 50
 51/* 3xxx */
 52extern void omap34xx_cpu_suspend(int save_state);
 53
 54/* omap3_do_wfi function pointer and size, for copy to SRAM */
 55extern void omap3_do_wfi(void);
 56extern unsigned int omap3_do_wfi_sz;
 57/* ... and its pointer from SRAM after copy */
 58extern void (*omap3_do_wfi_sram)(void);
 59
 60extern struct am33xx_pm_sram_addr am33xx_pm_sram;
 61extern struct am33xx_pm_sram_addr am43xx_pm_sram;
 62
 63extern void omap3_save_scratchpad_contents(void);
 64
 65#define PM_RTA_ERRATUM_i608		(1 << 0)
 66#define PM_SDRC_WAKEUP_ERRATUM_i583	(1 << 1)
 67#define PM_PER_MEMORIES_ERRATUM_i582	(1 << 2)
 68
 69#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
 70extern u16 pm34xx_errata;
 71#define IS_PM34XX_ERRATUM(id)		(pm34xx_errata & (id))
 72extern void enable_omap3630_toggle_l2_on_restore(void);
 73#else
 74#define IS_PM34XX_ERRATUM(id)		0
 75static inline void enable_omap3630_toggle_l2_on_restore(void) { }
 76#endif		/* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
 77
 78#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD	(1 << 0)
 79#define PM_OMAP4_CPU_OSWR_DISABLE		(1 << 1)
 80
 81#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
 82	   defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
 83extern u16 pm44xx_errata;
 84#define IS_PM44XX_ERRATUM(id)		(pm44xx_errata & (id))
 85#else
 86#define IS_PM44XX_ERRATUM(id)		0
 87#endif
 88
 89#define OMAP4_VP_CONFIG_ERROROFFSET	0x00
 90#define OMAP4_VP_VSTEPMIN_VSTEPMIN	0x01
 91#define OMAP4_VP_VSTEPMAX_VSTEPMAX	0x04
 92#define OMAP4_VP_VLIMITTO_TIMEOUT_US	200
 93
 94#ifdef CONFIG_POWER_AVS_OMAP
 95extern int omap_devinit_smartreflex(void);
 96#else
 97static inline int omap_devinit_smartreflex(void)
 98{
 99	return -EINVAL;
100}
101#endif
102
103#ifdef CONFIG_TWL4030_CORE
104extern int omap3_twl_init(void);
105extern int omap4_twl_init(void);
106#else
107static inline int omap3_twl_init(void)
108{
109	return -EINVAL;
110}
111static inline int omap4_twl_init(void)
112{
113	return -EINVAL;
114}
115#endif
116
117#if IS_ENABLED(CONFIG_MFD_CPCAP)
118extern int omap4_cpcap_init(void);
119#else
120static inline int omap4_cpcap_init(void)
121{
122	return -EINVAL;
123}
124#endif
125
126#ifdef CONFIG_PM
127extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
128#else
129static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
130#endif
131
132#ifdef CONFIG_SUSPEND
133void omap_common_suspend_init(void *pm_suspend);
134#else
135static inline void omap_common_suspend_init(void *pm_suspend)
136{
137}
138#endif /* CONFIG_SUSPEND */
139#endif