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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * drivers/char/watchdog/ixp4xx_wdt.c
4 *
5 * Watchdog driver for Intel IXP4xx network processors
6 *
7 * Author: Deepak Saxena <dsaxena@plexity.net>
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
10 * Copyright 2004 (c) MontaVista, Software, Inc.
11 * Based on sa1100 driver, Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
12 */
13
14#include <linux/module.h>
15#include <linux/types.h>
16#include <linux/kernel.h>
17#include <linux/watchdog.h>
18#include <linux/bits.h>
19#include <linux/platform_device.h>
20#include <linux/clk.h>
21#include <linux/soc/ixp4xx/cpu.h>
22
23struct ixp4xx_wdt {
24 struct watchdog_device wdd;
25 void __iomem *base;
26 unsigned long rate;
27};
28
29/* Fallback if we do not have a clock for this */
30#define IXP4XX_TIMER_FREQ 66666000
31
32/* Registers after the timer registers */
33#define IXP4XX_OSWT_OFFSET 0x14 /* Watchdog Timer */
34#define IXP4XX_OSWE_OFFSET 0x18 /* Watchdog Enable */
35#define IXP4XX_OSWK_OFFSET 0x1C /* Watchdog Key */
36#define IXP4XX_OSST_OFFSET 0x20 /* Timer Status */
37
38#define IXP4XX_OSST_TIMER_WDOG_PEND 0x00000008
39#define IXP4XX_OSST_TIMER_WARM_RESET 0x00000010
40#define IXP4XX_WDT_KEY 0x0000482E
41#define IXP4XX_WDT_RESET_ENABLE 0x00000001
42#define IXP4XX_WDT_IRQ_ENABLE 0x00000002
43#define IXP4XX_WDT_COUNT_ENABLE 0x00000004
44
45static inline
46struct ixp4xx_wdt *to_ixp4xx_wdt(struct watchdog_device *wdd)
47{
48 return container_of(wdd, struct ixp4xx_wdt, wdd);
49}
50
51static int ixp4xx_wdt_start(struct watchdog_device *wdd)
52{
53 struct ixp4xx_wdt *iwdt = to_ixp4xx_wdt(wdd);
54
55 __raw_writel(IXP4XX_WDT_KEY, iwdt->base + IXP4XX_OSWK_OFFSET);
56 __raw_writel(0, iwdt->base + IXP4XX_OSWE_OFFSET);
57 __raw_writel(wdd->timeout * iwdt->rate,
58 iwdt->base + IXP4XX_OSWT_OFFSET);
59 __raw_writel(IXP4XX_WDT_COUNT_ENABLE | IXP4XX_WDT_RESET_ENABLE,
60 iwdt->base + IXP4XX_OSWE_OFFSET);
61 __raw_writel(0, iwdt->base + IXP4XX_OSWK_OFFSET);
62
63 return 0;
64}
65
66static int ixp4xx_wdt_stop(struct watchdog_device *wdd)
67{
68 struct ixp4xx_wdt *iwdt = to_ixp4xx_wdt(wdd);
69
70 __raw_writel(IXP4XX_WDT_KEY, iwdt->base + IXP4XX_OSWK_OFFSET);
71 __raw_writel(0, iwdt->base + IXP4XX_OSWE_OFFSET);
72 __raw_writel(0, iwdt->base + IXP4XX_OSWK_OFFSET);
73
74 return 0;
75}
76
77static int ixp4xx_wdt_set_timeout(struct watchdog_device *wdd,
78 unsigned int timeout)
79{
80 wdd->timeout = timeout;
81 if (watchdog_active(wdd))
82 ixp4xx_wdt_start(wdd);
83
84 return 0;
85}
86
87static int ixp4xx_wdt_restart(struct watchdog_device *wdd,
88 unsigned long action, void *data)
89{
90 struct ixp4xx_wdt *iwdt = to_ixp4xx_wdt(wdd);
91
92 __raw_writel(IXP4XX_WDT_KEY, iwdt->base + IXP4XX_OSWK_OFFSET);
93 __raw_writel(0, iwdt->base + IXP4XX_OSWT_OFFSET);
94 __raw_writel(IXP4XX_WDT_COUNT_ENABLE | IXP4XX_WDT_RESET_ENABLE,
95 iwdt->base + IXP4XX_OSWE_OFFSET);
96
97 return 0;
98}
99
100static const struct watchdog_ops ixp4xx_wdt_ops = {
101 .start = ixp4xx_wdt_start,
102 .stop = ixp4xx_wdt_stop,
103 .set_timeout = ixp4xx_wdt_set_timeout,
104 .restart = ixp4xx_wdt_restart,
105 .owner = THIS_MODULE,
106};
107
108/*
109 * The A0 version of the IXP422 had a bug in the watchdog making
110 * is useless, but we still need to use it to restart the system
111 * as it is the only way, so in this special case we register a
112 * "dummy" watchdog that doesn't really work, but will support
113 * the restart operation.
114 */
115static int ixp4xx_wdt_dummy(struct watchdog_device *wdd)
116{
117 return 0;
118}
119
120static const struct watchdog_ops ixp4xx_wdt_restart_only_ops = {
121 .start = ixp4xx_wdt_dummy,
122 .stop = ixp4xx_wdt_dummy,
123 .restart = ixp4xx_wdt_restart,
124 .owner = THIS_MODULE,
125};
126
127static const struct watchdog_info ixp4xx_wdt_info = {
128 .options = WDIOF_KEEPALIVEPING
129 | WDIOF_MAGICCLOSE
130 | WDIOF_SETTIMEOUT,
131 .identity = KBUILD_MODNAME,
132};
133
134static int ixp4xx_wdt_probe(struct platform_device *pdev)
135{
136 static const struct watchdog_ops *iwdt_ops;
137 struct device *dev = &pdev->dev;
138 struct ixp4xx_wdt *iwdt;
139 struct clk *clk;
140 int ret;
141
142 if (!(read_cpuid_id() & 0xf) && !cpu_is_ixp46x()) {
143 dev_info(dev, "Rev. A0 IXP42x CPU detected - only restart supported\n");
144 iwdt_ops = &ixp4xx_wdt_restart_only_ops;
145 } else {
146 iwdt_ops = &ixp4xx_wdt_ops;
147 }
148
149 iwdt = devm_kzalloc(dev, sizeof(*iwdt), GFP_KERNEL);
150 if (!iwdt)
151 return -ENOMEM;
152 iwdt->base = (void __iomem *)dev->platform_data;
153
154 /*
155 * Retrieve rate from a fixed clock from the device tree if
156 * the parent has that, else use the default clock rate.
157 */
158 clk = devm_clk_get_enabled(dev->parent, NULL);
159 if (!IS_ERR(clk))
160 iwdt->rate = clk_get_rate(clk);
161
162 if (!iwdt->rate)
163 iwdt->rate = IXP4XX_TIMER_FREQ;
164
165 iwdt->wdd.info = &ixp4xx_wdt_info;
166 iwdt->wdd.ops = iwdt_ops;
167 iwdt->wdd.min_timeout = 1;
168 iwdt->wdd.max_timeout = U32_MAX / iwdt->rate;
169 iwdt->wdd.parent = dev;
170 /* Default to 60 seconds */
171 iwdt->wdd.timeout = 60U;
172 watchdog_init_timeout(&iwdt->wdd, 0, dev);
173
174 if (__raw_readl(iwdt->base + IXP4XX_OSST_OFFSET) &
175 IXP4XX_OSST_TIMER_WARM_RESET)
176 iwdt->wdd.bootstatus = WDIOF_CARDRESET;
177
178 ret = devm_watchdog_register_device(dev, &iwdt->wdd);
179 if (ret)
180 return ret;
181
182 dev_info(dev, "IXP4xx watchdog available\n");
183
184 return 0;
185}
186
187static struct platform_driver ixp4xx_wdt_driver = {
188 .probe = ixp4xx_wdt_probe,
189 .driver = {
190 .name = "ixp4xx-watchdog",
191 },
192};
193module_platform_driver(ixp4xx_wdt_driver);
194
195MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net>");
196MODULE_DESCRIPTION("IXP4xx Network Processor Watchdog");
197MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * drivers/char/watchdog/ixp4xx_wdt.c
4 *
5 * Watchdog driver for Intel IXP4xx network processors
6 *
7 * Author: Deepak Saxena <dsaxena@plexity.net>
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
10 * Copyright 2004 (c) MontaVista, Software, Inc.
11 * Based on sa1100 driver, Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
12 */
13
14#include <linux/module.h>
15#include <linux/types.h>
16#include <linux/kernel.h>
17#include <linux/watchdog.h>
18#include <linux/bits.h>
19#include <linux/platform_device.h>
20#include <linux/clk.h>
21#include <linux/soc/ixp4xx/cpu.h>
22
23struct ixp4xx_wdt {
24 struct watchdog_device wdd;
25 void __iomem *base;
26 unsigned long rate;
27};
28
29/* Fallback if we do not have a clock for this */
30#define IXP4XX_TIMER_FREQ 66666000
31
32/* Registers after the timer registers */
33#define IXP4XX_OSWT_OFFSET 0x14 /* Watchdog Timer */
34#define IXP4XX_OSWE_OFFSET 0x18 /* Watchdog Enable */
35#define IXP4XX_OSWK_OFFSET 0x1C /* Watchdog Key */
36#define IXP4XX_OSST_OFFSET 0x20 /* Timer Status */
37
38#define IXP4XX_OSST_TIMER_WDOG_PEND 0x00000008
39#define IXP4XX_OSST_TIMER_WARM_RESET 0x00000010
40#define IXP4XX_WDT_KEY 0x0000482E
41#define IXP4XX_WDT_RESET_ENABLE 0x00000001
42#define IXP4XX_WDT_IRQ_ENABLE 0x00000002
43#define IXP4XX_WDT_COUNT_ENABLE 0x00000004
44
45static inline
46struct ixp4xx_wdt *to_ixp4xx_wdt(struct watchdog_device *wdd)
47{
48 return container_of(wdd, struct ixp4xx_wdt, wdd);
49}
50
51static int ixp4xx_wdt_start(struct watchdog_device *wdd)
52{
53 struct ixp4xx_wdt *iwdt = to_ixp4xx_wdt(wdd);
54
55 __raw_writel(IXP4XX_WDT_KEY, iwdt->base + IXP4XX_OSWK_OFFSET);
56 __raw_writel(0, iwdt->base + IXP4XX_OSWE_OFFSET);
57 __raw_writel(wdd->timeout * iwdt->rate,
58 iwdt->base + IXP4XX_OSWT_OFFSET);
59 __raw_writel(IXP4XX_WDT_COUNT_ENABLE | IXP4XX_WDT_RESET_ENABLE,
60 iwdt->base + IXP4XX_OSWE_OFFSET);
61 __raw_writel(0, iwdt->base + IXP4XX_OSWK_OFFSET);
62
63 return 0;
64}
65
66static int ixp4xx_wdt_stop(struct watchdog_device *wdd)
67{
68 struct ixp4xx_wdt *iwdt = to_ixp4xx_wdt(wdd);
69
70 __raw_writel(IXP4XX_WDT_KEY, iwdt->base + IXP4XX_OSWK_OFFSET);
71 __raw_writel(0, iwdt->base + IXP4XX_OSWE_OFFSET);
72 __raw_writel(0, iwdt->base + IXP4XX_OSWK_OFFSET);
73
74 return 0;
75}
76
77static int ixp4xx_wdt_set_timeout(struct watchdog_device *wdd,
78 unsigned int timeout)
79{
80 wdd->timeout = timeout;
81 if (watchdog_active(wdd))
82 ixp4xx_wdt_start(wdd);
83
84 return 0;
85}
86
87static int ixp4xx_wdt_restart(struct watchdog_device *wdd,
88 unsigned long action, void *data)
89{
90 struct ixp4xx_wdt *iwdt = to_ixp4xx_wdt(wdd);
91
92 __raw_writel(IXP4XX_WDT_KEY, iwdt->base + IXP4XX_OSWK_OFFSET);
93 __raw_writel(0, iwdt->base + IXP4XX_OSWT_OFFSET);
94 __raw_writel(IXP4XX_WDT_COUNT_ENABLE | IXP4XX_WDT_RESET_ENABLE,
95 iwdt->base + IXP4XX_OSWE_OFFSET);
96
97 return 0;
98}
99
100static const struct watchdog_ops ixp4xx_wdt_ops = {
101 .start = ixp4xx_wdt_start,
102 .stop = ixp4xx_wdt_stop,
103 .set_timeout = ixp4xx_wdt_set_timeout,
104 .restart = ixp4xx_wdt_restart,
105 .owner = THIS_MODULE,
106};
107
108static const struct watchdog_info ixp4xx_wdt_info = {
109 .options = WDIOF_KEEPALIVEPING
110 | WDIOF_MAGICCLOSE
111 | WDIOF_SETTIMEOUT,
112 .identity = KBUILD_MODNAME,
113};
114
115/* Devres-handled clock disablement */
116static void ixp4xx_clock_action(void *d)
117{
118 clk_disable_unprepare(d);
119}
120
121static int ixp4xx_wdt_probe(struct platform_device *pdev)
122{
123 struct device *dev = &pdev->dev;
124 struct ixp4xx_wdt *iwdt;
125 struct clk *clk;
126 int ret;
127
128 if (!(read_cpuid_id() & 0xf) && !cpu_is_ixp46x()) {
129 dev_err(dev, "Rev. A0 IXP42x CPU detected - watchdog disabled\n");
130 return -ENODEV;
131 }
132
133 iwdt = devm_kzalloc(dev, sizeof(*iwdt), GFP_KERNEL);
134 if (!iwdt)
135 return -ENOMEM;
136 iwdt->base = (void __iomem *)dev->platform_data;
137
138 /*
139 * Retrieve rate from a fixed clock from the device tree if
140 * the parent has that, else use the default clock rate.
141 */
142 clk = devm_clk_get(dev->parent, NULL);
143 if (!IS_ERR(clk)) {
144 ret = clk_prepare_enable(clk);
145 if (ret)
146 return ret;
147 ret = devm_add_action_or_reset(dev, ixp4xx_clock_action, clk);
148 if (ret)
149 return ret;
150 iwdt->rate = clk_get_rate(clk);
151 }
152 if (!iwdt->rate)
153 iwdt->rate = IXP4XX_TIMER_FREQ;
154
155 iwdt->wdd.info = &ixp4xx_wdt_info;
156 iwdt->wdd.ops = &ixp4xx_wdt_ops;
157 iwdt->wdd.min_timeout = 1;
158 iwdt->wdd.max_timeout = U32_MAX / iwdt->rate;
159 iwdt->wdd.parent = dev;
160 /* Default to 60 seconds */
161 iwdt->wdd.timeout = 60U;
162 watchdog_init_timeout(&iwdt->wdd, 0, dev);
163
164 if (__raw_readl(iwdt->base + IXP4XX_OSST_OFFSET) &
165 IXP4XX_OSST_TIMER_WARM_RESET)
166 iwdt->wdd.bootstatus = WDIOF_CARDRESET;
167
168 ret = devm_watchdog_register_device(dev, &iwdt->wdd);
169 if (ret)
170 return ret;
171
172 dev_info(dev, "IXP4xx watchdog available\n");
173
174 return 0;
175}
176
177static struct platform_driver ixp4xx_wdt_driver = {
178 .probe = ixp4xx_wdt_probe,
179 .driver = {
180 .name = "ixp4xx-watchdog",
181 },
182};
183module_platform_driver(ixp4xx_wdt_driver);
184
185MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net>");
186MODULE_DESCRIPTION("IXP4xx Network Processor Watchdog");
187MODULE_LICENSE("GPL");