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v6.13.7
   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*******************************************************************************
   3
   4  Copyright(c) 2006 Tundra Semiconductor Corporation.
   5
   6
   7*******************************************************************************/
   8
   9/* This driver is based on the driver code originally developed
  10 * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
  11 * scott.wood@timesys.com  * Copyright (C) 2003 TimeSys Corporation
  12 *
  13 * Currently changes from original version are:
  14 * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
  15 * - modifications to handle two ports independently and support for
  16 *   additional PHY devices (alexandre.bounine@tundra.com)
  17 * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
  18 *
  19 */
  20
  21#include <linux/module.h>
  22#include <linux/types.h>
  23#include <linux/interrupt.h>
  24#include <linux/net.h>
  25#include <linux/netdevice.h>
  26#include <linux/etherdevice.h>
  27#include <linux/ethtool.h>
  28#include <linux/skbuff.h>
  29#include <linux/spinlock.h>
  30#include <linux/delay.h>
  31#include <linux/crc32.h>
  32#include <linux/mii.h>
  33#include <linux/device.h>
  34#include <linux/pci.h>
  35#include <linux/rtnetlink.h>
  36#include <linux/timer.h>
  37#include <linux/platform_device.h>
  38#include <linux/gfp.h>
  39
  40#include <asm/io.h>
  41#include <asm/tsi108.h>
  42
  43#include "tsi108_eth.h"
  44
  45#define MII_READ_DELAY 10000	/* max link wait time in msec */
  46
  47#define TSI108_RXRING_LEN     256
  48
  49/* NOTE: The driver currently does not support receiving packets
  50 * larger than the buffer size, so don't decrease this (unless you
  51 * want to add such support).
  52 */
  53#define TSI108_RXBUF_SIZE     1536
  54
  55#define TSI108_TXRING_LEN     256
  56
  57#define TSI108_TX_INT_FREQ    64
  58
  59/* Check the phy status every half a second. */
  60#define CHECK_PHY_INTERVAL (HZ/2)
  61
  62struct tsi108_prv_data {
  63	void  __iomem *regs;	/* Base of normal regs */
  64	void  __iomem *phyregs;	/* Base of register bank used for PHY access */
  65
  66	struct net_device *dev;
  67	struct napi_struct napi;
  68
  69	unsigned int phy;		/* Index of PHY for this interface */
  70	unsigned int irq_num;
  71	unsigned int id;
  72	unsigned int phy_type;
  73
  74	struct timer_list timer;/* Timer that triggers the check phy function */
  75	unsigned int rxtail;	/* Next entry in rxring to read */
  76	unsigned int rxhead;	/* Next entry in rxring to give a new buffer */
  77	unsigned int rxfree;	/* Number of free, allocated RX buffers */
  78
  79	unsigned int rxpending;	/* Non-zero if there are still descriptors
  80				 * to be processed from a previous descriptor
  81				 * interrupt condition that has been cleared */
  82
  83	unsigned int txtail;	/* Next TX descriptor to check status on */
  84	unsigned int txhead;	/* Next TX descriptor to use */
  85
  86	/* Number of free TX descriptors.  This could be calculated from
  87	 * rxhead and rxtail if one descriptor were left unused to disambiguate
  88	 * full and empty conditions, but it's simpler to just keep track
  89	 * explicitly. */
  90
  91	unsigned int txfree;
  92
  93	unsigned int phy_ok;		/* The PHY is currently powered on. */
  94
  95	/* PHY status (duplex is 1 for half, 2 for full,
  96	 * so that the default 0 indicates that neither has
  97	 * yet been configured). */
  98
  99	unsigned int link_up;
 100	unsigned int speed;
 101	unsigned int duplex;
 102
 103	tx_desc *txring;
 104	rx_desc *rxring;
 105	struct sk_buff *txskbs[TSI108_TXRING_LEN];
 106	struct sk_buff *rxskbs[TSI108_RXRING_LEN];
 107
 108	dma_addr_t txdma, rxdma;
 109
 110	/* txlock nests in misclock and phy_lock */
 111
 112	spinlock_t txlock, misclock;
 113
 114	/* stats is used to hold the upper bits of each hardware counter,
 115	 * and tmpstats is used to hold the full values for returning
 116	 * to the caller of get_stats().  They must be separate in case
 117	 * an overflow interrupt occurs before the stats are consumed.
 118	 */
 119
 120	struct net_device_stats stats;
 121	struct net_device_stats tmpstats;
 122
 123	/* These stats are kept separate in hardware, thus require individual
 124	 * fields for handling carry.  They are combined in get_stats.
 125	 */
 126
 127	unsigned long rx_fcs;	/* Add to rx_frame_errors */
 128	unsigned long rx_short_fcs;	/* Add to rx_frame_errors */
 129	unsigned long rx_long_fcs;	/* Add to rx_frame_errors */
 130	unsigned long rx_underruns;	/* Add to rx_length_errors */
 131	unsigned long rx_overruns;	/* Add to rx_length_errors */
 132
 133	unsigned long tx_coll_abort;	/* Add to tx_aborted_errors/collisions */
 134	unsigned long tx_pause_drop;	/* Add to tx_aborted_errors */
 135
 136	unsigned long mc_hash[16];
 137	u32 msg_enable;			/* debug message level */
 138	struct mii_if_info mii_if;
 139	unsigned int init_media;
 140
 141	struct platform_device *pdev;
 142};
 143
 144static void tsi108_timed_checker(struct timer_list *t);
 145
 146#ifdef DEBUG
 147static void dump_eth_one(struct net_device *dev)
 148{
 149	struct tsi108_prv_data *data = netdev_priv(dev);
 150
 151	printk("Dumping %s...\n", dev->name);
 152	printk("intstat %x intmask %x phy_ok %d"
 153	       " link %d speed %d duplex %d\n",
 154	       TSI_READ(TSI108_EC_INTSTAT),
 155	       TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
 156	       data->link_up, data->speed, data->duplex);
 157
 158	printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
 159	       data->txhead, data->txtail, data->txfree,
 160	       TSI_READ(TSI108_EC_TXSTAT),
 161	       TSI_READ(TSI108_EC_TXESTAT),
 162	       TSI_READ(TSI108_EC_TXERR));
 163
 164	printk("RX: head %d, tail %d, free %d, stat %x,"
 165	       " estat %x, err %x, pending %d\n\n",
 166	       data->rxhead, data->rxtail, data->rxfree,
 167	       TSI_READ(TSI108_EC_RXSTAT),
 168	       TSI_READ(TSI108_EC_RXESTAT),
 169	       TSI_READ(TSI108_EC_RXERR), data->rxpending);
 170}
 171#endif
 172
 173/* Synchronization is needed between the thread and up/down events.
 174 * Note that the PHY is accessed through the same registers for both
 175 * interfaces, so this can't be made interface-specific.
 176 */
 177
 178static DEFINE_SPINLOCK(phy_lock);
 179
 180static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
 181{
 182	unsigned i;
 183
 184	TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
 185				(data->phy << TSI108_MAC_MII_ADDR_PHY) |
 186				(reg << TSI108_MAC_MII_ADDR_REG));
 187	TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
 188	TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
 189	for (i = 0; i < 100; i++) {
 190		if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
 191		      (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
 192			break;
 193		udelay(10);
 194	}
 195
 196	if (i == 100)
 197		return 0xffff;
 198	else
 199		return TSI_READ_PHY(TSI108_MAC_MII_DATAIN);
 200}
 201
 202static void tsi108_write_mii(struct tsi108_prv_data *data,
 203				int reg, u16 val)
 204{
 205	unsigned i = 100;
 206	TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
 207				(data->phy << TSI108_MAC_MII_ADDR_PHY) |
 208				(reg << TSI108_MAC_MII_ADDR_REG));
 209	TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
 210	while (i--) {
 211		if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
 212			TSI108_MAC_MII_IND_BUSY))
 213			break;
 214		udelay(10);
 215	}
 216}
 217
 218static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
 219{
 220	struct tsi108_prv_data *data = netdev_priv(dev);
 221	return tsi108_read_mii(data, reg);
 222}
 223
 224static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
 225{
 226	struct tsi108_prv_data *data = netdev_priv(dev);
 227	tsi108_write_mii(data, reg, val);
 228}
 229
 230static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
 231					int reg, u16 val)
 232{
 233	unsigned i = 1000;
 234	TSI_WRITE(TSI108_MAC_MII_ADDR,
 235			     (0x1e << TSI108_MAC_MII_ADDR_PHY)
 236			     | (reg << TSI108_MAC_MII_ADDR_REG));
 237	TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
 238	while(i--) {
 239		if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
 240			return;
 241		udelay(10);
 242	}
 243	printk(KERN_ERR "%s function time out\n", __func__);
 244}
 245
 246static int mii_speed(struct mii_if_info *mii)
 247{
 248	int advert, lpa, val, media;
 249	int lpa2 = 0;
 250	int speed;
 251
 252	if (!mii_link_ok(mii))
 253		return 0;
 254
 255	val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
 256	if ((val & BMSR_ANEGCOMPLETE) == 0)
 257		return 0;
 258
 259	advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
 260	lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
 261	media = mii_nway_result(advert & lpa);
 262
 263	if (mii->supports_gmii)
 264		lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
 265
 266	speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
 267			(media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
 268	return speed;
 269}
 270
 271static void tsi108_check_phy(struct net_device *dev)
 272{
 273	struct tsi108_prv_data *data = netdev_priv(dev);
 274	u32 mac_cfg2_reg, portctrl_reg;
 275	u32 duplex;
 276	u32 speed;
 277	unsigned long flags;
 278
 279	spin_lock_irqsave(&phy_lock, flags);
 280
 281	if (!data->phy_ok)
 282		goto out;
 283
 284	duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
 285	data->init_media = 0;
 286
 287	if (netif_carrier_ok(dev)) {
 288
 289		speed = mii_speed(&data->mii_if);
 290
 291		if ((speed != data->speed) || duplex) {
 292
 293			mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
 294			portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
 295
 296			mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
 297
 298			if (speed == 1000) {
 299				mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
 300				portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
 301			} else {
 302				mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
 303				portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
 304			}
 305
 306			data->speed = speed;
 307
 308			if (data->mii_if.full_duplex) {
 309				mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
 310				portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
 311				data->duplex = 2;
 312			} else {
 313				mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
 314				portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
 315				data->duplex = 1;
 316			}
 317
 318			TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
 319			TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
 320		}
 321
 322		if (data->link_up == 0) {
 323			/* The manual says it can take 3-4 usecs for the speed change
 324			 * to take effect.
 325			 */
 326			udelay(5);
 327
 328			spin_lock(&data->txlock);
 329			if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
 330				netif_wake_queue(dev);
 331
 332			data->link_up = 1;
 333			spin_unlock(&data->txlock);
 334		}
 335	} else {
 336		if (data->link_up == 1) {
 337			netif_stop_queue(dev);
 338			data->link_up = 0;
 339			printk(KERN_NOTICE "%s : link is down\n", dev->name);
 340		}
 341
 342		goto out;
 343	}
 344
 345
 346out:
 347	spin_unlock_irqrestore(&phy_lock, flags);
 348}
 349
 350static inline void
 351tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
 352		      unsigned long *upper)
 353{
 354	if (carry & carry_bit)
 355		*upper += carry_shift;
 356}
 357
 358static void tsi108_stat_carry(struct net_device *dev)
 359{
 360	struct tsi108_prv_data *data = netdev_priv(dev);
 361	unsigned long flags;
 362	u32 carry1, carry2;
 363
 364	spin_lock_irqsave(&data->misclock, flags);
 365
 366	carry1 = TSI_READ(TSI108_STAT_CARRY1);
 367	carry2 = TSI_READ(TSI108_STAT_CARRY2);
 368
 369	TSI_WRITE(TSI108_STAT_CARRY1, carry1);
 370	TSI_WRITE(TSI108_STAT_CARRY2, carry2);
 371
 372	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
 373			      TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
 374
 375	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
 376			      TSI108_STAT_RXPKTS_CARRY,
 377			      &data->stats.rx_packets);
 378
 379	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
 380			      TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
 381
 382	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
 383			      TSI108_STAT_RXMCAST_CARRY,
 384			      &data->stats.multicast);
 385
 386	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
 387			      TSI108_STAT_RXALIGN_CARRY,
 388			      &data->stats.rx_frame_errors);
 389
 390	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
 391			      TSI108_STAT_RXLENGTH_CARRY,
 392			      &data->stats.rx_length_errors);
 393
 394	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
 395			      TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
 396
 397	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
 398			      TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
 399
 400	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
 401			      TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
 402
 403	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
 404			      TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
 405
 406	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
 407			      TSI108_STAT_RXDROP_CARRY,
 408			      &data->stats.rx_missed_errors);
 409
 410	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
 411			      TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
 412
 413	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
 414			      TSI108_STAT_TXPKTS_CARRY,
 415			      &data->stats.tx_packets);
 416
 417	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
 418			      TSI108_STAT_TXEXDEF_CARRY,
 419			      &data->stats.tx_aborted_errors);
 420
 421	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
 422			      TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
 423
 424	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
 425			      TSI108_STAT_TXTCOL_CARRY,
 426			      &data->stats.collisions);
 427
 428	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
 429			      TSI108_STAT_TXPAUSEDROP_CARRY,
 430			      &data->tx_pause_drop);
 431
 432	spin_unlock_irqrestore(&data->misclock, flags);
 433}
 434
 435/* Read a stat counter atomically with respect to carries.
 436 * data->misclock must be held.
 437 */
 438static inline unsigned long
 439tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
 440		 int carry_shift, unsigned long *upper)
 441{
 442	int carryreg;
 443	unsigned long val;
 444
 445	if (reg < 0xb0)
 446		carryreg = TSI108_STAT_CARRY1;
 447	else
 448		carryreg = TSI108_STAT_CARRY2;
 449
 450      again:
 451	val = TSI_READ(reg) | *upper;
 452
 453	/* Check to see if it overflowed, but the interrupt hasn't
 454	 * been serviced yet.  If so, handle the carry here, and
 455	 * try again.
 456	 */
 457
 458	if (unlikely(TSI_READ(carryreg) & carry_bit)) {
 459		*upper += carry_shift;
 460		TSI_WRITE(carryreg, carry_bit);
 461		goto again;
 462	}
 463
 464	return val;
 465}
 466
 467static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
 468{
 469	unsigned long excol;
 470
 471	struct tsi108_prv_data *data = netdev_priv(dev);
 472	spin_lock_irq(&data->misclock);
 473
 474	data->tmpstats.rx_packets =
 475	    tsi108_read_stat(data, TSI108_STAT_RXPKTS,
 476			     TSI108_STAT_CARRY1_RXPKTS,
 477			     TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
 478
 479	data->tmpstats.tx_packets =
 480	    tsi108_read_stat(data, TSI108_STAT_TXPKTS,
 481			     TSI108_STAT_CARRY2_TXPKTS,
 482			     TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
 483
 484	data->tmpstats.rx_bytes =
 485	    tsi108_read_stat(data, TSI108_STAT_RXBYTES,
 486			     TSI108_STAT_CARRY1_RXBYTES,
 487			     TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
 488
 489	data->tmpstats.tx_bytes =
 490	    tsi108_read_stat(data, TSI108_STAT_TXBYTES,
 491			     TSI108_STAT_CARRY2_TXBYTES,
 492			     TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
 493
 494	data->tmpstats.multicast =
 495	    tsi108_read_stat(data, TSI108_STAT_RXMCAST,
 496			     TSI108_STAT_CARRY1_RXMCAST,
 497			     TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
 498
 499	excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
 500				 TSI108_STAT_CARRY2_TXEXCOL,
 501				 TSI108_STAT_TXEXCOL_CARRY,
 502				 &data->tx_coll_abort);
 503
 504	data->tmpstats.collisions =
 505	    tsi108_read_stat(data, TSI108_STAT_TXTCOL,
 506			     TSI108_STAT_CARRY2_TXTCOL,
 507			     TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
 508
 509	data->tmpstats.collisions += excol;
 510
 511	data->tmpstats.rx_length_errors =
 512	    tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
 513			     TSI108_STAT_CARRY1_RXLENGTH,
 514			     TSI108_STAT_RXLENGTH_CARRY,
 515			     &data->stats.rx_length_errors);
 516
 517	data->tmpstats.rx_length_errors +=
 518	    tsi108_read_stat(data, TSI108_STAT_RXRUNT,
 519			     TSI108_STAT_CARRY1_RXRUNT,
 520			     TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
 521
 522	data->tmpstats.rx_length_errors +=
 523	    tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
 524			     TSI108_STAT_CARRY1_RXJUMBO,
 525			     TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
 526
 527	data->tmpstats.rx_frame_errors =
 528	    tsi108_read_stat(data, TSI108_STAT_RXALIGN,
 529			     TSI108_STAT_CARRY1_RXALIGN,
 530			     TSI108_STAT_RXALIGN_CARRY,
 531			     &data->stats.rx_frame_errors);
 532
 533	data->tmpstats.rx_frame_errors +=
 534	    tsi108_read_stat(data, TSI108_STAT_RXFCS,
 535			     TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
 536			     &data->rx_fcs);
 537
 538	data->tmpstats.rx_frame_errors +=
 539	    tsi108_read_stat(data, TSI108_STAT_RXFRAG,
 540			     TSI108_STAT_CARRY1_RXFRAG,
 541			     TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
 542
 543	data->tmpstats.rx_missed_errors =
 544	    tsi108_read_stat(data, TSI108_STAT_RXDROP,
 545			     TSI108_STAT_CARRY1_RXDROP,
 546			     TSI108_STAT_RXDROP_CARRY,
 547			     &data->stats.rx_missed_errors);
 548
 549	/* These three are maintained by software. */
 550	data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
 551	data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
 552
 553	data->tmpstats.tx_aborted_errors =
 554	    tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
 555			     TSI108_STAT_CARRY2_TXEXDEF,
 556			     TSI108_STAT_TXEXDEF_CARRY,
 557			     &data->stats.tx_aborted_errors);
 558
 559	data->tmpstats.tx_aborted_errors +=
 560	    tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
 561			     TSI108_STAT_CARRY2_TXPAUSE,
 562			     TSI108_STAT_TXPAUSEDROP_CARRY,
 563			     &data->tx_pause_drop);
 564
 565	data->tmpstats.tx_aborted_errors += excol;
 566
 567	data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
 568	data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
 569	    data->tmpstats.rx_crc_errors +
 570	    data->tmpstats.rx_frame_errors +
 571	    data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
 572
 573	spin_unlock_irq(&data->misclock);
 574	return &data->tmpstats;
 575}
 576
 577static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
 578{
 579	TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
 580			     TSI108_EC_RXQ_PTRHIGH_VALID);
 581
 582	TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
 583			     | TSI108_EC_RXCTRL_QUEUE0);
 584}
 585
 586static void tsi108_restart_tx(struct tsi108_prv_data * data)
 587{
 588	TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
 589			     TSI108_EC_TXQ_PTRHIGH_VALID);
 590
 591	TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
 592			     TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
 593}
 594
 595/* txlock must be held by caller, with IRQs disabled, and
 596 * with permission to re-enable them when the lock is dropped.
 597 */
 598static void tsi108_complete_tx(struct net_device *dev)
 599{
 600	struct tsi108_prv_data *data = netdev_priv(dev);
 601	int tx;
 602	struct sk_buff *skb;
 603	int release = 0;
 604
 605	while (!data->txfree || data->txhead != data->txtail) {
 606		tx = data->txtail;
 607
 608		if (data->txring[tx].misc & TSI108_TX_OWN)
 609			break;
 610
 611		skb = data->txskbs[tx];
 612
 613		if (!(data->txring[tx].misc & TSI108_TX_OK))
 614			printk("%s: bad tx packet, misc %x\n",
 615			       dev->name, data->txring[tx].misc);
 616
 617		data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
 618		data->txfree++;
 619
 620		if (data->txring[tx].misc & TSI108_TX_EOF) {
 621			dev_kfree_skb_any(skb);
 622			release++;
 623		}
 624	}
 625
 626	if (release) {
 627		if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
 628			netif_wake_queue(dev);
 629	}
 630}
 631
 632static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
 633{
 634	struct tsi108_prv_data *data = netdev_priv(dev);
 635	int frags = skb_shinfo(skb)->nr_frags + 1;
 636	int i;
 637
 638	if (!data->phy_ok && net_ratelimit())
 639		printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
 640
 641	if (!data->link_up) {
 642		printk(KERN_ERR "%s: Transmit while link is down!\n",
 643		       dev->name);
 644		netif_stop_queue(dev);
 645		return NETDEV_TX_BUSY;
 646	}
 647
 648	if (data->txfree < MAX_SKB_FRAGS + 1) {
 649		netif_stop_queue(dev);
 650
 651		if (net_ratelimit())
 652			printk(KERN_ERR "%s: Transmit with full tx ring!\n",
 653			       dev->name);
 654		return NETDEV_TX_BUSY;
 655	}
 656
 657	if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
 658		netif_stop_queue(dev);
 659	}
 660
 661	spin_lock_irq(&data->txlock);
 662
 663	for (i = 0; i < frags; i++) {
 664		int misc = 0;
 665		int tx = data->txhead;
 666
 667		/* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
 668		 * the interrupt bit.  TX descriptor-complete interrupts are
 669		 * enabled when the queue fills up, and masked when there is
 670		 * still free space.  This way, when saturating the outbound
 671		 * link, the tx interrupts are kept to a reasonable level.
 672		 * When the queue is not full, reclamation of skbs still occurs
 673		 * as new packets are transmitted, or on a queue-empty
 674		 * interrupt.
 675		 */
 676
 677		if ((tx % TSI108_TX_INT_FREQ == 0) &&
 678		    ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
 679			misc = TSI108_TX_INT;
 680
 681		data->txskbs[tx] = skb;
 682
 683		if (i == 0) {
 684			data->txring[tx].buf0 = dma_map_single(&data->pdev->dev,
 685					skb->data, skb_headlen(skb),
 686					DMA_TO_DEVICE);
 687			data->txring[tx].len = skb_headlen(skb);
 688			misc |= TSI108_TX_SOF;
 689		} else {
 690			const skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
 691
 692			data->txring[tx].buf0 =
 693				skb_frag_dma_map(&data->pdev->dev, frag,
 694						0, skb_frag_size(frag),
 695						DMA_TO_DEVICE);
 696			data->txring[tx].len = skb_frag_size(frag);
 697		}
 698
 699		if (i == frags - 1)
 700			misc |= TSI108_TX_EOF;
 701
 702		if (netif_msg_pktdata(data)) {
 703			int i;
 704			printk("%s: Tx Frame contents (%d)\n", dev->name,
 705			       skb->len);
 706			for (i = 0; i < skb->len; i++)
 707				printk(" %2.2x", skb->data[i]);
 708			printk(".\n");
 709		}
 710		data->txring[tx].misc = misc | TSI108_TX_OWN;
 711
 712		data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
 713		data->txfree--;
 714	}
 715
 716	tsi108_complete_tx(dev);
 717
 718	/* This must be done after the check for completed tx descriptors,
 719	 * so that the tail pointer is correct.
 720	 */
 721
 722	if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
 723		tsi108_restart_tx(data);
 724
 725	spin_unlock_irq(&data->txlock);
 726	return NETDEV_TX_OK;
 727}
 728
 729static int tsi108_complete_rx(struct net_device *dev, int budget)
 730{
 731	struct tsi108_prv_data *data = netdev_priv(dev);
 732	int done = 0;
 733
 734	while (data->rxfree && done != budget) {
 735		int rx = data->rxtail;
 736		struct sk_buff *skb;
 737
 738		if (data->rxring[rx].misc & TSI108_RX_OWN)
 739			break;
 740
 741		skb = data->rxskbs[rx];
 742		data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
 743		data->rxfree--;
 744		done++;
 745
 746		if (data->rxring[rx].misc & TSI108_RX_BAD) {
 747			spin_lock_irq(&data->misclock);
 748
 749			if (data->rxring[rx].misc & TSI108_RX_CRC)
 750				data->stats.rx_crc_errors++;
 751			if (data->rxring[rx].misc & TSI108_RX_OVER)
 752				data->stats.rx_fifo_errors++;
 753
 754			spin_unlock_irq(&data->misclock);
 755
 756			dev_kfree_skb_any(skb);
 757			continue;
 758		}
 759		if (netif_msg_pktdata(data)) {
 760			int i;
 761			printk("%s: Rx Frame contents (%d)\n",
 762			       dev->name, data->rxring[rx].len);
 763			for (i = 0; i < data->rxring[rx].len; i++)
 764				printk(" %2.2x", skb->data[i]);
 765			printk(".\n");
 766		}
 767
 768		skb_put(skb, data->rxring[rx].len);
 769		skb->protocol = eth_type_trans(skb, dev);
 770		netif_receive_skb(skb);
 771	}
 772
 773	return done;
 774}
 775
 776static int tsi108_refill_rx(struct net_device *dev, int budget)
 777{
 778	struct tsi108_prv_data *data = netdev_priv(dev);
 779	int done = 0;
 780
 781	while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
 782		int rx = data->rxhead;
 783		struct sk_buff *skb;
 784
 785		skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
 786		data->rxskbs[rx] = skb;
 787		if (!skb)
 788			break;
 789
 790		data->rxring[rx].buf0 = dma_map_single(&data->pdev->dev,
 791				skb->data, TSI108_RX_SKB_SIZE,
 792				DMA_FROM_DEVICE);
 793
 794		/* Sometimes the hardware sets blen to zero after packet
 795		 * reception, even though the manual says that it's only ever
 796		 * modified by the driver.
 797		 */
 798
 799		data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
 800		data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
 801
 802		data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
 803		data->rxfree++;
 804		done++;
 805	}
 806
 807	if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
 808			   TSI108_EC_RXSTAT_QUEUE0))
 809		tsi108_restart_rx(data, dev);
 810
 811	return done;
 812}
 813
 814static int tsi108_poll(struct napi_struct *napi, int budget)
 815{
 816	struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
 817	struct net_device *dev = data->dev;
 818	u32 estat = TSI_READ(TSI108_EC_RXESTAT);
 819	u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
 820	int num_received = 0, num_filled = 0;
 821
 822	intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
 823	    TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
 824
 825	TSI_WRITE(TSI108_EC_RXESTAT, estat);
 826	TSI_WRITE(TSI108_EC_INTSTAT, intstat);
 827
 828	if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
 829		num_received = tsi108_complete_rx(dev, budget);
 830
 831	/* This should normally fill no more slots than the number of
 832	 * packets received in tsi108_complete_rx().  The exception
 833	 * is when we previously ran out of memory for RX SKBs.  In that
 834	 * case, it's helpful to obey the budget, not only so that the
 835	 * CPU isn't hogged, but so that memory (which may still be low)
 836	 * is not hogged by one device.
 837	 *
 838	 * A work unit is considered to be two SKBs to allow us to catch
 839	 * up when the ring has shrunk due to out-of-memory but we're
 840	 * still removing the full budget's worth of packets each time.
 841	 */
 842
 843	if (data->rxfree < TSI108_RXRING_LEN)
 844		num_filled = tsi108_refill_rx(dev, budget * 2);
 845
 846	if (intstat & TSI108_INT_RXERROR) {
 847		u32 err = TSI_READ(TSI108_EC_RXERR);
 848		TSI_WRITE(TSI108_EC_RXERR, err);
 849
 850		if (err) {
 851			if (net_ratelimit())
 852				printk(KERN_DEBUG "%s: RX error %x\n",
 853				       dev->name, err);
 854
 855			if (!(TSI_READ(TSI108_EC_RXSTAT) &
 856			      TSI108_EC_RXSTAT_QUEUE0))
 857				tsi108_restart_rx(data, dev);
 858		}
 859	}
 860
 861	if (intstat & TSI108_INT_RXOVERRUN) {
 862		spin_lock_irq(&data->misclock);
 863		data->stats.rx_fifo_errors++;
 864		spin_unlock_irq(&data->misclock);
 865	}
 866
 867	if (num_received < budget) {
 868		data->rxpending = 0;
 869		napi_complete_done(napi, num_received);
 870
 871		TSI_WRITE(TSI108_EC_INTMASK,
 872				     TSI_READ(TSI108_EC_INTMASK)
 873				     & ~(TSI108_INT_RXQUEUE0
 874					 | TSI108_INT_RXTHRESH |
 875					 TSI108_INT_RXOVERRUN |
 876					 TSI108_INT_RXERROR |
 877					 TSI108_INT_RXWAIT));
 878	} else {
 879		data->rxpending = 1;
 880	}
 881
 882	return num_received;
 883}
 884
 885static void tsi108_rx_int(struct net_device *dev)
 886{
 887	struct tsi108_prv_data *data = netdev_priv(dev);
 888
 889	/* A race could cause dev to already be scheduled, so it's not an
 890	 * error if that happens (and interrupts shouldn't be re-masked,
 891	 * because that can cause harmful races, if poll has already
 892	 * unmasked them but not cleared LINK_STATE_SCHED).
 893	 *
 894	 * This can happen if this code races with tsi108_poll(), which masks
 895	 * the interrupts after tsi108_irq_one() read the mask, but before
 896	 * napi_schedule is called.  It could also happen due to calls
 897	 * from tsi108_check_rxring().
 898	 */
 899
 900	if (napi_schedule_prep(&data->napi)) {
 901		/* Mask, rather than ack, the receive interrupts.  The ack
 902		 * will happen in tsi108_poll().
 903		 */
 904
 905		TSI_WRITE(TSI108_EC_INTMASK,
 906				     TSI_READ(TSI108_EC_INTMASK) |
 907				     TSI108_INT_RXQUEUE0
 908				     | TSI108_INT_RXTHRESH |
 909				     TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
 910				     TSI108_INT_RXWAIT);
 911		__napi_schedule(&data->napi);
 912	} else {
 913		if (!netif_running(dev)) {
 914			/* This can happen if an interrupt occurs while the
 915			 * interface is being brought down, as the START
 916			 * bit is cleared before the stop function is called.
 917			 *
 918			 * In this case, the interrupts must be masked, or
 919			 * they will continue indefinitely.
 920			 *
 921			 * There's a race here if the interface is brought down
 922			 * and then up in rapid succession, as the device could
 923			 * be made running after the above check and before
 924			 * the masking below.  This will only happen if the IRQ
 925			 * thread has a lower priority than the task brining
 926			 * up the interface.  Fixing this race would likely
 927			 * require changes in generic code.
 928			 */
 929
 930			TSI_WRITE(TSI108_EC_INTMASK,
 931					     TSI_READ
 932					     (TSI108_EC_INTMASK) |
 933					     TSI108_INT_RXQUEUE0 |
 934					     TSI108_INT_RXTHRESH |
 935					     TSI108_INT_RXOVERRUN |
 936					     TSI108_INT_RXERROR |
 937					     TSI108_INT_RXWAIT);
 938		}
 939	}
 940}
 941
 942/* If the RX ring has run out of memory, try periodically
 943 * to allocate some more, as otherwise poll would never
 944 * get called (apart from the initial end-of-queue condition).
 945 *
 946 * This is called once per second (by default) from the thread.
 947 */
 948
 949static void tsi108_check_rxring(struct net_device *dev)
 950{
 951	struct tsi108_prv_data *data = netdev_priv(dev);
 952
 953	/* A poll is scheduled, as opposed to caling tsi108_refill_rx
 954	 * directly, so as to keep the receive path single-threaded
 955	 * (and thus not needing a lock).
 956	 */
 957
 958	if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
 959		tsi108_rx_int(dev);
 960}
 961
 962static void tsi108_tx_int(struct net_device *dev)
 963{
 964	struct tsi108_prv_data *data = netdev_priv(dev);
 965	u32 estat = TSI_READ(TSI108_EC_TXESTAT);
 966
 967	TSI_WRITE(TSI108_EC_TXESTAT, estat);
 968	TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
 969			     TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
 970	if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
 971		u32 err = TSI_READ(TSI108_EC_TXERR);
 972		TSI_WRITE(TSI108_EC_TXERR, err);
 973
 974		if (err && net_ratelimit())
 975			printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
 976	}
 977
 978	if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
 979		spin_lock(&data->txlock);
 980		tsi108_complete_tx(dev);
 981		spin_unlock(&data->txlock);
 982	}
 983}
 984
 985
 986static irqreturn_t tsi108_irq(int irq, void *dev_id)
 987{
 988	struct net_device *dev = dev_id;
 989	struct tsi108_prv_data *data = netdev_priv(dev);
 990	u32 stat = TSI_READ(TSI108_EC_INTSTAT);
 991
 992	if (!(stat & TSI108_INT_ANY))
 993		return IRQ_NONE;	/* Not our interrupt */
 994
 995	stat &= ~TSI_READ(TSI108_EC_INTMASK);
 996
 997	if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
 998		    TSI108_INT_TXERROR))
 999		tsi108_tx_int(dev);
1000	if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
1001		    TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
1002		    TSI108_INT_RXERROR))
1003		tsi108_rx_int(dev);
1004
1005	if (stat & TSI108_INT_SFN) {
1006		if (net_ratelimit())
1007			printk(KERN_DEBUG "%s: SFN error\n", dev->name);
1008		TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
1009	}
1010
1011	if (stat & TSI108_INT_STATCARRY) {
1012		tsi108_stat_carry(dev);
1013		TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
1014	}
1015
1016	return IRQ_HANDLED;
1017}
1018
1019static void tsi108_stop_ethernet(struct net_device *dev)
1020{
1021	struct tsi108_prv_data *data = netdev_priv(dev);
1022	int i = 1000;
1023	/* Disable all TX and RX queues ... */
1024	TSI_WRITE(TSI108_EC_TXCTRL, 0);
1025	TSI_WRITE(TSI108_EC_RXCTRL, 0);
1026
1027	/* ...and wait for them to become idle */
1028	while(i--) {
1029		if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
1030			break;
1031		udelay(10);
1032	}
1033	i = 1000;
1034	while(i--){
1035		if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
1036			return;
1037		udelay(10);
1038	}
1039	printk(KERN_ERR "%s function time out\n", __func__);
1040}
1041
1042static void tsi108_reset_ether(struct tsi108_prv_data * data)
1043{
1044	TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
1045	udelay(100);
1046	TSI_WRITE(TSI108_MAC_CFG1, 0);
1047
1048	TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
1049	udelay(100);
1050	TSI_WRITE(TSI108_EC_PORTCTRL,
1051			     TSI_READ(TSI108_EC_PORTCTRL) &
1052			     ~TSI108_EC_PORTCTRL_STATRST);
1053
1054	TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
1055	udelay(100);
1056	TSI_WRITE(TSI108_EC_TXCFG,
1057			     TSI_READ(TSI108_EC_TXCFG) &
1058			     ~TSI108_EC_TXCFG_RST);
1059
1060	TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
1061	udelay(100);
1062	TSI_WRITE(TSI108_EC_RXCFG,
1063			     TSI_READ(TSI108_EC_RXCFG) &
1064			     ~TSI108_EC_RXCFG_RST);
1065
1066	TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1067			     TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
1068			     TSI108_MAC_MII_MGMT_RST);
1069	udelay(100);
1070	TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1071			     (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
1072			     ~(TSI108_MAC_MII_MGMT_RST |
1073			       TSI108_MAC_MII_MGMT_CLK)) | 0x07);
1074}
1075
1076static int tsi108_get_mac(struct net_device *dev)
1077{
1078	struct tsi108_prv_data *data = netdev_priv(dev);
1079	u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
1080	u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
1081	u8 addr[ETH_ALEN];
1082
1083	/* Note that the octets are reversed from what the manual says,
1084	 * producing an even weirder ordering...
1085	 */
1086	if (word2 == 0 && word1 == 0) {
1087		addr[0] = 0x00;
1088		addr[1] = 0x06;
1089		addr[2] = 0xd2;
1090		addr[3] = 0x00;
1091		addr[4] = 0x00;
1092		if (0x8 == data->phy)
1093			addr[5] = 0x01;
1094		else
1095			addr[5] = 0x02;
1096		eth_hw_addr_set(dev, addr);
1097
1098		word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1099
1100		word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1101		    (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1102
1103		TSI_WRITE(TSI108_MAC_ADDR1, word1);
1104		TSI_WRITE(TSI108_MAC_ADDR2, word2);
1105	} else {
1106		addr[0] = (word2 >> 16) & 0xff;
1107		addr[1] = (word2 >> 24) & 0xff;
1108		addr[2] = (word1 >> 0) & 0xff;
1109		addr[3] = (word1 >> 8) & 0xff;
1110		addr[4] = (word1 >> 16) & 0xff;
1111		addr[5] = (word1 >> 24) & 0xff;
1112		eth_hw_addr_set(dev, addr);
1113	}
1114
1115	if (!is_valid_ether_addr(dev->dev_addr)) {
1116		printk(KERN_ERR
1117		       "%s: Invalid MAC address. word1: %08x, word2: %08x\n",
1118		       dev->name, word1, word2);
1119		return -EINVAL;
1120	}
1121
1122	return 0;
1123}
1124
1125static int tsi108_set_mac(struct net_device *dev, void *addr)
1126{
1127	struct tsi108_prv_data *data = netdev_priv(dev);
1128	u32 word1, word2;
1129
1130	if (!is_valid_ether_addr(addr))
1131		return -EADDRNOTAVAIL;
1132
1133	/* +2 is for the offset of the HW addr type */
1134	eth_hw_addr_set(dev, ((unsigned char *)addr) + 2);
1135
1136	word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1137
1138	word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1139	    (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1140
1141	spin_lock_irq(&data->misclock);
1142	TSI_WRITE(TSI108_MAC_ADDR1, word1);
1143	TSI_WRITE(TSI108_MAC_ADDR2, word2);
1144	spin_lock(&data->txlock);
1145
1146	if (data->txfree && data->link_up)
1147		netif_wake_queue(dev);
1148
1149	spin_unlock(&data->txlock);
1150	spin_unlock_irq(&data->misclock);
1151	return 0;
1152}
1153
1154/* Protected by dev->xmit_lock. */
1155static void tsi108_set_rx_mode(struct net_device *dev)
1156{
1157	struct tsi108_prv_data *data = netdev_priv(dev);
1158	u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
1159
1160	if (dev->flags & IFF_PROMISC) {
1161		rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
1162		rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
1163		goto out;
1164	}
1165
1166	rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
1167
1168	if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
1169		int i;
1170		struct netdev_hw_addr *ha;
1171		rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
1172
1173		memset(data->mc_hash, 0, sizeof(data->mc_hash));
1174
1175		netdev_for_each_mc_addr(ha, dev) {
1176			u32 hash, crc;
1177
1178			crc = ether_crc(6, ha->addr);
1179			hash = crc >> 23;
1180			__set_bit(hash, &data->mc_hash[0]);
1181		}
1182
1183		TSI_WRITE(TSI108_EC_HASHADDR,
1184				     TSI108_EC_HASHADDR_AUTOINC |
1185				     TSI108_EC_HASHADDR_MCAST);
1186
1187		for (i = 0; i < 16; i++) {
1188			/* The manual says that the hardware may drop
1189			 * back-to-back writes to the data register.
1190			 */
1191			udelay(1);
1192			TSI_WRITE(TSI108_EC_HASHDATA,
1193					     data->mc_hash[i]);
1194		}
1195	}
1196
1197      out:
1198	TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
1199}
1200
1201static void tsi108_init_phy(struct net_device *dev)
1202{
1203	struct tsi108_prv_data *data = netdev_priv(dev);
1204	u32 i = 0;
1205	u16 phyval = 0;
1206	unsigned long flags;
1207
1208	spin_lock_irqsave(&phy_lock, flags);
1209
1210	tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
1211	while (--i) {
1212		if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
1213			break;
1214		udelay(10);
1215	}
1216	if (i == 0)
1217		printk(KERN_ERR "%s function time out\n", __func__);
1218
1219	if (data->phy_type == TSI108_PHY_BCM54XX) {
1220		tsi108_write_mii(data, 0x09, 0x0300);
1221		tsi108_write_mii(data, 0x10, 0x1020);
1222		tsi108_write_mii(data, 0x1c, 0x8c00);
1223	}
1224
1225	tsi108_write_mii(data,
1226			 MII_BMCR,
1227			 BMCR_ANENABLE | BMCR_ANRESTART);
1228	while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
1229		cpu_relax();
1230
1231	/* Set G/MII mode and receive clock select in TBI control #2.  The
1232	 * second port won't work if this isn't done, even though we don't
1233	 * use TBI mode.
1234	 */
1235
1236	tsi108_write_tbi(data, 0x11, 0x30);
1237
1238	/* FIXME: It seems to take more than 2 back-to-back reads to the
1239	 * PHY_STAT register before the link up status bit is set.
1240	 */
1241
1242	data->link_up = 0;
1243
1244	while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
1245		 BMSR_LSTATUS)) {
1246		if (i++ > (MII_READ_DELAY / 10)) {
1247			break;
1248		}
1249		spin_unlock_irqrestore(&phy_lock, flags);
1250		msleep(10);
1251		spin_lock_irqsave(&phy_lock, flags);
1252	}
1253
1254	data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
1255	printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
1256	data->phy_ok = 1;
1257	data->init_media = 1;
1258	spin_unlock_irqrestore(&phy_lock, flags);
1259}
1260
1261static void tsi108_kill_phy(struct net_device *dev)
1262{
1263	struct tsi108_prv_data *data = netdev_priv(dev);
1264	unsigned long flags;
1265
1266	spin_lock_irqsave(&phy_lock, flags);
1267	tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
1268	data->phy_ok = 0;
1269	spin_unlock_irqrestore(&phy_lock, flags);
1270}
1271
1272static int tsi108_open(struct net_device *dev)
1273{
1274	int i;
1275	struct tsi108_prv_data *data = netdev_priv(dev);
1276	unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
1277	unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
1278
1279	i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
1280	if (i != 0) {
1281		printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
1282		       data->id, data->irq_num);
1283		return i;
1284	} else {
1285		dev->irq = data->irq_num;
1286		printk(KERN_NOTICE
1287		       "tsi108_open : Port %d Assigned IRQ %d to %s\n",
1288		       data->id, dev->irq, dev->name);
1289	}
1290
1291	data->rxring = dma_alloc_coherent(&data->pdev->dev, rxring_size,
1292					  &data->rxdma, GFP_KERNEL);
1293	if (!data->rxring) {
1294		free_irq(data->irq_num, dev);
1295		return -ENOMEM;
1296	}
1297
1298	data->txring = dma_alloc_coherent(&data->pdev->dev, txring_size,
1299					  &data->txdma, GFP_KERNEL);
1300	if (!data->txring) {
1301		free_irq(data->irq_num, dev);
1302		dma_free_coherent(&data->pdev->dev, rxring_size, data->rxring,
1303				    data->rxdma);
1304		return -ENOMEM;
1305	}
1306
1307	for (i = 0; i < TSI108_RXRING_LEN; i++) {
1308		data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
1309		data->rxring[i].blen = TSI108_RXBUF_SIZE;
1310		data->rxring[i].vlan = 0;
1311	}
1312
1313	data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
1314
1315	data->rxtail = 0;
1316	data->rxhead = 0;
1317
1318	for (i = 0; i < TSI108_RXRING_LEN; i++) {
1319		struct sk_buff *skb;
1320
1321		skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
1322		if (!skb) {
1323			/* Bah.  No memory for now, but maybe we'll get
1324			 * some more later.
1325			 * For now, we'll live with the smaller ring.
1326			 */
1327			printk(KERN_WARNING
1328			       "%s: Could only allocate %d receive skb(s).\n",
1329			       dev->name, i);
1330			data->rxhead = i;
1331			break;
1332		}
1333
1334		data->rxskbs[i] = skb;
1335		data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
1336		data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
1337	}
1338
1339	data->rxfree = i;
1340	TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
1341
1342	for (i = 0; i < TSI108_TXRING_LEN; i++) {
1343		data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
1344		data->txring[i].misc = 0;
1345	}
1346
1347	data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
1348	data->txtail = 0;
1349	data->txhead = 0;
1350	data->txfree = TSI108_TXRING_LEN;
1351	TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
1352	tsi108_init_phy(dev);
1353
1354	napi_enable(&data->napi);
1355
1356	timer_setup(&data->timer, tsi108_timed_checker, 0);
1357	mod_timer(&data->timer, jiffies + 1);
1358
1359	tsi108_restart_rx(data, dev);
1360
1361	TSI_WRITE(TSI108_EC_INTSTAT, ~0);
1362
1363	TSI_WRITE(TSI108_EC_INTMASK,
1364			     ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
1365			       TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
1366			       TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
1367			       TSI108_INT_SFN | TSI108_INT_STATCARRY));
1368
1369	TSI_WRITE(TSI108_MAC_CFG1,
1370			     TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
1371	netif_start_queue(dev);
1372	return 0;
1373}
1374
1375static int tsi108_close(struct net_device *dev)
1376{
1377	struct tsi108_prv_data *data = netdev_priv(dev);
1378
1379	netif_stop_queue(dev);
1380	napi_disable(&data->napi);
1381
1382	del_timer_sync(&data->timer);
1383
1384	tsi108_stop_ethernet(dev);
1385	tsi108_kill_phy(dev);
1386	TSI_WRITE(TSI108_EC_INTMASK, ~0);
1387	TSI_WRITE(TSI108_MAC_CFG1, 0);
1388
1389	/* Check for any pending TX packets, and drop them. */
1390
1391	while (!data->txfree || data->txhead != data->txtail) {
1392		int tx = data->txtail;
1393		struct sk_buff *skb;
1394		skb = data->txskbs[tx];
1395		data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
1396		data->txfree++;
1397		dev_kfree_skb(skb);
1398	}
1399
1400	free_irq(data->irq_num, dev);
1401
1402	/* Discard the RX ring. */
1403
1404	while (data->rxfree) {
1405		int rx = data->rxtail;
1406		struct sk_buff *skb;
1407
1408		skb = data->rxskbs[rx];
1409		data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
1410		data->rxfree--;
1411		dev_kfree_skb(skb);
1412	}
1413
1414	dma_free_coherent(&data->pdev->dev,
1415			    TSI108_RXRING_LEN * sizeof(rx_desc),
1416			    data->rxring, data->rxdma);
1417	dma_free_coherent(&data->pdev->dev,
1418			    TSI108_TXRING_LEN * sizeof(tx_desc),
1419			    data->txring, data->txdma);
1420
1421	return 0;
1422}
1423
1424static void tsi108_init_mac(struct net_device *dev)
1425{
1426	struct tsi108_prv_data *data = netdev_priv(dev);
1427
1428	TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
1429			     TSI108_MAC_CFG2_PADCRC);
1430
1431	TSI_WRITE(TSI108_EC_TXTHRESH,
1432			     (192 << TSI108_EC_TXTHRESH_STARTFILL) |
1433			     (192 << TSI108_EC_TXTHRESH_STOPFILL));
1434
1435	TSI_WRITE(TSI108_STAT_CARRYMASK1,
1436			     ~(TSI108_STAT_CARRY1_RXBYTES |
1437			       TSI108_STAT_CARRY1_RXPKTS |
1438			       TSI108_STAT_CARRY1_RXFCS |
1439			       TSI108_STAT_CARRY1_RXMCAST |
1440			       TSI108_STAT_CARRY1_RXALIGN |
1441			       TSI108_STAT_CARRY1_RXLENGTH |
1442			       TSI108_STAT_CARRY1_RXRUNT |
1443			       TSI108_STAT_CARRY1_RXJUMBO |
1444			       TSI108_STAT_CARRY1_RXFRAG |
1445			       TSI108_STAT_CARRY1_RXJABBER |
1446			       TSI108_STAT_CARRY1_RXDROP));
1447
1448	TSI_WRITE(TSI108_STAT_CARRYMASK2,
1449			     ~(TSI108_STAT_CARRY2_TXBYTES |
1450			       TSI108_STAT_CARRY2_TXPKTS |
1451			       TSI108_STAT_CARRY2_TXEXDEF |
1452			       TSI108_STAT_CARRY2_TXEXCOL |
1453			       TSI108_STAT_CARRY2_TXTCOL |
1454			       TSI108_STAT_CARRY2_TXPAUSE));
1455
1456	TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
1457	TSI_WRITE(TSI108_MAC_CFG1, 0);
1458
1459	TSI_WRITE(TSI108_EC_RXCFG,
1460			     TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
1461
1462	TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
1463			     TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
1464			     TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1465						TSI108_EC_TXQ_CFG_SFNPORT));
1466
1467	TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
1468			     TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
1469			     TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1470						TSI108_EC_RXQ_CFG_SFNPORT));
1471
1472	TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
1473			     TSI108_EC_TXQ_BUFCFG_BURST256 |
1474			     TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1475						TSI108_EC_TXQ_BUFCFG_SFNPORT));
1476
1477	TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
1478			     TSI108_EC_RXQ_BUFCFG_BURST256 |
1479			     TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1480						TSI108_EC_RXQ_BUFCFG_SFNPORT));
1481
1482	TSI_WRITE(TSI108_EC_INTMASK, ~0);
1483}
1484
1485static int tsi108_get_link_ksettings(struct net_device *dev,
1486				     struct ethtool_link_ksettings *cmd)
1487{
1488	struct tsi108_prv_data *data = netdev_priv(dev);
1489	unsigned long flags;
1490
1491	spin_lock_irqsave(&data->txlock, flags);
1492	mii_ethtool_get_link_ksettings(&data->mii_if, cmd);
1493	spin_unlock_irqrestore(&data->txlock, flags);
1494
1495	return 0;
1496}
1497
1498static int tsi108_set_link_ksettings(struct net_device *dev,
1499				     const struct ethtool_link_ksettings *cmd)
1500{
1501	struct tsi108_prv_data *data = netdev_priv(dev);
1502	unsigned long flags;
1503	int rc;
1504
1505	spin_lock_irqsave(&data->txlock, flags);
1506	rc = mii_ethtool_set_link_ksettings(&data->mii_if, cmd);
1507	spin_unlock_irqrestore(&data->txlock, flags);
1508
1509	return rc;
1510}
1511
1512static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1513{
1514	struct tsi108_prv_data *data = netdev_priv(dev);
1515	if (!netif_running(dev))
1516		return -EINVAL;
1517	return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
1518}
1519
1520static const struct ethtool_ops tsi108_ethtool_ops = {
1521	.get_link 	= ethtool_op_get_link,
1522	.get_link_ksettings	= tsi108_get_link_ksettings,
1523	.set_link_ksettings	= tsi108_set_link_ksettings,
1524};
1525
1526static const struct net_device_ops tsi108_netdev_ops = {
1527	.ndo_open		= tsi108_open,
1528	.ndo_stop		= tsi108_close,
1529	.ndo_start_xmit		= tsi108_send_packet,
1530	.ndo_set_rx_mode	= tsi108_set_rx_mode,
1531	.ndo_get_stats		= tsi108_get_stats,
1532	.ndo_eth_ioctl		= tsi108_do_ioctl,
1533	.ndo_set_mac_address	= tsi108_set_mac,
1534	.ndo_validate_addr	= eth_validate_addr,
1535};
1536
1537static int
1538tsi108_init_one(struct platform_device *pdev)
1539{
1540	struct net_device *dev = NULL;
1541	struct tsi108_prv_data *data = NULL;
1542	hw_info *einfo;
1543	int err = 0;
1544
1545	einfo = dev_get_platdata(&pdev->dev);
1546
1547	if (NULL == einfo) {
1548		printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
1549		       pdev->id);
1550		return -ENODEV;
1551	}
1552
1553	/* Create an ethernet device instance */
1554
1555	dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
1556	if (!dev)
1557		return -ENOMEM;
1558
1559	printk("tsi108_eth%d: probe...\n", pdev->id);
1560	data = netdev_priv(dev);
1561	data->dev = dev;
1562	data->pdev = pdev;
1563
1564	pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
1565			pdev->id, einfo->regs, einfo->phyregs,
1566			einfo->phy, einfo->irq_num);
1567
1568	data->regs = ioremap(einfo->regs, 0x400);
1569	if (NULL == data->regs) {
1570		err = -ENOMEM;
1571		goto regs_fail;
1572	}
1573
1574	data->phyregs = ioremap(einfo->phyregs, 0x400);
1575	if (NULL == data->phyregs) {
1576		err = -ENOMEM;
1577		goto phyregs_fail;
1578	}
1579/* MII setup */
1580	data->mii_if.dev = dev;
1581	data->mii_if.mdio_read = tsi108_mdio_read;
1582	data->mii_if.mdio_write = tsi108_mdio_write;
1583	data->mii_if.phy_id = einfo->phy;
1584	data->mii_if.phy_id_mask = 0x1f;
1585	data->mii_if.reg_num_mask = 0x1f;
1586
1587	data->phy = einfo->phy;
1588	data->phy_type = einfo->phy_type;
1589	data->irq_num = einfo->irq_num;
1590	data->id = pdev->id;
1591	netif_napi_add(dev, &data->napi, tsi108_poll);
1592	dev->netdev_ops = &tsi108_netdev_ops;
1593	dev->ethtool_ops = &tsi108_ethtool_ops;
1594
1595	/* Apparently, the Linux networking code won't use scatter-gather
1596	 * if the hardware doesn't do checksums.  However, it's faster
1597	 * to checksum in place and use SG, as (among other reasons)
1598	 * the cache won't be dirtied (which then has to be flushed
1599	 * before DMA).  The checksumming is done by the driver (via
1600	 * a new function skb_csum_dev() in net/core/skbuff.c).
1601	 */
1602
1603	dev->features = NETIF_F_HIGHDMA;
1604
1605	spin_lock_init(&data->txlock);
1606	spin_lock_init(&data->misclock);
1607
1608	tsi108_reset_ether(data);
1609	tsi108_kill_phy(dev);
1610
1611	if ((err = tsi108_get_mac(dev)) != 0) {
1612		printk(KERN_ERR "%s: Invalid MAC address.  Please correct.\n",
1613		       dev->name);
1614		goto register_fail;
1615	}
1616
1617	tsi108_init_mac(dev);
1618	err = register_netdev(dev);
1619	if (err) {
1620		printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
1621				dev->name);
1622		goto register_fail;
1623	}
1624
1625	platform_set_drvdata(pdev, dev);
1626	printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n",
1627	       dev->name, dev->dev_addr);
1628#ifdef DEBUG
1629	data->msg_enable = DEBUG;
1630	dump_eth_one(dev);
1631#endif
1632
1633	return 0;
1634
1635register_fail:
1636	iounmap(data->phyregs);
1637
1638phyregs_fail:
1639	iounmap(data->regs);
1640
1641regs_fail:
1642	free_netdev(dev);
1643	return err;
1644}
1645
1646/* There's no way to either get interrupts from the PHY when
1647 * something changes, or to have the Tsi108 automatically communicate
1648 * with the PHY to reconfigure itself.
1649 *
1650 * Thus, we have to do it using a timer.
1651 */
1652
1653static void tsi108_timed_checker(struct timer_list *t)
1654{
1655	struct tsi108_prv_data *data = from_timer(data, t, timer);
1656	struct net_device *dev = data->dev;
1657
1658	tsi108_check_phy(dev);
1659	tsi108_check_rxring(dev);
1660	mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
1661}
1662
1663static void tsi108_ether_remove(struct platform_device *pdev)
1664{
1665	struct net_device *dev = platform_get_drvdata(pdev);
1666	struct tsi108_prv_data *priv = netdev_priv(dev);
1667
1668	unregister_netdev(dev);
1669	tsi108_stop_ethernet(dev);
1670	iounmap(priv->regs);
1671	iounmap(priv->phyregs);
1672	free_netdev(dev);
 
 
1673}
1674
1675/* Structure for a device driver */
1676
1677static struct platform_driver tsi_eth_driver = {
1678	.probe = tsi108_init_one,
1679	.remove = tsi108_ether_remove,
1680	.driver	= {
1681		.name = "tsi-ethernet",
1682	},
1683};
1684module_platform_driver(tsi_eth_driver);
1685
1686MODULE_AUTHOR("Tundra Semiconductor Corporation");
1687MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
1688MODULE_LICENSE("GPL");
1689MODULE_ALIAS("platform:tsi-ethernet");
v6.2
   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*******************************************************************************
   3
   4  Copyright(c) 2006 Tundra Semiconductor Corporation.
   5
   6
   7*******************************************************************************/
   8
   9/* This driver is based on the driver code originally developed
  10 * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
  11 * scott.wood@timesys.com  * Copyright (C) 2003 TimeSys Corporation
  12 *
  13 * Currently changes from original version are:
  14 * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
  15 * - modifications to handle two ports independently and support for
  16 *   additional PHY devices (alexandre.bounine@tundra.com)
  17 * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
  18 *
  19 */
  20
  21#include <linux/module.h>
  22#include <linux/types.h>
  23#include <linux/interrupt.h>
  24#include <linux/net.h>
  25#include <linux/netdevice.h>
  26#include <linux/etherdevice.h>
  27#include <linux/ethtool.h>
  28#include <linux/skbuff.h>
  29#include <linux/spinlock.h>
  30#include <linux/delay.h>
  31#include <linux/crc32.h>
  32#include <linux/mii.h>
  33#include <linux/device.h>
  34#include <linux/pci.h>
  35#include <linux/rtnetlink.h>
  36#include <linux/timer.h>
  37#include <linux/platform_device.h>
  38#include <linux/gfp.h>
  39
  40#include <asm/io.h>
  41#include <asm/tsi108.h>
  42
  43#include "tsi108_eth.h"
  44
  45#define MII_READ_DELAY 10000	/* max link wait time in msec */
  46
  47#define TSI108_RXRING_LEN     256
  48
  49/* NOTE: The driver currently does not support receiving packets
  50 * larger than the buffer size, so don't decrease this (unless you
  51 * want to add such support).
  52 */
  53#define TSI108_RXBUF_SIZE     1536
  54
  55#define TSI108_TXRING_LEN     256
  56
  57#define TSI108_TX_INT_FREQ    64
  58
  59/* Check the phy status every half a second. */
  60#define CHECK_PHY_INTERVAL (HZ/2)
  61
  62struct tsi108_prv_data {
  63	void  __iomem *regs;	/* Base of normal regs */
  64	void  __iomem *phyregs;	/* Base of register bank used for PHY access */
  65
  66	struct net_device *dev;
  67	struct napi_struct napi;
  68
  69	unsigned int phy;		/* Index of PHY for this interface */
  70	unsigned int irq_num;
  71	unsigned int id;
  72	unsigned int phy_type;
  73
  74	struct timer_list timer;/* Timer that triggers the check phy function */
  75	unsigned int rxtail;	/* Next entry in rxring to read */
  76	unsigned int rxhead;	/* Next entry in rxring to give a new buffer */
  77	unsigned int rxfree;	/* Number of free, allocated RX buffers */
  78
  79	unsigned int rxpending;	/* Non-zero if there are still descriptors
  80				 * to be processed from a previous descriptor
  81				 * interrupt condition that has been cleared */
  82
  83	unsigned int txtail;	/* Next TX descriptor to check status on */
  84	unsigned int txhead;	/* Next TX descriptor to use */
  85
  86	/* Number of free TX descriptors.  This could be calculated from
  87	 * rxhead and rxtail if one descriptor were left unused to disambiguate
  88	 * full and empty conditions, but it's simpler to just keep track
  89	 * explicitly. */
  90
  91	unsigned int txfree;
  92
  93	unsigned int phy_ok;		/* The PHY is currently powered on. */
  94
  95	/* PHY status (duplex is 1 for half, 2 for full,
  96	 * so that the default 0 indicates that neither has
  97	 * yet been configured). */
  98
  99	unsigned int link_up;
 100	unsigned int speed;
 101	unsigned int duplex;
 102
 103	tx_desc *txring;
 104	rx_desc *rxring;
 105	struct sk_buff *txskbs[TSI108_TXRING_LEN];
 106	struct sk_buff *rxskbs[TSI108_RXRING_LEN];
 107
 108	dma_addr_t txdma, rxdma;
 109
 110	/* txlock nests in misclock and phy_lock */
 111
 112	spinlock_t txlock, misclock;
 113
 114	/* stats is used to hold the upper bits of each hardware counter,
 115	 * and tmpstats is used to hold the full values for returning
 116	 * to the caller of get_stats().  They must be separate in case
 117	 * an overflow interrupt occurs before the stats are consumed.
 118	 */
 119
 120	struct net_device_stats stats;
 121	struct net_device_stats tmpstats;
 122
 123	/* These stats are kept separate in hardware, thus require individual
 124	 * fields for handling carry.  They are combined in get_stats.
 125	 */
 126
 127	unsigned long rx_fcs;	/* Add to rx_frame_errors */
 128	unsigned long rx_short_fcs;	/* Add to rx_frame_errors */
 129	unsigned long rx_long_fcs;	/* Add to rx_frame_errors */
 130	unsigned long rx_underruns;	/* Add to rx_length_errors */
 131	unsigned long rx_overruns;	/* Add to rx_length_errors */
 132
 133	unsigned long tx_coll_abort;	/* Add to tx_aborted_errors/collisions */
 134	unsigned long tx_pause_drop;	/* Add to tx_aborted_errors */
 135
 136	unsigned long mc_hash[16];
 137	u32 msg_enable;			/* debug message level */
 138	struct mii_if_info mii_if;
 139	unsigned int init_media;
 140
 141	struct platform_device *pdev;
 142};
 143
 144static void tsi108_timed_checker(struct timer_list *t);
 145
 146#ifdef DEBUG
 147static void dump_eth_one(struct net_device *dev)
 148{
 149	struct tsi108_prv_data *data = netdev_priv(dev);
 150
 151	printk("Dumping %s...\n", dev->name);
 152	printk("intstat %x intmask %x phy_ok %d"
 153	       " link %d speed %d duplex %d\n",
 154	       TSI_READ(TSI108_EC_INTSTAT),
 155	       TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
 156	       data->link_up, data->speed, data->duplex);
 157
 158	printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
 159	       data->txhead, data->txtail, data->txfree,
 160	       TSI_READ(TSI108_EC_TXSTAT),
 161	       TSI_READ(TSI108_EC_TXESTAT),
 162	       TSI_READ(TSI108_EC_TXERR));
 163
 164	printk("RX: head %d, tail %d, free %d, stat %x,"
 165	       " estat %x, err %x, pending %d\n\n",
 166	       data->rxhead, data->rxtail, data->rxfree,
 167	       TSI_READ(TSI108_EC_RXSTAT),
 168	       TSI_READ(TSI108_EC_RXESTAT),
 169	       TSI_READ(TSI108_EC_RXERR), data->rxpending);
 170}
 171#endif
 172
 173/* Synchronization is needed between the thread and up/down events.
 174 * Note that the PHY is accessed through the same registers for both
 175 * interfaces, so this can't be made interface-specific.
 176 */
 177
 178static DEFINE_SPINLOCK(phy_lock);
 179
 180static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
 181{
 182	unsigned i;
 183
 184	TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
 185				(data->phy << TSI108_MAC_MII_ADDR_PHY) |
 186				(reg << TSI108_MAC_MII_ADDR_REG));
 187	TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
 188	TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
 189	for (i = 0; i < 100; i++) {
 190		if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
 191		      (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
 192			break;
 193		udelay(10);
 194	}
 195
 196	if (i == 100)
 197		return 0xffff;
 198	else
 199		return TSI_READ_PHY(TSI108_MAC_MII_DATAIN);
 200}
 201
 202static void tsi108_write_mii(struct tsi108_prv_data *data,
 203				int reg, u16 val)
 204{
 205	unsigned i = 100;
 206	TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
 207				(data->phy << TSI108_MAC_MII_ADDR_PHY) |
 208				(reg << TSI108_MAC_MII_ADDR_REG));
 209	TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
 210	while (i--) {
 211		if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
 212			TSI108_MAC_MII_IND_BUSY))
 213			break;
 214		udelay(10);
 215	}
 216}
 217
 218static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
 219{
 220	struct tsi108_prv_data *data = netdev_priv(dev);
 221	return tsi108_read_mii(data, reg);
 222}
 223
 224static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
 225{
 226	struct tsi108_prv_data *data = netdev_priv(dev);
 227	tsi108_write_mii(data, reg, val);
 228}
 229
 230static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
 231					int reg, u16 val)
 232{
 233	unsigned i = 1000;
 234	TSI_WRITE(TSI108_MAC_MII_ADDR,
 235			     (0x1e << TSI108_MAC_MII_ADDR_PHY)
 236			     | (reg << TSI108_MAC_MII_ADDR_REG));
 237	TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
 238	while(i--) {
 239		if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
 240			return;
 241		udelay(10);
 242	}
 243	printk(KERN_ERR "%s function time out\n", __func__);
 244}
 245
 246static int mii_speed(struct mii_if_info *mii)
 247{
 248	int advert, lpa, val, media;
 249	int lpa2 = 0;
 250	int speed;
 251
 252	if (!mii_link_ok(mii))
 253		return 0;
 254
 255	val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
 256	if ((val & BMSR_ANEGCOMPLETE) == 0)
 257		return 0;
 258
 259	advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
 260	lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
 261	media = mii_nway_result(advert & lpa);
 262
 263	if (mii->supports_gmii)
 264		lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
 265
 266	speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
 267			(media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
 268	return speed;
 269}
 270
 271static void tsi108_check_phy(struct net_device *dev)
 272{
 273	struct tsi108_prv_data *data = netdev_priv(dev);
 274	u32 mac_cfg2_reg, portctrl_reg;
 275	u32 duplex;
 276	u32 speed;
 277	unsigned long flags;
 278
 279	spin_lock_irqsave(&phy_lock, flags);
 280
 281	if (!data->phy_ok)
 282		goto out;
 283
 284	duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
 285	data->init_media = 0;
 286
 287	if (netif_carrier_ok(dev)) {
 288
 289		speed = mii_speed(&data->mii_if);
 290
 291		if ((speed != data->speed) || duplex) {
 292
 293			mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
 294			portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
 295
 296			mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
 297
 298			if (speed == 1000) {
 299				mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
 300				portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
 301			} else {
 302				mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
 303				portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
 304			}
 305
 306			data->speed = speed;
 307
 308			if (data->mii_if.full_duplex) {
 309				mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
 310				portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
 311				data->duplex = 2;
 312			} else {
 313				mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
 314				portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
 315				data->duplex = 1;
 316			}
 317
 318			TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
 319			TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
 320		}
 321
 322		if (data->link_up == 0) {
 323			/* The manual says it can take 3-4 usecs for the speed change
 324			 * to take effect.
 325			 */
 326			udelay(5);
 327
 328			spin_lock(&data->txlock);
 329			if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
 330				netif_wake_queue(dev);
 331
 332			data->link_up = 1;
 333			spin_unlock(&data->txlock);
 334		}
 335	} else {
 336		if (data->link_up == 1) {
 337			netif_stop_queue(dev);
 338			data->link_up = 0;
 339			printk(KERN_NOTICE "%s : link is down\n", dev->name);
 340		}
 341
 342		goto out;
 343	}
 344
 345
 346out:
 347	spin_unlock_irqrestore(&phy_lock, flags);
 348}
 349
 350static inline void
 351tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
 352		      unsigned long *upper)
 353{
 354	if (carry & carry_bit)
 355		*upper += carry_shift;
 356}
 357
 358static void tsi108_stat_carry(struct net_device *dev)
 359{
 360	struct tsi108_prv_data *data = netdev_priv(dev);
 361	unsigned long flags;
 362	u32 carry1, carry2;
 363
 364	spin_lock_irqsave(&data->misclock, flags);
 365
 366	carry1 = TSI_READ(TSI108_STAT_CARRY1);
 367	carry2 = TSI_READ(TSI108_STAT_CARRY2);
 368
 369	TSI_WRITE(TSI108_STAT_CARRY1, carry1);
 370	TSI_WRITE(TSI108_STAT_CARRY2, carry2);
 371
 372	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
 373			      TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
 374
 375	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
 376			      TSI108_STAT_RXPKTS_CARRY,
 377			      &data->stats.rx_packets);
 378
 379	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
 380			      TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
 381
 382	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
 383			      TSI108_STAT_RXMCAST_CARRY,
 384			      &data->stats.multicast);
 385
 386	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
 387			      TSI108_STAT_RXALIGN_CARRY,
 388			      &data->stats.rx_frame_errors);
 389
 390	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
 391			      TSI108_STAT_RXLENGTH_CARRY,
 392			      &data->stats.rx_length_errors);
 393
 394	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
 395			      TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
 396
 397	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
 398			      TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
 399
 400	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
 401			      TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
 402
 403	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
 404			      TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
 405
 406	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
 407			      TSI108_STAT_RXDROP_CARRY,
 408			      &data->stats.rx_missed_errors);
 409
 410	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
 411			      TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
 412
 413	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
 414			      TSI108_STAT_TXPKTS_CARRY,
 415			      &data->stats.tx_packets);
 416
 417	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
 418			      TSI108_STAT_TXEXDEF_CARRY,
 419			      &data->stats.tx_aborted_errors);
 420
 421	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
 422			      TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
 423
 424	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
 425			      TSI108_STAT_TXTCOL_CARRY,
 426			      &data->stats.collisions);
 427
 428	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
 429			      TSI108_STAT_TXPAUSEDROP_CARRY,
 430			      &data->tx_pause_drop);
 431
 432	spin_unlock_irqrestore(&data->misclock, flags);
 433}
 434
 435/* Read a stat counter atomically with respect to carries.
 436 * data->misclock must be held.
 437 */
 438static inline unsigned long
 439tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
 440		 int carry_shift, unsigned long *upper)
 441{
 442	int carryreg;
 443	unsigned long val;
 444
 445	if (reg < 0xb0)
 446		carryreg = TSI108_STAT_CARRY1;
 447	else
 448		carryreg = TSI108_STAT_CARRY2;
 449
 450      again:
 451	val = TSI_READ(reg) | *upper;
 452
 453	/* Check to see if it overflowed, but the interrupt hasn't
 454	 * been serviced yet.  If so, handle the carry here, and
 455	 * try again.
 456	 */
 457
 458	if (unlikely(TSI_READ(carryreg) & carry_bit)) {
 459		*upper += carry_shift;
 460		TSI_WRITE(carryreg, carry_bit);
 461		goto again;
 462	}
 463
 464	return val;
 465}
 466
 467static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
 468{
 469	unsigned long excol;
 470
 471	struct tsi108_prv_data *data = netdev_priv(dev);
 472	spin_lock_irq(&data->misclock);
 473
 474	data->tmpstats.rx_packets =
 475	    tsi108_read_stat(data, TSI108_STAT_RXPKTS,
 476			     TSI108_STAT_CARRY1_RXPKTS,
 477			     TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
 478
 479	data->tmpstats.tx_packets =
 480	    tsi108_read_stat(data, TSI108_STAT_TXPKTS,
 481			     TSI108_STAT_CARRY2_TXPKTS,
 482			     TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
 483
 484	data->tmpstats.rx_bytes =
 485	    tsi108_read_stat(data, TSI108_STAT_RXBYTES,
 486			     TSI108_STAT_CARRY1_RXBYTES,
 487			     TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
 488
 489	data->tmpstats.tx_bytes =
 490	    tsi108_read_stat(data, TSI108_STAT_TXBYTES,
 491			     TSI108_STAT_CARRY2_TXBYTES,
 492			     TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
 493
 494	data->tmpstats.multicast =
 495	    tsi108_read_stat(data, TSI108_STAT_RXMCAST,
 496			     TSI108_STAT_CARRY1_RXMCAST,
 497			     TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
 498
 499	excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
 500				 TSI108_STAT_CARRY2_TXEXCOL,
 501				 TSI108_STAT_TXEXCOL_CARRY,
 502				 &data->tx_coll_abort);
 503
 504	data->tmpstats.collisions =
 505	    tsi108_read_stat(data, TSI108_STAT_TXTCOL,
 506			     TSI108_STAT_CARRY2_TXTCOL,
 507			     TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
 508
 509	data->tmpstats.collisions += excol;
 510
 511	data->tmpstats.rx_length_errors =
 512	    tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
 513			     TSI108_STAT_CARRY1_RXLENGTH,
 514			     TSI108_STAT_RXLENGTH_CARRY,
 515			     &data->stats.rx_length_errors);
 516
 517	data->tmpstats.rx_length_errors +=
 518	    tsi108_read_stat(data, TSI108_STAT_RXRUNT,
 519			     TSI108_STAT_CARRY1_RXRUNT,
 520			     TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
 521
 522	data->tmpstats.rx_length_errors +=
 523	    tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
 524			     TSI108_STAT_CARRY1_RXJUMBO,
 525			     TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
 526
 527	data->tmpstats.rx_frame_errors =
 528	    tsi108_read_stat(data, TSI108_STAT_RXALIGN,
 529			     TSI108_STAT_CARRY1_RXALIGN,
 530			     TSI108_STAT_RXALIGN_CARRY,
 531			     &data->stats.rx_frame_errors);
 532
 533	data->tmpstats.rx_frame_errors +=
 534	    tsi108_read_stat(data, TSI108_STAT_RXFCS,
 535			     TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
 536			     &data->rx_fcs);
 537
 538	data->tmpstats.rx_frame_errors +=
 539	    tsi108_read_stat(data, TSI108_STAT_RXFRAG,
 540			     TSI108_STAT_CARRY1_RXFRAG,
 541			     TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
 542
 543	data->tmpstats.rx_missed_errors =
 544	    tsi108_read_stat(data, TSI108_STAT_RXDROP,
 545			     TSI108_STAT_CARRY1_RXDROP,
 546			     TSI108_STAT_RXDROP_CARRY,
 547			     &data->stats.rx_missed_errors);
 548
 549	/* These three are maintained by software. */
 550	data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
 551	data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
 552
 553	data->tmpstats.tx_aborted_errors =
 554	    tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
 555			     TSI108_STAT_CARRY2_TXEXDEF,
 556			     TSI108_STAT_TXEXDEF_CARRY,
 557			     &data->stats.tx_aborted_errors);
 558
 559	data->tmpstats.tx_aborted_errors +=
 560	    tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
 561			     TSI108_STAT_CARRY2_TXPAUSE,
 562			     TSI108_STAT_TXPAUSEDROP_CARRY,
 563			     &data->tx_pause_drop);
 564
 565	data->tmpstats.tx_aborted_errors += excol;
 566
 567	data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
 568	data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
 569	    data->tmpstats.rx_crc_errors +
 570	    data->tmpstats.rx_frame_errors +
 571	    data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
 572
 573	spin_unlock_irq(&data->misclock);
 574	return &data->tmpstats;
 575}
 576
 577static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
 578{
 579	TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
 580			     TSI108_EC_RXQ_PTRHIGH_VALID);
 581
 582	TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
 583			     | TSI108_EC_RXCTRL_QUEUE0);
 584}
 585
 586static void tsi108_restart_tx(struct tsi108_prv_data * data)
 587{
 588	TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
 589			     TSI108_EC_TXQ_PTRHIGH_VALID);
 590
 591	TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
 592			     TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
 593}
 594
 595/* txlock must be held by caller, with IRQs disabled, and
 596 * with permission to re-enable them when the lock is dropped.
 597 */
 598static void tsi108_complete_tx(struct net_device *dev)
 599{
 600	struct tsi108_prv_data *data = netdev_priv(dev);
 601	int tx;
 602	struct sk_buff *skb;
 603	int release = 0;
 604
 605	while (!data->txfree || data->txhead != data->txtail) {
 606		tx = data->txtail;
 607
 608		if (data->txring[tx].misc & TSI108_TX_OWN)
 609			break;
 610
 611		skb = data->txskbs[tx];
 612
 613		if (!(data->txring[tx].misc & TSI108_TX_OK))
 614			printk("%s: bad tx packet, misc %x\n",
 615			       dev->name, data->txring[tx].misc);
 616
 617		data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
 618		data->txfree++;
 619
 620		if (data->txring[tx].misc & TSI108_TX_EOF) {
 621			dev_kfree_skb_any(skb);
 622			release++;
 623		}
 624	}
 625
 626	if (release) {
 627		if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
 628			netif_wake_queue(dev);
 629	}
 630}
 631
 632static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
 633{
 634	struct tsi108_prv_data *data = netdev_priv(dev);
 635	int frags = skb_shinfo(skb)->nr_frags + 1;
 636	int i;
 637
 638	if (!data->phy_ok && net_ratelimit())
 639		printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
 640
 641	if (!data->link_up) {
 642		printk(KERN_ERR "%s: Transmit while link is down!\n",
 643		       dev->name);
 644		netif_stop_queue(dev);
 645		return NETDEV_TX_BUSY;
 646	}
 647
 648	if (data->txfree < MAX_SKB_FRAGS + 1) {
 649		netif_stop_queue(dev);
 650
 651		if (net_ratelimit())
 652			printk(KERN_ERR "%s: Transmit with full tx ring!\n",
 653			       dev->name);
 654		return NETDEV_TX_BUSY;
 655	}
 656
 657	if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
 658		netif_stop_queue(dev);
 659	}
 660
 661	spin_lock_irq(&data->txlock);
 662
 663	for (i = 0; i < frags; i++) {
 664		int misc = 0;
 665		int tx = data->txhead;
 666
 667		/* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
 668		 * the interrupt bit.  TX descriptor-complete interrupts are
 669		 * enabled when the queue fills up, and masked when there is
 670		 * still free space.  This way, when saturating the outbound
 671		 * link, the tx interrupts are kept to a reasonable level.
 672		 * When the queue is not full, reclamation of skbs still occurs
 673		 * as new packets are transmitted, or on a queue-empty
 674		 * interrupt.
 675		 */
 676
 677		if ((tx % TSI108_TX_INT_FREQ == 0) &&
 678		    ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
 679			misc = TSI108_TX_INT;
 680
 681		data->txskbs[tx] = skb;
 682
 683		if (i == 0) {
 684			data->txring[tx].buf0 = dma_map_single(&data->pdev->dev,
 685					skb->data, skb_headlen(skb),
 686					DMA_TO_DEVICE);
 687			data->txring[tx].len = skb_headlen(skb);
 688			misc |= TSI108_TX_SOF;
 689		} else {
 690			const skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
 691
 692			data->txring[tx].buf0 =
 693				skb_frag_dma_map(&data->pdev->dev, frag,
 694						0, skb_frag_size(frag),
 695						DMA_TO_DEVICE);
 696			data->txring[tx].len = skb_frag_size(frag);
 697		}
 698
 699		if (i == frags - 1)
 700			misc |= TSI108_TX_EOF;
 701
 702		if (netif_msg_pktdata(data)) {
 703			int i;
 704			printk("%s: Tx Frame contents (%d)\n", dev->name,
 705			       skb->len);
 706			for (i = 0; i < skb->len; i++)
 707				printk(" %2.2x", skb->data[i]);
 708			printk(".\n");
 709		}
 710		data->txring[tx].misc = misc | TSI108_TX_OWN;
 711
 712		data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
 713		data->txfree--;
 714	}
 715
 716	tsi108_complete_tx(dev);
 717
 718	/* This must be done after the check for completed tx descriptors,
 719	 * so that the tail pointer is correct.
 720	 */
 721
 722	if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
 723		tsi108_restart_tx(data);
 724
 725	spin_unlock_irq(&data->txlock);
 726	return NETDEV_TX_OK;
 727}
 728
 729static int tsi108_complete_rx(struct net_device *dev, int budget)
 730{
 731	struct tsi108_prv_data *data = netdev_priv(dev);
 732	int done = 0;
 733
 734	while (data->rxfree && done != budget) {
 735		int rx = data->rxtail;
 736		struct sk_buff *skb;
 737
 738		if (data->rxring[rx].misc & TSI108_RX_OWN)
 739			break;
 740
 741		skb = data->rxskbs[rx];
 742		data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
 743		data->rxfree--;
 744		done++;
 745
 746		if (data->rxring[rx].misc & TSI108_RX_BAD) {
 747			spin_lock_irq(&data->misclock);
 748
 749			if (data->rxring[rx].misc & TSI108_RX_CRC)
 750				data->stats.rx_crc_errors++;
 751			if (data->rxring[rx].misc & TSI108_RX_OVER)
 752				data->stats.rx_fifo_errors++;
 753
 754			spin_unlock_irq(&data->misclock);
 755
 756			dev_kfree_skb_any(skb);
 757			continue;
 758		}
 759		if (netif_msg_pktdata(data)) {
 760			int i;
 761			printk("%s: Rx Frame contents (%d)\n",
 762			       dev->name, data->rxring[rx].len);
 763			for (i = 0; i < data->rxring[rx].len; i++)
 764				printk(" %2.2x", skb->data[i]);
 765			printk(".\n");
 766		}
 767
 768		skb_put(skb, data->rxring[rx].len);
 769		skb->protocol = eth_type_trans(skb, dev);
 770		netif_receive_skb(skb);
 771	}
 772
 773	return done;
 774}
 775
 776static int tsi108_refill_rx(struct net_device *dev, int budget)
 777{
 778	struct tsi108_prv_data *data = netdev_priv(dev);
 779	int done = 0;
 780
 781	while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
 782		int rx = data->rxhead;
 783		struct sk_buff *skb;
 784
 785		skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
 786		data->rxskbs[rx] = skb;
 787		if (!skb)
 788			break;
 789
 790		data->rxring[rx].buf0 = dma_map_single(&data->pdev->dev,
 791				skb->data, TSI108_RX_SKB_SIZE,
 792				DMA_FROM_DEVICE);
 793
 794		/* Sometimes the hardware sets blen to zero after packet
 795		 * reception, even though the manual says that it's only ever
 796		 * modified by the driver.
 797		 */
 798
 799		data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
 800		data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
 801
 802		data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
 803		data->rxfree++;
 804		done++;
 805	}
 806
 807	if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
 808			   TSI108_EC_RXSTAT_QUEUE0))
 809		tsi108_restart_rx(data, dev);
 810
 811	return done;
 812}
 813
 814static int tsi108_poll(struct napi_struct *napi, int budget)
 815{
 816	struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
 817	struct net_device *dev = data->dev;
 818	u32 estat = TSI_READ(TSI108_EC_RXESTAT);
 819	u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
 820	int num_received = 0, num_filled = 0;
 821
 822	intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
 823	    TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
 824
 825	TSI_WRITE(TSI108_EC_RXESTAT, estat);
 826	TSI_WRITE(TSI108_EC_INTSTAT, intstat);
 827
 828	if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
 829		num_received = tsi108_complete_rx(dev, budget);
 830
 831	/* This should normally fill no more slots than the number of
 832	 * packets received in tsi108_complete_rx().  The exception
 833	 * is when we previously ran out of memory for RX SKBs.  In that
 834	 * case, it's helpful to obey the budget, not only so that the
 835	 * CPU isn't hogged, but so that memory (which may still be low)
 836	 * is not hogged by one device.
 837	 *
 838	 * A work unit is considered to be two SKBs to allow us to catch
 839	 * up when the ring has shrunk due to out-of-memory but we're
 840	 * still removing the full budget's worth of packets each time.
 841	 */
 842
 843	if (data->rxfree < TSI108_RXRING_LEN)
 844		num_filled = tsi108_refill_rx(dev, budget * 2);
 845
 846	if (intstat & TSI108_INT_RXERROR) {
 847		u32 err = TSI_READ(TSI108_EC_RXERR);
 848		TSI_WRITE(TSI108_EC_RXERR, err);
 849
 850		if (err) {
 851			if (net_ratelimit())
 852				printk(KERN_DEBUG "%s: RX error %x\n",
 853				       dev->name, err);
 854
 855			if (!(TSI_READ(TSI108_EC_RXSTAT) &
 856			      TSI108_EC_RXSTAT_QUEUE0))
 857				tsi108_restart_rx(data, dev);
 858		}
 859	}
 860
 861	if (intstat & TSI108_INT_RXOVERRUN) {
 862		spin_lock_irq(&data->misclock);
 863		data->stats.rx_fifo_errors++;
 864		spin_unlock_irq(&data->misclock);
 865	}
 866
 867	if (num_received < budget) {
 868		data->rxpending = 0;
 869		napi_complete_done(napi, num_received);
 870
 871		TSI_WRITE(TSI108_EC_INTMASK,
 872				     TSI_READ(TSI108_EC_INTMASK)
 873				     & ~(TSI108_INT_RXQUEUE0
 874					 | TSI108_INT_RXTHRESH |
 875					 TSI108_INT_RXOVERRUN |
 876					 TSI108_INT_RXERROR |
 877					 TSI108_INT_RXWAIT));
 878	} else {
 879		data->rxpending = 1;
 880	}
 881
 882	return num_received;
 883}
 884
 885static void tsi108_rx_int(struct net_device *dev)
 886{
 887	struct tsi108_prv_data *data = netdev_priv(dev);
 888
 889	/* A race could cause dev to already be scheduled, so it's not an
 890	 * error if that happens (and interrupts shouldn't be re-masked,
 891	 * because that can cause harmful races, if poll has already
 892	 * unmasked them but not cleared LINK_STATE_SCHED).
 893	 *
 894	 * This can happen if this code races with tsi108_poll(), which masks
 895	 * the interrupts after tsi108_irq_one() read the mask, but before
 896	 * napi_schedule is called.  It could also happen due to calls
 897	 * from tsi108_check_rxring().
 898	 */
 899
 900	if (napi_schedule_prep(&data->napi)) {
 901		/* Mask, rather than ack, the receive interrupts.  The ack
 902		 * will happen in tsi108_poll().
 903		 */
 904
 905		TSI_WRITE(TSI108_EC_INTMASK,
 906				     TSI_READ(TSI108_EC_INTMASK) |
 907				     TSI108_INT_RXQUEUE0
 908				     | TSI108_INT_RXTHRESH |
 909				     TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
 910				     TSI108_INT_RXWAIT);
 911		__napi_schedule(&data->napi);
 912	} else {
 913		if (!netif_running(dev)) {
 914			/* This can happen if an interrupt occurs while the
 915			 * interface is being brought down, as the START
 916			 * bit is cleared before the stop function is called.
 917			 *
 918			 * In this case, the interrupts must be masked, or
 919			 * they will continue indefinitely.
 920			 *
 921			 * There's a race here if the interface is brought down
 922			 * and then up in rapid succession, as the device could
 923			 * be made running after the above check and before
 924			 * the masking below.  This will only happen if the IRQ
 925			 * thread has a lower priority than the task brining
 926			 * up the interface.  Fixing this race would likely
 927			 * require changes in generic code.
 928			 */
 929
 930			TSI_WRITE(TSI108_EC_INTMASK,
 931					     TSI_READ
 932					     (TSI108_EC_INTMASK) |
 933					     TSI108_INT_RXQUEUE0 |
 934					     TSI108_INT_RXTHRESH |
 935					     TSI108_INT_RXOVERRUN |
 936					     TSI108_INT_RXERROR |
 937					     TSI108_INT_RXWAIT);
 938		}
 939	}
 940}
 941
 942/* If the RX ring has run out of memory, try periodically
 943 * to allocate some more, as otherwise poll would never
 944 * get called (apart from the initial end-of-queue condition).
 945 *
 946 * This is called once per second (by default) from the thread.
 947 */
 948
 949static void tsi108_check_rxring(struct net_device *dev)
 950{
 951	struct tsi108_prv_data *data = netdev_priv(dev);
 952
 953	/* A poll is scheduled, as opposed to caling tsi108_refill_rx
 954	 * directly, so as to keep the receive path single-threaded
 955	 * (and thus not needing a lock).
 956	 */
 957
 958	if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
 959		tsi108_rx_int(dev);
 960}
 961
 962static void tsi108_tx_int(struct net_device *dev)
 963{
 964	struct tsi108_prv_data *data = netdev_priv(dev);
 965	u32 estat = TSI_READ(TSI108_EC_TXESTAT);
 966
 967	TSI_WRITE(TSI108_EC_TXESTAT, estat);
 968	TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
 969			     TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
 970	if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
 971		u32 err = TSI_READ(TSI108_EC_TXERR);
 972		TSI_WRITE(TSI108_EC_TXERR, err);
 973
 974		if (err && net_ratelimit())
 975			printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
 976	}
 977
 978	if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
 979		spin_lock(&data->txlock);
 980		tsi108_complete_tx(dev);
 981		spin_unlock(&data->txlock);
 982	}
 983}
 984
 985
 986static irqreturn_t tsi108_irq(int irq, void *dev_id)
 987{
 988	struct net_device *dev = dev_id;
 989	struct tsi108_prv_data *data = netdev_priv(dev);
 990	u32 stat = TSI_READ(TSI108_EC_INTSTAT);
 991
 992	if (!(stat & TSI108_INT_ANY))
 993		return IRQ_NONE;	/* Not our interrupt */
 994
 995	stat &= ~TSI_READ(TSI108_EC_INTMASK);
 996
 997	if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
 998		    TSI108_INT_TXERROR))
 999		tsi108_tx_int(dev);
1000	if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
1001		    TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
1002		    TSI108_INT_RXERROR))
1003		tsi108_rx_int(dev);
1004
1005	if (stat & TSI108_INT_SFN) {
1006		if (net_ratelimit())
1007			printk(KERN_DEBUG "%s: SFN error\n", dev->name);
1008		TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
1009	}
1010
1011	if (stat & TSI108_INT_STATCARRY) {
1012		tsi108_stat_carry(dev);
1013		TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
1014	}
1015
1016	return IRQ_HANDLED;
1017}
1018
1019static void tsi108_stop_ethernet(struct net_device *dev)
1020{
1021	struct tsi108_prv_data *data = netdev_priv(dev);
1022	int i = 1000;
1023	/* Disable all TX and RX queues ... */
1024	TSI_WRITE(TSI108_EC_TXCTRL, 0);
1025	TSI_WRITE(TSI108_EC_RXCTRL, 0);
1026
1027	/* ...and wait for them to become idle */
1028	while(i--) {
1029		if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
1030			break;
1031		udelay(10);
1032	}
1033	i = 1000;
1034	while(i--){
1035		if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
1036			return;
1037		udelay(10);
1038	}
1039	printk(KERN_ERR "%s function time out\n", __func__);
1040}
1041
1042static void tsi108_reset_ether(struct tsi108_prv_data * data)
1043{
1044	TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
1045	udelay(100);
1046	TSI_WRITE(TSI108_MAC_CFG1, 0);
1047
1048	TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
1049	udelay(100);
1050	TSI_WRITE(TSI108_EC_PORTCTRL,
1051			     TSI_READ(TSI108_EC_PORTCTRL) &
1052			     ~TSI108_EC_PORTCTRL_STATRST);
1053
1054	TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
1055	udelay(100);
1056	TSI_WRITE(TSI108_EC_TXCFG,
1057			     TSI_READ(TSI108_EC_TXCFG) &
1058			     ~TSI108_EC_TXCFG_RST);
1059
1060	TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
1061	udelay(100);
1062	TSI_WRITE(TSI108_EC_RXCFG,
1063			     TSI_READ(TSI108_EC_RXCFG) &
1064			     ~TSI108_EC_RXCFG_RST);
1065
1066	TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1067			     TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
1068			     TSI108_MAC_MII_MGMT_RST);
1069	udelay(100);
1070	TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1071			     (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
1072			     ~(TSI108_MAC_MII_MGMT_RST |
1073			       TSI108_MAC_MII_MGMT_CLK)) | 0x07);
1074}
1075
1076static int tsi108_get_mac(struct net_device *dev)
1077{
1078	struct tsi108_prv_data *data = netdev_priv(dev);
1079	u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
1080	u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
1081	u8 addr[ETH_ALEN];
1082
1083	/* Note that the octets are reversed from what the manual says,
1084	 * producing an even weirder ordering...
1085	 */
1086	if (word2 == 0 && word1 == 0) {
1087		addr[0] = 0x00;
1088		addr[1] = 0x06;
1089		addr[2] = 0xd2;
1090		addr[3] = 0x00;
1091		addr[4] = 0x00;
1092		if (0x8 == data->phy)
1093			addr[5] = 0x01;
1094		else
1095			addr[5] = 0x02;
1096		eth_hw_addr_set(dev, addr);
1097
1098		word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1099
1100		word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1101		    (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1102
1103		TSI_WRITE(TSI108_MAC_ADDR1, word1);
1104		TSI_WRITE(TSI108_MAC_ADDR2, word2);
1105	} else {
1106		addr[0] = (word2 >> 16) & 0xff;
1107		addr[1] = (word2 >> 24) & 0xff;
1108		addr[2] = (word1 >> 0) & 0xff;
1109		addr[3] = (word1 >> 8) & 0xff;
1110		addr[4] = (word1 >> 16) & 0xff;
1111		addr[5] = (word1 >> 24) & 0xff;
1112		eth_hw_addr_set(dev, addr);
1113	}
1114
1115	if (!is_valid_ether_addr(dev->dev_addr)) {
1116		printk(KERN_ERR
1117		       "%s: Invalid MAC address. word1: %08x, word2: %08x\n",
1118		       dev->name, word1, word2);
1119		return -EINVAL;
1120	}
1121
1122	return 0;
1123}
1124
1125static int tsi108_set_mac(struct net_device *dev, void *addr)
1126{
1127	struct tsi108_prv_data *data = netdev_priv(dev);
1128	u32 word1, word2;
1129
1130	if (!is_valid_ether_addr(addr))
1131		return -EADDRNOTAVAIL;
1132
1133	/* +2 is for the offset of the HW addr type */
1134	eth_hw_addr_set(dev, ((unsigned char *)addr) + 2);
1135
1136	word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1137
1138	word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1139	    (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1140
1141	spin_lock_irq(&data->misclock);
1142	TSI_WRITE(TSI108_MAC_ADDR1, word1);
1143	TSI_WRITE(TSI108_MAC_ADDR2, word2);
1144	spin_lock(&data->txlock);
1145
1146	if (data->txfree && data->link_up)
1147		netif_wake_queue(dev);
1148
1149	spin_unlock(&data->txlock);
1150	spin_unlock_irq(&data->misclock);
1151	return 0;
1152}
1153
1154/* Protected by dev->xmit_lock. */
1155static void tsi108_set_rx_mode(struct net_device *dev)
1156{
1157	struct tsi108_prv_data *data = netdev_priv(dev);
1158	u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
1159
1160	if (dev->flags & IFF_PROMISC) {
1161		rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
1162		rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
1163		goto out;
1164	}
1165
1166	rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
1167
1168	if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
1169		int i;
1170		struct netdev_hw_addr *ha;
1171		rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
1172
1173		memset(data->mc_hash, 0, sizeof(data->mc_hash));
1174
1175		netdev_for_each_mc_addr(ha, dev) {
1176			u32 hash, crc;
1177
1178			crc = ether_crc(6, ha->addr);
1179			hash = crc >> 23;
1180			__set_bit(hash, &data->mc_hash[0]);
1181		}
1182
1183		TSI_WRITE(TSI108_EC_HASHADDR,
1184				     TSI108_EC_HASHADDR_AUTOINC |
1185				     TSI108_EC_HASHADDR_MCAST);
1186
1187		for (i = 0; i < 16; i++) {
1188			/* The manual says that the hardware may drop
1189			 * back-to-back writes to the data register.
1190			 */
1191			udelay(1);
1192			TSI_WRITE(TSI108_EC_HASHDATA,
1193					     data->mc_hash[i]);
1194		}
1195	}
1196
1197      out:
1198	TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
1199}
1200
1201static void tsi108_init_phy(struct net_device *dev)
1202{
1203	struct tsi108_prv_data *data = netdev_priv(dev);
1204	u32 i = 0;
1205	u16 phyval = 0;
1206	unsigned long flags;
1207
1208	spin_lock_irqsave(&phy_lock, flags);
1209
1210	tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
1211	while (--i) {
1212		if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
1213			break;
1214		udelay(10);
1215	}
1216	if (i == 0)
1217		printk(KERN_ERR "%s function time out\n", __func__);
1218
1219	if (data->phy_type == TSI108_PHY_BCM54XX) {
1220		tsi108_write_mii(data, 0x09, 0x0300);
1221		tsi108_write_mii(data, 0x10, 0x1020);
1222		tsi108_write_mii(data, 0x1c, 0x8c00);
1223	}
1224
1225	tsi108_write_mii(data,
1226			 MII_BMCR,
1227			 BMCR_ANENABLE | BMCR_ANRESTART);
1228	while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
1229		cpu_relax();
1230
1231	/* Set G/MII mode and receive clock select in TBI control #2.  The
1232	 * second port won't work if this isn't done, even though we don't
1233	 * use TBI mode.
1234	 */
1235
1236	tsi108_write_tbi(data, 0x11, 0x30);
1237
1238	/* FIXME: It seems to take more than 2 back-to-back reads to the
1239	 * PHY_STAT register before the link up status bit is set.
1240	 */
1241
1242	data->link_up = 0;
1243
1244	while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
1245		 BMSR_LSTATUS)) {
1246		if (i++ > (MII_READ_DELAY / 10)) {
1247			break;
1248		}
1249		spin_unlock_irqrestore(&phy_lock, flags);
1250		msleep(10);
1251		spin_lock_irqsave(&phy_lock, flags);
1252	}
1253
1254	data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
1255	printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
1256	data->phy_ok = 1;
1257	data->init_media = 1;
1258	spin_unlock_irqrestore(&phy_lock, flags);
1259}
1260
1261static void tsi108_kill_phy(struct net_device *dev)
1262{
1263	struct tsi108_prv_data *data = netdev_priv(dev);
1264	unsigned long flags;
1265
1266	spin_lock_irqsave(&phy_lock, flags);
1267	tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
1268	data->phy_ok = 0;
1269	spin_unlock_irqrestore(&phy_lock, flags);
1270}
1271
1272static int tsi108_open(struct net_device *dev)
1273{
1274	int i;
1275	struct tsi108_prv_data *data = netdev_priv(dev);
1276	unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
1277	unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
1278
1279	i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
1280	if (i != 0) {
1281		printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
1282		       data->id, data->irq_num);
1283		return i;
1284	} else {
1285		dev->irq = data->irq_num;
1286		printk(KERN_NOTICE
1287		       "tsi108_open : Port %d Assigned IRQ %d to %s\n",
1288		       data->id, dev->irq, dev->name);
1289	}
1290
1291	data->rxring = dma_alloc_coherent(&data->pdev->dev, rxring_size,
1292					  &data->rxdma, GFP_KERNEL);
1293	if (!data->rxring) {
1294		free_irq(data->irq_num, dev);
1295		return -ENOMEM;
1296	}
1297
1298	data->txring = dma_alloc_coherent(&data->pdev->dev, txring_size,
1299					  &data->txdma, GFP_KERNEL);
1300	if (!data->txring) {
1301		free_irq(data->irq_num, dev);
1302		dma_free_coherent(&data->pdev->dev, rxring_size, data->rxring,
1303				    data->rxdma);
1304		return -ENOMEM;
1305	}
1306
1307	for (i = 0; i < TSI108_RXRING_LEN; i++) {
1308		data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
1309		data->rxring[i].blen = TSI108_RXBUF_SIZE;
1310		data->rxring[i].vlan = 0;
1311	}
1312
1313	data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
1314
1315	data->rxtail = 0;
1316	data->rxhead = 0;
1317
1318	for (i = 0; i < TSI108_RXRING_LEN; i++) {
1319		struct sk_buff *skb;
1320
1321		skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
1322		if (!skb) {
1323			/* Bah.  No memory for now, but maybe we'll get
1324			 * some more later.
1325			 * For now, we'll live with the smaller ring.
1326			 */
1327			printk(KERN_WARNING
1328			       "%s: Could only allocate %d receive skb(s).\n",
1329			       dev->name, i);
1330			data->rxhead = i;
1331			break;
1332		}
1333
1334		data->rxskbs[i] = skb;
1335		data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
1336		data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
1337	}
1338
1339	data->rxfree = i;
1340	TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
1341
1342	for (i = 0; i < TSI108_TXRING_LEN; i++) {
1343		data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
1344		data->txring[i].misc = 0;
1345	}
1346
1347	data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
1348	data->txtail = 0;
1349	data->txhead = 0;
1350	data->txfree = TSI108_TXRING_LEN;
1351	TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
1352	tsi108_init_phy(dev);
1353
1354	napi_enable(&data->napi);
1355
1356	timer_setup(&data->timer, tsi108_timed_checker, 0);
1357	mod_timer(&data->timer, jiffies + 1);
1358
1359	tsi108_restart_rx(data, dev);
1360
1361	TSI_WRITE(TSI108_EC_INTSTAT, ~0);
1362
1363	TSI_WRITE(TSI108_EC_INTMASK,
1364			     ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
1365			       TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
1366			       TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
1367			       TSI108_INT_SFN | TSI108_INT_STATCARRY));
1368
1369	TSI_WRITE(TSI108_MAC_CFG1,
1370			     TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
1371	netif_start_queue(dev);
1372	return 0;
1373}
1374
1375static int tsi108_close(struct net_device *dev)
1376{
1377	struct tsi108_prv_data *data = netdev_priv(dev);
1378
1379	netif_stop_queue(dev);
1380	napi_disable(&data->napi);
1381
1382	del_timer_sync(&data->timer);
1383
1384	tsi108_stop_ethernet(dev);
1385	tsi108_kill_phy(dev);
1386	TSI_WRITE(TSI108_EC_INTMASK, ~0);
1387	TSI_WRITE(TSI108_MAC_CFG1, 0);
1388
1389	/* Check for any pending TX packets, and drop them. */
1390
1391	while (!data->txfree || data->txhead != data->txtail) {
1392		int tx = data->txtail;
1393		struct sk_buff *skb;
1394		skb = data->txskbs[tx];
1395		data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
1396		data->txfree++;
1397		dev_kfree_skb(skb);
1398	}
1399
1400	free_irq(data->irq_num, dev);
1401
1402	/* Discard the RX ring. */
1403
1404	while (data->rxfree) {
1405		int rx = data->rxtail;
1406		struct sk_buff *skb;
1407
1408		skb = data->rxskbs[rx];
1409		data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
1410		data->rxfree--;
1411		dev_kfree_skb(skb);
1412	}
1413
1414	dma_free_coherent(&data->pdev->dev,
1415			    TSI108_RXRING_LEN * sizeof(rx_desc),
1416			    data->rxring, data->rxdma);
1417	dma_free_coherent(&data->pdev->dev,
1418			    TSI108_TXRING_LEN * sizeof(tx_desc),
1419			    data->txring, data->txdma);
1420
1421	return 0;
1422}
1423
1424static void tsi108_init_mac(struct net_device *dev)
1425{
1426	struct tsi108_prv_data *data = netdev_priv(dev);
1427
1428	TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
1429			     TSI108_MAC_CFG2_PADCRC);
1430
1431	TSI_WRITE(TSI108_EC_TXTHRESH,
1432			     (192 << TSI108_EC_TXTHRESH_STARTFILL) |
1433			     (192 << TSI108_EC_TXTHRESH_STOPFILL));
1434
1435	TSI_WRITE(TSI108_STAT_CARRYMASK1,
1436			     ~(TSI108_STAT_CARRY1_RXBYTES |
1437			       TSI108_STAT_CARRY1_RXPKTS |
1438			       TSI108_STAT_CARRY1_RXFCS |
1439			       TSI108_STAT_CARRY1_RXMCAST |
1440			       TSI108_STAT_CARRY1_RXALIGN |
1441			       TSI108_STAT_CARRY1_RXLENGTH |
1442			       TSI108_STAT_CARRY1_RXRUNT |
1443			       TSI108_STAT_CARRY1_RXJUMBO |
1444			       TSI108_STAT_CARRY1_RXFRAG |
1445			       TSI108_STAT_CARRY1_RXJABBER |
1446			       TSI108_STAT_CARRY1_RXDROP));
1447
1448	TSI_WRITE(TSI108_STAT_CARRYMASK2,
1449			     ~(TSI108_STAT_CARRY2_TXBYTES |
1450			       TSI108_STAT_CARRY2_TXPKTS |
1451			       TSI108_STAT_CARRY2_TXEXDEF |
1452			       TSI108_STAT_CARRY2_TXEXCOL |
1453			       TSI108_STAT_CARRY2_TXTCOL |
1454			       TSI108_STAT_CARRY2_TXPAUSE));
1455
1456	TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
1457	TSI_WRITE(TSI108_MAC_CFG1, 0);
1458
1459	TSI_WRITE(TSI108_EC_RXCFG,
1460			     TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
1461
1462	TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
1463			     TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
1464			     TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1465						TSI108_EC_TXQ_CFG_SFNPORT));
1466
1467	TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
1468			     TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
1469			     TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1470						TSI108_EC_RXQ_CFG_SFNPORT));
1471
1472	TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
1473			     TSI108_EC_TXQ_BUFCFG_BURST256 |
1474			     TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1475						TSI108_EC_TXQ_BUFCFG_SFNPORT));
1476
1477	TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
1478			     TSI108_EC_RXQ_BUFCFG_BURST256 |
1479			     TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1480						TSI108_EC_RXQ_BUFCFG_SFNPORT));
1481
1482	TSI_WRITE(TSI108_EC_INTMASK, ~0);
1483}
1484
1485static int tsi108_get_link_ksettings(struct net_device *dev,
1486				     struct ethtool_link_ksettings *cmd)
1487{
1488	struct tsi108_prv_data *data = netdev_priv(dev);
1489	unsigned long flags;
1490
1491	spin_lock_irqsave(&data->txlock, flags);
1492	mii_ethtool_get_link_ksettings(&data->mii_if, cmd);
1493	spin_unlock_irqrestore(&data->txlock, flags);
1494
1495	return 0;
1496}
1497
1498static int tsi108_set_link_ksettings(struct net_device *dev,
1499				     const struct ethtool_link_ksettings *cmd)
1500{
1501	struct tsi108_prv_data *data = netdev_priv(dev);
1502	unsigned long flags;
1503	int rc;
1504
1505	spin_lock_irqsave(&data->txlock, flags);
1506	rc = mii_ethtool_set_link_ksettings(&data->mii_if, cmd);
1507	spin_unlock_irqrestore(&data->txlock, flags);
1508
1509	return rc;
1510}
1511
1512static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1513{
1514	struct tsi108_prv_data *data = netdev_priv(dev);
1515	if (!netif_running(dev))
1516		return -EINVAL;
1517	return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
1518}
1519
1520static const struct ethtool_ops tsi108_ethtool_ops = {
1521	.get_link 	= ethtool_op_get_link,
1522	.get_link_ksettings	= tsi108_get_link_ksettings,
1523	.set_link_ksettings	= tsi108_set_link_ksettings,
1524};
1525
1526static const struct net_device_ops tsi108_netdev_ops = {
1527	.ndo_open		= tsi108_open,
1528	.ndo_stop		= tsi108_close,
1529	.ndo_start_xmit		= tsi108_send_packet,
1530	.ndo_set_rx_mode	= tsi108_set_rx_mode,
1531	.ndo_get_stats		= tsi108_get_stats,
1532	.ndo_eth_ioctl		= tsi108_do_ioctl,
1533	.ndo_set_mac_address	= tsi108_set_mac,
1534	.ndo_validate_addr	= eth_validate_addr,
1535};
1536
1537static int
1538tsi108_init_one(struct platform_device *pdev)
1539{
1540	struct net_device *dev = NULL;
1541	struct tsi108_prv_data *data = NULL;
1542	hw_info *einfo;
1543	int err = 0;
1544
1545	einfo = dev_get_platdata(&pdev->dev);
1546
1547	if (NULL == einfo) {
1548		printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
1549		       pdev->id);
1550		return -ENODEV;
1551	}
1552
1553	/* Create an ethernet device instance */
1554
1555	dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
1556	if (!dev)
1557		return -ENOMEM;
1558
1559	printk("tsi108_eth%d: probe...\n", pdev->id);
1560	data = netdev_priv(dev);
1561	data->dev = dev;
1562	data->pdev = pdev;
1563
1564	pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
1565			pdev->id, einfo->regs, einfo->phyregs,
1566			einfo->phy, einfo->irq_num);
1567
1568	data->regs = ioremap(einfo->regs, 0x400);
1569	if (NULL == data->regs) {
1570		err = -ENOMEM;
1571		goto regs_fail;
1572	}
1573
1574	data->phyregs = ioremap(einfo->phyregs, 0x400);
1575	if (NULL == data->phyregs) {
1576		err = -ENOMEM;
1577		goto phyregs_fail;
1578	}
1579/* MII setup */
1580	data->mii_if.dev = dev;
1581	data->mii_if.mdio_read = tsi108_mdio_read;
1582	data->mii_if.mdio_write = tsi108_mdio_write;
1583	data->mii_if.phy_id = einfo->phy;
1584	data->mii_if.phy_id_mask = 0x1f;
1585	data->mii_if.reg_num_mask = 0x1f;
1586
1587	data->phy = einfo->phy;
1588	data->phy_type = einfo->phy_type;
1589	data->irq_num = einfo->irq_num;
1590	data->id = pdev->id;
1591	netif_napi_add(dev, &data->napi, tsi108_poll);
1592	dev->netdev_ops = &tsi108_netdev_ops;
1593	dev->ethtool_ops = &tsi108_ethtool_ops;
1594
1595	/* Apparently, the Linux networking code won't use scatter-gather
1596	 * if the hardware doesn't do checksums.  However, it's faster
1597	 * to checksum in place and use SG, as (among other reasons)
1598	 * the cache won't be dirtied (which then has to be flushed
1599	 * before DMA).  The checksumming is done by the driver (via
1600	 * a new function skb_csum_dev() in net/core/skbuff.c).
1601	 */
1602
1603	dev->features = NETIF_F_HIGHDMA;
1604
1605	spin_lock_init(&data->txlock);
1606	spin_lock_init(&data->misclock);
1607
1608	tsi108_reset_ether(data);
1609	tsi108_kill_phy(dev);
1610
1611	if ((err = tsi108_get_mac(dev)) != 0) {
1612		printk(KERN_ERR "%s: Invalid MAC address.  Please correct.\n",
1613		       dev->name);
1614		goto register_fail;
1615	}
1616
1617	tsi108_init_mac(dev);
1618	err = register_netdev(dev);
1619	if (err) {
1620		printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
1621				dev->name);
1622		goto register_fail;
1623	}
1624
1625	platform_set_drvdata(pdev, dev);
1626	printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n",
1627	       dev->name, dev->dev_addr);
1628#ifdef DEBUG
1629	data->msg_enable = DEBUG;
1630	dump_eth_one(dev);
1631#endif
1632
1633	return 0;
1634
1635register_fail:
1636	iounmap(data->phyregs);
1637
1638phyregs_fail:
1639	iounmap(data->regs);
1640
1641regs_fail:
1642	free_netdev(dev);
1643	return err;
1644}
1645
1646/* There's no way to either get interrupts from the PHY when
1647 * something changes, or to have the Tsi108 automatically communicate
1648 * with the PHY to reconfigure itself.
1649 *
1650 * Thus, we have to do it using a timer.
1651 */
1652
1653static void tsi108_timed_checker(struct timer_list *t)
1654{
1655	struct tsi108_prv_data *data = from_timer(data, t, timer);
1656	struct net_device *dev = data->dev;
1657
1658	tsi108_check_phy(dev);
1659	tsi108_check_rxring(dev);
1660	mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
1661}
1662
1663static int tsi108_ether_remove(struct platform_device *pdev)
1664{
1665	struct net_device *dev = platform_get_drvdata(pdev);
1666	struct tsi108_prv_data *priv = netdev_priv(dev);
1667
1668	unregister_netdev(dev);
1669	tsi108_stop_ethernet(dev);
1670	iounmap(priv->regs);
1671	iounmap(priv->phyregs);
1672	free_netdev(dev);
1673
1674	return 0;
1675}
1676
1677/* Structure for a device driver */
1678
1679static struct platform_driver tsi_eth_driver = {
1680	.probe = tsi108_init_one,
1681	.remove = tsi108_ether_remove,
1682	.driver	= {
1683		.name = "tsi-ethernet",
1684	},
1685};
1686module_platform_driver(tsi_eth_driver);
1687
1688MODULE_AUTHOR("Tundra Semiconductor Corporation");
1689MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
1690MODULE_LICENSE("GPL");
1691MODULE_ALIAS("platform:tsi-ethernet");