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1/* SPDX-License-Identifier: GPL-2.0+ */
2/* Microchip Sparx5 Switch driver
3 *
4 * Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
5 */
6
7#ifndef __SPARX5_PORT_H__
8#define __SPARX5_PORT_H__
9
10#include "sparx5_main.h"
11
12/* Port PCP rewrite mode */
13#define SPARX5_PORT_REW_TAG_CTRL_CLASSIFIED 0
14#define SPARX5_PORT_REW_TAG_CTRL_DEFAULT 1
15#define SPARX5_PORT_REW_TAG_CTRL_MAPPED 2
16
17/* Port DSCP rewrite mode */
18#define SPARX5_PORT_REW_DSCP_NONE 0
19#define SPARX5_PORT_REW_DSCP_IF_ZERO 1
20#define SPARX5_PORT_REW_DSCP_SELECTED 2
21#define SPARX5_PORT_REW_DSCP_ALL 3
22
23static inline bool sparx5_port_is_2g5(int portno)
24{
25 return portno >= 16 && portno <= 47;
26}
27
28static inline bool sparx5_port_is_5g(int portno)
29{
30 return portno <= 11 || portno == 64;
31}
32
33static inline bool sparx5_port_is_10g(int portno)
34{
35 return (portno >= 12 && portno <= 15) || (portno >= 48 && portno <= 55);
36}
37
38static inline bool sparx5_port_is_25g(int portno)
39{
40 return portno >= 56 && portno <= 63;
41}
42
43static inline u32 sparx5_to_high_dev(struct sparx5 *sparx5, int port)
44{
45 const struct sparx5_ops *ops = sparx5->data->ops;
46
47 if (ops->is_port_5g(port))
48 return TARGET_DEV5G;
49 if (ops->is_port_10g(port))
50 return TARGET_DEV10G;
51 return TARGET_DEV25G;
52}
53
54static inline u32 sparx5_to_pcs_dev(struct sparx5 *sparx5, int port)
55{
56 const struct sparx5_ops *ops = sparx5->data->ops;
57
58 if (ops->is_port_5g(port))
59 return TARGET_PCS5G_BR;
60 if (ops->is_port_10g(port))
61 return TARGET_PCS10G_BR;
62 return TARGET_PCS25G_BR;
63}
64
65static inline u32 sparx5_port_dev_mapping(struct sparx5 *sparx5, int port)
66{
67 if (sparx5_port_is_2g5(port))
68 return port;
69 if (sparx5_port_is_5g(port))
70 return (port <= 11 ? port : 12);
71 if (sparx5_port_is_10g(port))
72 return (port >= 12 && port <= 15) ?
73 port - 12 : port - 44;
74 return (port - 56);
75}
76
77static inline u32 sparx5_port_dev_index(struct sparx5 *sparx5, int port)
78{
79 return sparx5->data->ops->get_port_dev_index(sparx5, port);
80}
81
82int sparx5_port_init(struct sparx5 *sparx5,
83 struct sparx5_port *spx5_port,
84 struct sparx5_port_config *conf);
85
86int sparx5_port_config(struct sparx5 *sparx5,
87 struct sparx5_port *spx5_port,
88 struct sparx5_port_config *conf);
89
90int sparx5_port_pcs_set(struct sparx5 *sparx5,
91 struct sparx5_port *port,
92 struct sparx5_port_config *conf);
93
94int sparx5_serdes_set(struct sparx5 *sparx5,
95 struct sparx5_port *spx5_port,
96 struct sparx5_port_config *conf);
97
98struct sparx5_port_status {
99 bool link;
100 bool link_down;
101 int speed;
102 bool an_complete;
103 int duplex;
104 int pause;
105};
106
107int sparx5_get_port_status(struct sparx5 *sparx5,
108 struct sparx5_port *port,
109 struct sparx5_port_status *status);
110
111void sparx5_port_enable(struct sparx5_port *port, bool enable);
112int sparx5_port_fwd_urg(struct sparx5 *sparx5, u32 speed);
113
114#define SPARX5_PORT_QOS_PCP_COUNT 8
115#define SPARX5_PORT_QOS_DEI_COUNT 8
116#define SPARX5_PORT_QOS_PCP_DEI_COUNT \
117 (SPARX5_PORT_QOS_PCP_COUNT + SPARX5_PORT_QOS_DEI_COUNT)
118struct sparx5_port_qos_pcp_map {
119 u8 map[SPARX5_PORT_QOS_PCP_DEI_COUNT];
120};
121
122struct sparx5_port_qos_pcp_rewr_map {
123 u16 map[SPX5_PRIOS];
124};
125
126#define SPARX5_PORT_QOS_DP_NUM 4
127struct sparx5_port_qos_dscp_rewr_map {
128 u16 map[SPX5_PRIOS * SPARX5_PORT_QOS_DP_NUM];
129};
130
131#define SPARX5_PORT_QOS_DSCP_COUNT 64
132struct sparx5_port_qos_dscp_map {
133 u8 map[SPARX5_PORT_QOS_DSCP_COUNT];
134};
135
136struct sparx5_port_qos_pcp {
137 struct sparx5_port_qos_pcp_map map;
138 bool qos_enable;
139 bool dp_enable;
140};
141
142struct sparx5_port_qos_pcp_rewr {
143 struct sparx5_port_qos_pcp_rewr_map map;
144 bool enable;
145};
146
147struct sparx5_port_qos_dscp {
148 struct sparx5_port_qos_dscp_map map;
149 bool qos_enable;
150 bool dp_enable;
151};
152
153struct sparx5_port_qos_dscp_rewr {
154 struct sparx5_port_qos_dscp_rewr_map map;
155 bool enable;
156};
157
158struct sparx5_port_qos {
159 struct sparx5_port_qos_pcp pcp;
160 struct sparx5_port_qos_pcp_rewr pcp_rewr;
161 struct sparx5_port_qos_dscp dscp;
162 struct sparx5_port_qos_dscp_rewr dscp_rewr;
163 u8 default_prio;
164};
165
166int sparx5_port_qos_set(struct sparx5_port *port, struct sparx5_port_qos *qos);
167
168int sparx5_port_qos_pcp_set(const struct sparx5_port *port,
169 struct sparx5_port_qos_pcp *qos);
170
171int sparx5_port_qos_pcp_rewr_set(const struct sparx5_port *port,
172 struct sparx5_port_qos_pcp_rewr *qos);
173
174int sparx5_port_qos_dscp_set(const struct sparx5_port *port,
175 struct sparx5_port_qos_dscp *qos);
176
177void sparx5_port_qos_dscp_rewr_mode_set(const struct sparx5_port *port,
178 int mode);
179
180int sparx5_port_qos_dscp_rewr_set(const struct sparx5_port *port,
181 struct sparx5_port_qos_dscp_rewr *qos);
182
183int sparx5_port_qos_default_set(const struct sparx5_port *port,
184 const struct sparx5_port_qos *qos);
185
186#endif /* __SPARX5_PORT_H__ */
1/* SPDX-License-Identifier: GPL-2.0+ */
2/* Microchip Sparx5 Switch driver
3 *
4 * Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
5 */
6
7#ifndef __SPARX5_PORT_H__
8#define __SPARX5_PORT_H__
9
10#include "sparx5_main.h"
11
12static inline bool sparx5_port_is_2g5(int portno)
13{
14 return portno >= 16 && portno <= 47;
15}
16
17static inline bool sparx5_port_is_5g(int portno)
18{
19 return portno <= 11 || portno == 64;
20}
21
22static inline bool sparx5_port_is_10g(int portno)
23{
24 return (portno >= 12 && portno <= 15) || (portno >= 48 && portno <= 55);
25}
26
27static inline bool sparx5_port_is_25g(int portno)
28{
29 return portno >= 56 && portno <= 63;
30}
31
32static inline u32 sparx5_to_high_dev(int port)
33{
34 if (sparx5_port_is_5g(port))
35 return TARGET_DEV5G;
36 if (sparx5_port_is_10g(port))
37 return TARGET_DEV10G;
38 return TARGET_DEV25G;
39}
40
41static inline u32 sparx5_to_pcs_dev(int port)
42{
43 if (sparx5_port_is_5g(port))
44 return TARGET_PCS5G_BR;
45 if (sparx5_port_is_10g(port))
46 return TARGET_PCS10G_BR;
47 return TARGET_PCS25G_BR;
48}
49
50static inline int sparx5_port_dev_index(int port)
51{
52 if (sparx5_port_is_2g5(port))
53 return port;
54 if (sparx5_port_is_5g(port))
55 return (port <= 11 ? port : 12);
56 if (sparx5_port_is_10g(port))
57 return (port >= 12 && port <= 15) ?
58 port - 12 : port - 44;
59 return (port - 56);
60}
61
62int sparx5_port_init(struct sparx5 *sparx5,
63 struct sparx5_port *spx5_port,
64 struct sparx5_port_config *conf);
65
66int sparx5_port_config(struct sparx5 *sparx5,
67 struct sparx5_port *spx5_port,
68 struct sparx5_port_config *conf);
69
70int sparx5_port_pcs_set(struct sparx5 *sparx5,
71 struct sparx5_port *port,
72 struct sparx5_port_config *conf);
73
74int sparx5_serdes_set(struct sparx5 *sparx5,
75 struct sparx5_port *spx5_port,
76 struct sparx5_port_config *conf);
77
78struct sparx5_port_status {
79 bool link;
80 bool link_down;
81 int speed;
82 bool an_complete;
83 int duplex;
84 int pause;
85};
86
87int sparx5_get_port_status(struct sparx5 *sparx5,
88 struct sparx5_port *port,
89 struct sparx5_port_status *status);
90
91void sparx5_port_enable(struct sparx5_port *port, bool enable);
92int sparx5_port_fwd_urg(struct sparx5 *sparx5, u32 speed);
93
94#define SPARX5_PORT_QOS_PCP_COUNT 8
95#define SPARX5_PORT_QOS_DEI_COUNT 8
96#define SPARX5_PORT_QOS_PCP_DEI_COUNT \
97 (SPARX5_PORT_QOS_PCP_COUNT + SPARX5_PORT_QOS_DEI_COUNT)
98struct sparx5_port_qos_pcp_map {
99 u8 map[SPARX5_PORT_QOS_PCP_DEI_COUNT];
100};
101
102#define SPARX5_PORT_QOS_DSCP_COUNT 64
103struct sparx5_port_qos_dscp_map {
104 u8 map[SPARX5_PORT_QOS_DSCP_COUNT];
105};
106
107struct sparx5_port_qos_pcp {
108 struct sparx5_port_qos_pcp_map map;
109 bool qos_enable;
110 bool dp_enable;
111};
112
113struct sparx5_port_qos_dscp {
114 struct sparx5_port_qos_dscp_map map;
115 bool qos_enable;
116 bool dp_enable;
117};
118
119struct sparx5_port_qos {
120 struct sparx5_port_qos_pcp pcp;
121 struct sparx5_port_qos_dscp dscp;
122 u8 default_prio;
123};
124
125int sparx5_port_qos_set(struct sparx5_port *port, struct sparx5_port_qos *qos);
126
127int sparx5_port_qos_pcp_set(const struct sparx5_port *port,
128 struct sparx5_port_qos_pcp *qos);
129
130int sparx5_port_qos_dscp_set(const struct sparx5_port *port,
131 struct sparx5_port_qos_dscp *qos);
132
133int sparx5_port_qos_default_set(const struct sparx5_port *port,
134 const struct sparx5_port_qos *qos);
135
136#endif /* __SPARX5_PORT_H__ */