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1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2019, Intel Corporation. */
3
4#include "ice_common.h"
5#include "ice_flex_pipe.h"
6#include "ice_flow.h"
7#include "ice.h"
8
9static const u32 ice_sect_lkup[ICE_BLK_COUNT][ICE_SECT_COUNT] = {
10 /* SWITCH */
11 {
12 ICE_SID_XLT0_SW,
13 ICE_SID_XLT_KEY_BUILDER_SW,
14 ICE_SID_XLT1_SW,
15 ICE_SID_XLT2_SW,
16 ICE_SID_PROFID_TCAM_SW,
17 ICE_SID_PROFID_REDIR_SW,
18 ICE_SID_FLD_VEC_SW,
19 ICE_SID_CDID_KEY_BUILDER_SW,
20 ICE_SID_CDID_REDIR_SW
21 },
22
23 /* ACL */
24 {
25 ICE_SID_XLT0_ACL,
26 ICE_SID_XLT_KEY_BUILDER_ACL,
27 ICE_SID_XLT1_ACL,
28 ICE_SID_XLT2_ACL,
29 ICE_SID_PROFID_TCAM_ACL,
30 ICE_SID_PROFID_REDIR_ACL,
31 ICE_SID_FLD_VEC_ACL,
32 ICE_SID_CDID_KEY_BUILDER_ACL,
33 ICE_SID_CDID_REDIR_ACL
34 },
35
36 /* FD */
37 {
38 ICE_SID_XLT0_FD,
39 ICE_SID_XLT_KEY_BUILDER_FD,
40 ICE_SID_XLT1_FD,
41 ICE_SID_XLT2_FD,
42 ICE_SID_PROFID_TCAM_FD,
43 ICE_SID_PROFID_REDIR_FD,
44 ICE_SID_FLD_VEC_FD,
45 ICE_SID_CDID_KEY_BUILDER_FD,
46 ICE_SID_CDID_REDIR_FD
47 },
48
49 /* RSS */
50 {
51 ICE_SID_XLT0_RSS,
52 ICE_SID_XLT_KEY_BUILDER_RSS,
53 ICE_SID_XLT1_RSS,
54 ICE_SID_XLT2_RSS,
55 ICE_SID_PROFID_TCAM_RSS,
56 ICE_SID_PROFID_REDIR_RSS,
57 ICE_SID_FLD_VEC_RSS,
58 ICE_SID_CDID_KEY_BUILDER_RSS,
59 ICE_SID_CDID_REDIR_RSS
60 },
61
62 /* PE */
63 {
64 ICE_SID_XLT0_PE,
65 ICE_SID_XLT_KEY_BUILDER_PE,
66 ICE_SID_XLT1_PE,
67 ICE_SID_XLT2_PE,
68 ICE_SID_PROFID_TCAM_PE,
69 ICE_SID_PROFID_REDIR_PE,
70 ICE_SID_FLD_VEC_PE,
71 ICE_SID_CDID_KEY_BUILDER_PE,
72 ICE_SID_CDID_REDIR_PE
73 }
74};
75
76/**
77 * ice_sect_id - returns section ID
78 * @blk: block type
79 * @sect: section type
80 *
81 * This helper function returns the proper section ID given a block type and a
82 * section type.
83 */
84static u32 ice_sect_id(enum ice_block blk, enum ice_sect sect)
85{
86 return ice_sect_lkup[blk][sect];
87}
88
89/**
90 * ice_hw_ptype_ena - check if the PTYPE is enabled or not
91 * @hw: pointer to the HW structure
92 * @ptype: the hardware PTYPE
93 */
94bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype)
95{
96 return ptype < ICE_FLOW_PTYPE_MAX &&
97 test_bit(ptype, hw->hw_ptype);
98}
99
100/* Key creation */
101
102#define ICE_DC_KEY 0x1 /* don't care */
103#define ICE_DC_KEYINV 0x1
104#define ICE_NM_KEY 0x0 /* never match */
105#define ICE_NM_KEYINV 0x0
106#define ICE_0_KEY 0x1 /* match 0 */
107#define ICE_0_KEYINV 0x0
108#define ICE_1_KEY 0x0 /* match 1 */
109#define ICE_1_KEYINV 0x1
110
111/**
112 * ice_gen_key_word - generate 16-bits of a key/mask word
113 * @val: the value
114 * @valid: valid bits mask (change only the valid bits)
115 * @dont_care: don't care mask
116 * @nvr_mtch: never match mask
117 * @key: pointer to an array of where the resulting key portion
118 * @key_inv: pointer to an array of where the resulting key invert portion
119 *
120 * This function generates 16-bits from a 8-bit value, an 8-bit don't care mask
121 * and an 8-bit never match mask. The 16-bits of output are divided into 8 bits
122 * of key and 8 bits of key invert.
123 *
124 * '0' = b01, always match a 0 bit
125 * '1' = b10, always match a 1 bit
126 * '?' = b11, don't care bit (always matches)
127 * '~' = b00, never match bit
128 *
129 * Input:
130 * val: b0 1 0 1 0 1
131 * dont_care: b0 0 1 1 0 0
132 * never_mtch: b0 0 0 0 1 1
133 * ------------------------------
134 * Result: key: b01 10 11 11 00 00
135 */
136static int
137ice_gen_key_word(u8 val, u8 valid, u8 dont_care, u8 nvr_mtch, u8 *key,
138 u8 *key_inv)
139{
140 u8 in_key = *key, in_key_inv = *key_inv;
141 u8 i;
142
143 /* 'dont_care' and 'nvr_mtch' masks cannot overlap */
144 if ((dont_care ^ nvr_mtch) != (dont_care | nvr_mtch))
145 return -EIO;
146
147 *key = 0;
148 *key_inv = 0;
149
150 /* encode the 8 bits into 8-bit key and 8-bit key invert */
151 for (i = 0; i < 8; i++) {
152 *key >>= 1;
153 *key_inv >>= 1;
154
155 if (!(valid & 0x1)) { /* change only valid bits */
156 *key |= (in_key & 0x1) << 7;
157 *key_inv |= (in_key_inv & 0x1) << 7;
158 } else if (dont_care & 0x1) { /* don't care bit */
159 *key |= ICE_DC_KEY << 7;
160 *key_inv |= ICE_DC_KEYINV << 7;
161 } else if (nvr_mtch & 0x1) { /* never match bit */
162 *key |= ICE_NM_KEY << 7;
163 *key_inv |= ICE_NM_KEYINV << 7;
164 } else if (val & 0x01) { /* exact 1 match */
165 *key |= ICE_1_KEY << 7;
166 *key_inv |= ICE_1_KEYINV << 7;
167 } else { /* exact 0 match */
168 *key |= ICE_0_KEY << 7;
169 *key_inv |= ICE_0_KEYINV << 7;
170 }
171
172 dont_care >>= 1;
173 nvr_mtch >>= 1;
174 valid >>= 1;
175 val >>= 1;
176 in_key >>= 1;
177 in_key_inv >>= 1;
178 }
179
180 return 0;
181}
182
183/**
184 * ice_bits_max_set - determine if the number of bits set is within a maximum
185 * @mask: pointer to the byte array which is the mask
186 * @size: the number of bytes in the mask
187 * @max: the max number of set bits
188 *
189 * This function determines if there are at most 'max' number of bits set in an
190 * array. Returns true if the number for bits set is <= max or will return false
191 * otherwise.
192 */
193static bool ice_bits_max_set(const u8 *mask, u16 size, u16 max)
194{
195 u16 count = 0;
196 u16 i;
197
198 /* check each byte */
199 for (i = 0; i < size; i++) {
200 /* if 0, go to next byte */
201 if (!mask[i])
202 continue;
203
204 /* We know there is at least one set bit in this byte because of
205 * the above check; if we already have found 'max' number of
206 * bits set, then we can return failure now.
207 */
208 if (count == max)
209 return false;
210
211 /* count the bits in this byte, checking threshold */
212 count += hweight8(mask[i]);
213 if (count > max)
214 return false;
215 }
216
217 return true;
218}
219
220/**
221 * ice_set_key - generate a variable sized key with multiples of 16-bits
222 * @key: pointer to where the key will be stored
223 * @size: the size of the complete key in bytes (must be even)
224 * @val: array of 8-bit values that makes up the value portion of the key
225 * @upd: array of 8-bit masks that determine what key portion to update
226 * @dc: array of 8-bit masks that make up the don't care mask
227 * @nm: array of 8-bit masks that make up the never match mask
228 * @off: the offset of the first byte in the key to update
229 * @len: the number of bytes in the key update
230 *
231 * This function generates a key from a value, a don't care mask and a never
232 * match mask.
233 * upd, dc, and nm are optional parameters, and can be NULL:
234 * upd == NULL --> upd mask is all 1's (update all bits)
235 * dc == NULL --> dc mask is all 0's (no don't care bits)
236 * nm == NULL --> nm mask is all 0's (no never match bits)
237 */
238static int
239ice_set_key(u8 *key, u16 size, u8 *val, u8 *upd, u8 *dc, u8 *nm, u16 off,
240 u16 len)
241{
242 u16 half_size;
243 u16 i;
244
245 /* size must be a multiple of 2 bytes. */
246 if (size % 2)
247 return -EIO;
248
249 half_size = size / 2;
250 if (off + len > half_size)
251 return -EIO;
252
253 /* Make sure at most one bit is set in the never match mask. Having more
254 * than one never match mask bit set will cause HW to consume excessive
255 * power otherwise; this is a power management efficiency check.
256 */
257#define ICE_NVR_MTCH_BITS_MAX 1
258 if (nm && !ice_bits_max_set(nm, len, ICE_NVR_MTCH_BITS_MAX))
259 return -EIO;
260
261 for (i = 0; i < len; i++)
262 if (ice_gen_key_word(val[i], upd ? upd[i] : 0xff,
263 dc ? dc[i] : 0, nm ? nm[i] : 0,
264 key + off + i, key + half_size + off + i))
265 return -EIO;
266
267 return 0;
268}
269
270/**
271 * ice_acquire_change_lock
272 * @hw: pointer to the HW structure
273 * @access: access type (read or write)
274 *
275 * This function will request ownership of the change lock.
276 */
277int
278ice_acquire_change_lock(struct ice_hw *hw, enum ice_aq_res_access_type access)
279{
280 return ice_acquire_res(hw, ICE_CHANGE_LOCK_RES_ID, access,
281 ICE_CHANGE_LOCK_TIMEOUT);
282}
283
284/**
285 * ice_release_change_lock
286 * @hw: pointer to the HW structure
287 *
288 * This function will release the change lock using the proper Admin Command.
289 */
290void ice_release_change_lock(struct ice_hw *hw)
291{
292 ice_release_res(hw, ICE_CHANGE_LOCK_RES_ID);
293}
294
295/**
296 * ice_get_open_tunnel_port - retrieve an open tunnel port
297 * @hw: pointer to the HW structure
298 * @port: returns open port
299 * @type: type of tunnel, can be TNL_LAST if it doesn't matter
300 */
301bool
302ice_get_open_tunnel_port(struct ice_hw *hw, u16 *port,
303 enum ice_tunnel_type type)
304{
305 bool res = false;
306 u16 i;
307
308 mutex_lock(&hw->tnl_lock);
309
310 for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++)
311 if (hw->tnl.tbl[i].valid && hw->tnl.tbl[i].port &&
312 (type == TNL_LAST || type == hw->tnl.tbl[i].type)) {
313 *port = hw->tnl.tbl[i].port;
314 res = true;
315 break;
316 }
317
318 mutex_unlock(&hw->tnl_lock);
319
320 return res;
321}
322
323/**
324 * ice_upd_dvm_boost_entry
325 * @hw: pointer to the HW structure
326 * @entry: pointer to double vlan boost entry info
327 */
328static int
329ice_upd_dvm_boost_entry(struct ice_hw *hw, struct ice_dvm_entry *entry)
330{
331 struct ice_boost_tcam_section *sect_rx, *sect_tx;
332 int status = -ENOSPC;
333 struct ice_buf_build *bld;
334 u8 val, dc, nm;
335
336 bld = ice_pkg_buf_alloc(hw);
337 if (!bld)
338 return -ENOMEM;
339
340 /* allocate 2 sections, one for Rx parser, one for Tx parser */
341 if (ice_pkg_buf_reserve_section(bld, 2))
342 goto ice_upd_dvm_boost_entry_err;
343
344 sect_rx = ice_pkg_buf_alloc_section(bld, ICE_SID_RXPARSER_BOOST_TCAM,
345 struct_size(sect_rx, tcam, 1));
346 if (!sect_rx)
347 goto ice_upd_dvm_boost_entry_err;
348 sect_rx->count = cpu_to_le16(1);
349
350 sect_tx = ice_pkg_buf_alloc_section(bld, ICE_SID_TXPARSER_BOOST_TCAM,
351 struct_size(sect_tx, tcam, 1));
352 if (!sect_tx)
353 goto ice_upd_dvm_boost_entry_err;
354 sect_tx->count = cpu_to_le16(1);
355
356 /* copy original boost entry to update package buffer */
357 memcpy(sect_rx->tcam, entry->boost_entry, sizeof(*sect_rx->tcam));
358
359 /* re-write the don't care and never match bits accordingly */
360 if (entry->enable) {
361 /* all bits are don't care */
362 val = 0x00;
363 dc = 0xFF;
364 nm = 0x00;
365 } else {
366 /* disable, one never match bit, the rest are don't care */
367 val = 0x00;
368 dc = 0xF7;
369 nm = 0x08;
370 }
371
372 ice_set_key((u8 *)§_rx->tcam[0].key, sizeof(sect_rx->tcam[0].key),
373 &val, NULL, &dc, &nm, 0, sizeof(u8));
374
375 /* exact copy of entry to Tx section entry */
376 memcpy(sect_tx->tcam, sect_rx->tcam, sizeof(*sect_tx->tcam));
377
378 status = ice_update_pkg_no_lock(hw, ice_pkg_buf(bld), 1);
379
380ice_upd_dvm_boost_entry_err:
381 ice_pkg_buf_free(hw, bld);
382
383 return status;
384}
385
386/**
387 * ice_set_dvm_boost_entries
388 * @hw: pointer to the HW structure
389 *
390 * Enable double vlan by updating the appropriate boost tcam entries.
391 */
392int ice_set_dvm_boost_entries(struct ice_hw *hw)
393{
394 u16 i;
395
396 for (i = 0; i < hw->dvm_upd.count; i++) {
397 int status;
398
399 status = ice_upd_dvm_boost_entry(hw, &hw->dvm_upd.tbl[i]);
400 if (status)
401 return status;
402 }
403
404 return 0;
405}
406
407/**
408 * ice_tunnel_idx_to_entry - convert linear index to the sparse one
409 * @hw: pointer to the HW structure
410 * @type: type of tunnel
411 * @idx: linear index
412 *
413 * Stack assumes we have 2 linear tables with indexes [0, count_valid),
414 * but really the port table may be sprase, and types are mixed, so convert
415 * the stack index into the device index.
416 */
417static u16 ice_tunnel_idx_to_entry(struct ice_hw *hw, enum ice_tunnel_type type,
418 u16 idx)
419{
420 u16 i;
421
422 for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++)
423 if (hw->tnl.tbl[i].valid &&
424 hw->tnl.tbl[i].type == type &&
425 idx-- == 0)
426 return i;
427
428 WARN_ON_ONCE(1);
429 return 0;
430}
431
432/**
433 * ice_create_tunnel
434 * @hw: pointer to the HW structure
435 * @index: device table entry
436 * @type: type of tunnel
437 * @port: port of tunnel to create
438 *
439 * Create a tunnel by updating the parse graph in the parser. We do that by
440 * creating a package buffer with the tunnel info and issuing an update package
441 * command.
442 */
443static int
444ice_create_tunnel(struct ice_hw *hw, u16 index,
445 enum ice_tunnel_type type, u16 port)
446{
447 struct ice_boost_tcam_section *sect_rx, *sect_tx;
448 struct ice_buf_build *bld;
449 int status = -ENOSPC;
450
451 mutex_lock(&hw->tnl_lock);
452
453 bld = ice_pkg_buf_alloc(hw);
454 if (!bld) {
455 status = -ENOMEM;
456 goto ice_create_tunnel_end;
457 }
458
459 /* allocate 2 sections, one for Rx parser, one for Tx parser */
460 if (ice_pkg_buf_reserve_section(bld, 2))
461 goto ice_create_tunnel_err;
462
463 sect_rx = ice_pkg_buf_alloc_section(bld, ICE_SID_RXPARSER_BOOST_TCAM,
464 struct_size(sect_rx, tcam, 1));
465 if (!sect_rx)
466 goto ice_create_tunnel_err;
467 sect_rx->count = cpu_to_le16(1);
468
469 sect_tx = ice_pkg_buf_alloc_section(bld, ICE_SID_TXPARSER_BOOST_TCAM,
470 struct_size(sect_tx, tcam, 1));
471 if (!sect_tx)
472 goto ice_create_tunnel_err;
473 sect_tx->count = cpu_to_le16(1);
474
475 /* copy original boost entry to update package buffer */
476 memcpy(sect_rx->tcam, hw->tnl.tbl[index].boost_entry,
477 sizeof(*sect_rx->tcam));
478
479 /* over-write the never-match dest port key bits with the encoded port
480 * bits
481 */
482 ice_set_key((u8 *)§_rx->tcam[0].key, sizeof(sect_rx->tcam[0].key),
483 (u8 *)&port, NULL, NULL, NULL,
484 (u16)offsetof(struct ice_boost_key_value, hv_dst_port_key),
485 sizeof(sect_rx->tcam[0].key.key.hv_dst_port_key));
486
487 /* exact copy of entry to Tx section entry */
488 memcpy(sect_tx->tcam, sect_rx->tcam, sizeof(*sect_tx->tcam));
489
490 status = ice_update_pkg(hw, ice_pkg_buf(bld), 1);
491 if (!status)
492 hw->tnl.tbl[index].port = port;
493
494ice_create_tunnel_err:
495 ice_pkg_buf_free(hw, bld);
496
497ice_create_tunnel_end:
498 mutex_unlock(&hw->tnl_lock);
499
500 return status;
501}
502
503/**
504 * ice_destroy_tunnel
505 * @hw: pointer to the HW structure
506 * @index: device table entry
507 * @type: type of tunnel
508 * @port: port of tunnel to destroy (ignored if the all parameter is true)
509 *
510 * Destroys a tunnel or all tunnels by creating an update package buffer
511 * targeting the specific updates requested and then performing an update
512 * package.
513 */
514static int
515ice_destroy_tunnel(struct ice_hw *hw, u16 index, enum ice_tunnel_type type,
516 u16 port)
517{
518 struct ice_boost_tcam_section *sect_rx, *sect_tx;
519 struct ice_buf_build *bld;
520 int status = -ENOSPC;
521
522 mutex_lock(&hw->tnl_lock);
523
524 if (WARN_ON(!hw->tnl.tbl[index].valid ||
525 hw->tnl.tbl[index].type != type ||
526 hw->tnl.tbl[index].port != port)) {
527 status = -EIO;
528 goto ice_destroy_tunnel_end;
529 }
530
531 bld = ice_pkg_buf_alloc(hw);
532 if (!bld) {
533 status = -ENOMEM;
534 goto ice_destroy_tunnel_end;
535 }
536
537 /* allocate 2 sections, one for Rx parser, one for Tx parser */
538 if (ice_pkg_buf_reserve_section(bld, 2))
539 goto ice_destroy_tunnel_err;
540
541 sect_rx = ice_pkg_buf_alloc_section(bld, ICE_SID_RXPARSER_BOOST_TCAM,
542 struct_size(sect_rx, tcam, 1));
543 if (!sect_rx)
544 goto ice_destroy_tunnel_err;
545 sect_rx->count = cpu_to_le16(1);
546
547 sect_tx = ice_pkg_buf_alloc_section(bld, ICE_SID_TXPARSER_BOOST_TCAM,
548 struct_size(sect_tx, tcam, 1));
549 if (!sect_tx)
550 goto ice_destroy_tunnel_err;
551 sect_tx->count = cpu_to_le16(1);
552
553 /* copy original boost entry to update package buffer, one copy to Rx
554 * section, another copy to the Tx section
555 */
556 memcpy(sect_rx->tcam, hw->tnl.tbl[index].boost_entry,
557 sizeof(*sect_rx->tcam));
558 memcpy(sect_tx->tcam, hw->tnl.tbl[index].boost_entry,
559 sizeof(*sect_tx->tcam));
560
561 status = ice_update_pkg(hw, ice_pkg_buf(bld), 1);
562 if (!status)
563 hw->tnl.tbl[index].port = 0;
564
565ice_destroy_tunnel_err:
566 ice_pkg_buf_free(hw, bld);
567
568ice_destroy_tunnel_end:
569 mutex_unlock(&hw->tnl_lock);
570
571 return status;
572}
573
574int ice_udp_tunnel_set_port(struct net_device *netdev, unsigned int table,
575 unsigned int idx, struct udp_tunnel_info *ti)
576{
577 struct ice_netdev_priv *np = netdev_priv(netdev);
578 struct ice_vsi *vsi = np->vsi;
579 struct ice_pf *pf = vsi->back;
580 enum ice_tunnel_type tnl_type;
581 int status;
582 u16 index;
583
584 tnl_type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? TNL_VXLAN : TNL_GENEVE;
585 index = ice_tunnel_idx_to_entry(&pf->hw, tnl_type, idx);
586
587 status = ice_create_tunnel(&pf->hw, index, tnl_type, ntohs(ti->port));
588 if (status) {
589 netdev_err(netdev, "Error adding UDP tunnel - %d\n",
590 status);
591 return -EIO;
592 }
593
594 udp_tunnel_nic_set_port_priv(netdev, table, idx, index);
595 return 0;
596}
597
598int ice_udp_tunnel_unset_port(struct net_device *netdev, unsigned int table,
599 unsigned int idx, struct udp_tunnel_info *ti)
600{
601 struct ice_netdev_priv *np = netdev_priv(netdev);
602 struct ice_vsi *vsi = np->vsi;
603 struct ice_pf *pf = vsi->back;
604 enum ice_tunnel_type tnl_type;
605 int status;
606
607 tnl_type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? TNL_VXLAN : TNL_GENEVE;
608
609 status = ice_destroy_tunnel(&pf->hw, ti->hw_priv, tnl_type,
610 ntohs(ti->port));
611 if (status) {
612 netdev_err(netdev, "Error removing UDP tunnel - %d\n",
613 status);
614 return -EIO;
615 }
616
617 return 0;
618}
619
620/**
621 * ice_find_prot_off - find prot ID and offset pair, based on prof and FV index
622 * @hw: pointer to the hardware structure
623 * @blk: hardware block
624 * @prof: profile ID
625 * @fv_idx: field vector word index
626 * @prot: variable to receive the protocol ID
627 * @off: variable to receive the protocol offset
628 */
629int
630ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 fv_idx,
631 u8 *prot, u16 *off)
632{
633 struct ice_fv_word *fv_ext;
634
635 if (prof >= hw->blk[blk].es.count)
636 return -EINVAL;
637
638 if (fv_idx >= hw->blk[blk].es.fvw)
639 return -EINVAL;
640
641 fv_ext = hw->blk[blk].es.t + (prof * hw->blk[blk].es.fvw);
642
643 *prot = fv_ext[fv_idx].prot_id;
644 *off = fv_ext[fv_idx].off;
645
646 return 0;
647}
648
649/* PTG Management */
650
651/**
652 * ice_ptg_find_ptype - Search for packet type group using packet type (ptype)
653 * @hw: pointer to the hardware structure
654 * @blk: HW block
655 * @ptype: the ptype to search for
656 * @ptg: pointer to variable that receives the PTG
657 *
658 * This function will search the PTGs for a particular ptype, returning the
659 * PTG ID that contains it through the PTG parameter, with the value of
660 * ICE_DEFAULT_PTG (0) meaning it is part the default PTG.
661 */
662static int
663ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg)
664{
665 if (ptype >= ICE_XLT1_CNT || !ptg)
666 return -EINVAL;
667
668 *ptg = hw->blk[blk].xlt1.ptypes[ptype].ptg;
669 return 0;
670}
671
672/**
673 * ice_ptg_alloc_val - Allocates a new packet type group ID by value
674 * @hw: pointer to the hardware structure
675 * @blk: HW block
676 * @ptg: the PTG to allocate
677 *
678 * This function allocates a given packet type group ID specified by the PTG
679 * parameter.
680 */
681static void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg)
682{
683 hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true;
684}
685
686/**
687 * ice_ptg_remove_ptype - Removes ptype from a particular packet type group
688 * @hw: pointer to the hardware structure
689 * @blk: HW block
690 * @ptype: the ptype to remove
691 * @ptg: the PTG to remove the ptype from
692 *
693 * This function will remove the ptype from the specific PTG, and move it to
694 * the default PTG (ICE_DEFAULT_PTG).
695 */
696static int
697ice_ptg_remove_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
698{
699 struct ice_ptg_ptype **ch;
700 struct ice_ptg_ptype *p;
701
702 if (ptype > ICE_XLT1_CNT - 1)
703 return -EINVAL;
704
705 if (!hw->blk[blk].xlt1.ptg_tbl[ptg].in_use)
706 return -ENOENT;
707
708 /* Should not happen if .in_use is set, bad config */
709 if (!hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype)
710 return -EIO;
711
712 /* find the ptype within this PTG, and bypass the link over it */
713 p = hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;
714 ch = &hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;
715 while (p) {
716 if (ptype == (p - hw->blk[blk].xlt1.ptypes)) {
717 *ch = p->next_ptype;
718 break;
719 }
720
721 ch = &p->next_ptype;
722 p = p->next_ptype;
723 }
724
725 hw->blk[blk].xlt1.ptypes[ptype].ptg = ICE_DEFAULT_PTG;
726 hw->blk[blk].xlt1.ptypes[ptype].next_ptype = NULL;
727
728 return 0;
729}
730
731/**
732 * ice_ptg_add_mv_ptype - Adds/moves ptype to a particular packet type group
733 * @hw: pointer to the hardware structure
734 * @blk: HW block
735 * @ptype: the ptype to add or move
736 * @ptg: the PTG to add or move the ptype to
737 *
738 * This function will either add or move a ptype to a particular PTG depending
739 * on if the ptype is already part of another group. Note that using a
740 * destination PTG ID of ICE_DEFAULT_PTG (0) will move the ptype to the
741 * default PTG.
742 */
743static int
744ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
745{
746 u8 original_ptg;
747 int status;
748
749 if (ptype > ICE_XLT1_CNT - 1)
750 return -EINVAL;
751
752 if (!hw->blk[blk].xlt1.ptg_tbl[ptg].in_use && ptg != ICE_DEFAULT_PTG)
753 return -ENOENT;
754
755 status = ice_ptg_find_ptype(hw, blk, ptype, &original_ptg);
756 if (status)
757 return status;
758
759 /* Is ptype already in the correct PTG? */
760 if (original_ptg == ptg)
761 return 0;
762
763 /* Remove from original PTG and move back to the default PTG */
764 if (original_ptg != ICE_DEFAULT_PTG)
765 ice_ptg_remove_ptype(hw, blk, ptype, original_ptg);
766
767 /* Moving to default PTG? Then we're done with this request */
768 if (ptg == ICE_DEFAULT_PTG)
769 return 0;
770
771 /* Add ptype to PTG at beginning of list */
772 hw->blk[blk].xlt1.ptypes[ptype].next_ptype =
773 hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;
774 hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype =
775 &hw->blk[blk].xlt1.ptypes[ptype];
776
777 hw->blk[blk].xlt1.ptypes[ptype].ptg = ptg;
778 hw->blk[blk].xlt1.t[ptype] = ptg;
779
780 return 0;
781}
782
783/* Block / table size info */
784struct ice_blk_size_details {
785 u16 xlt1; /* # XLT1 entries */
786 u16 xlt2; /* # XLT2 entries */
787 u16 prof_tcam; /* # profile ID TCAM entries */
788 u16 prof_id; /* # profile IDs */
789 u8 prof_cdid_bits; /* # CDID one-hot bits used in key */
790 u16 prof_redir; /* # profile redirection entries */
791 u16 es; /* # extraction sequence entries */
792 u16 fvw; /* # field vector words */
793 u8 overwrite; /* overwrite existing entries allowed */
794 u8 reverse; /* reverse FV order */
795};
796
797static const struct ice_blk_size_details blk_sizes[ICE_BLK_COUNT] = {
798 /**
799 * Table Definitions
800 * XLT1 - Number of entries in XLT1 table
801 * XLT2 - Number of entries in XLT2 table
802 * TCAM - Number of entries Profile ID TCAM table
803 * CDID - Control Domain ID of the hardware block
804 * PRED - Number of entries in the Profile Redirection Table
805 * FV - Number of entries in the Field Vector
806 * FVW - Width (in WORDs) of the Field Vector
807 * OVR - Overwrite existing table entries
808 * REV - Reverse FV
809 */
810 /* XLT1 , XLT2 ,TCAM, PID,CDID,PRED, FV, FVW */
811 /* Overwrite , Reverse FV */
812 /* SW */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 256, 0, 256, 256, 48,
813 false, false },
814 /* ACL */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 32,
815 false, false },
816 /* FD */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 24,
817 false, true },
818 /* RSS */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 24,
819 true, true },
820 /* PE */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 64, 32, 0, 32, 32, 24,
821 false, false },
822};
823
824enum ice_sid_all {
825 ICE_SID_XLT1_OFF = 0,
826 ICE_SID_XLT2_OFF,
827 ICE_SID_PR_OFF,
828 ICE_SID_PR_REDIR_OFF,
829 ICE_SID_ES_OFF,
830 ICE_SID_OFF_COUNT,
831};
832
833/* Characteristic handling */
834
835/**
836 * ice_match_prop_lst - determine if properties of two lists match
837 * @list1: first properties list
838 * @list2: second properties list
839 *
840 * Count, cookies and the order must match in order to be considered equivalent.
841 */
842static bool
843ice_match_prop_lst(struct list_head *list1, struct list_head *list2)
844{
845 struct ice_vsig_prof *tmp1;
846 struct ice_vsig_prof *tmp2;
847 u16 chk_count = 0;
848 u16 count = 0;
849
850 /* compare counts */
851 list_for_each_entry(tmp1, list1, list)
852 count++;
853 list_for_each_entry(tmp2, list2, list)
854 chk_count++;
855 if (!count || count != chk_count)
856 return false;
857
858 tmp1 = list_first_entry(list1, struct ice_vsig_prof, list);
859 tmp2 = list_first_entry(list2, struct ice_vsig_prof, list);
860
861 /* profile cookies must compare, and in the exact same order to take
862 * into account priority
863 */
864 while (count--) {
865 if (tmp2->profile_cookie != tmp1->profile_cookie)
866 return false;
867
868 tmp1 = list_next_entry(tmp1, list);
869 tmp2 = list_next_entry(tmp2, list);
870 }
871
872 return true;
873}
874
875/* VSIG Management */
876
877/**
878 * ice_vsig_find_vsi - find a VSIG that contains a specified VSI
879 * @hw: pointer to the hardware structure
880 * @blk: HW block
881 * @vsi: VSI of interest
882 * @vsig: pointer to receive the VSI group
883 *
884 * This function will lookup the VSI entry in the XLT2 list and return
885 * the VSI group its associated with.
886 */
887static int
888ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
889{
890 if (!vsig || vsi >= ICE_MAX_VSI)
891 return -EINVAL;
892
893 /* As long as there's a default or valid VSIG associated with the input
894 * VSI, the functions returns a success. Any handling of VSIG will be
895 * done by the following add, update or remove functions.
896 */
897 *vsig = hw->blk[blk].xlt2.vsis[vsi].vsig;
898
899 return 0;
900}
901
902/**
903 * ice_vsig_alloc_val - allocate a new VSIG by value
904 * @hw: pointer to the hardware structure
905 * @blk: HW block
906 * @vsig: the VSIG to allocate
907 *
908 * This function will allocate a given VSIG specified by the VSIG parameter.
909 */
910static u16 ice_vsig_alloc_val(struct ice_hw *hw, enum ice_block blk, u16 vsig)
911{
912 u16 idx = vsig & ICE_VSIG_IDX_M;
913
914 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use) {
915 INIT_LIST_HEAD(&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst);
916 hw->blk[blk].xlt2.vsig_tbl[idx].in_use = true;
917 }
918
919 return ICE_VSIG_VALUE(idx, hw->pf_id);
920}
921
922/**
923 * ice_vsig_alloc - Finds a free entry and allocates a new VSIG
924 * @hw: pointer to the hardware structure
925 * @blk: HW block
926 *
927 * This function will iterate through the VSIG list and mark the first
928 * unused entry for the new VSIG entry as used and return that value.
929 */
930static u16 ice_vsig_alloc(struct ice_hw *hw, enum ice_block blk)
931{
932 u16 i;
933
934 for (i = 1; i < ICE_MAX_VSIGS; i++)
935 if (!hw->blk[blk].xlt2.vsig_tbl[i].in_use)
936 return ice_vsig_alloc_val(hw, blk, i);
937
938 return ICE_DEFAULT_VSIG;
939}
940
941/**
942 * ice_find_dup_props_vsig - find VSI group with a specified set of properties
943 * @hw: pointer to the hardware structure
944 * @blk: HW block
945 * @chs: characteristic list
946 * @vsig: returns the VSIG with the matching profiles, if found
947 *
948 * Each VSIG is associated with a characteristic set; i.e. all VSIs under
949 * a group have the same characteristic set. To check if there exists a VSIG
950 * which has the same characteristics as the input characteristics; this
951 * function will iterate through the XLT2 list and return the VSIG that has a
952 * matching configuration. In order to make sure that priorities are accounted
953 * for, the list must match exactly, including the order in which the
954 * characteristics are listed.
955 */
956static int
957ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
958 struct list_head *chs, u16 *vsig)
959{
960 struct ice_xlt2 *xlt2 = &hw->blk[blk].xlt2;
961 u16 i;
962
963 for (i = 0; i < xlt2->count; i++)
964 if (xlt2->vsig_tbl[i].in_use &&
965 ice_match_prop_lst(chs, &xlt2->vsig_tbl[i].prop_lst)) {
966 *vsig = ICE_VSIG_VALUE(i, hw->pf_id);
967 return 0;
968 }
969
970 return -ENOENT;
971}
972
973/**
974 * ice_vsig_free - free VSI group
975 * @hw: pointer to the hardware structure
976 * @blk: HW block
977 * @vsig: VSIG to remove
978 *
979 * The function will remove all VSIs associated with the input VSIG and move
980 * them to the DEFAULT_VSIG and mark the VSIG available.
981 */
982static int ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
983{
984 struct ice_vsig_prof *dtmp, *del;
985 struct ice_vsig_vsi *vsi_cur;
986 u16 idx;
987
988 idx = vsig & ICE_VSIG_IDX_M;
989 if (idx >= ICE_MAX_VSIGS)
990 return -EINVAL;
991
992 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
993 return -ENOENT;
994
995 hw->blk[blk].xlt2.vsig_tbl[idx].in_use = false;
996
997 vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
998 /* If the VSIG has at least 1 VSI then iterate through the
999 * list and remove the VSIs before deleting the group.
1000 */
1001 if (vsi_cur) {
1002 /* remove all vsis associated with this VSIG XLT2 entry */
1003 do {
1004 struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
1005
1006 vsi_cur->vsig = ICE_DEFAULT_VSIG;
1007 vsi_cur->changed = 1;
1008 vsi_cur->next_vsi = NULL;
1009 vsi_cur = tmp;
1010 } while (vsi_cur);
1011
1012 /* NULL terminate head of VSI list */
1013 hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
1014 }
1015
1016 /* free characteristic list */
1017 list_for_each_entry_safe(del, dtmp,
1018 &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
1019 list) {
1020 list_del(&del->list);
1021 devm_kfree(ice_hw_to_dev(hw), del);
1022 }
1023
1024 /* if VSIG characteristic list was cleared for reset
1025 * re-initialize the list head
1026 */
1027 INIT_LIST_HEAD(&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst);
1028
1029 return 0;
1030}
1031
1032/**
1033 * ice_vsig_remove_vsi - remove VSI from VSIG
1034 * @hw: pointer to the hardware structure
1035 * @blk: HW block
1036 * @vsi: VSI to remove
1037 * @vsig: VSI group to remove from
1038 *
1039 * The function will remove the input VSI from its VSI group and move it
1040 * to the DEFAULT_VSIG.
1041 */
1042static int
1043ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
1044{
1045 struct ice_vsig_vsi **vsi_head, *vsi_cur, *vsi_tgt;
1046 u16 idx;
1047
1048 idx = vsig & ICE_VSIG_IDX_M;
1049
1050 if (vsi >= ICE_MAX_VSI || idx >= ICE_MAX_VSIGS)
1051 return -EINVAL;
1052
1053 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
1054 return -ENOENT;
1055
1056 /* entry already in default VSIG, don't have to remove */
1057 if (idx == ICE_DEFAULT_VSIG)
1058 return 0;
1059
1060 vsi_head = &hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
1061 if (!(*vsi_head))
1062 return -EIO;
1063
1064 vsi_tgt = &hw->blk[blk].xlt2.vsis[vsi];
1065 vsi_cur = (*vsi_head);
1066
1067 /* iterate the VSI list, skip over the entry to be removed */
1068 while (vsi_cur) {
1069 if (vsi_tgt == vsi_cur) {
1070 (*vsi_head) = vsi_cur->next_vsi;
1071 break;
1072 }
1073 vsi_head = &vsi_cur->next_vsi;
1074 vsi_cur = vsi_cur->next_vsi;
1075 }
1076
1077 /* verify if VSI was removed from group list */
1078 if (!vsi_cur)
1079 return -ENOENT;
1080
1081 vsi_cur->vsig = ICE_DEFAULT_VSIG;
1082 vsi_cur->changed = 1;
1083 vsi_cur->next_vsi = NULL;
1084
1085 return 0;
1086}
1087
1088/**
1089 * ice_vsig_add_mv_vsi - add or move a VSI to a VSI group
1090 * @hw: pointer to the hardware structure
1091 * @blk: HW block
1092 * @vsi: VSI to move
1093 * @vsig: destination VSI group
1094 *
1095 * This function will move or add the input VSI to the target VSIG.
1096 * The function will find the original VSIG the VSI belongs to and
1097 * move the entry to the DEFAULT_VSIG, update the original VSIG and
1098 * then move entry to the new VSIG.
1099 */
1100static int
1101ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
1102{
1103 struct ice_vsig_vsi *tmp;
1104 u16 orig_vsig, idx;
1105 int status;
1106
1107 idx = vsig & ICE_VSIG_IDX_M;
1108
1109 if (vsi >= ICE_MAX_VSI || idx >= ICE_MAX_VSIGS)
1110 return -EINVAL;
1111
1112 /* if VSIG not in use and VSIG is not default type this VSIG
1113 * doesn't exist.
1114 */
1115 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use &&
1116 vsig != ICE_DEFAULT_VSIG)
1117 return -ENOENT;
1118
1119 status = ice_vsig_find_vsi(hw, blk, vsi, &orig_vsig);
1120 if (status)
1121 return status;
1122
1123 /* no update required if vsigs match */
1124 if (orig_vsig == vsig)
1125 return 0;
1126
1127 if (orig_vsig != ICE_DEFAULT_VSIG) {
1128 /* remove entry from orig_vsig and add to default VSIG */
1129 status = ice_vsig_remove_vsi(hw, blk, vsi, orig_vsig);
1130 if (status)
1131 return status;
1132 }
1133
1134 if (idx == ICE_DEFAULT_VSIG)
1135 return 0;
1136
1137 /* Create VSI entry and add VSIG and prop_mask values */
1138 hw->blk[blk].xlt2.vsis[vsi].vsig = vsig;
1139 hw->blk[blk].xlt2.vsis[vsi].changed = 1;
1140
1141 /* Add new entry to the head of the VSIG list */
1142 tmp = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
1143 hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi =
1144 &hw->blk[blk].xlt2.vsis[vsi];
1145 hw->blk[blk].xlt2.vsis[vsi].next_vsi = tmp;
1146 hw->blk[blk].xlt2.t[vsi] = vsig;
1147
1148 return 0;
1149}
1150
1151/**
1152 * ice_prof_has_mask_idx - determine if profile index masking is identical
1153 * @hw: pointer to the hardware structure
1154 * @blk: HW block
1155 * @prof: profile to check
1156 * @idx: profile index to check
1157 * @mask: mask to match
1158 */
1159static bool
1160ice_prof_has_mask_idx(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 idx,
1161 u16 mask)
1162{
1163 bool expect_no_mask = false;
1164 bool found = false;
1165 bool match = false;
1166 u16 i;
1167
1168 /* If mask is 0x0000 or 0xffff, then there is no masking */
1169 if (mask == 0 || mask == 0xffff)
1170 expect_no_mask = true;
1171
1172 /* Scan the enabled masks on this profile, for the specified idx */
1173 for (i = hw->blk[blk].masks.first; i < hw->blk[blk].masks.first +
1174 hw->blk[blk].masks.count; i++)
1175 if (hw->blk[blk].es.mask_ena[prof] & BIT(i))
1176 if (hw->blk[blk].masks.masks[i].in_use &&
1177 hw->blk[blk].masks.masks[i].idx == idx) {
1178 found = true;
1179 if (hw->blk[blk].masks.masks[i].mask == mask)
1180 match = true;
1181 break;
1182 }
1183
1184 if (expect_no_mask) {
1185 if (found)
1186 return false;
1187 } else {
1188 if (!match)
1189 return false;
1190 }
1191
1192 return true;
1193}
1194
1195/**
1196 * ice_prof_has_mask - determine if profile masking is identical
1197 * @hw: pointer to the hardware structure
1198 * @blk: HW block
1199 * @prof: profile to check
1200 * @masks: masks to match
1201 */
1202static bool
1203ice_prof_has_mask(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 *masks)
1204{
1205 u16 i;
1206
1207 /* es->mask_ena[prof] will have the mask */
1208 for (i = 0; i < hw->blk[blk].es.fvw; i++)
1209 if (!ice_prof_has_mask_idx(hw, blk, prof, i, masks[i]))
1210 return false;
1211
1212 return true;
1213}
1214
1215/**
1216 * ice_find_prof_id_with_mask - find profile ID for a given field vector
1217 * @hw: pointer to the hardware structure
1218 * @blk: HW block
1219 * @fv: field vector to search for
1220 * @masks: masks for FV
1221 * @symm: symmetric setting for RSS flows
1222 * @prof_id: receives the profile ID
1223 */
1224static int
1225ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk,
1226 struct ice_fv_word *fv, u16 *masks, bool symm,
1227 u8 *prof_id)
1228{
1229 struct ice_es *es = &hw->blk[blk].es;
1230 u8 i;
1231
1232 /* For FD, we don't want to re-use a existed profile with the same
1233 * field vector and mask. This will cause rule interference.
1234 */
1235 if (blk == ICE_BLK_FD)
1236 return -ENOENT;
1237
1238 for (i = 0; i < (u8)es->count; i++) {
1239 u16 off = i * es->fvw;
1240
1241 if (blk == ICE_BLK_RSS && es->symm[i] != symm)
1242 continue;
1243
1244 if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv)))
1245 continue;
1246
1247 /* check if masks settings are the same for this profile */
1248 if (masks && !ice_prof_has_mask(hw, blk, i, masks))
1249 continue;
1250
1251 *prof_id = i;
1252 return 0;
1253 }
1254
1255 return -ENOENT;
1256}
1257
1258/**
1259 * ice_prof_id_rsrc_type - get profile ID resource type for a block type
1260 * @blk: the block type
1261 * @rsrc_type: pointer to variable to receive the resource type
1262 */
1263static bool ice_prof_id_rsrc_type(enum ice_block blk, u16 *rsrc_type)
1264{
1265 switch (blk) {
1266 case ICE_BLK_FD:
1267 *rsrc_type = ICE_AQC_RES_TYPE_FD_PROF_BLDR_PROFID;
1268 break;
1269 case ICE_BLK_RSS:
1270 *rsrc_type = ICE_AQC_RES_TYPE_HASH_PROF_BLDR_PROFID;
1271 break;
1272 default:
1273 return false;
1274 }
1275 return true;
1276}
1277
1278/**
1279 * ice_tcam_ent_rsrc_type - get TCAM entry resource type for a block type
1280 * @blk: the block type
1281 * @rsrc_type: pointer to variable to receive the resource type
1282 */
1283static bool ice_tcam_ent_rsrc_type(enum ice_block blk, u16 *rsrc_type)
1284{
1285 switch (blk) {
1286 case ICE_BLK_FD:
1287 *rsrc_type = ICE_AQC_RES_TYPE_FD_PROF_BLDR_TCAM;
1288 break;
1289 case ICE_BLK_RSS:
1290 *rsrc_type = ICE_AQC_RES_TYPE_HASH_PROF_BLDR_TCAM;
1291 break;
1292 default:
1293 return false;
1294 }
1295 return true;
1296}
1297
1298/**
1299 * ice_alloc_tcam_ent - allocate hardware TCAM entry
1300 * @hw: pointer to the HW struct
1301 * @blk: the block to allocate the TCAM for
1302 * @btm: true to allocate from bottom of table, false to allocate from top
1303 * @tcam_idx: pointer to variable to receive the TCAM entry
1304 *
1305 * This function allocates a new entry in a Profile ID TCAM for a specific
1306 * block.
1307 */
1308static int
1309ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, bool btm,
1310 u16 *tcam_idx)
1311{
1312 u16 res_type;
1313
1314 if (!ice_tcam_ent_rsrc_type(blk, &res_type))
1315 return -EINVAL;
1316
1317 return ice_alloc_hw_res(hw, res_type, 1, btm, tcam_idx);
1318}
1319
1320/**
1321 * ice_free_tcam_ent - free hardware TCAM entry
1322 * @hw: pointer to the HW struct
1323 * @blk: the block from which to free the TCAM entry
1324 * @tcam_idx: the TCAM entry to free
1325 *
1326 * This function frees an entry in a Profile ID TCAM for a specific block.
1327 */
1328static int
1329ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
1330{
1331 u16 res_type;
1332
1333 if (!ice_tcam_ent_rsrc_type(blk, &res_type))
1334 return -EINVAL;
1335
1336 return ice_free_hw_res(hw, res_type, 1, &tcam_idx);
1337}
1338
1339/**
1340 * ice_alloc_prof_id - allocate profile ID
1341 * @hw: pointer to the HW struct
1342 * @blk: the block to allocate the profile ID for
1343 * @prof_id: pointer to variable to receive the profile ID
1344 *
1345 * This function allocates a new profile ID, which also corresponds to a Field
1346 * Vector (Extraction Sequence) entry.
1347 */
1348static int ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
1349{
1350 u16 res_type;
1351 u16 get_prof;
1352 int status;
1353
1354 if (!ice_prof_id_rsrc_type(blk, &res_type))
1355 return -EINVAL;
1356
1357 status = ice_alloc_hw_res(hw, res_type, 1, false, &get_prof);
1358 if (!status)
1359 *prof_id = (u8)get_prof;
1360
1361 return status;
1362}
1363
1364/**
1365 * ice_free_prof_id - free profile ID
1366 * @hw: pointer to the HW struct
1367 * @blk: the block from which to free the profile ID
1368 * @prof_id: the profile ID to free
1369 *
1370 * This function frees a profile ID, which also corresponds to a Field Vector.
1371 */
1372static int ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
1373{
1374 u16 tmp_prof_id = (u16)prof_id;
1375 u16 res_type;
1376
1377 if (!ice_prof_id_rsrc_type(blk, &res_type))
1378 return -EINVAL;
1379
1380 return ice_free_hw_res(hw, res_type, 1, &tmp_prof_id);
1381}
1382
1383/**
1384 * ice_prof_inc_ref - increment reference count for profile
1385 * @hw: pointer to the HW struct
1386 * @blk: the block from which to free the profile ID
1387 * @prof_id: the profile ID for which to increment the reference count
1388 */
1389static int ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
1390{
1391 if (prof_id > hw->blk[blk].es.count)
1392 return -EINVAL;
1393
1394 hw->blk[blk].es.ref_count[prof_id]++;
1395
1396 return 0;
1397}
1398
1399/**
1400 * ice_write_prof_mask_reg - write profile mask register
1401 * @hw: pointer to the HW struct
1402 * @blk: hardware block
1403 * @mask_idx: mask index
1404 * @idx: index of the FV which will use the mask
1405 * @mask: the 16-bit mask
1406 */
1407static void
1408ice_write_prof_mask_reg(struct ice_hw *hw, enum ice_block blk, u16 mask_idx,
1409 u16 idx, u16 mask)
1410{
1411 u32 offset;
1412 u32 val;
1413
1414 switch (blk) {
1415 case ICE_BLK_RSS:
1416 offset = GLQF_HMASK(mask_idx);
1417 val = FIELD_PREP(GLQF_HMASK_MSK_INDEX_M, idx);
1418 val |= FIELD_PREP(GLQF_HMASK_MASK_M, mask);
1419 break;
1420 case ICE_BLK_FD:
1421 offset = GLQF_FDMASK(mask_idx);
1422 val = FIELD_PREP(GLQF_FDMASK_MSK_INDEX_M, idx);
1423 val |= FIELD_PREP(GLQF_FDMASK_MASK_M, mask);
1424 break;
1425 default:
1426 ice_debug(hw, ICE_DBG_PKG, "No profile masks for block %d\n",
1427 blk);
1428 return;
1429 }
1430
1431 wr32(hw, offset, val);
1432 ice_debug(hw, ICE_DBG_PKG, "write mask, blk %d (%d): %x = %x\n",
1433 blk, idx, offset, val);
1434}
1435
1436/**
1437 * ice_write_prof_mask_enable_res - write profile mask enable register
1438 * @hw: pointer to the HW struct
1439 * @blk: hardware block
1440 * @prof_id: profile ID
1441 * @enable_mask: enable mask
1442 */
1443static void
1444ice_write_prof_mask_enable_res(struct ice_hw *hw, enum ice_block blk,
1445 u16 prof_id, u32 enable_mask)
1446{
1447 u32 offset;
1448
1449 switch (blk) {
1450 case ICE_BLK_RSS:
1451 offset = GLQF_HMASK_SEL(prof_id);
1452 break;
1453 case ICE_BLK_FD:
1454 offset = GLQF_FDMASK_SEL(prof_id);
1455 break;
1456 default:
1457 ice_debug(hw, ICE_DBG_PKG, "No profile masks for block %d\n",
1458 blk);
1459 return;
1460 }
1461
1462 wr32(hw, offset, enable_mask);
1463 ice_debug(hw, ICE_DBG_PKG, "write mask enable, blk %d (%d): %x = %x\n",
1464 blk, prof_id, offset, enable_mask);
1465}
1466
1467/**
1468 * ice_init_prof_masks - initial prof masks
1469 * @hw: pointer to the HW struct
1470 * @blk: hardware block
1471 */
1472static void ice_init_prof_masks(struct ice_hw *hw, enum ice_block blk)
1473{
1474 u16 per_pf;
1475 u16 i;
1476
1477 mutex_init(&hw->blk[blk].masks.lock);
1478
1479 per_pf = ICE_PROF_MASK_COUNT / hw->dev_caps.num_funcs;
1480
1481 hw->blk[blk].masks.count = per_pf;
1482 hw->blk[blk].masks.first = hw->pf_id * per_pf;
1483
1484 memset(hw->blk[blk].masks.masks, 0, sizeof(hw->blk[blk].masks.masks));
1485
1486 for (i = hw->blk[blk].masks.first;
1487 i < hw->blk[blk].masks.first + hw->blk[blk].masks.count; i++)
1488 ice_write_prof_mask_reg(hw, blk, i, 0, 0);
1489}
1490
1491/**
1492 * ice_init_all_prof_masks - initialize all prof masks
1493 * @hw: pointer to the HW struct
1494 */
1495static void ice_init_all_prof_masks(struct ice_hw *hw)
1496{
1497 ice_init_prof_masks(hw, ICE_BLK_RSS);
1498 ice_init_prof_masks(hw, ICE_BLK_FD);
1499}
1500
1501/**
1502 * ice_alloc_prof_mask - allocate profile mask
1503 * @hw: pointer to the HW struct
1504 * @blk: hardware block
1505 * @idx: index of FV which will use the mask
1506 * @mask: the 16-bit mask
1507 * @mask_idx: variable to receive the mask index
1508 */
1509static int
1510ice_alloc_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 idx, u16 mask,
1511 u16 *mask_idx)
1512{
1513 bool found_unused = false, found_copy = false;
1514 u16 unused_idx = 0, copy_idx = 0;
1515 int status = -ENOSPC;
1516 u16 i;
1517
1518 if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
1519 return -EINVAL;
1520
1521 mutex_lock(&hw->blk[blk].masks.lock);
1522
1523 for (i = hw->blk[blk].masks.first;
1524 i < hw->blk[blk].masks.first + hw->blk[blk].masks.count; i++)
1525 if (hw->blk[blk].masks.masks[i].in_use) {
1526 /* if mask is in use and it exactly duplicates the
1527 * desired mask and index, then in can be reused
1528 */
1529 if (hw->blk[blk].masks.masks[i].mask == mask &&
1530 hw->blk[blk].masks.masks[i].idx == idx) {
1531 found_copy = true;
1532 copy_idx = i;
1533 break;
1534 }
1535 } else {
1536 /* save off unused index, but keep searching in case
1537 * there is an exact match later on
1538 */
1539 if (!found_unused) {
1540 found_unused = true;
1541 unused_idx = i;
1542 }
1543 }
1544
1545 if (found_copy)
1546 i = copy_idx;
1547 else if (found_unused)
1548 i = unused_idx;
1549 else
1550 goto err_ice_alloc_prof_mask;
1551
1552 /* update mask for a new entry */
1553 if (found_unused) {
1554 hw->blk[blk].masks.masks[i].in_use = true;
1555 hw->blk[blk].masks.masks[i].mask = mask;
1556 hw->blk[blk].masks.masks[i].idx = idx;
1557 hw->blk[blk].masks.masks[i].ref = 0;
1558 ice_write_prof_mask_reg(hw, blk, i, idx, mask);
1559 }
1560
1561 hw->blk[blk].masks.masks[i].ref++;
1562 *mask_idx = i;
1563 status = 0;
1564
1565err_ice_alloc_prof_mask:
1566 mutex_unlock(&hw->blk[blk].masks.lock);
1567
1568 return status;
1569}
1570
1571/**
1572 * ice_free_prof_mask - free profile mask
1573 * @hw: pointer to the HW struct
1574 * @blk: hardware block
1575 * @mask_idx: index of mask
1576 */
1577static int
1578ice_free_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 mask_idx)
1579{
1580 if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
1581 return -EINVAL;
1582
1583 if (!(mask_idx >= hw->blk[blk].masks.first &&
1584 mask_idx < hw->blk[blk].masks.first + hw->blk[blk].masks.count))
1585 return -ENOENT;
1586
1587 mutex_lock(&hw->blk[blk].masks.lock);
1588
1589 if (!hw->blk[blk].masks.masks[mask_idx].in_use)
1590 goto exit_ice_free_prof_mask;
1591
1592 if (hw->blk[blk].masks.masks[mask_idx].ref > 1) {
1593 hw->blk[blk].masks.masks[mask_idx].ref--;
1594 goto exit_ice_free_prof_mask;
1595 }
1596
1597 /* remove mask */
1598 hw->blk[blk].masks.masks[mask_idx].in_use = false;
1599 hw->blk[blk].masks.masks[mask_idx].mask = 0;
1600 hw->blk[blk].masks.masks[mask_idx].idx = 0;
1601
1602 /* update mask as unused entry */
1603 ice_debug(hw, ICE_DBG_PKG, "Free mask, blk %d, mask %d\n", blk,
1604 mask_idx);
1605 ice_write_prof_mask_reg(hw, blk, mask_idx, 0, 0);
1606
1607exit_ice_free_prof_mask:
1608 mutex_unlock(&hw->blk[blk].masks.lock);
1609
1610 return 0;
1611}
1612
1613/**
1614 * ice_free_prof_masks - free all profile masks for a profile
1615 * @hw: pointer to the HW struct
1616 * @blk: hardware block
1617 * @prof_id: profile ID
1618 */
1619static int
1620ice_free_prof_masks(struct ice_hw *hw, enum ice_block blk, u16 prof_id)
1621{
1622 u32 mask_bm;
1623 u16 i;
1624
1625 if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
1626 return -EINVAL;
1627
1628 mask_bm = hw->blk[blk].es.mask_ena[prof_id];
1629 for (i = 0; i < BITS_PER_BYTE * sizeof(mask_bm); i++)
1630 if (mask_bm & BIT(i))
1631 ice_free_prof_mask(hw, blk, i);
1632
1633 return 0;
1634}
1635
1636/**
1637 * ice_shutdown_prof_masks - releases lock for masking
1638 * @hw: pointer to the HW struct
1639 * @blk: hardware block
1640 *
1641 * This should be called before unloading the driver
1642 */
1643static void ice_shutdown_prof_masks(struct ice_hw *hw, enum ice_block blk)
1644{
1645 u16 i;
1646
1647 mutex_lock(&hw->blk[blk].masks.lock);
1648
1649 for (i = hw->blk[blk].masks.first;
1650 i < hw->blk[blk].masks.first + hw->blk[blk].masks.count; i++) {
1651 ice_write_prof_mask_reg(hw, blk, i, 0, 0);
1652
1653 hw->blk[blk].masks.masks[i].in_use = false;
1654 hw->blk[blk].masks.masks[i].idx = 0;
1655 hw->blk[blk].masks.masks[i].mask = 0;
1656 }
1657
1658 mutex_unlock(&hw->blk[blk].masks.lock);
1659 mutex_destroy(&hw->blk[blk].masks.lock);
1660}
1661
1662/**
1663 * ice_shutdown_all_prof_masks - releases all locks for masking
1664 * @hw: pointer to the HW struct
1665 *
1666 * This should be called before unloading the driver
1667 */
1668static void ice_shutdown_all_prof_masks(struct ice_hw *hw)
1669{
1670 ice_shutdown_prof_masks(hw, ICE_BLK_RSS);
1671 ice_shutdown_prof_masks(hw, ICE_BLK_FD);
1672}
1673
1674/**
1675 * ice_update_prof_masking - set registers according to masking
1676 * @hw: pointer to the HW struct
1677 * @blk: hardware block
1678 * @prof_id: profile ID
1679 * @masks: masks
1680 */
1681static int
1682ice_update_prof_masking(struct ice_hw *hw, enum ice_block blk, u16 prof_id,
1683 u16 *masks)
1684{
1685 bool err = false;
1686 u32 ena_mask = 0;
1687 u16 idx;
1688 u16 i;
1689
1690 /* Only support FD and RSS masking, otherwise nothing to be done */
1691 if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
1692 return 0;
1693
1694 for (i = 0; i < hw->blk[blk].es.fvw; i++)
1695 if (masks[i] && masks[i] != 0xFFFF) {
1696 if (!ice_alloc_prof_mask(hw, blk, i, masks[i], &idx)) {
1697 ena_mask |= BIT(idx);
1698 } else {
1699 /* not enough bitmaps */
1700 err = true;
1701 break;
1702 }
1703 }
1704
1705 if (err) {
1706 /* free any bitmaps we have allocated */
1707 for (i = 0; i < BITS_PER_BYTE * sizeof(ena_mask); i++)
1708 if (ena_mask & BIT(i))
1709 ice_free_prof_mask(hw, blk, i);
1710
1711 return -EIO;
1712 }
1713
1714 /* enable the masks for this profile */
1715 ice_write_prof_mask_enable_res(hw, blk, prof_id, ena_mask);
1716
1717 /* store enabled masks with profile so that they can be freed later */
1718 hw->blk[blk].es.mask_ena[prof_id] = ena_mask;
1719
1720 return 0;
1721}
1722
1723/**
1724 * ice_write_es - write an extraction sequence and symmetric setting to hardware
1725 * @hw: pointer to the HW struct
1726 * @blk: the block in which to write the extraction sequence
1727 * @prof_id: the profile ID to write
1728 * @fv: pointer to the extraction sequence to write - NULL to clear extraction
1729 * @symm: symmetric setting for RSS profiles
1730 */
1731static void
1732ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
1733 struct ice_fv_word *fv, bool symm)
1734{
1735 u16 off;
1736
1737 off = prof_id * hw->blk[blk].es.fvw;
1738 if (!fv) {
1739 memset(&hw->blk[blk].es.t[off], 0,
1740 hw->blk[blk].es.fvw * sizeof(*fv));
1741 hw->blk[blk].es.written[prof_id] = false;
1742 } else {
1743 memcpy(&hw->blk[blk].es.t[off], fv,
1744 hw->blk[blk].es.fvw * sizeof(*fv));
1745 }
1746
1747 if (blk == ICE_BLK_RSS)
1748 hw->blk[blk].es.symm[prof_id] = symm;
1749}
1750
1751/**
1752 * ice_prof_dec_ref - decrement reference count for profile
1753 * @hw: pointer to the HW struct
1754 * @blk: the block from which to free the profile ID
1755 * @prof_id: the profile ID for which to decrement the reference count
1756 */
1757static int
1758ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
1759{
1760 if (prof_id > hw->blk[blk].es.count)
1761 return -EINVAL;
1762
1763 if (hw->blk[blk].es.ref_count[prof_id] > 0) {
1764 if (!--hw->blk[blk].es.ref_count[prof_id]) {
1765 ice_write_es(hw, blk, prof_id, NULL, false);
1766 ice_free_prof_masks(hw, blk, prof_id);
1767 return ice_free_prof_id(hw, blk, prof_id);
1768 }
1769 }
1770
1771 return 0;
1772}
1773
1774/* Block / table section IDs */
1775static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = {
1776 /* SWITCH */
1777 { ICE_SID_XLT1_SW,
1778 ICE_SID_XLT2_SW,
1779 ICE_SID_PROFID_TCAM_SW,
1780 ICE_SID_PROFID_REDIR_SW,
1781 ICE_SID_FLD_VEC_SW
1782 },
1783
1784 /* ACL */
1785 { ICE_SID_XLT1_ACL,
1786 ICE_SID_XLT2_ACL,
1787 ICE_SID_PROFID_TCAM_ACL,
1788 ICE_SID_PROFID_REDIR_ACL,
1789 ICE_SID_FLD_VEC_ACL
1790 },
1791
1792 /* FD */
1793 { ICE_SID_XLT1_FD,
1794 ICE_SID_XLT2_FD,
1795 ICE_SID_PROFID_TCAM_FD,
1796 ICE_SID_PROFID_REDIR_FD,
1797 ICE_SID_FLD_VEC_FD
1798 },
1799
1800 /* RSS */
1801 { ICE_SID_XLT1_RSS,
1802 ICE_SID_XLT2_RSS,
1803 ICE_SID_PROFID_TCAM_RSS,
1804 ICE_SID_PROFID_REDIR_RSS,
1805 ICE_SID_FLD_VEC_RSS
1806 },
1807
1808 /* PE */
1809 { ICE_SID_XLT1_PE,
1810 ICE_SID_XLT2_PE,
1811 ICE_SID_PROFID_TCAM_PE,
1812 ICE_SID_PROFID_REDIR_PE,
1813 ICE_SID_FLD_VEC_PE
1814 }
1815};
1816
1817/**
1818 * ice_init_sw_xlt1_db - init software XLT1 database from HW tables
1819 * @hw: pointer to the hardware structure
1820 * @blk: the HW block to initialize
1821 */
1822static void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
1823{
1824 u16 pt;
1825
1826 for (pt = 0; pt < hw->blk[blk].xlt1.count; pt++) {
1827 u8 ptg;
1828
1829 ptg = hw->blk[blk].xlt1.t[pt];
1830 if (ptg != ICE_DEFAULT_PTG) {
1831 ice_ptg_alloc_val(hw, blk, ptg);
1832 ice_ptg_add_mv_ptype(hw, blk, pt, ptg);
1833 }
1834 }
1835}
1836
1837/**
1838 * ice_init_sw_xlt2_db - init software XLT2 database from HW tables
1839 * @hw: pointer to the hardware structure
1840 * @blk: the HW block to initialize
1841 */
1842static void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
1843{
1844 u16 vsi;
1845
1846 for (vsi = 0; vsi < hw->blk[blk].xlt2.count; vsi++) {
1847 u16 vsig;
1848
1849 vsig = hw->blk[blk].xlt2.t[vsi];
1850 if (vsig) {
1851 ice_vsig_alloc_val(hw, blk, vsig);
1852 ice_vsig_add_mv_vsi(hw, blk, vsi, vsig);
1853 /* no changes at this time, since this has been
1854 * initialized from the original package
1855 */
1856 hw->blk[blk].xlt2.vsis[vsi].changed = 0;
1857 }
1858 }
1859}
1860
1861/**
1862 * ice_init_sw_db - init software database from HW tables
1863 * @hw: pointer to the hardware structure
1864 */
1865static void ice_init_sw_db(struct ice_hw *hw)
1866{
1867 u16 i;
1868
1869 for (i = 0; i < ICE_BLK_COUNT; i++) {
1870 ice_init_sw_xlt1_db(hw, (enum ice_block)i);
1871 ice_init_sw_xlt2_db(hw, (enum ice_block)i);
1872 }
1873}
1874
1875/**
1876 * ice_fill_tbl - Reads content of a single table type into database
1877 * @hw: pointer to the hardware structure
1878 * @block_id: Block ID of the table to copy
1879 * @sid: Section ID of the table to copy
1880 *
1881 * Will attempt to read the entire content of a given table of a single block
1882 * into the driver database. We assume that the buffer will always
1883 * be as large or larger than the data contained in the package. If
1884 * this condition is not met, there is most likely an error in the package
1885 * contents.
1886 */
1887static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
1888{
1889 u32 dst_len, sect_len, offset = 0;
1890 struct ice_prof_redir_section *pr;
1891 struct ice_prof_id_section *pid;
1892 struct ice_xlt1_section *xlt1;
1893 struct ice_xlt2_section *xlt2;
1894 struct ice_sw_fv_section *es;
1895 struct ice_pkg_enum state;
1896 u8 *src, *dst;
1897 void *sect;
1898
1899 /* if the HW segment pointer is null then the first iteration of
1900 * ice_pkg_enum_section() will fail. In this case the HW tables will
1901 * not be filled and return success.
1902 */
1903 if (!hw->seg) {
1904 ice_debug(hw, ICE_DBG_PKG, "hw->seg is NULL, tables are not filled\n");
1905 return;
1906 }
1907
1908 memset(&state, 0, sizeof(state));
1909
1910 sect = ice_pkg_enum_section(hw->seg, &state, sid);
1911
1912 while (sect) {
1913 switch (sid) {
1914 case ICE_SID_XLT1_SW:
1915 case ICE_SID_XLT1_FD:
1916 case ICE_SID_XLT1_RSS:
1917 case ICE_SID_XLT1_ACL:
1918 case ICE_SID_XLT1_PE:
1919 xlt1 = sect;
1920 src = xlt1->value;
1921 sect_len = le16_to_cpu(xlt1->count) *
1922 sizeof(*hw->blk[block_id].xlt1.t);
1923 dst = hw->blk[block_id].xlt1.t;
1924 dst_len = hw->blk[block_id].xlt1.count *
1925 sizeof(*hw->blk[block_id].xlt1.t);
1926 break;
1927 case ICE_SID_XLT2_SW:
1928 case ICE_SID_XLT2_FD:
1929 case ICE_SID_XLT2_RSS:
1930 case ICE_SID_XLT2_ACL:
1931 case ICE_SID_XLT2_PE:
1932 xlt2 = sect;
1933 src = (__force u8 *)xlt2->value;
1934 sect_len = le16_to_cpu(xlt2->count) *
1935 sizeof(*hw->blk[block_id].xlt2.t);
1936 dst = (u8 *)hw->blk[block_id].xlt2.t;
1937 dst_len = hw->blk[block_id].xlt2.count *
1938 sizeof(*hw->blk[block_id].xlt2.t);
1939 break;
1940 case ICE_SID_PROFID_TCAM_SW:
1941 case ICE_SID_PROFID_TCAM_FD:
1942 case ICE_SID_PROFID_TCAM_RSS:
1943 case ICE_SID_PROFID_TCAM_ACL:
1944 case ICE_SID_PROFID_TCAM_PE:
1945 pid = sect;
1946 src = (u8 *)pid->entry;
1947 sect_len = le16_to_cpu(pid->count) *
1948 sizeof(*hw->blk[block_id].prof.t);
1949 dst = (u8 *)hw->blk[block_id].prof.t;
1950 dst_len = hw->blk[block_id].prof.count *
1951 sizeof(*hw->blk[block_id].prof.t);
1952 break;
1953 case ICE_SID_PROFID_REDIR_SW:
1954 case ICE_SID_PROFID_REDIR_FD:
1955 case ICE_SID_PROFID_REDIR_RSS:
1956 case ICE_SID_PROFID_REDIR_ACL:
1957 case ICE_SID_PROFID_REDIR_PE:
1958 pr = sect;
1959 src = pr->redir_value;
1960 sect_len = le16_to_cpu(pr->count) *
1961 sizeof(*hw->blk[block_id].prof_redir.t);
1962 dst = hw->blk[block_id].prof_redir.t;
1963 dst_len = hw->blk[block_id].prof_redir.count *
1964 sizeof(*hw->blk[block_id].prof_redir.t);
1965 break;
1966 case ICE_SID_FLD_VEC_SW:
1967 case ICE_SID_FLD_VEC_FD:
1968 case ICE_SID_FLD_VEC_RSS:
1969 case ICE_SID_FLD_VEC_ACL:
1970 case ICE_SID_FLD_VEC_PE:
1971 es = sect;
1972 src = (u8 *)es->fv;
1973 sect_len = (u32)(le16_to_cpu(es->count) *
1974 hw->blk[block_id].es.fvw) *
1975 sizeof(*hw->blk[block_id].es.t);
1976 dst = (u8 *)hw->blk[block_id].es.t;
1977 dst_len = (u32)(hw->blk[block_id].es.count *
1978 hw->blk[block_id].es.fvw) *
1979 sizeof(*hw->blk[block_id].es.t);
1980 break;
1981 default:
1982 return;
1983 }
1984
1985 /* if the section offset exceeds destination length, terminate
1986 * table fill.
1987 */
1988 if (offset > dst_len)
1989 return;
1990
1991 /* if the sum of section size and offset exceed destination size
1992 * then we are out of bounds of the HW table size for that PF.
1993 * Changing section length to fill the remaining table space
1994 * of that PF.
1995 */
1996 if ((offset + sect_len) > dst_len)
1997 sect_len = dst_len - offset;
1998
1999 memcpy(dst + offset, src, sect_len);
2000 offset += sect_len;
2001 sect = ice_pkg_enum_section(NULL, &state, sid);
2002 }
2003}
2004
2005/**
2006 * ice_fill_blk_tbls - Read package context for tables
2007 * @hw: pointer to the hardware structure
2008 *
2009 * Reads the current package contents and populates the driver
2010 * database with the data iteratively for all advanced feature
2011 * blocks. Assume that the HW tables have been allocated.
2012 */
2013void ice_fill_blk_tbls(struct ice_hw *hw)
2014{
2015 u8 i;
2016
2017 for (i = 0; i < ICE_BLK_COUNT; i++) {
2018 enum ice_block blk_id = (enum ice_block)i;
2019
2020 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].xlt1.sid);
2021 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].xlt2.sid);
2022 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].prof.sid);
2023 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].prof_redir.sid);
2024 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].es.sid);
2025 }
2026
2027 ice_init_sw_db(hw);
2028}
2029
2030/**
2031 * ice_free_prof_map - free profile map
2032 * @hw: pointer to the hardware structure
2033 * @blk_idx: HW block index
2034 */
2035static void ice_free_prof_map(struct ice_hw *hw, u8 blk_idx)
2036{
2037 struct ice_es *es = &hw->blk[blk_idx].es;
2038 struct ice_prof_map *del, *tmp;
2039
2040 mutex_lock(&es->prof_map_lock);
2041 list_for_each_entry_safe(del, tmp, &es->prof_map, list) {
2042 list_del(&del->list);
2043 devm_kfree(ice_hw_to_dev(hw), del);
2044 }
2045 INIT_LIST_HEAD(&es->prof_map);
2046 mutex_unlock(&es->prof_map_lock);
2047}
2048
2049/**
2050 * ice_free_flow_profs - free flow profile entries
2051 * @hw: pointer to the hardware structure
2052 * @blk_idx: HW block index
2053 */
2054static void ice_free_flow_profs(struct ice_hw *hw, u8 blk_idx)
2055{
2056 struct ice_flow_prof *p, *tmp;
2057
2058 mutex_lock(&hw->fl_profs_locks[blk_idx]);
2059 list_for_each_entry_safe(p, tmp, &hw->fl_profs[blk_idx], l_entry) {
2060 struct ice_flow_entry *e, *t;
2061
2062 list_for_each_entry_safe(e, t, &p->entries, l_entry)
2063 ice_flow_rem_entry(hw, (enum ice_block)blk_idx,
2064 ICE_FLOW_ENTRY_HNDL(e));
2065
2066 list_del(&p->l_entry);
2067
2068 mutex_destroy(&p->entries_lock);
2069 devm_kfree(ice_hw_to_dev(hw), p);
2070 }
2071 mutex_unlock(&hw->fl_profs_locks[blk_idx]);
2072
2073 /* if driver is in reset and tables are being cleared
2074 * re-initialize the flow profile list heads
2075 */
2076 INIT_LIST_HEAD(&hw->fl_profs[blk_idx]);
2077}
2078
2079/**
2080 * ice_free_vsig_tbl - free complete VSIG table entries
2081 * @hw: pointer to the hardware structure
2082 * @blk: the HW block on which to free the VSIG table entries
2083 */
2084static void ice_free_vsig_tbl(struct ice_hw *hw, enum ice_block blk)
2085{
2086 u16 i;
2087
2088 if (!hw->blk[blk].xlt2.vsig_tbl)
2089 return;
2090
2091 for (i = 1; i < ICE_MAX_VSIGS; i++)
2092 if (hw->blk[blk].xlt2.vsig_tbl[i].in_use)
2093 ice_vsig_free(hw, blk, i);
2094}
2095
2096/**
2097 * ice_free_hw_tbls - free hardware table memory
2098 * @hw: pointer to the hardware structure
2099 */
2100void ice_free_hw_tbls(struct ice_hw *hw)
2101{
2102 struct ice_rss_cfg *r, *rt;
2103 u8 i;
2104
2105 for (i = 0; i < ICE_BLK_COUNT; i++) {
2106 if (hw->blk[i].is_list_init) {
2107 struct ice_es *es = &hw->blk[i].es;
2108
2109 ice_free_prof_map(hw, i);
2110 mutex_destroy(&es->prof_map_lock);
2111
2112 ice_free_flow_profs(hw, i);
2113 mutex_destroy(&hw->fl_profs_locks[i]);
2114
2115 hw->blk[i].is_list_init = false;
2116 }
2117 ice_free_vsig_tbl(hw, (enum ice_block)i);
2118 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt1.ptypes);
2119 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt1.ptg_tbl);
2120 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt1.t);
2121 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt2.t);
2122 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt2.vsig_tbl);
2123 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt2.vsis);
2124 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].prof.t);
2125 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].prof_redir.t);
2126 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.t);
2127 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.ref_count);
2128 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.symm);
2129 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.written);
2130 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.mask_ena);
2131 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].prof_id.id);
2132 }
2133
2134 list_for_each_entry_safe(r, rt, &hw->rss_list_head, l_entry) {
2135 list_del(&r->l_entry);
2136 devm_kfree(ice_hw_to_dev(hw), r);
2137 }
2138 mutex_destroy(&hw->rss_locks);
2139 ice_shutdown_all_prof_masks(hw);
2140 memset(hw->blk, 0, sizeof(hw->blk));
2141}
2142
2143/**
2144 * ice_init_flow_profs - init flow profile locks and list heads
2145 * @hw: pointer to the hardware structure
2146 * @blk_idx: HW block index
2147 */
2148static void ice_init_flow_profs(struct ice_hw *hw, u8 blk_idx)
2149{
2150 mutex_init(&hw->fl_profs_locks[blk_idx]);
2151 INIT_LIST_HEAD(&hw->fl_profs[blk_idx]);
2152}
2153
2154/**
2155 * ice_clear_hw_tbls - clear HW tables and flow profiles
2156 * @hw: pointer to the hardware structure
2157 */
2158void ice_clear_hw_tbls(struct ice_hw *hw)
2159{
2160 u8 i;
2161
2162 for (i = 0; i < ICE_BLK_COUNT; i++) {
2163 struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;
2164 struct ice_prof_id *prof_id = &hw->blk[i].prof_id;
2165 struct ice_prof_tcam *prof = &hw->blk[i].prof;
2166 struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;
2167 struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;
2168 struct ice_es *es = &hw->blk[i].es;
2169
2170 if (hw->blk[i].is_list_init) {
2171 ice_free_prof_map(hw, i);
2172 ice_free_flow_profs(hw, i);
2173 }
2174
2175 ice_free_vsig_tbl(hw, (enum ice_block)i);
2176
2177 memset(xlt1->ptypes, 0, xlt1->count * sizeof(*xlt1->ptypes));
2178 memset(xlt1->ptg_tbl, 0,
2179 ICE_MAX_PTGS * sizeof(*xlt1->ptg_tbl));
2180 memset(xlt1->t, 0, xlt1->count * sizeof(*xlt1->t));
2181
2182 memset(xlt2->vsis, 0, xlt2->count * sizeof(*xlt2->vsis));
2183 memset(xlt2->vsig_tbl, 0,
2184 xlt2->count * sizeof(*xlt2->vsig_tbl));
2185 memset(xlt2->t, 0, xlt2->count * sizeof(*xlt2->t));
2186
2187 memset(prof->t, 0, prof->count * sizeof(*prof->t));
2188 memset(prof_redir->t, 0,
2189 prof_redir->count * sizeof(*prof_redir->t));
2190
2191 memset(es->t, 0, es->count * sizeof(*es->t) * es->fvw);
2192 memset(es->ref_count, 0, es->count * sizeof(*es->ref_count));
2193 memset(es->symm, 0, es->count * sizeof(*es->symm));
2194 memset(es->written, 0, es->count * sizeof(*es->written));
2195 memset(es->mask_ena, 0, es->count * sizeof(*es->mask_ena));
2196
2197 memset(prof_id->id, 0, prof_id->count * sizeof(*prof_id->id));
2198 }
2199}
2200
2201/**
2202 * ice_init_hw_tbls - init hardware table memory
2203 * @hw: pointer to the hardware structure
2204 */
2205int ice_init_hw_tbls(struct ice_hw *hw)
2206{
2207 u8 i;
2208
2209 mutex_init(&hw->rss_locks);
2210 INIT_LIST_HEAD(&hw->rss_list_head);
2211 ice_init_all_prof_masks(hw);
2212 for (i = 0; i < ICE_BLK_COUNT; i++) {
2213 struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;
2214 struct ice_prof_id *prof_id = &hw->blk[i].prof_id;
2215 struct ice_prof_tcam *prof = &hw->blk[i].prof;
2216 struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;
2217 struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;
2218 struct ice_es *es = &hw->blk[i].es;
2219 u16 j;
2220
2221 if (hw->blk[i].is_list_init)
2222 continue;
2223
2224 ice_init_flow_profs(hw, i);
2225 mutex_init(&es->prof_map_lock);
2226 INIT_LIST_HEAD(&es->prof_map);
2227 hw->blk[i].is_list_init = true;
2228
2229 hw->blk[i].overwrite = blk_sizes[i].overwrite;
2230 es->reverse = blk_sizes[i].reverse;
2231
2232 xlt1->sid = ice_blk_sids[i][ICE_SID_XLT1_OFF];
2233 xlt1->count = blk_sizes[i].xlt1;
2234
2235 xlt1->ptypes = devm_kcalloc(ice_hw_to_dev(hw), xlt1->count,
2236 sizeof(*xlt1->ptypes), GFP_KERNEL);
2237
2238 if (!xlt1->ptypes)
2239 goto err;
2240
2241 xlt1->ptg_tbl = devm_kcalloc(ice_hw_to_dev(hw), ICE_MAX_PTGS,
2242 sizeof(*xlt1->ptg_tbl),
2243 GFP_KERNEL);
2244
2245 if (!xlt1->ptg_tbl)
2246 goto err;
2247
2248 xlt1->t = devm_kcalloc(ice_hw_to_dev(hw), xlt1->count,
2249 sizeof(*xlt1->t), GFP_KERNEL);
2250 if (!xlt1->t)
2251 goto err;
2252
2253 xlt2->sid = ice_blk_sids[i][ICE_SID_XLT2_OFF];
2254 xlt2->count = blk_sizes[i].xlt2;
2255
2256 xlt2->vsis = devm_kcalloc(ice_hw_to_dev(hw), xlt2->count,
2257 sizeof(*xlt2->vsis), GFP_KERNEL);
2258
2259 if (!xlt2->vsis)
2260 goto err;
2261
2262 xlt2->vsig_tbl = devm_kcalloc(ice_hw_to_dev(hw), xlt2->count,
2263 sizeof(*xlt2->vsig_tbl),
2264 GFP_KERNEL);
2265 if (!xlt2->vsig_tbl)
2266 goto err;
2267
2268 for (j = 0; j < xlt2->count; j++)
2269 INIT_LIST_HEAD(&xlt2->vsig_tbl[j].prop_lst);
2270
2271 xlt2->t = devm_kcalloc(ice_hw_to_dev(hw), xlt2->count,
2272 sizeof(*xlt2->t), GFP_KERNEL);
2273 if (!xlt2->t)
2274 goto err;
2275
2276 prof->sid = ice_blk_sids[i][ICE_SID_PR_OFF];
2277 prof->count = blk_sizes[i].prof_tcam;
2278 prof->max_prof_id = blk_sizes[i].prof_id;
2279 prof->cdid_bits = blk_sizes[i].prof_cdid_bits;
2280 prof->t = devm_kcalloc(ice_hw_to_dev(hw), prof->count,
2281 sizeof(*prof->t), GFP_KERNEL);
2282
2283 if (!prof->t)
2284 goto err;
2285
2286 prof_redir->sid = ice_blk_sids[i][ICE_SID_PR_REDIR_OFF];
2287 prof_redir->count = blk_sizes[i].prof_redir;
2288 prof_redir->t = devm_kcalloc(ice_hw_to_dev(hw),
2289 prof_redir->count,
2290 sizeof(*prof_redir->t),
2291 GFP_KERNEL);
2292
2293 if (!prof_redir->t)
2294 goto err;
2295
2296 es->sid = ice_blk_sids[i][ICE_SID_ES_OFF];
2297 es->count = blk_sizes[i].es;
2298 es->fvw = blk_sizes[i].fvw;
2299 es->t = devm_kcalloc(ice_hw_to_dev(hw),
2300 (u32)(es->count * es->fvw),
2301 sizeof(*es->t), GFP_KERNEL);
2302 if (!es->t)
2303 goto err;
2304
2305 es->ref_count = devm_kcalloc(ice_hw_to_dev(hw), es->count,
2306 sizeof(*es->ref_count),
2307 GFP_KERNEL);
2308 if (!es->ref_count)
2309 goto err;
2310
2311 es->symm = devm_kcalloc(ice_hw_to_dev(hw), es->count,
2312 sizeof(*es->symm), GFP_KERNEL);
2313 if (!es->symm)
2314 goto err;
2315
2316 es->written = devm_kcalloc(ice_hw_to_dev(hw), es->count,
2317 sizeof(*es->written), GFP_KERNEL);
2318 if (!es->written)
2319 goto err;
2320
2321 es->mask_ena = devm_kcalloc(ice_hw_to_dev(hw), es->count,
2322 sizeof(*es->mask_ena), GFP_KERNEL);
2323 if (!es->mask_ena)
2324 goto err;
2325
2326 prof_id->count = blk_sizes[i].prof_id;
2327 prof_id->id = devm_kcalloc(ice_hw_to_dev(hw), prof_id->count,
2328 sizeof(*prof_id->id), GFP_KERNEL);
2329 if (!prof_id->id)
2330 goto err;
2331 }
2332 return 0;
2333
2334err:
2335 ice_free_hw_tbls(hw);
2336 return -ENOMEM;
2337}
2338
2339/**
2340 * ice_prof_gen_key - generate profile ID key
2341 * @hw: pointer to the HW struct
2342 * @blk: the block in which to write profile ID to
2343 * @ptg: packet type group (PTG) portion of key
2344 * @vsig: VSIG portion of key
2345 * @cdid: CDID portion of key
2346 * @flags: flag portion of key
2347 * @vl_msk: valid mask
2348 * @dc_msk: don't care mask
2349 * @nm_msk: never match mask
2350 * @key: output of profile ID key
2351 */
2352static int
2353ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
2354 u8 cdid, u16 flags, u8 vl_msk[ICE_TCAM_KEY_VAL_SZ],
2355 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ], u8 nm_msk[ICE_TCAM_KEY_VAL_SZ],
2356 u8 key[ICE_TCAM_KEY_SZ])
2357{
2358 struct ice_prof_id_key inkey;
2359
2360 inkey.xlt1 = ptg;
2361 inkey.xlt2_cdid = cpu_to_le16(vsig);
2362 inkey.flags = cpu_to_le16(flags);
2363
2364 switch (hw->blk[blk].prof.cdid_bits) {
2365 case 0:
2366 break;
2367 case 2:
2368#define ICE_CD_2_M 0xC000U
2369#define ICE_CD_2_S 14
2370 inkey.xlt2_cdid &= ~cpu_to_le16(ICE_CD_2_M);
2371 inkey.xlt2_cdid |= cpu_to_le16(BIT(cdid) << ICE_CD_2_S);
2372 break;
2373 case 4:
2374#define ICE_CD_4_M 0xF000U
2375#define ICE_CD_4_S 12
2376 inkey.xlt2_cdid &= ~cpu_to_le16(ICE_CD_4_M);
2377 inkey.xlt2_cdid |= cpu_to_le16(BIT(cdid) << ICE_CD_4_S);
2378 break;
2379 case 8:
2380#define ICE_CD_8_M 0xFF00U
2381#define ICE_CD_8_S 16
2382 inkey.xlt2_cdid &= ~cpu_to_le16(ICE_CD_8_M);
2383 inkey.xlt2_cdid |= cpu_to_le16(BIT(cdid) << ICE_CD_8_S);
2384 break;
2385 default:
2386 ice_debug(hw, ICE_DBG_PKG, "Error in profile config\n");
2387 break;
2388 }
2389
2390 return ice_set_key(key, ICE_TCAM_KEY_SZ, (u8 *)&inkey, vl_msk, dc_msk,
2391 nm_msk, 0, ICE_TCAM_KEY_SZ / 2);
2392}
2393
2394/**
2395 * ice_tcam_write_entry - write TCAM entry
2396 * @hw: pointer to the HW struct
2397 * @blk: the block in which to write profile ID to
2398 * @idx: the entry index to write to
2399 * @prof_id: profile ID
2400 * @ptg: packet type group (PTG) portion of key
2401 * @vsig: VSIG portion of key
2402 * @cdid: CDID portion of key
2403 * @flags: flag portion of key
2404 * @vl_msk: valid mask
2405 * @dc_msk: don't care mask
2406 * @nm_msk: never match mask
2407 */
2408static int
2409ice_tcam_write_entry(struct ice_hw *hw, enum ice_block blk, u16 idx,
2410 u8 prof_id, u8 ptg, u16 vsig, u8 cdid, u16 flags,
2411 u8 vl_msk[ICE_TCAM_KEY_VAL_SZ],
2412 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ],
2413 u8 nm_msk[ICE_TCAM_KEY_VAL_SZ])
2414{
2415 struct ice_prof_tcam_entry;
2416 int status;
2417
2418 status = ice_prof_gen_key(hw, blk, ptg, vsig, cdid, flags, vl_msk,
2419 dc_msk, nm_msk, hw->blk[blk].prof.t[idx].key);
2420 if (!status) {
2421 hw->blk[blk].prof.t[idx].addr = cpu_to_le16(idx);
2422 hw->blk[blk].prof.t[idx].prof_id = prof_id;
2423 }
2424
2425 return status;
2426}
2427
2428/**
2429 * ice_vsig_get_ref - returns number of VSIs belong to a VSIG
2430 * @hw: pointer to the hardware structure
2431 * @blk: HW block
2432 * @vsig: VSIG to query
2433 * @refs: pointer to variable to receive the reference count
2434 */
2435static int
2436ice_vsig_get_ref(struct ice_hw *hw, enum ice_block blk, u16 vsig, u16 *refs)
2437{
2438 u16 idx = vsig & ICE_VSIG_IDX_M;
2439 struct ice_vsig_vsi *ptr;
2440
2441 *refs = 0;
2442
2443 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
2444 return -ENOENT;
2445
2446 ptr = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
2447 while (ptr) {
2448 (*refs)++;
2449 ptr = ptr->next_vsi;
2450 }
2451
2452 return 0;
2453}
2454
2455/**
2456 * ice_has_prof_vsig - check to see if VSIG has a specific profile
2457 * @hw: pointer to the hardware structure
2458 * @blk: HW block
2459 * @vsig: VSIG to check against
2460 * @hdl: profile handle
2461 */
2462static bool
2463ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
2464{
2465 u16 idx = vsig & ICE_VSIG_IDX_M;
2466 struct ice_vsig_prof *ent;
2467
2468 list_for_each_entry(ent, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
2469 list)
2470 if (ent->profile_cookie == hdl)
2471 return true;
2472
2473 ice_debug(hw, ICE_DBG_INIT, "Characteristic list for VSI group %d not found.\n",
2474 vsig);
2475 return false;
2476}
2477
2478/**
2479 * ice_prof_bld_es - build profile ID extraction sequence changes
2480 * @hw: pointer to the HW struct
2481 * @blk: hardware block
2482 * @bld: the update package buffer build to add to
2483 * @chgs: the list of changes to make in hardware
2484 */
2485static int
2486ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
2487 struct ice_buf_build *bld, struct list_head *chgs)
2488{
2489 u16 vec_size = hw->blk[blk].es.fvw * sizeof(struct ice_fv_word);
2490 struct ice_chs_chg *tmp;
2491
2492 list_for_each_entry(tmp, chgs, list_entry)
2493 if (tmp->type == ICE_PTG_ES_ADD && tmp->add_prof) {
2494 u16 off = tmp->prof_id * hw->blk[blk].es.fvw;
2495 struct ice_pkg_es *p;
2496 u32 id;
2497
2498 id = ice_sect_id(blk, ICE_VEC_TBL);
2499 p = ice_pkg_buf_alloc_section(bld, id,
2500 struct_size(p, es, 1) +
2501 vec_size -
2502 sizeof(p->es[0]));
2503
2504 if (!p)
2505 return -ENOSPC;
2506
2507 p->count = cpu_to_le16(1);
2508 p->offset = cpu_to_le16(tmp->prof_id);
2509
2510 memcpy(p->es, &hw->blk[blk].es.t[off], vec_size);
2511 }
2512
2513 return 0;
2514}
2515
2516/**
2517 * ice_prof_bld_tcam - build profile ID TCAM changes
2518 * @hw: pointer to the HW struct
2519 * @blk: hardware block
2520 * @bld: the update package buffer build to add to
2521 * @chgs: the list of changes to make in hardware
2522 */
2523static int
2524ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
2525 struct ice_buf_build *bld, struct list_head *chgs)
2526{
2527 struct ice_chs_chg *tmp;
2528
2529 list_for_each_entry(tmp, chgs, list_entry)
2530 if (tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) {
2531 struct ice_prof_id_section *p;
2532 u32 id;
2533
2534 id = ice_sect_id(blk, ICE_PROF_TCAM);
2535 p = ice_pkg_buf_alloc_section(bld, id,
2536 struct_size(p, entry, 1));
2537
2538 if (!p)
2539 return -ENOSPC;
2540
2541 p->count = cpu_to_le16(1);
2542 p->entry[0].addr = cpu_to_le16(tmp->tcam_idx);
2543 p->entry[0].prof_id = tmp->prof_id;
2544
2545 memcpy(p->entry[0].key,
2546 &hw->blk[blk].prof.t[tmp->tcam_idx].key,
2547 sizeof(hw->blk[blk].prof.t->key));
2548 }
2549
2550 return 0;
2551}
2552
2553/**
2554 * ice_prof_bld_xlt1 - build XLT1 changes
2555 * @blk: hardware block
2556 * @bld: the update package buffer build to add to
2557 * @chgs: the list of changes to make in hardware
2558 */
2559static int
2560ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
2561 struct list_head *chgs)
2562{
2563 struct ice_chs_chg *tmp;
2564
2565 list_for_each_entry(tmp, chgs, list_entry)
2566 if (tmp->type == ICE_PTG_ES_ADD && tmp->add_ptg) {
2567 struct ice_xlt1_section *p;
2568 u32 id;
2569
2570 id = ice_sect_id(blk, ICE_XLT1);
2571 p = ice_pkg_buf_alloc_section(bld, id,
2572 struct_size(p, value, 1));
2573
2574 if (!p)
2575 return -ENOSPC;
2576
2577 p->count = cpu_to_le16(1);
2578 p->offset = cpu_to_le16(tmp->ptype);
2579 p->value[0] = tmp->ptg;
2580 }
2581
2582 return 0;
2583}
2584
2585/**
2586 * ice_prof_bld_xlt2 - build XLT2 changes
2587 * @blk: hardware block
2588 * @bld: the update package buffer build to add to
2589 * @chgs: the list of changes to make in hardware
2590 */
2591static int
2592ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,
2593 struct list_head *chgs)
2594{
2595 struct ice_chs_chg *tmp;
2596
2597 list_for_each_entry(tmp, chgs, list_entry) {
2598 struct ice_xlt2_section *p;
2599 u32 id;
2600
2601 switch (tmp->type) {
2602 case ICE_VSIG_ADD:
2603 case ICE_VSI_MOVE:
2604 case ICE_VSIG_REM:
2605 id = ice_sect_id(blk, ICE_XLT2);
2606 p = ice_pkg_buf_alloc_section(bld, id,
2607 struct_size(p, value, 1));
2608
2609 if (!p)
2610 return -ENOSPC;
2611
2612 p->count = cpu_to_le16(1);
2613 p->offset = cpu_to_le16(tmp->vsi);
2614 p->value[0] = cpu_to_le16(tmp->vsig);
2615 break;
2616 default:
2617 break;
2618 }
2619 }
2620
2621 return 0;
2622}
2623
2624/**
2625 * ice_upd_prof_hw - update hardware using the change list
2626 * @hw: pointer to the HW struct
2627 * @blk: hardware block
2628 * @chgs: the list of changes to make in hardware
2629 */
2630static int
2631ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
2632 struct list_head *chgs)
2633{
2634 struct ice_buf_build *b;
2635 struct ice_chs_chg *tmp;
2636 u16 pkg_sects;
2637 u16 xlt1 = 0;
2638 u16 xlt2 = 0;
2639 u16 tcam = 0;
2640 u16 es = 0;
2641 int status;
2642 u16 sects;
2643
2644 /* count number of sections we need */
2645 list_for_each_entry(tmp, chgs, list_entry) {
2646 switch (tmp->type) {
2647 case ICE_PTG_ES_ADD:
2648 if (tmp->add_ptg)
2649 xlt1++;
2650 if (tmp->add_prof)
2651 es++;
2652 break;
2653 case ICE_TCAM_ADD:
2654 tcam++;
2655 break;
2656 case ICE_VSIG_ADD:
2657 case ICE_VSI_MOVE:
2658 case ICE_VSIG_REM:
2659 xlt2++;
2660 break;
2661 default:
2662 break;
2663 }
2664 }
2665 sects = xlt1 + xlt2 + tcam + es;
2666
2667 if (!sects)
2668 return 0;
2669
2670 /* Build update package buffer */
2671 b = ice_pkg_buf_alloc(hw);
2672 if (!b)
2673 return -ENOMEM;
2674
2675 status = ice_pkg_buf_reserve_section(b, sects);
2676 if (status)
2677 goto error_tmp;
2678
2679 /* Preserve order of table update: ES, TCAM, PTG, VSIG */
2680 if (es) {
2681 status = ice_prof_bld_es(hw, blk, b, chgs);
2682 if (status)
2683 goto error_tmp;
2684 }
2685
2686 if (tcam) {
2687 status = ice_prof_bld_tcam(hw, blk, b, chgs);
2688 if (status)
2689 goto error_tmp;
2690 }
2691
2692 if (xlt1) {
2693 status = ice_prof_bld_xlt1(blk, b, chgs);
2694 if (status)
2695 goto error_tmp;
2696 }
2697
2698 if (xlt2) {
2699 status = ice_prof_bld_xlt2(blk, b, chgs);
2700 if (status)
2701 goto error_tmp;
2702 }
2703
2704 /* After package buffer build check if the section count in buffer is
2705 * non-zero and matches the number of sections detected for package
2706 * update.
2707 */
2708 pkg_sects = ice_pkg_buf_get_active_sections(b);
2709 if (!pkg_sects || pkg_sects != sects) {
2710 status = -EINVAL;
2711 goto error_tmp;
2712 }
2713
2714 /* update package */
2715 status = ice_update_pkg(hw, ice_pkg_buf(b), 1);
2716 if (status == -EIO)
2717 ice_debug(hw, ICE_DBG_INIT, "Unable to update HW profile\n");
2718
2719error_tmp:
2720 ice_pkg_buf_free(hw, b);
2721 return status;
2722}
2723
2724/**
2725 * ice_update_fd_mask - set Flow Director Field Vector mask for a profile
2726 * @hw: pointer to the HW struct
2727 * @prof_id: profile ID
2728 * @mask_sel: mask select
2729 *
2730 * This function enable any of the masks selected by the mask select parameter
2731 * for the profile specified.
2732 */
2733static void ice_update_fd_mask(struct ice_hw *hw, u16 prof_id, u32 mask_sel)
2734{
2735 wr32(hw, GLQF_FDMASK_SEL(prof_id), mask_sel);
2736
2737 ice_debug(hw, ICE_DBG_INIT, "fd mask(%d): %x = %x\n", prof_id,
2738 GLQF_FDMASK_SEL(prof_id), mask_sel);
2739}
2740
2741struct ice_fd_src_dst_pair {
2742 u8 prot_id;
2743 u8 count;
2744 u16 off;
2745};
2746
2747static const struct ice_fd_src_dst_pair ice_fd_pairs[] = {
2748 /* These are defined in pairs */
2749 { ICE_PROT_IPV4_OF_OR_S, 2, 12 },
2750 { ICE_PROT_IPV4_OF_OR_S, 2, 16 },
2751
2752 { ICE_PROT_IPV4_IL, 2, 12 },
2753 { ICE_PROT_IPV4_IL, 2, 16 },
2754
2755 { ICE_PROT_IPV6_OF_OR_S, 8, 8 },
2756 { ICE_PROT_IPV6_OF_OR_S, 8, 24 },
2757
2758 { ICE_PROT_IPV6_IL, 8, 8 },
2759 { ICE_PROT_IPV6_IL, 8, 24 },
2760
2761 { ICE_PROT_TCP_IL, 1, 0 },
2762 { ICE_PROT_TCP_IL, 1, 2 },
2763
2764 { ICE_PROT_UDP_OF, 1, 0 },
2765 { ICE_PROT_UDP_OF, 1, 2 },
2766
2767 { ICE_PROT_UDP_IL_OR_S, 1, 0 },
2768 { ICE_PROT_UDP_IL_OR_S, 1, 2 },
2769
2770 { ICE_PROT_SCTP_IL, 1, 0 },
2771 { ICE_PROT_SCTP_IL, 1, 2 }
2772};
2773
2774#define ICE_FD_SRC_DST_PAIR_COUNT ARRAY_SIZE(ice_fd_pairs)
2775
2776/**
2777 * ice_update_fd_swap - set register appropriately for a FD FV extraction
2778 * @hw: pointer to the HW struct
2779 * @prof_id: profile ID
2780 * @es: extraction sequence (length of array is determined by the block)
2781 */
2782static int
2783ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
2784{
2785 DECLARE_BITMAP(pair_list, ICE_FD_SRC_DST_PAIR_COUNT);
2786 u8 pair_start[ICE_FD_SRC_DST_PAIR_COUNT] = { 0 };
2787#define ICE_FD_FV_NOT_FOUND (-2)
2788 s8 first_free = ICE_FD_FV_NOT_FOUND;
2789 u8 used[ICE_MAX_FV_WORDS] = { 0 };
2790 s8 orig_free, si;
2791 u32 mask_sel = 0;
2792 u8 i, j, k;
2793
2794 bitmap_zero(pair_list, ICE_FD_SRC_DST_PAIR_COUNT);
2795
2796 /* This code assumes that the Flow Director field vectors are assigned
2797 * from the end of the FV indexes working towards the zero index, that
2798 * only complete fields will be included and will be consecutive, and
2799 * that there are no gaps between valid indexes.
2800 */
2801
2802 /* Determine swap fields present */
2803 for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
2804 /* Find the first free entry, assuming right to left population.
2805 * This is where we can start adding additional pairs if needed.
2806 */
2807 if (first_free == ICE_FD_FV_NOT_FOUND && es[i].prot_id !=
2808 ICE_PROT_INVALID)
2809 first_free = i - 1;
2810
2811 for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++)
2812 if (es[i].prot_id == ice_fd_pairs[j].prot_id &&
2813 es[i].off == ice_fd_pairs[j].off) {
2814 __set_bit(j, pair_list);
2815 pair_start[j] = i;
2816 }
2817 }
2818
2819 orig_free = first_free;
2820
2821 /* determine missing swap fields that need to be added */
2822 for (i = 0; i < ICE_FD_SRC_DST_PAIR_COUNT; i += 2) {
2823 u8 bit1 = test_bit(i + 1, pair_list);
2824 u8 bit0 = test_bit(i, pair_list);
2825
2826 if (bit0 ^ bit1) {
2827 u8 index;
2828
2829 /* add the appropriate 'paired' entry */
2830 if (!bit0)
2831 index = i;
2832 else
2833 index = i + 1;
2834
2835 /* check for room */
2836 if (first_free + 1 < (s8)ice_fd_pairs[index].count)
2837 return -ENOSPC;
2838
2839 /* place in extraction sequence */
2840 for (k = 0; k < ice_fd_pairs[index].count; k++) {
2841 es[first_free - k].prot_id =
2842 ice_fd_pairs[index].prot_id;
2843 es[first_free - k].off =
2844 ice_fd_pairs[index].off + (k * 2);
2845
2846 if (k > first_free)
2847 return -EIO;
2848
2849 /* keep track of non-relevant fields */
2850 mask_sel |= BIT(first_free - k);
2851 }
2852
2853 pair_start[index] = first_free;
2854 first_free -= ice_fd_pairs[index].count;
2855 }
2856 }
2857
2858 /* fill in the swap array */
2859 si = hw->blk[ICE_BLK_FD].es.fvw - 1;
2860 while (si >= 0) {
2861 u8 indexes_used = 1;
2862
2863 /* assume flat at this index */
2864#define ICE_SWAP_VALID 0x80
2865 used[si] = si | ICE_SWAP_VALID;
2866
2867 if (orig_free == ICE_FD_FV_NOT_FOUND || si <= orig_free) {
2868 si -= indexes_used;
2869 continue;
2870 }
2871
2872 /* check for a swap location */
2873 for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++)
2874 if (es[si].prot_id == ice_fd_pairs[j].prot_id &&
2875 es[si].off == ice_fd_pairs[j].off) {
2876 u8 idx;
2877
2878 /* determine the appropriate matching field */
2879 idx = j + ((j % 2) ? -1 : 1);
2880
2881 indexes_used = ice_fd_pairs[idx].count;
2882 for (k = 0; k < indexes_used; k++) {
2883 used[si - k] = (pair_start[idx] - k) |
2884 ICE_SWAP_VALID;
2885 }
2886
2887 break;
2888 }
2889
2890 si -= indexes_used;
2891 }
2892
2893 /* for each set of 4 swap and 4 inset indexes, write the appropriate
2894 * register
2895 */
2896 for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) {
2897 u32 raw_swap = 0;
2898 u32 raw_in = 0;
2899
2900 for (k = 0; k < 4; k++) {
2901 u8 idx;
2902
2903 idx = (j * 4) + k;
2904 if (used[idx] && !(mask_sel & BIT(idx))) {
2905 raw_swap |= used[idx] << (k * BITS_PER_BYTE);
2906#define ICE_INSET_DFLT 0x9f
2907 raw_in |= ICE_INSET_DFLT << (k * BITS_PER_BYTE);
2908 }
2909 }
2910
2911 /* write the appropriate swap register set */
2912 wr32(hw, GLQF_FDSWAP(prof_id, j), raw_swap);
2913
2914 ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %08x\n",
2915 prof_id, j, GLQF_FDSWAP(prof_id, j), raw_swap);
2916
2917 /* write the appropriate inset register set */
2918 wr32(hw, GLQF_FDINSET(prof_id, j), raw_in);
2919
2920 ice_debug(hw, ICE_DBG_INIT, "inset wr(%d, %d): %x = %08x\n",
2921 prof_id, j, GLQF_FDINSET(prof_id, j), raw_in);
2922 }
2923
2924 /* initially clear the mask select for this profile */
2925 ice_update_fd_mask(hw, prof_id, 0);
2926
2927 return 0;
2928}
2929
2930/* The entries here needs to match the order of enum ice_ptype_attrib */
2931static const struct ice_ptype_attrib_info ice_ptype_attributes[] = {
2932 { ICE_GTP_PDU_EH, ICE_GTP_PDU_FLAG_MASK },
2933 { ICE_GTP_SESSION, ICE_GTP_FLAGS_MASK },
2934 { ICE_GTP_DOWNLINK, ICE_GTP_FLAGS_MASK },
2935 { ICE_GTP_UPLINK, ICE_GTP_FLAGS_MASK },
2936};
2937
2938/**
2939 * ice_get_ptype_attrib_info - get PTYPE attribute information
2940 * @type: attribute type
2941 * @info: pointer to variable to the attribute information
2942 */
2943static void
2944ice_get_ptype_attrib_info(enum ice_ptype_attrib_type type,
2945 struct ice_ptype_attrib_info *info)
2946{
2947 *info = ice_ptype_attributes[type];
2948}
2949
2950/**
2951 * ice_add_prof_attrib - add any PTG with attributes to profile
2952 * @prof: pointer to the profile to which PTG entries will be added
2953 * @ptg: PTG to be added
2954 * @ptype: PTYPE that needs to be looked up
2955 * @attr: array of attributes that will be considered
2956 * @attr_cnt: number of elements in the attribute array
2957 */
2958static int
2959ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,
2960 const struct ice_ptype_attributes *attr, u16 attr_cnt)
2961{
2962 bool found = false;
2963 u16 i;
2964
2965 for (i = 0; i < attr_cnt; i++)
2966 if (attr[i].ptype == ptype) {
2967 found = true;
2968
2969 prof->ptg[prof->ptg_cnt] = ptg;
2970 ice_get_ptype_attrib_info(attr[i].attrib,
2971 &prof->attr[prof->ptg_cnt]);
2972
2973 if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE)
2974 return -ENOSPC;
2975 }
2976
2977 if (!found)
2978 return -ENOENT;
2979
2980 return 0;
2981}
2982
2983/**
2984 * ice_disable_fd_swap - set register appropriately to disable FD SWAP
2985 * @hw: pointer to the HW struct
2986 * @prof_id: profile ID
2987 */
2988static void
2989ice_disable_fd_swap(struct ice_hw *hw, u8 prof_id)
2990{
2991 u16 swap_val, fvw_num;
2992 unsigned int i;
2993
2994 swap_val = ICE_SWAP_VALID;
2995 fvw_num = hw->blk[ICE_BLK_FD].es.fvw / ICE_FDIR_REG_SET_SIZE;
2996
2997 /* Since the SWAP Flag in the Programming Desc doesn't work,
2998 * here add method to disable the SWAP Option via setting
2999 * certain SWAP and INSET register sets.
3000 */
3001 for (i = 0; i < fvw_num ; i++) {
3002 u32 raw_swap, raw_in;
3003 unsigned int j;
3004
3005 raw_swap = 0;
3006 raw_in = 0;
3007
3008 for (j = 0; j < ICE_FDIR_REG_SET_SIZE; j++) {
3009 raw_swap |= (swap_val++) << (j * BITS_PER_BYTE);
3010 raw_in |= ICE_INSET_DFLT << (j * BITS_PER_BYTE);
3011 }
3012
3013 /* write the FDIR swap register set */
3014 wr32(hw, GLQF_FDSWAP(prof_id, i), raw_swap);
3015
3016 ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): 0x%x = 0x%08x\n",
3017 prof_id, i, GLQF_FDSWAP(prof_id, i), raw_swap);
3018
3019 /* write the FDIR inset register set */
3020 wr32(hw, GLQF_FDINSET(prof_id, i), raw_in);
3021
3022 ice_debug(hw, ICE_DBG_INIT, "inset wr(%d, %d): 0x%x = 0x%08x\n",
3023 prof_id, i, GLQF_FDINSET(prof_id, i), raw_in);
3024 }
3025}
3026
3027/*
3028 * ice_add_prof - add profile
3029 * @hw: pointer to the HW struct
3030 * @blk: hardware block
3031 * @id: profile tracking ID
3032 * @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits)
3033 * @attr: array of attributes
3034 * @attr_cnt: number of elements in attr array
3035 * @es: extraction sequence (length of array is determined by the block)
3036 * @masks: mask for extraction sequence
3037 * @symm: symmetric setting for RSS profiles
3038 * @fd_swap: enable/disable FDIR paired src/dst fields swap option
3039 *
3040 * This function registers a profile, which matches a set of PTYPES with a
3041 * particular extraction sequence. While the hardware profile is allocated
3042 * it will not be written until the first call to ice_add_flow that specifies
3043 * the ID value used here.
3044 */
3045int
3046ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
3047 const struct ice_ptype_attributes *attr, u16 attr_cnt,
3048 struct ice_fv_word *es, u16 *masks, bool symm, bool fd_swap)
3049{
3050 u32 bytes = DIV_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE);
3051 DECLARE_BITMAP(ptgs_used, ICE_XLT1_CNT);
3052 struct ice_prof_map *prof;
3053 u8 byte = 0;
3054 u8 prof_id;
3055 int status;
3056
3057 bitmap_zero(ptgs_used, ICE_XLT1_CNT);
3058
3059 mutex_lock(&hw->blk[blk].es.prof_map_lock);
3060
3061 /* search for existing profile */
3062 status = ice_find_prof_id_with_mask(hw, blk, es, masks, symm, &prof_id);
3063 if (status) {
3064 /* allocate profile ID */
3065 status = ice_alloc_prof_id(hw, blk, &prof_id);
3066 if (status)
3067 goto err_ice_add_prof;
3068 if (blk == ICE_BLK_FD && fd_swap) {
3069 /* For Flow Director block, the extraction sequence may
3070 * need to be altered in the case where there are paired
3071 * fields that have no match. This is necessary because
3072 * for Flow Director, src and dest fields need to paired
3073 * for filter programming and these values are swapped
3074 * during Tx.
3075 */
3076 status = ice_update_fd_swap(hw, prof_id, es);
3077 if (status)
3078 goto err_ice_add_prof;
3079 } else if (blk == ICE_BLK_FD) {
3080 ice_disable_fd_swap(hw, prof_id);
3081 }
3082 status = ice_update_prof_masking(hw, blk, prof_id, masks);
3083 if (status)
3084 goto err_ice_add_prof;
3085
3086 /* and write new es */
3087 ice_write_es(hw, blk, prof_id, es, symm);
3088 }
3089
3090 ice_prof_inc_ref(hw, blk, prof_id);
3091
3092 /* add profile info */
3093 prof = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*prof), GFP_KERNEL);
3094 if (!prof) {
3095 status = -ENOMEM;
3096 goto err_ice_add_prof;
3097 }
3098
3099 prof->profile_cookie = id;
3100 prof->prof_id = prof_id;
3101 prof->ptg_cnt = 0;
3102 prof->context = 0;
3103
3104 /* build list of ptgs */
3105 while (bytes && prof->ptg_cnt < ICE_MAX_PTG_PER_PROFILE) {
3106 u8 bit;
3107
3108 if (!ptypes[byte]) {
3109 bytes--;
3110 byte++;
3111 continue;
3112 }
3113
3114 /* Examine 8 bits per byte */
3115 for_each_set_bit(bit, (unsigned long *)&ptypes[byte],
3116 BITS_PER_BYTE) {
3117 u16 ptype;
3118 u8 ptg;
3119
3120 ptype = byte * BITS_PER_BYTE + bit;
3121
3122 /* The package should place all ptypes in a non-zero
3123 * PTG, so the following call should never fail.
3124 */
3125 if (ice_ptg_find_ptype(hw, blk, ptype, &ptg))
3126 continue;
3127
3128 /* If PTG is already added, skip and continue */
3129 if (test_bit(ptg, ptgs_used))
3130 continue;
3131
3132 __set_bit(ptg, ptgs_used);
3133 /* Check to see there are any attributes for
3134 * this PTYPE, and add them if found.
3135 */
3136 status = ice_add_prof_attrib(prof, ptg, ptype,
3137 attr, attr_cnt);
3138 if (status == -ENOSPC)
3139 break;
3140 if (status) {
3141 /* This is simple a PTYPE/PTG with no
3142 * attribute
3143 */
3144 prof->ptg[prof->ptg_cnt] = ptg;
3145 prof->attr[prof->ptg_cnt].flags = 0;
3146 prof->attr[prof->ptg_cnt].mask = 0;
3147
3148 if (++prof->ptg_cnt >=
3149 ICE_MAX_PTG_PER_PROFILE)
3150 break;
3151 }
3152 }
3153
3154 bytes--;
3155 byte++;
3156 }
3157
3158 list_add(&prof->list, &hw->blk[blk].es.prof_map);
3159 status = 0;
3160
3161err_ice_add_prof:
3162 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
3163 return status;
3164}
3165
3166/**
3167 * ice_search_prof_id - Search for a profile tracking ID
3168 * @hw: pointer to the HW struct
3169 * @blk: hardware block
3170 * @id: profile tracking ID
3171 *
3172 * This will search for a profile tracking ID which was previously added.
3173 * The profile map lock should be held before calling this function.
3174 */
3175struct ice_prof_map *
3176ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id)
3177{
3178 struct ice_prof_map *entry = NULL;
3179 struct ice_prof_map *map;
3180
3181 list_for_each_entry(map, &hw->blk[blk].es.prof_map, list)
3182 if (map->profile_cookie == id) {
3183 entry = map;
3184 break;
3185 }
3186
3187 return entry;
3188}
3189
3190/**
3191 * ice_vsig_prof_id_count - count profiles in a VSIG
3192 * @hw: pointer to the HW struct
3193 * @blk: hardware block
3194 * @vsig: VSIG to remove the profile from
3195 */
3196static u16
3197ice_vsig_prof_id_count(struct ice_hw *hw, enum ice_block blk, u16 vsig)
3198{
3199 u16 idx = vsig & ICE_VSIG_IDX_M, count = 0;
3200 struct ice_vsig_prof *p;
3201
3202 list_for_each_entry(p, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
3203 list)
3204 count++;
3205
3206 return count;
3207}
3208
3209/**
3210 * ice_rel_tcam_idx - release a TCAM index
3211 * @hw: pointer to the HW struct
3212 * @blk: hardware block
3213 * @idx: the index to release
3214 */
3215static int ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
3216{
3217 /* Masks to invoke a never match entry */
3218 u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
3219 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFE, 0xFF, 0xFF, 0xFF, 0xFF };
3220 u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x01, 0x00, 0x00, 0x00, 0x00 };
3221 int status;
3222
3223 /* write the TCAM entry */
3224 status = ice_tcam_write_entry(hw, blk, idx, 0, 0, 0, 0, 0, vl_msk,
3225 dc_msk, nm_msk);
3226 if (status)
3227 return status;
3228
3229 /* release the TCAM entry */
3230 status = ice_free_tcam_ent(hw, blk, idx);
3231
3232 return status;
3233}
3234
3235/**
3236 * ice_rem_prof_id - remove one profile from a VSIG
3237 * @hw: pointer to the HW struct
3238 * @blk: hardware block
3239 * @prof: pointer to profile structure to remove
3240 */
3241static int
3242ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
3243 struct ice_vsig_prof *prof)
3244{
3245 int status;
3246 u16 i;
3247
3248 for (i = 0; i < prof->tcam_count; i++)
3249 if (prof->tcam[i].in_use) {
3250 prof->tcam[i].in_use = false;
3251 status = ice_rel_tcam_idx(hw, blk,
3252 prof->tcam[i].tcam_idx);
3253 if (status)
3254 return -EIO;
3255 }
3256
3257 return 0;
3258}
3259
3260/**
3261 * ice_rem_vsig - remove VSIG
3262 * @hw: pointer to the HW struct
3263 * @blk: hardware block
3264 * @vsig: the VSIG to remove
3265 * @chg: the change list
3266 */
3267static int
3268ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
3269 struct list_head *chg)
3270{
3271 u16 idx = vsig & ICE_VSIG_IDX_M;
3272 struct ice_vsig_vsi *vsi_cur;
3273 struct ice_vsig_prof *d, *t;
3274
3275 /* remove TCAM entries */
3276 list_for_each_entry_safe(d, t,
3277 &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
3278 list) {
3279 int status;
3280
3281 status = ice_rem_prof_id(hw, blk, d);
3282 if (status)
3283 return status;
3284
3285 list_del(&d->list);
3286 devm_kfree(ice_hw_to_dev(hw), d);
3287 }
3288
3289 /* Move all VSIS associated with this VSIG to the default VSIG */
3290 vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
3291 /* If the VSIG has at least 1 VSI then iterate through the list
3292 * and remove the VSIs before deleting the group.
3293 */
3294 if (vsi_cur)
3295 do {
3296 struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
3297 struct ice_chs_chg *p;
3298
3299 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p),
3300 GFP_KERNEL);
3301 if (!p)
3302 return -ENOMEM;
3303
3304 p->type = ICE_VSIG_REM;
3305 p->orig_vsig = vsig;
3306 p->vsig = ICE_DEFAULT_VSIG;
3307 p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
3308
3309 list_add(&p->list_entry, chg);
3310
3311 vsi_cur = tmp;
3312 } while (vsi_cur);
3313
3314 return ice_vsig_free(hw, blk, vsig);
3315}
3316
3317/**
3318 * ice_rem_prof_id_vsig - remove a specific profile from a VSIG
3319 * @hw: pointer to the HW struct
3320 * @blk: hardware block
3321 * @vsig: VSIG to remove the profile from
3322 * @hdl: profile handle indicating which profile to remove
3323 * @chg: list to receive a record of changes
3324 */
3325static int
3326ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
3327 struct list_head *chg)
3328{
3329 u16 idx = vsig & ICE_VSIG_IDX_M;
3330 struct ice_vsig_prof *p, *t;
3331
3332 list_for_each_entry_safe(p, t,
3333 &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
3334 list)
3335 if (p->profile_cookie == hdl) {
3336 int status;
3337
3338 if (ice_vsig_prof_id_count(hw, blk, vsig) == 1)
3339 /* this is the last profile, remove the VSIG */
3340 return ice_rem_vsig(hw, blk, vsig, chg);
3341
3342 status = ice_rem_prof_id(hw, blk, p);
3343 if (!status) {
3344 list_del(&p->list);
3345 devm_kfree(ice_hw_to_dev(hw), p);
3346 }
3347 return status;
3348 }
3349
3350 return -ENOENT;
3351}
3352
3353/**
3354 * ice_rem_flow_all - remove all flows with a particular profile
3355 * @hw: pointer to the HW struct
3356 * @blk: hardware block
3357 * @id: profile tracking ID
3358 */
3359static int ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
3360{
3361 struct ice_chs_chg *del, *tmp;
3362 struct list_head chg;
3363 int status;
3364 u16 i;
3365
3366 INIT_LIST_HEAD(&chg);
3367
3368 for (i = 1; i < ICE_MAX_VSIGS; i++)
3369 if (hw->blk[blk].xlt2.vsig_tbl[i].in_use) {
3370 if (ice_has_prof_vsig(hw, blk, i, id)) {
3371 status = ice_rem_prof_id_vsig(hw, blk, i, id,
3372 &chg);
3373 if (status)
3374 goto err_ice_rem_flow_all;
3375 }
3376 }
3377
3378 status = ice_upd_prof_hw(hw, blk, &chg);
3379
3380err_ice_rem_flow_all:
3381 list_for_each_entry_safe(del, tmp, &chg, list_entry) {
3382 list_del(&del->list_entry);
3383 devm_kfree(ice_hw_to_dev(hw), del);
3384 }
3385
3386 return status;
3387}
3388
3389/**
3390 * ice_rem_prof - remove profile
3391 * @hw: pointer to the HW struct
3392 * @blk: hardware block
3393 * @id: profile tracking ID
3394 *
3395 * This will remove the profile specified by the ID parameter, which was
3396 * previously created through ice_add_prof. If any existing entries
3397 * are associated with this profile, they will be removed as well.
3398 */
3399int ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
3400{
3401 struct ice_prof_map *pmap;
3402 int status;
3403
3404 mutex_lock(&hw->blk[blk].es.prof_map_lock);
3405
3406 pmap = ice_search_prof_id(hw, blk, id);
3407 if (!pmap) {
3408 status = -ENOENT;
3409 goto err_ice_rem_prof;
3410 }
3411
3412 /* remove all flows with this profile */
3413 status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
3414 if (status)
3415 goto err_ice_rem_prof;
3416
3417 /* dereference profile, and possibly remove */
3418 ice_prof_dec_ref(hw, blk, pmap->prof_id);
3419
3420 list_del(&pmap->list);
3421 devm_kfree(ice_hw_to_dev(hw), pmap);
3422
3423err_ice_rem_prof:
3424 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
3425 return status;
3426}
3427
3428/**
3429 * ice_get_prof - get profile
3430 * @hw: pointer to the HW struct
3431 * @blk: hardware block
3432 * @hdl: profile handle
3433 * @chg: change list
3434 */
3435static int
3436ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl,
3437 struct list_head *chg)
3438{
3439 struct ice_prof_map *map;
3440 struct ice_chs_chg *p;
3441 int status = 0;
3442 u16 i;
3443
3444 mutex_lock(&hw->blk[blk].es.prof_map_lock);
3445 /* Get the details on the profile specified by the handle ID */
3446 map = ice_search_prof_id(hw, blk, hdl);
3447 if (!map) {
3448 status = -ENOENT;
3449 goto err_ice_get_prof;
3450 }
3451
3452 for (i = 0; i < map->ptg_cnt; i++)
3453 if (!hw->blk[blk].es.written[map->prof_id]) {
3454 /* add ES to change list */
3455 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p),
3456 GFP_KERNEL);
3457 if (!p) {
3458 status = -ENOMEM;
3459 goto err_ice_get_prof;
3460 }
3461
3462 p->type = ICE_PTG_ES_ADD;
3463 p->ptype = 0;
3464 p->ptg = map->ptg[i];
3465 p->add_ptg = 0;
3466
3467 p->add_prof = 1;
3468 p->prof_id = map->prof_id;
3469
3470 hw->blk[blk].es.written[map->prof_id] = true;
3471
3472 list_add(&p->list_entry, chg);
3473 }
3474
3475err_ice_get_prof:
3476 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
3477 /* let caller clean up the change list */
3478 return status;
3479}
3480
3481/**
3482 * ice_get_profs_vsig - get a copy of the list of profiles from a VSIG
3483 * @hw: pointer to the HW struct
3484 * @blk: hardware block
3485 * @vsig: VSIG from which to copy the list
3486 * @lst: output list
3487 *
3488 * This routine makes a copy of the list of profiles in the specified VSIG.
3489 */
3490static int
3491ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
3492 struct list_head *lst)
3493{
3494 struct ice_vsig_prof *ent1, *ent2;
3495 u16 idx = vsig & ICE_VSIG_IDX_M;
3496
3497 list_for_each_entry(ent1, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
3498 list) {
3499 struct ice_vsig_prof *p;
3500
3501 /* copy to the input list */
3502 p = devm_kmemdup(ice_hw_to_dev(hw), ent1, sizeof(*p),
3503 GFP_KERNEL);
3504 if (!p)
3505 goto err_ice_get_profs_vsig;
3506
3507 list_add_tail(&p->list, lst);
3508 }
3509
3510 return 0;
3511
3512err_ice_get_profs_vsig:
3513 list_for_each_entry_safe(ent1, ent2, lst, list) {
3514 list_del(&ent1->list);
3515 devm_kfree(ice_hw_to_dev(hw), ent1);
3516 }
3517
3518 return -ENOMEM;
3519}
3520
3521/**
3522 * ice_add_prof_to_lst - add profile entry to a list
3523 * @hw: pointer to the HW struct
3524 * @blk: hardware block
3525 * @lst: the list to be added to
3526 * @hdl: profile handle of entry to add
3527 */
3528static int
3529ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
3530 struct list_head *lst, u64 hdl)
3531{
3532 struct ice_prof_map *map;
3533 struct ice_vsig_prof *p;
3534 int status = 0;
3535 u16 i;
3536
3537 mutex_lock(&hw->blk[blk].es.prof_map_lock);
3538 map = ice_search_prof_id(hw, blk, hdl);
3539 if (!map) {
3540 status = -ENOENT;
3541 goto err_ice_add_prof_to_lst;
3542 }
3543
3544 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
3545 if (!p) {
3546 status = -ENOMEM;
3547 goto err_ice_add_prof_to_lst;
3548 }
3549
3550 p->profile_cookie = map->profile_cookie;
3551 p->prof_id = map->prof_id;
3552 p->tcam_count = map->ptg_cnt;
3553
3554 for (i = 0; i < map->ptg_cnt; i++) {
3555 p->tcam[i].prof_id = map->prof_id;
3556 p->tcam[i].tcam_idx = ICE_INVALID_TCAM;
3557 p->tcam[i].ptg = map->ptg[i];
3558 }
3559
3560 list_add(&p->list, lst);
3561
3562err_ice_add_prof_to_lst:
3563 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
3564 return status;
3565}
3566
3567/**
3568 * ice_move_vsi - move VSI to another VSIG
3569 * @hw: pointer to the HW struct
3570 * @blk: hardware block
3571 * @vsi: the VSI to move
3572 * @vsig: the VSIG to move the VSI to
3573 * @chg: the change list
3574 */
3575static int
3576ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig,
3577 struct list_head *chg)
3578{
3579 struct ice_chs_chg *p;
3580 u16 orig_vsig;
3581 int status;
3582
3583 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
3584 if (!p)
3585 return -ENOMEM;
3586
3587 status = ice_vsig_find_vsi(hw, blk, vsi, &orig_vsig);
3588 if (!status)
3589 status = ice_vsig_add_mv_vsi(hw, blk, vsi, vsig);
3590
3591 if (status) {
3592 devm_kfree(ice_hw_to_dev(hw), p);
3593 return status;
3594 }
3595
3596 p->type = ICE_VSI_MOVE;
3597 p->vsi = vsi;
3598 p->orig_vsig = orig_vsig;
3599 p->vsig = vsig;
3600
3601 list_add(&p->list_entry, chg);
3602
3603 return 0;
3604}
3605
3606/**
3607 * ice_rem_chg_tcam_ent - remove a specific TCAM entry from change list
3608 * @hw: pointer to the HW struct
3609 * @idx: the index of the TCAM entry to remove
3610 * @chg: the list of change structures to search
3611 */
3612static void
3613ice_rem_chg_tcam_ent(struct ice_hw *hw, u16 idx, struct list_head *chg)
3614{
3615 struct ice_chs_chg *pos, *tmp;
3616
3617 list_for_each_entry_safe(tmp, pos, chg, list_entry)
3618 if (tmp->type == ICE_TCAM_ADD && tmp->tcam_idx == idx) {
3619 list_del(&tmp->list_entry);
3620 devm_kfree(ice_hw_to_dev(hw), tmp);
3621 }
3622}
3623
3624/**
3625 * ice_prof_tcam_ena_dis - add enable or disable TCAM change
3626 * @hw: pointer to the HW struct
3627 * @blk: hardware block
3628 * @enable: true to enable, false to disable
3629 * @vsig: the VSIG of the TCAM entry
3630 * @tcam: pointer the TCAM info structure of the TCAM to disable
3631 * @chg: the change list
3632 *
3633 * This function appends an enable or disable TCAM entry in the change log
3634 */
3635static int
3636ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
3637 u16 vsig, struct ice_tcam_inf *tcam,
3638 struct list_head *chg)
3639{
3640 struct ice_chs_chg *p;
3641 int status;
3642
3643 u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
3644 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0x00, 0x00, 0x00 };
3645 u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x00, 0x00, 0x00, 0x00, 0x00 };
3646
3647 /* if disabling, free the TCAM */
3648 if (!enable) {
3649 status = ice_rel_tcam_idx(hw, blk, tcam->tcam_idx);
3650
3651 /* if we have already created a change for this TCAM entry, then
3652 * we need to remove that entry, in order to prevent writing to
3653 * a TCAM entry we no longer will have ownership of.
3654 */
3655 ice_rem_chg_tcam_ent(hw, tcam->tcam_idx, chg);
3656 tcam->tcam_idx = 0;
3657 tcam->in_use = 0;
3658 return status;
3659 }
3660
3661 /* for re-enabling, reallocate a TCAM */
3662 /* for entries with empty attribute masks, allocate entry from
3663 * the bottom of the TCAM table; otherwise, allocate from the
3664 * top of the table in order to give it higher priority
3665 */
3666 status = ice_alloc_tcam_ent(hw, blk, tcam->attr.mask == 0,
3667 &tcam->tcam_idx);
3668 if (status)
3669 return status;
3670
3671 /* add TCAM to change list */
3672 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
3673 if (!p)
3674 return -ENOMEM;
3675
3676 status = ice_tcam_write_entry(hw, blk, tcam->tcam_idx, tcam->prof_id,
3677 tcam->ptg, vsig, 0, tcam->attr.flags,
3678 vl_msk, dc_msk, nm_msk);
3679 if (status)
3680 goto err_ice_prof_tcam_ena_dis;
3681
3682 tcam->in_use = 1;
3683
3684 p->type = ICE_TCAM_ADD;
3685 p->add_tcam_idx = true;
3686 p->prof_id = tcam->prof_id;
3687 p->ptg = tcam->ptg;
3688 p->vsig = 0;
3689 p->tcam_idx = tcam->tcam_idx;
3690
3691 /* log change */
3692 list_add(&p->list_entry, chg);
3693
3694 return 0;
3695
3696err_ice_prof_tcam_ena_dis:
3697 devm_kfree(ice_hw_to_dev(hw), p);
3698 return status;
3699}
3700
3701/**
3702 * ice_adj_prof_priorities - adjust profile based on priorities
3703 * @hw: pointer to the HW struct
3704 * @blk: hardware block
3705 * @vsig: the VSIG for which to adjust profile priorities
3706 * @chg: the change list
3707 */
3708static int
3709ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
3710 struct list_head *chg)
3711{
3712 DECLARE_BITMAP(ptgs_used, ICE_XLT1_CNT);
3713 struct ice_vsig_prof *t;
3714 int status;
3715 u16 idx;
3716
3717 bitmap_zero(ptgs_used, ICE_XLT1_CNT);
3718 idx = vsig & ICE_VSIG_IDX_M;
3719
3720 /* Priority is based on the order in which the profiles are added. The
3721 * newest added profile has highest priority and the oldest added
3722 * profile has the lowest priority. Since the profile property list for
3723 * a VSIG is sorted from newest to oldest, this code traverses the list
3724 * in order and enables the first of each PTG that it finds (that is not
3725 * already enabled); it also disables any duplicate PTGs that it finds
3726 * in the older profiles (that are currently enabled).
3727 */
3728
3729 list_for_each_entry(t, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
3730 list) {
3731 u16 i;
3732
3733 for (i = 0; i < t->tcam_count; i++) {
3734 /* Scan the priorities from newest to oldest.
3735 * Make sure that the newest profiles take priority.
3736 */
3737 if (test_bit(t->tcam[i].ptg, ptgs_used) &&
3738 t->tcam[i].in_use) {
3739 /* need to mark this PTG as never match, as it
3740 * was already in use and therefore duplicate
3741 * (and lower priority)
3742 */
3743 status = ice_prof_tcam_ena_dis(hw, blk, false,
3744 vsig,
3745 &t->tcam[i],
3746 chg);
3747 if (status)
3748 return status;
3749 } else if (!test_bit(t->tcam[i].ptg, ptgs_used) &&
3750 !t->tcam[i].in_use) {
3751 /* need to enable this PTG, as it in not in use
3752 * and not enabled (highest priority)
3753 */
3754 status = ice_prof_tcam_ena_dis(hw, blk, true,
3755 vsig,
3756 &t->tcam[i],
3757 chg);
3758 if (status)
3759 return status;
3760 }
3761
3762 /* keep track of used ptgs */
3763 __set_bit(t->tcam[i].ptg, ptgs_used);
3764 }
3765 }
3766
3767 return 0;
3768}
3769
3770/**
3771 * ice_add_prof_id_vsig - add profile to VSIG
3772 * @hw: pointer to the HW struct
3773 * @blk: hardware block
3774 * @vsig: the VSIG to which this profile is to be added
3775 * @hdl: the profile handle indicating the profile to add
3776 * @rev: true to add entries to the end of the list
3777 * @chg: the change list
3778 */
3779static int
3780ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
3781 bool rev, struct list_head *chg)
3782{
3783 /* Masks that ignore flags */
3784 u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
3785 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0x00, 0x00, 0x00 };
3786 u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x00, 0x00, 0x00, 0x00, 0x00 };
3787 struct ice_prof_map *map;
3788 struct ice_vsig_prof *t;
3789 struct ice_chs_chg *p;
3790 u16 vsig_idx, i;
3791 int status = 0;
3792
3793 /* Error, if this VSIG already has this profile */
3794 if (ice_has_prof_vsig(hw, blk, vsig, hdl))
3795 return -EEXIST;
3796
3797 /* new VSIG profile structure */
3798 t = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*t), GFP_KERNEL);
3799 if (!t)
3800 return -ENOMEM;
3801
3802 mutex_lock(&hw->blk[blk].es.prof_map_lock);
3803 /* Get the details on the profile specified by the handle ID */
3804 map = ice_search_prof_id(hw, blk, hdl);
3805 if (!map) {
3806 status = -ENOENT;
3807 goto err_ice_add_prof_id_vsig;
3808 }
3809
3810 t->profile_cookie = map->profile_cookie;
3811 t->prof_id = map->prof_id;
3812 t->tcam_count = map->ptg_cnt;
3813
3814 /* create TCAM entries */
3815 for (i = 0; i < map->ptg_cnt; i++) {
3816 u16 tcam_idx;
3817
3818 /* add TCAM to change list */
3819 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
3820 if (!p) {
3821 status = -ENOMEM;
3822 goto err_ice_add_prof_id_vsig;
3823 }
3824
3825 /* allocate the TCAM entry index */
3826 /* for entries with empty attribute masks, allocate entry from
3827 * the bottom of the TCAM table; otherwise, allocate from the
3828 * top of the table in order to give it higher priority
3829 */
3830 status = ice_alloc_tcam_ent(hw, blk, map->attr[i].mask == 0,
3831 &tcam_idx);
3832 if (status) {
3833 devm_kfree(ice_hw_to_dev(hw), p);
3834 goto err_ice_add_prof_id_vsig;
3835 }
3836
3837 t->tcam[i].ptg = map->ptg[i];
3838 t->tcam[i].prof_id = map->prof_id;
3839 t->tcam[i].tcam_idx = tcam_idx;
3840 t->tcam[i].attr = map->attr[i];
3841 t->tcam[i].in_use = true;
3842
3843 p->type = ICE_TCAM_ADD;
3844 p->add_tcam_idx = true;
3845 p->prof_id = t->tcam[i].prof_id;
3846 p->ptg = t->tcam[i].ptg;
3847 p->vsig = vsig;
3848 p->tcam_idx = t->tcam[i].tcam_idx;
3849
3850 /* write the TCAM entry */
3851 status = ice_tcam_write_entry(hw, blk, t->tcam[i].tcam_idx,
3852 t->tcam[i].prof_id,
3853 t->tcam[i].ptg, vsig, 0, 0,
3854 vl_msk, dc_msk, nm_msk);
3855 if (status) {
3856 devm_kfree(ice_hw_to_dev(hw), p);
3857 goto err_ice_add_prof_id_vsig;
3858 }
3859
3860 /* log change */
3861 list_add(&p->list_entry, chg);
3862 }
3863
3864 /* add profile to VSIG */
3865 vsig_idx = vsig & ICE_VSIG_IDX_M;
3866 if (rev)
3867 list_add_tail(&t->list,
3868 &hw->blk[blk].xlt2.vsig_tbl[vsig_idx].prop_lst);
3869 else
3870 list_add(&t->list,
3871 &hw->blk[blk].xlt2.vsig_tbl[vsig_idx].prop_lst);
3872
3873 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
3874 return status;
3875
3876err_ice_add_prof_id_vsig:
3877 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
3878 /* let caller clean up the change list */
3879 devm_kfree(ice_hw_to_dev(hw), t);
3880 return status;
3881}
3882
3883/**
3884 * ice_create_prof_id_vsig - add a new VSIG with a single profile
3885 * @hw: pointer to the HW struct
3886 * @blk: hardware block
3887 * @vsi: the initial VSI that will be in VSIG
3888 * @hdl: the profile handle of the profile that will be added to the VSIG
3889 * @chg: the change list
3890 */
3891static int
3892ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
3893 struct list_head *chg)
3894{
3895 struct ice_chs_chg *p;
3896 u16 new_vsig;
3897 int status;
3898
3899 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
3900 if (!p)
3901 return -ENOMEM;
3902
3903 new_vsig = ice_vsig_alloc(hw, blk);
3904 if (!new_vsig) {
3905 status = -EIO;
3906 goto err_ice_create_prof_id_vsig;
3907 }
3908
3909 status = ice_move_vsi(hw, blk, vsi, new_vsig, chg);
3910 if (status)
3911 goto err_ice_create_prof_id_vsig;
3912
3913 status = ice_add_prof_id_vsig(hw, blk, new_vsig, hdl, false, chg);
3914 if (status)
3915 goto err_ice_create_prof_id_vsig;
3916
3917 p->type = ICE_VSIG_ADD;
3918 p->vsi = vsi;
3919 p->orig_vsig = ICE_DEFAULT_VSIG;
3920 p->vsig = new_vsig;
3921
3922 list_add(&p->list_entry, chg);
3923
3924 return 0;
3925
3926err_ice_create_prof_id_vsig:
3927 /* let caller clean up the change list */
3928 devm_kfree(ice_hw_to_dev(hw), p);
3929 return status;
3930}
3931
3932/**
3933 * ice_create_vsig_from_lst - create a new VSIG with a list of profiles
3934 * @hw: pointer to the HW struct
3935 * @blk: hardware block
3936 * @vsi: the initial VSI that will be in VSIG
3937 * @lst: the list of profile that will be added to the VSIG
3938 * @new_vsig: return of new VSIG
3939 * @chg: the change list
3940 */
3941static int
3942ice_create_vsig_from_lst(struct ice_hw *hw, enum ice_block blk, u16 vsi,
3943 struct list_head *lst, u16 *new_vsig,
3944 struct list_head *chg)
3945{
3946 struct ice_vsig_prof *t;
3947 int status;
3948 u16 vsig;
3949
3950 vsig = ice_vsig_alloc(hw, blk);
3951 if (!vsig)
3952 return -EIO;
3953
3954 status = ice_move_vsi(hw, blk, vsi, vsig, chg);
3955 if (status)
3956 return status;
3957
3958 list_for_each_entry(t, lst, list) {
3959 /* Reverse the order here since we are copying the list */
3960 status = ice_add_prof_id_vsig(hw, blk, vsig, t->profile_cookie,
3961 true, chg);
3962 if (status)
3963 return status;
3964 }
3965
3966 *new_vsig = vsig;
3967
3968 return 0;
3969}
3970
3971/**
3972 * ice_find_prof_vsig - find a VSIG with a specific profile handle
3973 * @hw: pointer to the HW struct
3974 * @blk: hardware block
3975 * @hdl: the profile handle of the profile to search for
3976 * @vsig: returns the VSIG with the matching profile
3977 */
3978static bool
3979ice_find_prof_vsig(struct ice_hw *hw, enum ice_block blk, u64 hdl, u16 *vsig)
3980{
3981 struct ice_vsig_prof *t;
3982 struct list_head lst;
3983 int status;
3984
3985 INIT_LIST_HEAD(&lst);
3986
3987 t = kzalloc(sizeof(*t), GFP_KERNEL);
3988 if (!t)
3989 return false;
3990
3991 t->profile_cookie = hdl;
3992 list_add(&t->list, &lst);
3993
3994 status = ice_find_dup_props_vsig(hw, blk, &lst, vsig);
3995
3996 list_del(&t->list);
3997 kfree(t);
3998
3999 return !status;
4000}
4001
4002/**
4003 * ice_add_prof_id_flow - add profile flow
4004 * @hw: pointer to the HW struct
4005 * @blk: hardware block
4006 * @vsi: the VSI to enable with the profile specified by ID
4007 * @hdl: profile handle
4008 *
4009 * Calling this function will update the hardware tables to enable the
4010 * profile indicated by the ID parameter for the VSIs specified in the VSI
4011 * array. Once successfully called, the flow will be enabled.
4012 */
4013int
4014ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
4015{
4016 struct ice_vsig_prof *tmp1, *del1;
4017 struct ice_chs_chg *tmp, *del;
4018 struct list_head union_lst;
4019 struct list_head chg;
4020 int status;
4021 u16 vsig;
4022
4023 INIT_LIST_HEAD(&union_lst);
4024 INIT_LIST_HEAD(&chg);
4025
4026 /* Get profile */
4027 status = ice_get_prof(hw, blk, hdl, &chg);
4028 if (status)
4029 return status;
4030
4031 /* determine if VSI is already part of a VSIG */
4032 status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
4033 if (!status && vsig) {
4034 bool only_vsi;
4035 u16 or_vsig;
4036 u16 ref;
4037
4038 /* found in VSIG */
4039 or_vsig = vsig;
4040
4041 /* make sure that there is no overlap/conflict between the new
4042 * characteristics and the existing ones; we don't support that
4043 * scenario
4044 */
4045 if (ice_has_prof_vsig(hw, blk, vsig, hdl)) {
4046 status = -EEXIST;
4047 goto err_ice_add_prof_id_flow;
4048 }
4049
4050 /* last VSI in the VSIG? */
4051 status = ice_vsig_get_ref(hw, blk, vsig, &ref);
4052 if (status)
4053 goto err_ice_add_prof_id_flow;
4054 only_vsi = (ref == 1);
4055
4056 /* create a union of the current profiles and the one being
4057 * added
4058 */
4059 status = ice_get_profs_vsig(hw, blk, vsig, &union_lst);
4060 if (status)
4061 goto err_ice_add_prof_id_flow;
4062
4063 status = ice_add_prof_to_lst(hw, blk, &union_lst, hdl);
4064 if (status)
4065 goto err_ice_add_prof_id_flow;
4066
4067 /* search for an existing VSIG with an exact charc match */
4068 status = ice_find_dup_props_vsig(hw, blk, &union_lst, &vsig);
4069 if (!status) {
4070 /* move VSI to the VSIG that matches */
4071 status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
4072 if (status)
4073 goto err_ice_add_prof_id_flow;
4074
4075 /* VSI has been moved out of or_vsig. If the or_vsig had
4076 * only that VSI it is now empty and can be removed.
4077 */
4078 if (only_vsi) {
4079 status = ice_rem_vsig(hw, blk, or_vsig, &chg);
4080 if (status)
4081 goto err_ice_add_prof_id_flow;
4082 }
4083 } else if (only_vsi) {
4084 /* If the original VSIG only contains one VSI, then it
4085 * will be the requesting VSI. In this case the VSI is
4086 * not sharing entries and we can simply add the new
4087 * profile to the VSIG.
4088 */
4089 status = ice_add_prof_id_vsig(hw, blk, vsig, hdl, false,
4090 &chg);
4091 if (status)
4092 goto err_ice_add_prof_id_flow;
4093
4094 /* Adjust priorities */
4095 status = ice_adj_prof_priorities(hw, blk, vsig, &chg);
4096 if (status)
4097 goto err_ice_add_prof_id_flow;
4098 } else {
4099 /* No match, so we need a new VSIG */
4100 status = ice_create_vsig_from_lst(hw, blk, vsi,
4101 &union_lst, &vsig,
4102 &chg);
4103 if (status)
4104 goto err_ice_add_prof_id_flow;
4105
4106 /* Adjust priorities */
4107 status = ice_adj_prof_priorities(hw, blk, vsig, &chg);
4108 if (status)
4109 goto err_ice_add_prof_id_flow;
4110 }
4111 } else {
4112 /* need to find or add a VSIG */
4113 /* search for an existing VSIG with an exact charc match */
4114 if (ice_find_prof_vsig(hw, blk, hdl, &vsig)) {
4115 /* found an exact match */
4116 /* add or move VSI to the VSIG that matches */
4117 status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
4118 if (status)
4119 goto err_ice_add_prof_id_flow;
4120 } else {
4121 /* we did not find an exact match */
4122 /* we need to add a VSIG */
4123 status = ice_create_prof_id_vsig(hw, blk, vsi, hdl,
4124 &chg);
4125 if (status)
4126 goto err_ice_add_prof_id_flow;
4127 }
4128 }
4129
4130 /* update hardware */
4131 if (!status)
4132 status = ice_upd_prof_hw(hw, blk, &chg);
4133
4134err_ice_add_prof_id_flow:
4135 list_for_each_entry_safe(del, tmp, &chg, list_entry) {
4136 list_del(&del->list_entry);
4137 devm_kfree(ice_hw_to_dev(hw), del);
4138 }
4139
4140 list_for_each_entry_safe(del1, tmp1, &union_lst, list) {
4141 list_del(&del1->list);
4142 devm_kfree(ice_hw_to_dev(hw), del1);
4143 }
4144
4145 return status;
4146}
4147
4148/**
4149 * ice_flow_assoc_fdir_prof - add an FDIR profile for main/ctrl VSI
4150 * @hw: pointer to the HW struct
4151 * @blk: HW block
4152 * @dest_vsi: dest VSI
4153 * @fdir_vsi: fdir programming VSI
4154 * @hdl: profile handle
4155 *
4156 * Update the hardware tables to enable the FDIR profile indicated by @hdl for
4157 * the VSI specified by @dest_vsi. On success, the flow will be enabled.
4158 *
4159 * Return: 0 on success or negative errno on failure.
4160 */
4161int
4162ice_flow_assoc_fdir_prof(struct ice_hw *hw, enum ice_block blk,
4163 u16 dest_vsi, u16 fdir_vsi, u64 hdl)
4164{
4165 u16 vsi_num;
4166 int status;
4167
4168 if (blk != ICE_BLK_FD)
4169 return -EINVAL;
4170
4171 vsi_num = ice_get_hw_vsi_num(hw, dest_vsi);
4172 status = ice_add_prof_id_flow(hw, blk, vsi_num, hdl);
4173 if (status) {
4174 ice_debug(hw, ICE_DBG_FLOW, "Adding HW profile failed for main VSI flow entry: %d\n",
4175 status);
4176 return status;
4177 }
4178
4179 vsi_num = ice_get_hw_vsi_num(hw, fdir_vsi);
4180 status = ice_add_prof_id_flow(hw, blk, vsi_num, hdl);
4181 if (status) {
4182 ice_debug(hw, ICE_DBG_FLOW, "Adding HW profile failed for ctrl VSI flow entry: %d\n",
4183 status);
4184 goto err;
4185 }
4186
4187 return 0;
4188
4189err:
4190 vsi_num = ice_get_hw_vsi_num(hw, dest_vsi);
4191 ice_rem_prof_id_flow(hw, blk, vsi_num, hdl);
4192
4193 return status;
4194}
4195
4196/**
4197 * ice_rem_prof_from_list - remove a profile from list
4198 * @hw: pointer to the HW struct
4199 * @lst: list to remove the profile from
4200 * @hdl: the profile handle indicating the profile to remove
4201 */
4202static int
4203ice_rem_prof_from_list(struct ice_hw *hw, struct list_head *lst, u64 hdl)
4204{
4205 struct ice_vsig_prof *ent, *tmp;
4206
4207 list_for_each_entry_safe(ent, tmp, lst, list)
4208 if (ent->profile_cookie == hdl) {
4209 list_del(&ent->list);
4210 devm_kfree(ice_hw_to_dev(hw), ent);
4211 return 0;
4212 }
4213
4214 return -ENOENT;
4215}
4216
4217/**
4218 * ice_rem_prof_id_flow - remove flow
4219 * @hw: pointer to the HW struct
4220 * @blk: hardware block
4221 * @vsi: the VSI from which to remove the profile specified by ID
4222 * @hdl: profile tracking handle
4223 *
4224 * Calling this function will update the hardware tables to remove the
4225 * profile indicated by the ID parameter for the VSIs specified in the VSI
4226 * array. Once successfully called, the flow will be disabled.
4227 */
4228int
4229ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
4230{
4231 struct ice_vsig_prof *tmp1, *del1;
4232 struct ice_chs_chg *tmp, *del;
4233 struct list_head chg, copy;
4234 int status;
4235 u16 vsig;
4236
4237 INIT_LIST_HEAD(©);
4238 INIT_LIST_HEAD(&chg);
4239
4240 /* determine if VSI is already part of a VSIG */
4241 status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
4242 if (!status && vsig) {
4243 bool last_profile;
4244 bool only_vsi;
4245 u16 ref;
4246
4247 /* found in VSIG */
4248 last_profile = ice_vsig_prof_id_count(hw, blk, vsig) == 1;
4249 status = ice_vsig_get_ref(hw, blk, vsig, &ref);
4250 if (status)
4251 goto err_ice_rem_prof_id_flow;
4252 only_vsi = (ref == 1);
4253
4254 if (only_vsi) {
4255 /* If the original VSIG only contains one reference,
4256 * which will be the requesting VSI, then the VSI is not
4257 * sharing entries and we can simply remove the specific
4258 * characteristics from the VSIG.
4259 */
4260
4261 if (last_profile) {
4262 /* If there are no profiles left for this VSIG,
4263 * then simply remove the VSIG.
4264 */
4265 status = ice_rem_vsig(hw, blk, vsig, &chg);
4266 if (status)
4267 goto err_ice_rem_prof_id_flow;
4268 } else {
4269 status = ice_rem_prof_id_vsig(hw, blk, vsig,
4270 hdl, &chg);
4271 if (status)
4272 goto err_ice_rem_prof_id_flow;
4273
4274 /* Adjust priorities */
4275 status = ice_adj_prof_priorities(hw, blk, vsig,
4276 &chg);
4277 if (status)
4278 goto err_ice_rem_prof_id_flow;
4279 }
4280
4281 } else {
4282 /* Make a copy of the VSIG's list of Profiles */
4283 status = ice_get_profs_vsig(hw, blk, vsig, ©);
4284 if (status)
4285 goto err_ice_rem_prof_id_flow;
4286
4287 /* Remove specified profile entry from the list */
4288 status = ice_rem_prof_from_list(hw, ©, hdl);
4289 if (status)
4290 goto err_ice_rem_prof_id_flow;
4291
4292 if (list_empty(©)) {
4293 status = ice_move_vsi(hw, blk, vsi,
4294 ICE_DEFAULT_VSIG, &chg);
4295 if (status)
4296 goto err_ice_rem_prof_id_flow;
4297
4298 } else if (!ice_find_dup_props_vsig(hw, blk, ©,
4299 &vsig)) {
4300 /* found an exact match */
4301 /* add or move VSI to the VSIG that matches */
4302 /* Search for a VSIG with a matching profile
4303 * list
4304 */
4305
4306 /* Found match, move VSI to the matching VSIG */
4307 status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
4308 if (status)
4309 goto err_ice_rem_prof_id_flow;
4310 } else {
4311 /* since no existing VSIG supports this
4312 * characteristic pattern, we need to create a
4313 * new VSIG and TCAM entries
4314 */
4315 status = ice_create_vsig_from_lst(hw, blk, vsi,
4316 ©, &vsig,
4317 &chg);
4318 if (status)
4319 goto err_ice_rem_prof_id_flow;
4320
4321 /* Adjust priorities */
4322 status = ice_adj_prof_priorities(hw, blk, vsig,
4323 &chg);
4324 if (status)
4325 goto err_ice_rem_prof_id_flow;
4326 }
4327 }
4328 } else {
4329 status = -ENOENT;
4330 }
4331
4332 /* update hardware tables */
4333 if (!status)
4334 status = ice_upd_prof_hw(hw, blk, &chg);
4335
4336err_ice_rem_prof_id_flow:
4337 list_for_each_entry_safe(del, tmp, &chg, list_entry) {
4338 list_del(&del->list_entry);
4339 devm_kfree(ice_hw_to_dev(hw), del);
4340 }
4341
4342 list_for_each_entry_safe(del1, tmp1, ©, list) {
4343 list_del(&del1->list);
4344 devm_kfree(ice_hw_to_dev(hw), del1);
4345 }
4346
4347 return status;
4348}
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2019, Intel Corporation. */
3
4#include "ice_common.h"
5#include "ice_flex_pipe.h"
6#include "ice_flow.h"
7#include "ice.h"
8
9/* For supporting double VLAN mode, it is necessary to enable or disable certain
10 * boost tcam entries. The metadata labels names that match the following
11 * prefixes will be saved to allow enabling double VLAN mode.
12 */
13#define ICE_DVM_PRE "BOOST_MAC_VLAN_DVM" /* enable these entries */
14#define ICE_SVM_PRE "BOOST_MAC_VLAN_SVM" /* disable these entries */
15
16/* To support tunneling entries by PF, the package will append the PF number to
17 * the label; for example TNL_VXLAN_PF0, TNL_VXLAN_PF1, TNL_VXLAN_PF2, etc.
18 */
19#define ICE_TNL_PRE "TNL_"
20static const struct ice_tunnel_type_scan tnls[] = {
21 { TNL_VXLAN, "TNL_VXLAN_PF" },
22 { TNL_GENEVE, "TNL_GENEVE_PF" },
23 { TNL_LAST, "" }
24};
25
26static const u32 ice_sect_lkup[ICE_BLK_COUNT][ICE_SECT_COUNT] = {
27 /* SWITCH */
28 {
29 ICE_SID_XLT0_SW,
30 ICE_SID_XLT_KEY_BUILDER_SW,
31 ICE_SID_XLT1_SW,
32 ICE_SID_XLT2_SW,
33 ICE_SID_PROFID_TCAM_SW,
34 ICE_SID_PROFID_REDIR_SW,
35 ICE_SID_FLD_VEC_SW,
36 ICE_SID_CDID_KEY_BUILDER_SW,
37 ICE_SID_CDID_REDIR_SW
38 },
39
40 /* ACL */
41 {
42 ICE_SID_XLT0_ACL,
43 ICE_SID_XLT_KEY_BUILDER_ACL,
44 ICE_SID_XLT1_ACL,
45 ICE_SID_XLT2_ACL,
46 ICE_SID_PROFID_TCAM_ACL,
47 ICE_SID_PROFID_REDIR_ACL,
48 ICE_SID_FLD_VEC_ACL,
49 ICE_SID_CDID_KEY_BUILDER_ACL,
50 ICE_SID_CDID_REDIR_ACL
51 },
52
53 /* FD */
54 {
55 ICE_SID_XLT0_FD,
56 ICE_SID_XLT_KEY_BUILDER_FD,
57 ICE_SID_XLT1_FD,
58 ICE_SID_XLT2_FD,
59 ICE_SID_PROFID_TCAM_FD,
60 ICE_SID_PROFID_REDIR_FD,
61 ICE_SID_FLD_VEC_FD,
62 ICE_SID_CDID_KEY_BUILDER_FD,
63 ICE_SID_CDID_REDIR_FD
64 },
65
66 /* RSS */
67 {
68 ICE_SID_XLT0_RSS,
69 ICE_SID_XLT_KEY_BUILDER_RSS,
70 ICE_SID_XLT1_RSS,
71 ICE_SID_XLT2_RSS,
72 ICE_SID_PROFID_TCAM_RSS,
73 ICE_SID_PROFID_REDIR_RSS,
74 ICE_SID_FLD_VEC_RSS,
75 ICE_SID_CDID_KEY_BUILDER_RSS,
76 ICE_SID_CDID_REDIR_RSS
77 },
78
79 /* PE */
80 {
81 ICE_SID_XLT0_PE,
82 ICE_SID_XLT_KEY_BUILDER_PE,
83 ICE_SID_XLT1_PE,
84 ICE_SID_XLT2_PE,
85 ICE_SID_PROFID_TCAM_PE,
86 ICE_SID_PROFID_REDIR_PE,
87 ICE_SID_FLD_VEC_PE,
88 ICE_SID_CDID_KEY_BUILDER_PE,
89 ICE_SID_CDID_REDIR_PE
90 }
91};
92
93/**
94 * ice_sect_id - returns section ID
95 * @blk: block type
96 * @sect: section type
97 *
98 * This helper function returns the proper section ID given a block type and a
99 * section type.
100 */
101static u32 ice_sect_id(enum ice_block blk, enum ice_sect sect)
102{
103 return ice_sect_lkup[blk][sect];
104}
105
106/**
107 * ice_pkg_val_buf
108 * @buf: pointer to the ice buffer
109 *
110 * This helper function validates a buffer's header.
111 */
112static struct ice_buf_hdr *ice_pkg_val_buf(struct ice_buf *buf)
113{
114 struct ice_buf_hdr *hdr;
115 u16 section_count;
116 u16 data_end;
117
118 hdr = (struct ice_buf_hdr *)buf->buf;
119 /* verify data */
120 section_count = le16_to_cpu(hdr->section_count);
121 if (section_count < ICE_MIN_S_COUNT || section_count > ICE_MAX_S_COUNT)
122 return NULL;
123
124 data_end = le16_to_cpu(hdr->data_end);
125 if (data_end < ICE_MIN_S_DATA_END || data_end > ICE_MAX_S_DATA_END)
126 return NULL;
127
128 return hdr;
129}
130
131/**
132 * ice_find_buf_table
133 * @ice_seg: pointer to the ice segment
134 *
135 * Returns the address of the buffer table within the ice segment.
136 */
137static struct ice_buf_table *ice_find_buf_table(struct ice_seg *ice_seg)
138{
139 struct ice_nvm_table *nvms;
140
141 nvms = (struct ice_nvm_table *)
142 (ice_seg->device_table +
143 le32_to_cpu(ice_seg->device_table_count));
144
145 return (__force struct ice_buf_table *)
146 (nvms->vers + le32_to_cpu(nvms->table_count));
147}
148
149/**
150 * ice_pkg_enum_buf
151 * @ice_seg: pointer to the ice segment (or NULL on subsequent calls)
152 * @state: pointer to the enum state
153 *
154 * This function will enumerate all the buffers in the ice segment. The first
155 * call is made with the ice_seg parameter non-NULL; on subsequent calls,
156 * ice_seg is set to NULL which continues the enumeration. When the function
157 * returns a NULL pointer, then the end of the buffers has been reached, or an
158 * unexpected value has been detected (for example an invalid section count or
159 * an invalid buffer end value).
160 */
161static struct ice_buf_hdr *
162ice_pkg_enum_buf(struct ice_seg *ice_seg, struct ice_pkg_enum *state)
163{
164 if (ice_seg) {
165 state->buf_table = ice_find_buf_table(ice_seg);
166 if (!state->buf_table)
167 return NULL;
168
169 state->buf_idx = 0;
170 return ice_pkg_val_buf(state->buf_table->buf_array);
171 }
172
173 if (++state->buf_idx < le32_to_cpu(state->buf_table->buf_count))
174 return ice_pkg_val_buf(state->buf_table->buf_array +
175 state->buf_idx);
176 else
177 return NULL;
178}
179
180/**
181 * ice_pkg_advance_sect
182 * @ice_seg: pointer to the ice segment (or NULL on subsequent calls)
183 * @state: pointer to the enum state
184 *
185 * This helper function will advance the section within the ice segment,
186 * also advancing the buffer if needed.
187 */
188static bool
189ice_pkg_advance_sect(struct ice_seg *ice_seg, struct ice_pkg_enum *state)
190{
191 if (!ice_seg && !state->buf)
192 return false;
193
194 if (!ice_seg && state->buf)
195 if (++state->sect_idx < le16_to_cpu(state->buf->section_count))
196 return true;
197
198 state->buf = ice_pkg_enum_buf(ice_seg, state);
199 if (!state->buf)
200 return false;
201
202 /* start of new buffer, reset section index */
203 state->sect_idx = 0;
204 return true;
205}
206
207/**
208 * ice_pkg_enum_section
209 * @ice_seg: pointer to the ice segment (or NULL on subsequent calls)
210 * @state: pointer to the enum state
211 * @sect_type: section type to enumerate
212 *
213 * This function will enumerate all the sections of a particular type in the
214 * ice segment. The first call is made with the ice_seg parameter non-NULL;
215 * on subsequent calls, ice_seg is set to NULL which continues the enumeration.
216 * When the function returns a NULL pointer, then the end of the matching
217 * sections has been reached.
218 */
219static void *
220ice_pkg_enum_section(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
221 u32 sect_type)
222{
223 u16 offset, size;
224
225 if (ice_seg)
226 state->type = sect_type;
227
228 if (!ice_pkg_advance_sect(ice_seg, state))
229 return NULL;
230
231 /* scan for next matching section */
232 while (state->buf->section_entry[state->sect_idx].type !=
233 cpu_to_le32(state->type))
234 if (!ice_pkg_advance_sect(NULL, state))
235 return NULL;
236
237 /* validate section */
238 offset = le16_to_cpu(state->buf->section_entry[state->sect_idx].offset);
239 if (offset < ICE_MIN_S_OFF || offset > ICE_MAX_S_OFF)
240 return NULL;
241
242 size = le16_to_cpu(state->buf->section_entry[state->sect_idx].size);
243 if (size < ICE_MIN_S_SZ || size > ICE_MAX_S_SZ)
244 return NULL;
245
246 /* make sure the section fits in the buffer */
247 if (offset + size > ICE_PKG_BUF_SIZE)
248 return NULL;
249
250 state->sect_type =
251 le32_to_cpu(state->buf->section_entry[state->sect_idx].type);
252
253 /* calc pointer to this section */
254 state->sect = ((u8 *)state->buf) +
255 le16_to_cpu(state->buf->section_entry[state->sect_idx].offset);
256
257 return state->sect;
258}
259
260/**
261 * ice_pkg_enum_entry
262 * @ice_seg: pointer to the ice segment (or NULL on subsequent calls)
263 * @state: pointer to the enum state
264 * @sect_type: section type to enumerate
265 * @offset: pointer to variable that receives the offset in the table (optional)
266 * @handler: function that handles access to the entries into the section type
267 *
268 * This function will enumerate all the entries in particular section type in
269 * the ice segment. The first call is made with the ice_seg parameter non-NULL;
270 * on subsequent calls, ice_seg is set to NULL which continues the enumeration.
271 * When the function returns a NULL pointer, then the end of the entries has
272 * been reached.
273 *
274 * Since each section may have a different header and entry size, the handler
275 * function is needed to determine the number and location entries in each
276 * section.
277 *
278 * The offset parameter is optional, but should be used for sections that
279 * contain an offset for each section table. For such cases, the section handler
280 * function must return the appropriate offset + index to give the absolution
281 * offset for each entry. For example, if the base for a section's header
282 * indicates a base offset of 10, and the index for the entry is 2, then
283 * section handler function should set the offset to 10 + 2 = 12.
284 */
285static void *
286ice_pkg_enum_entry(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
287 u32 sect_type, u32 *offset,
288 void *(*handler)(u32 sect_type, void *section,
289 u32 index, u32 *offset))
290{
291 void *entry;
292
293 if (ice_seg) {
294 if (!handler)
295 return NULL;
296
297 if (!ice_pkg_enum_section(ice_seg, state, sect_type))
298 return NULL;
299
300 state->entry_idx = 0;
301 state->handler = handler;
302 } else {
303 state->entry_idx++;
304 }
305
306 if (!state->handler)
307 return NULL;
308
309 /* get entry */
310 entry = state->handler(state->sect_type, state->sect, state->entry_idx,
311 offset);
312 if (!entry) {
313 /* end of a section, look for another section of this type */
314 if (!ice_pkg_enum_section(NULL, state, 0))
315 return NULL;
316
317 state->entry_idx = 0;
318 entry = state->handler(state->sect_type, state->sect,
319 state->entry_idx, offset);
320 }
321
322 return entry;
323}
324
325/**
326 * ice_hw_ptype_ena - check if the PTYPE is enabled or not
327 * @hw: pointer to the HW structure
328 * @ptype: the hardware PTYPE
329 */
330bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype)
331{
332 return ptype < ICE_FLOW_PTYPE_MAX &&
333 test_bit(ptype, hw->hw_ptype);
334}
335
336/**
337 * ice_marker_ptype_tcam_handler
338 * @sect_type: section type
339 * @section: pointer to section
340 * @index: index of the Marker PType TCAM entry to be returned
341 * @offset: pointer to receive absolute offset, always 0 for ptype TCAM sections
342 *
343 * This is a callback function that can be passed to ice_pkg_enum_entry.
344 * Handles enumeration of individual Marker PType TCAM entries.
345 */
346static void *
347ice_marker_ptype_tcam_handler(u32 sect_type, void *section, u32 index,
348 u32 *offset)
349{
350 struct ice_marker_ptype_tcam_section *marker_ptype;
351
352 if (sect_type != ICE_SID_RXPARSER_MARKER_PTYPE)
353 return NULL;
354
355 if (index > ICE_MAX_MARKER_PTYPE_TCAMS_IN_BUF)
356 return NULL;
357
358 if (offset)
359 *offset = 0;
360
361 marker_ptype = section;
362 if (index >= le16_to_cpu(marker_ptype->count))
363 return NULL;
364
365 return marker_ptype->tcam + index;
366}
367
368/**
369 * ice_fill_hw_ptype - fill the enabled PTYPE bit information
370 * @hw: pointer to the HW structure
371 */
372static void ice_fill_hw_ptype(struct ice_hw *hw)
373{
374 struct ice_marker_ptype_tcam_entry *tcam;
375 struct ice_seg *seg = hw->seg;
376 struct ice_pkg_enum state;
377
378 bitmap_zero(hw->hw_ptype, ICE_FLOW_PTYPE_MAX);
379 if (!seg)
380 return;
381
382 memset(&state, 0, sizeof(state));
383
384 do {
385 tcam = ice_pkg_enum_entry(seg, &state,
386 ICE_SID_RXPARSER_MARKER_PTYPE, NULL,
387 ice_marker_ptype_tcam_handler);
388 if (tcam &&
389 le16_to_cpu(tcam->addr) < ICE_MARKER_PTYPE_TCAM_ADDR_MAX &&
390 le16_to_cpu(tcam->ptype) < ICE_FLOW_PTYPE_MAX)
391 set_bit(le16_to_cpu(tcam->ptype), hw->hw_ptype);
392
393 seg = NULL;
394 } while (tcam);
395}
396
397/**
398 * ice_boost_tcam_handler
399 * @sect_type: section type
400 * @section: pointer to section
401 * @index: index of the boost TCAM entry to be returned
402 * @offset: pointer to receive absolute offset, always 0 for boost TCAM sections
403 *
404 * This is a callback function that can be passed to ice_pkg_enum_entry.
405 * Handles enumeration of individual boost TCAM entries.
406 */
407static void *
408ice_boost_tcam_handler(u32 sect_type, void *section, u32 index, u32 *offset)
409{
410 struct ice_boost_tcam_section *boost;
411
412 if (!section)
413 return NULL;
414
415 if (sect_type != ICE_SID_RXPARSER_BOOST_TCAM)
416 return NULL;
417
418 /* cppcheck-suppress nullPointer */
419 if (index > ICE_MAX_BST_TCAMS_IN_BUF)
420 return NULL;
421
422 if (offset)
423 *offset = 0;
424
425 boost = section;
426 if (index >= le16_to_cpu(boost->count))
427 return NULL;
428
429 return boost->tcam + index;
430}
431
432/**
433 * ice_find_boost_entry
434 * @ice_seg: pointer to the ice segment (non-NULL)
435 * @addr: Boost TCAM address of entry to search for
436 * @entry: returns pointer to the entry
437 *
438 * Finds a particular Boost TCAM entry and returns a pointer to that entry
439 * if it is found. The ice_seg parameter must not be NULL since the first call
440 * to ice_pkg_enum_entry requires a pointer to an actual ice_segment structure.
441 */
442static int
443ice_find_boost_entry(struct ice_seg *ice_seg, u16 addr,
444 struct ice_boost_tcam_entry **entry)
445{
446 struct ice_boost_tcam_entry *tcam;
447 struct ice_pkg_enum state;
448
449 memset(&state, 0, sizeof(state));
450
451 if (!ice_seg)
452 return -EINVAL;
453
454 do {
455 tcam = ice_pkg_enum_entry(ice_seg, &state,
456 ICE_SID_RXPARSER_BOOST_TCAM, NULL,
457 ice_boost_tcam_handler);
458 if (tcam && le16_to_cpu(tcam->addr) == addr) {
459 *entry = tcam;
460 return 0;
461 }
462
463 ice_seg = NULL;
464 } while (tcam);
465
466 *entry = NULL;
467 return -EIO;
468}
469
470/**
471 * ice_label_enum_handler
472 * @sect_type: section type
473 * @section: pointer to section
474 * @index: index of the label entry to be returned
475 * @offset: pointer to receive absolute offset, always zero for label sections
476 *
477 * This is a callback function that can be passed to ice_pkg_enum_entry.
478 * Handles enumeration of individual label entries.
479 */
480static void *
481ice_label_enum_handler(u32 __always_unused sect_type, void *section, u32 index,
482 u32 *offset)
483{
484 struct ice_label_section *labels;
485
486 if (!section)
487 return NULL;
488
489 /* cppcheck-suppress nullPointer */
490 if (index > ICE_MAX_LABELS_IN_BUF)
491 return NULL;
492
493 if (offset)
494 *offset = 0;
495
496 labels = section;
497 if (index >= le16_to_cpu(labels->count))
498 return NULL;
499
500 return labels->label + index;
501}
502
503/**
504 * ice_enum_labels
505 * @ice_seg: pointer to the ice segment (NULL on subsequent calls)
506 * @type: the section type that will contain the label (0 on subsequent calls)
507 * @state: ice_pkg_enum structure that will hold the state of the enumeration
508 * @value: pointer to a value that will return the label's value if found
509 *
510 * Enumerates a list of labels in the package. The caller will call
511 * ice_enum_labels(ice_seg, type, ...) to start the enumeration, then call
512 * ice_enum_labels(NULL, 0, ...) to continue. When the function returns a NULL
513 * the end of the list has been reached.
514 */
515static char *
516ice_enum_labels(struct ice_seg *ice_seg, u32 type, struct ice_pkg_enum *state,
517 u16 *value)
518{
519 struct ice_label *label;
520
521 /* Check for valid label section on first call */
522 if (type && !(type >= ICE_SID_LBL_FIRST && type <= ICE_SID_LBL_LAST))
523 return NULL;
524
525 label = ice_pkg_enum_entry(ice_seg, state, type, NULL,
526 ice_label_enum_handler);
527 if (!label)
528 return NULL;
529
530 *value = le16_to_cpu(label->value);
531 return label->name;
532}
533
534/**
535 * ice_add_tunnel_hint
536 * @hw: pointer to the HW structure
537 * @label_name: label text
538 * @val: value of the tunnel port boost entry
539 */
540static void ice_add_tunnel_hint(struct ice_hw *hw, char *label_name, u16 val)
541{
542 if (hw->tnl.count < ICE_TUNNEL_MAX_ENTRIES) {
543 u16 i;
544
545 for (i = 0; tnls[i].type != TNL_LAST; i++) {
546 size_t len = strlen(tnls[i].label_prefix);
547
548 /* Look for matching label start, before continuing */
549 if (strncmp(label_name, tnls[i].label_prefix, len))
550 continue;
551
552 /* Make sure this label matches our PF. Note that the PF
553 * character ('0' - '7') will be located where our
554 * prefix string's null terminator is located.
555 */
556 if ((label_name[len] - '0') == hw->pf_id) {
557 hw->tnl.tbl[hw->tnl.count].type = tnls[i].type;
558 hw->tnl.tbl[hw->tnl.count].valid = false;
559 hw->tnl.tbl[hw->tnl.count].boost_addr = val;
560 hw->tnl.tbl[hw->tnl.count].port = 0;
561 hw->tnl.count++;
562 break;
563 }
564 }
565 }
566}
567
568/**
569 * ice_add_dvm_hint
570 * @hw: pointer to the HW structure
571 * @val: value of the boost entry
572 * @enable: true if entry needs to be enabled, or false if needs to be disabled
573 */
574static void ice_add_dvm_hint(struct ice_hw *hw, u16 val, bool enable)
575{
576 if (hw->dvm_upd.count < ICE_DVM_MAX_ENTRIES) {
577 hw->dvm_upd.tbl[hw->dvm_upd.count].boost_addr = val;
578 hw->dvm_upd.tbl[hw->dvm_upd.count].enable = enable;
579 hw->dvm_upd.count++;
580 }
581}
582
583/**
584 * ice_init_pkg_hints
585 * @hw: pointer to the HW structure
586 * @ice_seg: pointer to the segment of the package scan (non-NULL)
587 *
588 * This function will scan the package and save off relevant information
589 * (hints or metadata) for driver use. The ice_seg parameter must not be NULL
590 * since the first call to ice_enum_labels requires a pointer to an actual
591 * ice_seg structure.
592 */
593static void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg)
594{
595 struct ice_pkg_enum state;
596 char *label_name;
597 u16 val;
598 int i;
599
600 memset(&hw->tnl, 0, sizeof(hw->tnl));
601 memset(&state, 0, sizeof(state));
602
603 if (!ice_seg)
604 return;
605
606 label_name = ice_enum_labels(ice_seg, ICE_SID_LBL_RXPARSER_TMEM, &state,
607 &val);
608
609 while (label_name) {
610 if (!strncmp(label_name, ICE_TNL_PRE, strlen(ICE_TNL_PRE)))
611 /* check for a tunnel entry */
612 ice_add_tunnel_hint(hw, label_name, val);
613
614 /* check for a dvm mode entry */
615 else if (!strncmp(label_name, ICE_DVM_PRE, strlen(ICE_DVM_PRE)))
616 ice_add_dvm_hint(hw, val, true);
617
618 /* check for a svm mode entry */
619 else if (!strncmp(label_name, ICE_SVM_PRE, strlen(ICE_SVM_PRE)))
620 ice_add_dvm_hint(hw, val, false);
621
622 label_name = ice_enum_labels(NULL, 0, &state, &val);
623 }
624
625 /* Cache the appropriate boost TCAM entry pointers for tunnels */
626 for (i = 0; i < hw->tnl.count; i++) {
627 ice_find_boost_entry(ice_seg, hw->tnl.tbl[i].boost_addr,
628 &hw->tnl.tbl[i].boost_entry);
629 if (hw->tnl.tbl[i].boost_entry) {
630 hw->tnl.tbl[i].valid = true;
631 if (hw->tnl.tbl[i].type < __TNL_TYPE_CNT)
632 hw->tnl.valid_count[hw->tnl.tbl[i].type]++;
633 }
634 }
635
636 /* Cache the appropriate boost TCAM entry pointers for DVM and SVM */
637 for (i = 0; i < hw->dvm_upd.count; i++)
638 ice_find_boost_entry(ice_seg, hw->dvm_upd.tbl[i].boost_addr,
639 &hw->dvm_upd.tbl[i].boost_entry);
640}
641
642/* Key creation */
643
644#define ICE_DC_KEY 0x1 /* don't care */
645#define ICE_DC_KEYINV 0x1
646#define ICE_NM_KEY 0x0 /* never match */
647#define ICE_NM_KEYINV 0x0
648#define ICE_0_KEY 0x1 /* match 0 */
649#define ICE_0_KEYINV 0x0
650#define ICE_1_KEY 0x0 /* match 1 */
651#define ICE_1_KEYINV 0x1
652
653/**
654 * ice_gen_key_word - generate 16-bits of a key/mask word
655 * @val: the value
656 * @valid: valid bits mask (change only the valid bits)
657 * @dont_care: don't care mask
658 * @nvr_mtch: never match mask
659 * @key: pointer to an array of where the resulting key portion
660 * @key_inv: pointer to an array of where the resulting key invert portion
661 *
662 * This function generates 16-bits from a 8-bit value, an 8-bit don't care mask
663 * and an 8-bit never match mask. The 16-bits of output are divided into 8 bits
664 * of key and 8 bits of key invert.
665 *
666 * '0' = b01, always match a 0 bit
667 * '1' = b10, always match a 1 bit
668 * '?' = b11, don't care bit (always matches)
669 * '~' = b00, never match bit
670 *
671 * Input:
672 * val: b0 1 0 1 0 1
673 * dont_care: b0 0 1 1 0 0
674 * never_mtch: b0 0 0 0 1 1
675 * ------------------------------
676 * Result: key: b01 10 11 11 00 00
677 */
678static int
679ice_gen_key_word(u8 val, u8 valid, u8 dont_care, u8 nvr_mtch, u8 *key,
680 u8 *key_inv)
681{
682 u8 in_key = *key, in_key_inv = *key_inv;
683 u8 i;
684
685 /* 'dont_care' and 'nvr_mtch' masks cannot overlap */
686 if ((dont_care ^ nvr_mtch) != (dont_care | nvr_mtch))
687 return -EIO;
688
689 *key = 0;
690 *key_inv = 0;
691
692 /* encode the 8 bits into 8-bit key and 8-bit key invert */
693 for (i = 0; i < 8; i++) {
694 *key >>= 1;
695 *key_inv >>= 1;
696
697 if (!(valid & 0x1)) { /* change only valid bits */
698 *key |= (in_key & 0x1) << 7;
699 *key_inv |= (in_key_inv & 0x1) << 7;
700 } else if (dont_care & 0x1) { /* don't care bit */
701 *key |= ICE_DC_KEY << 7;
702 *key_inv |= ICE_DC_KEYINV << 7;
703 } else if (nvr_mtch & 0x1) { /* never match bit */
704 *key |= ICE_NM_KEY << 7;
705 *key_inv |= ICE_NM_KEYINV << 7;
706 } else if (val & 0x01) { /* exact 1 match */
707 *key |= ICE_1_KEY << 7;
708 *key_inv |= ICE_1_KEYINV << 7;
709 } else { /* exact 0 match */
710 *key |= ICE_0_KEY << 7;
711 *key_inv |= ICE_0_KEYINV << 7;
712 }
713
714 dont_care >>= 1;
715 nvr_mtch >>= 1;
716 valid >>= 1;
717 val >>= 1;
718 in_key >>= 1;
719 in_key_inv >>= 1;
720 }
721
722 return 0;
723}
724
725/**
726 * ice_bits_max_set - determine if the number of bits set is within a maximum
727 * @mask: pointer to the byte array which is the mask
728 * @size: the number of bytes in the mask
729 * @max: the max number of set bits
730 *
731 * This function determines if there are at most 'max' number of bits set in an
732 * array. Returns true if the number for bits set is <= max or will return false
733 * otherwise.
734 */
735static bool ice_bits_max_set(const u8 *mask, u16 size, u16 max)
736{
737 u16 count = 0;
738 u16 i;
739
740 /* check each byte */
741 for (i = 0; i < size; i++) {
742 /* if 0, go to next byte */
743 if (!mask[i])
744 continue;
745
746 /* We know there is at least one set bit in this byte because of
747 * the above check; if we already have found 'max' number of
748 * bits set, then we can return failure now.
749 */
750 if (count == max)
751 return false;
752
753 /* count the bits in this byte, checking threshold */
754 count += hweight8(mask[i]);
755 if (count > max)
756 return false;
757 }
758
759 return true;
760}
761
762/**
763 * ice_set_key - generate a variable sized key with multiples of 16-bits
764 * @key: pointer to where the key will be stored
765 * @size: the size of the complete key in bytes (must be even)
766 * @val: array of 8-bit values that makes up the value portion of the key
767 * @upd: array of 8-bit masks that determine what key portion to update
768 * @dc: array of 8-bit masks that make up the don't care mask
769 * @nm: array of 8-bit masks that make up the never match mask
770 * @off: the offset of the first byte in the key to update
771 * @len: the number of bytes in the key update
772 *
773 * This function generates a key from a value, a don't care mask and a never
774 * match mask.
775 * upd, dc, and nm are optional parameters, and can be NULL:
776 * upd == NULL --> upd mask is all 1's (update all bits)
777 * dc == NULL --> dc mask is all 0's (no don't care bits)
778 * nm == NULL --> nm mask is all 0's (no never match bits)
779 */
780static int
781ice_set_key(u8 *key, u16 size, u8 *val, u8 *upd, u8 *dc, u8 *nm, u16 off,
782 u16 len)
783{
784 u16 half_size;
785 u16 i;
786
787 /* size must be a multiple of 2 bytes. */
788 if (size % 2)
789 return -EIO;
790
791 half_size = size / 2;
792 if (off + len > half_size)
793 return -EIO;
794
795 /* Make sure at most one bit is set in the never match mask. Having more
796 * than one never match mask bit set will cause HW to consume excessive
797 * power otherwise; this is a power management efficiency check.
798 */
799#define ICE_NVR_MTCH_BITS_MAX 1
800 if (nm && !ice_bits_max_set(nm, len, ICE_NVR_MTCH_BITS_MAX))
801 return -EIO;
802
803 for (i = 0; i < len; i++)
804 if (ice_gen_key_word(val[i], upd ? upd[i] : 0xff,
805 dc ? dc[i] : 0, nm ? nm[i] : 0,
806 key + off + i, key + half_size + off + i))
807 return -EIO;
808
809 return 0;
810}
811
812/**
813 * ice_acquire_global_cfg_lock
814 * @hw: pointer to the HW structure
815 * @access: access type (read or write)
816 *
817 * This function will request ownership of the global config lock for reading
818 * or writing of the package. When attempting to obtain write access, the
819 * caller must check for the following two return values:
820 *
821 * 0 - Means the caller has acquired the global config lock
822 * and can perform writing of the package.
823 * -EALREADY - Indicates another driver has already written the
824 * package or has found that no update was necessary; in
825 * this case, the caller can just skip performing any
826 * update of the package.
827 */
828static int
829ice_acquire_global_cfg_lock(struct ice_hw *hw,
830 enum ice_aq_res_access_type access)
831{
832 int status;
833
834 status = ice_acquire_res(hw, ICE_GLOBAL_CFG_LOCK_RES_ID, access,
835 ICE_GLOBAL_CFG_LOCK_TIMEOUT);
836
837 if (!status)
838 mutex_lock(&ice_global_cfg_lock_sw);
839 else if (status == -EALREADY)
840 ice_debug(hw, ICE_DBG_PKG, "Global config lock: No work to do\n");
841
842 return status;
843}
844
845/**
846 * ice_release_global_cfg_lock
847 * @hw: pointer to the HW structure
848 *
849 * This function will release the global config lock.
850 */
851static void ice_release_global_cfg_lock(struct ice_hw *hw)
852{
853 mutex_unlock(&ice_global_cfg_lock_sw);
854 ice_release_res(hw, ICE_GLOBAL_CFG_LOCK_RES_ID);
855}
856
857/**
858 * ice_acquire_change_lock
859 * @hw: pointer to the HW structure
860 * @access: access type (read or write)
861 *
862 * This function will request ownership of the change lock.
863 */
864int
865ice_acquire_change_lock(struct ice_hw *hw, enum ice_aq_res_access_type access)
866{
867 return ice_acquire_res(hw, ICE_CHANGE_LOCK_RES_ID, access,
868 ICE_CHANGE_LOCK_TIMEOUT);
869}
870
871/**
872 * ice_release_change_lock
873 * @hw: pointer to the HW structure
874 *
875 * This function will release the change lock using the proper Admin Command.
876 */
877void ice_release_change_lock(struct ice_hw *hw)
878{
879 ice_release_res(hw, ICE_CHANGE_LOCK_RES_ID);
880}
881
882/**
883 * ice_aq_download_pkg
884 * @hw: pointer to the hardware structure
885 * @pkg_buf: the package buffer to transfer
886 * @buf_size: the size of the package buffer
887 * @last_buf: last buffer indicator
888 * @error_offset: returns error offset
889 * @error_info: returns error information
890 * @cd: pointer to command details structure or NULL
891 *
892 * Download Package (0x0C40)
893 */
894static int
895ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
896 u16 buf_size, bool last_buf, u32 *error_offset,
897 u32 *error_info, struct ice_sq_cd *cd)
898{
899 struct ice_aqc_download_pkg *cmd;
900 struct ice_aq_desc desc;
901 int status;
902
903 if (error_offset)
904 *error_offset = 0;
905 if (error_info)
906 *error_info = 0;
907
908 cmd = &desc.params.download_pkg;
909 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_download_pkg);
910 desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);
911
912 if (last_buf)
913 cmd->flags |= ICE_AQC_DOWNLOAD_PKG_LAST_BUF;
914
915 status = ice_aq_send_cmd(hw, &desc, pkg_buf, buf_size, cd);
916 if (status == -EIO) {
917 /* Read error from buffer only when the FW returned an error */
918 struct ice_aqc_download_pkg_resp *resp;
919
920 resp = (struct ice_aqc_download_pkg_resp *)pkg_buf;
921 if (error_offset)
922 *error_offset = le32_to_cpu(resp->error_offset);
923 if (error_info)
924 *error_info = le32_to_cpu(resp->error_info);
925 }
926
927 return status;
928}
929
930/**
931 * ice_aq_upload_section
932 * @hw: pointer to the hardware structure
933 * @pkg_buf: the package buffer which will receive the section
934 * @buf_size: the size of the package buffer
935 * @cd: pointer to command details structure or NULL
936 *
937 * Upload Section (0x0C41)
938 */
939int
940ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
941 u16 buf_size, struct ice_sq_cd *cd)
942{
943 struct ice_aq_desc desc;
944
945 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_upload_section);
946 desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);
947
948 return ice_aq_send_cmd(hw, &desc, pkg_buf, buf_size, cd);
949}
950
951/**
952 * ice_aq_update_pkg
953 * @hw: pointer to the hardware structure
954 * @pkg_buf: the package cmd buffer
955 * @buf_size: the size of the package cmd buffer
956 * @last_buf: last buffer indicator
957 * @error_offset: returns error offset
958 * @error_info: returns error information
959 * @cd: pointer to command details structure or NULL
960 *
961 * Update Package (0x0C42)
962 */
963static int
964ice_aq_update_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf, u16 buf_size,
965 bool last_buf, u32 *error_offset, u32 *error_info,
966 struct ice_sq_cd *cd)
967{
968 struct ice_aqc_download_pkg *cmd;
969 struct ice_aq_desc desc;
970 int status;
971
972 if (error_offset)
973 *error_offset = 0;
974 if (error_info)
975 *error_info = 0;
976
977 cmd = &desc.params.download_pkg;
978 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_update_pkg);
979 desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);
980
981 if (last_buf)
982 cmd->flags |= ICE_AQC_DOWNLOAD_PKG_LAST_BUF;
983
984 status = ice_aq_send_cmd(hw, &desc, pkg_buf, buf_size, cd);
985 if (status == -EIO) {
986 /* Read error from buffer only when the FW returned an error */
987 struct ice_aqc_download_pkg_resp *resp;
988
989 resp = (struct ice_aqc_download_pkg_resp *)pkg_buf;
990 if (error_offset)
991 *error_offset = le32_to_cpu(resp->error_offset);
992 if (error_info)
993 *error_info = le32_to_cpu(resp->error_info);
994 }
995
996 return status;
997}
998
999/**
1000 * ice_find_seg_in_pkg
1001 * @hw: pointer to the hardware structure
1002 * @seg_type: the segment type to search for (i.e., SEGMENT_TYPE_CPK)
1003 * @pkg_hdr: pointer to the package header to be searched
1004 *
1005 * This function searches a package file for a particular segment type. On
1006 * success it returns a pointer to the segment header, otherwise it will
1007 * return NULL.
1008 */
1009static struct ice_generic_seg_hdr *
1010ice_find_seg_in_pkg(struct ice_hw *hw, u32 seg_type,
1011 struct ice_pkg_hdr *pkg_hdr)
1012{
1013 u32 i;
1014
1015 ice_debug(hw, ICE_DBG_PKG, "Package format version: %d.%d.%d.%d\n",
1016 pkg_hdr->pkg_format_ver.major, pkg_hdr->pkg_format_ver.minor,
1017 pkg_hdr->pkg_format_ver.update,
1018 pkg_hdr->pkg_format_ver.draft);
1019
1020 /* Search all package segments for the requested segment type */
1021 for (i = 0; i < le32_to_cpu(pkg_hdr->seg_count); i++) {
1022 struct ice_generic_seg_hdr *seg;
1023
1024 seg = (struct ice_generic_seg_hdr *)
1025 ((u8 *)pkg_hdr + le32_to_cpu(pkg_hdr->seg_offset[i]));
1026
1027 if (le32_to_cpu(seg->seg_type) == seg_type)
1028 return seg;
1029 }
1030
1031 return NULL;
1032}
1033
1034/**
1035 * ice_update_pkg_no_lock
1036 * @hw: pointer to the hardware structure
1037 * @bufs: pointer to an array of buffers
1038 * @count: the number of buffers in the array
1039 */
1040static int
1041ice_update_pkg_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
1042{
1043 int status = 0;
1044 u32 i;
1045
1046 for (i = 0; i < count; i++) {
1047 struct ice_buf_hdr *bh = (struct ice_buf_hdr *)(bufs + i);
1048 bool last = ((i + 1) == count);
1049 u32 offset, info;
1050
1051 status = ice_aq_update_pkg(hw, bh, le16_to_cpu(bh->data_end),
1052 last, &offset, &info, NULL);
1053
1054 if (status) {
1055 ice_debug(hw, ICE_DBG_PKG, "Update pkg failed: err %d off %d inf %d\n",
1056 status, offset, info);
1057 break;
1058 }
1059 }
1060
1061 return status;
1062}
1063
1064/**
1065 * ice_update_pkg
1066 * @hw: pointer to the hardware structure
1067 * @bufs: pointer to an array of buffers
1068 * @count: the number of buffers in the array
1069 *
1070 * Obtains change lock and updates package.
1071 */
1072static int ice_update_pkg(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
1073{
1074 int status;
1075
1076 status = ice_acquire_change_lock(hw, ICE_RES_WRITE);
1077 if (status)
1078 return status;
1079
1080 status = ice_update_pkg_no_lock(hw, bufs, count);
1081
1082 ice_release_change_lock(hw);
1083
1084 return status;
1085}
1086
1087static enum ice_ddp_state ice_map_aq_err_to_ddp_state(enum ice_aq_err aq_err)
1088{
1089 switch (aq_err) {
1090 case ICE_AQ_RC_ENOSEC:
1091 case ICE_AQ_RC_EBADSIG:
1092 return ICE_DDP_PKG_FILE_SIGNATURE_INVALID;
1093 case ICE_AQ_RC_ESVN:
1094 return ICE_DDP_PKG_FILE_REVISION_TOO_LOW;
1095 case ICE_AQ_RC_EBADMAN:
1096 case ICE_AQ_RC_EBADBUF:
1097 return ICE_DDP_PKG_LOAD_ERROR;
1098 default:
1099 return ICE_DDP_PKG_ERR;
1100 }
1101}
1102
1103/**
1104 * ice_dwnld_cfg_bufs
1105 * @hw: pointer to the hardware structure
1106 * @bufs: pointer to an array of buffers
1107 * @count: the number of buffers in the array
1108 *
1109 * Obtains global config lock and downloads the package configuration buffers
1110 * to the firmware. Metadata buffers are skipped, and the first metadata buffer
1111 * found indicates that the rest of the buffers are all metadata buffers.
1112 */
1113static enum ice_ddp_state
1114ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
1115{
1116 enum ice_ddp_state state = ICE_DDP_PKG_SUCCESS;
1117 struct ice_buf_hdr *bh;
1118 enum ice_aq_err err;
1119 u32 offset, info, i;
1120 int status;
1121
1122 if (!bufs || !count)
1123 return ICE_DDP_PKG_ERR;
1124
1125 /* If the first buffer's first section has its metadata bit set
1126 * then there are no buffers to be downloaded, and the operation is
1127 * considered a success.
1128 */
1129 bh = (struct ice_buf_hdr *)bufs;
1130 if (le32_to_cpu(bh->section_entry[0].type) & ICE_METADATA_BUF)
1131 return ICE_DDP_PKG_SUCCESS;
1132
1133 status = ice_acquire_global_cfg_lock(hw, ICE_RES_WRITE);
1134 if (status) {
1135 if (status == -EALREADY)
1136 return ICE_DDP_PKG_ALREADY_LOADED;
1137 return ice_map_aq_err_to_ddp_state(hw->adminq.sq_last_status);
1138 }
1139
1140 for (i = 0; i < count; i++) {
1141 bool last = ((i + 1) == count);
1142
1143 if (!last) {
1144 /* check next buffer for metadata flag */
1145 bh = (struct ice_buf_hdr *)(bufs + i + 1);
1146
1147 /* A set metadata flag in the next buffer will signal
1148 * that the current buffer will be the last buffer
1149 * downloaded
1150 */
1151 if (le16_to_cpu(bh->section_count))
1152 if (le32_to_cpu(bh->section_entry[0].type) &
1153 ICE_METADATA_BUF)
1154 last = true;
1155 }
1156
1157 bh = (struct ice_buf_hdr *)(bufs + i);
1158
1159 status = ice_aq_download_pkg(hw, bh, ICE_PKG_BUF_SIZE, last,
1160 &offset, &info, NULL);
1161
1162 /* Save AQ status from download package */
1163 if (status) {
1164 ice_debug(hw, ICE_DBG_PKG, "Pkg download failed: err %d off %d inf %d\n",
1165 status, offset, info);
1166 err = hw->adminq.sq_last_status;
1167 state = ice_map_aq_err_to_ddp_state(err);
1168 break;
1169 }
1170
1171 if (last)
1172 break;
1173 }
1174
1175 if (!status) {
1176 status = ice_set_vlan_mode(hw);
1177 if (status)
1178 ice_debug(hw, ICE_DBG_PKG, "Failed to set VLAN mode: err %d\n",
1179 status);
1180 }
1181
1182 ice_release_global_cfg_lock(hw);
1183
1184 return state;
1185}
1186
1187/**
1188 * ice_aq_get_pkg_info_list
1189 * @hw: pointer to the hardware structure
1190 * @pkg_info: the buffer which will receive the information list
1191 * @buf_size: the size of the pkg_info information buffer
1192 * @cd: pointer to command details structure or NULL
1193 *
1194 * Get Package Info List (0x0C43)
1195 */
1196static int
1197ice_aq_get_pkg_info_list(struct ice_hw *hw,
1198 struct ice_aqc_get_pkg_info_resp *pkg_info,
1199 u16 buf_size, struct ice_sq_cd *cd)
1200{
1201 struct ice_aq_desc desc;
1202
1203 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_pkg_info_list);
1204
1205 return ice_aq_send_cmd(hw, &desc, pkg_info, buf_size, cd);
1206}
1207
1208/**
1209 * ice_download_pkg
1210 * @hw: pointer to the hardware structure
1211 * @ice_seg: pointer to the segment of the package to be downloaded
1212 *
1213 * Handles the download of a complete package.
1214 */
1215static enum ice_ddp_state
1216ice_download_pkg(struct ice_hw *hw, struct ice_seg *ice_seg)
1217{
1218 struct ice_buf_table *ice_buf_tbl;
1219 int status;
1220
1221 ice_debug(hw, ICE_DBG_PKG, "Segment format version: %d.%d.%d.%d\n",
1222 ice_seg->hdr.seg_format_ver.major,
1223 ice_seg->hdr.seg_format_ver.minor,
1224 ice_seg->hdr.seg_format_ver.update,
1225 ice_seg->hdr.seg_format_ver.draft);
1226
1227 ice_debug(hw, ICE_DBG_PKG, "Seg: type 0x%X, size %d, name %s\n",
1228 le32_to_cpu(ice_seg->hdr.seg_type),
1229 le32_to_cpu(ice_seg->hdr.seg_size), ice_seg->hdr.seg_id);
1230
1231 ice_buf_tbl = ice_find_buf_table(ice_seg);
1232
1233 ice_debug(hw, ICE_DBG_PKG, "Seg buf count: %d\n",
1234 le32_to_cpu(ice_buf_tbl->buf_count));
1235
1236 status = ice_dwnld_cfg_bufs(hw, ice_buf_tbl->buf_array,
1237 le32_to_cpu(ice_buf_tbl->buf_count));
1238
1239 ice_post_pkg_dwnld_vlan_mode_cfg(hw);
1240
1241 return status;
1242}
1243
1244/**
1245 * ice_init_pkg_info
1246 * @hw: pointer to the hardware structure
1247 * @pkg_hdr: pointer to the driver's package hdr
1248 *
1249 * Saves off the package details into the HW structure.
1250 */
1251static enum ice_ddp_state
1252ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
1253{
1254 struct ice_generic_seg_hdr *seg_hdr;
1255
1256 if (!pkg_hdr)
1257 return ICE_DDP_PKG_ERR;
1258
1259 seg_hdr = ice_find_seg_in_pkg(hw, SEGMENT_TYPE_ICE, pkg_hdr);
1260 if (seg_hdr) {
1261 struct ice_meta_sect *meta;
1262 struct ice_pkg_enum state;
1263
1264 memset(&state, 0, sizeof(state));
1265
1266 /* Get package information from the Metadata Section */
1267 meta = ice_pkg_enum_section((struct ice_seg *)seg_hdr, &state,
1268 ICE_SID_METADATA);
1269 if (!meta) {
1270 ice_debug(hw, ICE_DBG_INIT, "Did not find ice metadata section in package\n");
1271 return ICE_DDP_PKG_INVALID_FILE;
1272 }
1273
1274 hw->pkg_ver = meta->ver;
1275 memcpy(hw->pkg_name, meta->name, sizeof(meta->name));
1276
1277 ice_debug(hw, ICE_DBG_PKG, "Pkg: %d.%d.%d.%d, %s\n",
1278 meta->ver.major, meta->ver.minor, meta->ver.update,
1279 meta->ver.draft, meta->name);
1280
1281 hw->ice_seg_fmt_ver = seg_hdr->seg_format_ver;
1282 memcpy(hw->ice_seg_id, seg_hdr->seg_id,
1283 sizeof(hw->ice_seg_id));
1284
1285 ice_debug(hw, ICE_DBG_PKG, "Ice Seg: %d.%d.%d.%d, %s\n",
1286 seg_hdr->seg_format_ver.major,
1287 seg_hdr->seg_format_ver.minor,
1288 seg_hdr->seg_format_ver.update,
1289 seg_hdr->seg_format_ver.draft,
1290 seg_hdr->seg_id);
1291 } else {
1292 ice_debug(hw, ICE_DBG_INIT, "Did not find ice segment in driver package\n");
1293 return ICE_DDP_PKG_INVALID_FILE;
1294 }
1295
1296 return ICE_DDP_PKG_SUCCESS;
1297}
1298
1299/**
1300 * ice_get_pkg_info
1301 * @hw: pointer to the hardware structure
1302 *
1303 * Store details of the package currently loaded in HW into the HW structure.
1304 */
1305static enum ice_ddp_state ice_get_pkg_info(struct ice_hw *hw)
1306{
1307 enum ice_ddp_state state = ICE_DDP_PKG_SUCCESS;
1308 struct ice_aqc_get_pkg_info_resp *pkg_info;
1309 u16 size;
1310 u32 i;
1311
1312 size = struct_size(pkg_info, pkg_info, ICE_PKG_CNT);
1313 pkg_info = kzalloc(size, GFP_KERNEL);
1314 if (!pkg_info)
1315 return ICE_DDP_PKG_ERR;
1316
1317 if (ice_aq_get_pkg_info_list(hw, pkg_info, size, NULL)) {
1318 state = ICE_DDP_PKG_ERR;
1319 goto init_pkg_free_alloc;
1320 }
1321
1322 for (i = 0; i < le32_to_cpu(pkg_info->count); i++) {
1323#define ICE_PKG_FLAG_COUNT 4
1324 char flags[ICE_PKG_FLAG_COUNT + 1] = { 0 };
1325 u8 place = 0;
1326
1327 if (pkg_info->pkg_info[i].is_active) {
1328 flags[place++] = 'A';
1329 hw->active_pkg_ver = pkg_info->pkg_info[i].ver;
1330 hw->active_track_id =
1331 le32_to_cpu(pkg_info->pkg_info[i].track_id);
1332 memcpy(hw->active_pkg_name,
1333 pkg_info->pkg_info[i].name,
1334 sizeof(pkg_info->pkg_info[i].name));
1335 hw->active_pkg_in_nvm = pkg_info->pkg_info[i].is_in_nvm;
1336 }
1337 if (pkg_info->pkg_info[i].is_active_at_boot)
1338 flags[place++] = 'B';
1339 if (pkg_info->pkg_info[i].is_modified)
1340 flags[place++] = 'M';
1341 if (pkg_info->pkg_info[i].is_in_nvm)
1342 flags[place++] = 'N';
1343
1344 ice_debug(hw, ICE_DBG_PKG, "Pkg[%d]: %d.%d.%d.%d,%s,%s\n",
1345 i, pkg_info->pkg_info[i].ver.major,
1346 pkg_info->pkg_info[i].ver.minor,
1347 pkg_info->pkg_info[i].ver.update,
1348 pkg_info->pkg_info[i].ver.draft,
1349 pkg_info->pkg_info[i].name, flags);
1350 }
1351
1352init_pkg_free_alloc:
1353 kfree(pkg_info);
1354
1355 return state;
1356}
1357
1358/**
1359 * ice_verify_pkg - verify package
1360 * @pkg: pointer to the package buffer
1361 * @len: size of the package buffer
1362 *
1363 * Verifies various attributes of the package file, including length, format
1364 * version, and the requirement of at least one segment.
1365 */
1366static enum ice_ddp_state ice_verify_pkg(struct ice_pkg_hdr *pkg, u32 len)
1367{
1368 u32 seg_count;
1369 u32 i;
1370
1371 if (len < struct_size(pkg, seg_offset, 1))
1372 return ICE_DDP_PKG_INVALID_FILE;
1373
1374 if (pkg->pkg_format_ver.major != ICE_PKG_FMT_VER_MAJ ||
1375 pkg->pkg_format_ver.minor != ICE_PKG_FMT_VER_MNR ||
1376 pkg->pkg_format_ver.update != ICE_PKG_FMT_VER_UPD ||
1377 pkg->pkg_format_ver.draft != ICE_PKG_FMT_VER_DFT)
1378 return ICE_DDP_PKG_INVALID_FILE;
1379
1380 /* pkg must have at least one segment */
1381 seg_count = le32_to_cpu(pkg->seg_count);
1382 if (seg_count < 1)
1383 return ICE_DDP_PKG_INVALID_FILE;
1384
1385 /* make sure segment array fits in package length */
1386 if (len < struct_size(pkg, seg_offset, seg_count))
1387 return ICE_DDP_PKG_INVALID_FILE;
1388
1389 /* all segments must fit within length */
1390 for (i = 0; i < seg_count; i++) {
1391 u32 off = le32_to_cpu(pkg->seg_offset[i]);
1392 struct ice_generic_seg_hdr *seg;
1393
1394 /* segment header must fit */
1395 if (len < off + sizeof(*seg))
1396 return ICE_DDP_PKG_INVALID_FILE;
1397
1398 seg = (struct ice_generic_seg_hdr *)((u8 *)pkg + off);
1399
1400 /* segment body must fit */
1401 if (len < off + le32_to_cpu(seg->seg_size))
1402 return ICE_DDP_PKG_INVALID_FILE;
1403 }
1404
1405 return ICE_DDP_PKG_SUCCESS;
1406}
1407
1408/**
1409 * ice_free_seg - free package segment pointer
1410 * @hw: pointer to the hardware structure
1411 *
1412 * Frees the package segment pointer in the proper manner, depending on if the
1413 * segment was allocated or just the passed in pointer was stored.
1414 */
1415void ice_free_seg(struct ice_hw *hw)
1416{
1417 if (hw->pkg_copy) {
1418 devm_kfree(ice_hw_to_dev(hw), hw->pkg_copy);
1419 hw->pkg_copy = NULL;
1420 hw->pkg_size = 0;
1421 }
1422 hw->seg = NULL;
1423}
1424
1425/**
1426 * ice_init_pkg_regs - initialize additional package registers
1427 * @hw: pointer to the hardware structure
1428 */
1429static void ice_init_pkg_regs(struct ice_hw *hw)
1430{
1431#define ICE_SW_BLK_INP_MASK_L 0xFFFFFFFF
1432#define ICE_SW_BLK_INP_MASK_H 0x0000FFFF
1433#define ICE_SW_BLK_IDX 0
1434
1435 /* setup Switch block input mask, which is 48-bits in two parts */
1436 wr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L);
1437 wr32(hw, GL_PREEXT_L2_PMASK1(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_H);
1438}
1439
1440/**
1441 * ice_chk_pkg_version - check package version for compatibility with driver
1442 * @pkg_ver: pointer to a version structure to check
1443 *
1444 * Check to make sure that the package about to be downloaded is compatible with
1445 * the driver. To be compatible, the major and minor components of the package
1446 * version must match our ICE_PKG_SUPP_VER_MAJ and ICE_PKG_SUPP_VER_MNR
1447 * definitions.
1448 */
1449static enum ice_ddp_state ice_chk_pkg_version(struct ice_pkg_ver *pkg_ver)
1450{
1451 if (pkg_ver->major > ICE_PKG_SUPP_VER_MAJ ||
1452 (pkg_ver->major == ICE_PKG_SUPP_VER_MAJ &&
1453 pkg_ver->minor > ICE_PKG_SUPP_VER_MNR))
1454 return ICE_DDP_PKG_FILE_VERSION_TOO_HIGH;
1455 else if (pkg_ver->major < ICE_PKG_SUPP_VER_MAJ ||
1456 (pkg_ver->major == ICE_PKG_SUPP_VER_MAJ &&
1457 pkg_ver->minor < ICE_PKG_SUPP_VER_MNR))
1458 return ICE_DDP_PKG_FILE_VERSION_TOO_LOW;
1459
1460 return ICE_DDP_PKG_SUCCESS;
1461}
1462
1463/**
1464 * ice_chk_pkg_compat
1465 * @hw: pointer to the hardware structure
1466 * @ospkg: pointer to the package hdr
1467 * @seg: pointer to the package segment hdr
1468 *
1469 * This function checks the package version compatibility with driver and NVM
1470 */
1471static enum ice_ddp_state
1472ice_chk_pkg_compat(struct ice_hw *hw, struct ice_pkg_hdr *ospkg,
1473 struct ice_seg **seg)
1474{
1475 struct ice_aqc_get_pkg_info_resp *pkg;
1476 enum ice_ddp_state state;
1477 u16 size;
1478 u32 i;
1479
1480 /* Check package version compatibility */
1481 state = ice_chk_pkg_version(&hw->pkg_ver);
1482 if (state) {
1483 ice_debug(hw, ICE_DBG_INIT, "Package version check failed.\n");
1484 return state;
1485 }
1486
1487 /* find ICE segment in given package */
1488 *seg = (struct ice_seg *)ice_find_seg_in_pkg(hw, SEGMENT_TYPE_ICE,
1489 ospkg);
1490 if (!*seg) {
1491 ice_debug(hw, ICE_DBG_INIT, "no ice segment in package.\n");
1492 return ICE_DDP_PKG_INVALID_FILE;
1493 }
1494
1495 /* Check if FW is compatible with the OS package */
1496 size = struct_size(pkg, pkg_info, ICE_PKG_CNT);
1497 pkg = kzalloc(size, GFP_KERNEL);
1498 if (!pkg)
1499 return ICE_DDP_PKG_ERR;
1500
1501 if (ice_aq_get_pkg_info_list(hw, pkg, size, NULL)) {
1502 state = ICE_DDP_PKG_LOAD_ERROR;
1503 goto fw_ddp_compat_free_alloc;
1504 }
1505
1506 for (i = 0; i < le32_to_cpu(pkg->count); i++) {
1507 /* loop till we find the NVM package */
1508 if (!pkg->pkg_info[i].is_in_nvm)
1509 continue;
1510 if ((*seg)->hdr.seg_format_ver.major !=
1511 pkg->pkg_info[i].ver.major ||
1512 (*seg)->hdr.seg_format_ver.minor >
1513 pkg->pkg_info[i].ver.minor) {
1514 state = ICE_DDP_PKG_FW_MISMATCH;
1515 ice_debug(hw, ICE_DBG_INIT, "OS package is not compatible with NVM.\n");
1516 }
1517 /* done processing NVM package so break */
1518 break;
1519 }
1520fw_ddp_compat_free_alloc:
1521 kfree(pkg);
1522 return state;
1523}
1524
1525/**
1526 * ice_sw_fv_handler
1527 * @sect_type: section type
1528 * @section: pointer to section
1529 * @index: index of the field vector entry to be returned
1530 * @offset: ptr to variable that receives the offset in the field vector table
1531 *
1532 * This is a callback function that can be passed to ice_pkg_enum_entry.
1533 * This function treats the given section as of type ice_sw_fv_section and
1534 * enumerates offset field. "offset" is an index into the field vector table.
1535 */
1536static void *
1537ice_sw_fv_handler(u32 sect_type, void *section, u32 index, u32 *offset)
1538{
1539 struct ice_sw_fv_section *fv_section = section;
1540
1541 if (!section || sect_type != ICE_SID_FLD_VEC_SW)
1542 return NULL;
1543 if (index >= le16_to_cpu(fv_section->count))
1544 return NULL;
1545 if (offset)
1546 /* "index" passed in to this function is relative to a given
1547 * 4k block. To get to the true index into the field vector
1548 * table need to add the relative index to the base_offset
1549 * field of this section
1550 */
1551 *offset = le16_to_cpu(fv_section->base_offset) + index;
1552 return fv_section->fv + index;
1553}
1554
1555/**
1556 * ice_get_prof_index_max - get the max profile index for used profile
1557 * @hw: pointer to the HW struct
1558 *
1559 * Calling this function will get the max profile index for used profile
1560 * and store the index number in struct ice_switch_info *switch_info
1561 * in HW for following use.
1562 */
1563static int ice_get_prof_index_max(struct ice_hw *hw)
1564{
1565 u16 prof_index = 0, j, max_prof_index = 0;
1566 struct ice_pkg_enum state;
1567 struct ice_seg *ice_seg;
1568 bool flag = false;
1569 struct ice_fv *fv;
1570 u32 offset;
1571
1572 memset(&state, 0, sizeof(state));
1573
1574 if (!hw->seg)
1575 return -EINVAL;
1576
1577 ice_seg = hw->seg;
1578
1579 do {
1580 fv = ice_pkg_enum_entry(ice_seg, &state, ICE_SID_FLD_VEC_SW,
1581 &offset, ice_sw_fv_handler);
1582 if (!fv)
1583 break;
1584 ice_seg = NULL;
1585
1586 /* in the profile that not be used, the prot_id is set to 0xff
1587 * and the off is set to 0x1ff for all the field vectors.
1588 */
1589 for (j = 0; j < hw->blk[ICE_BLK_SW].es.fvw; j++)
1590 if (fv->ew[j].prot_id != ICE_PROT_INVALID ||
1591 fv->ew[j].off != ICE_FV_OFFSET_INVAL)
1592 flag = true;
1593 if (flag && prof_index > max_prof_index)
1594 max_prof_index = prof_index;
1595
1596 prof_index++;
1597 flag = false;
1598 } while (fv);
1599
1600 hw->switch_info->max_used_prof_index = max_prof_index;
1601
1602 return 0;
1603}
1604
1605/**
1606 * ice_get_ddp_pkg_state - get DDP pkg state after download
1607 * @hw: pointer to the HW struct
1608 * @already_loaded: indicates if pkg was already loaded onto the device
1609 */
1610static enum ice_ddp_state
1611ice_get_ddp_pkg_state(struct ice_hw *hw, bool already_loaded)
1612{
1613 if (hw->pkg_ver.major == hw->active_pkg_ver.major &&
1614 hw->pkg_ver.minor == hw->active_pkg_ver.minor &&
1615 hw->pkg_ver.update == hw->active_pkg_ver.update &&
1616 hw->pkg_ver.draft == hw->active_pkg_ver.draft &&
1617 !memcmp(hw->pkg_name, hw->active_pkg_name, sizeof(hw->pkg_name))) {
1618 if (already_loaded)
1619 return ICE_DDP_PKG_SAME_VERSION_ALREADY_LOADED;
1620 else
1621 return ICE_DDP_PKG_SUCCESS;
1622 } else if (hw->active_pkg_ver.major != ICE_PKG_SUPP_VER_MAJ ||
1623 hw->active_pkg_ver.minor != ICE_PKG_SUPP_VER_MNR) {
1624 return ICE_DDP_PKG_ALREADY_LOADED_NOT_SUPPORTED;
1625 } else if (hw->active_pkg_ver.major == ICE_PKG_SUPP_VER_MAJ &&
1626 hw->active_pkg_ver.minor == ICE_PKG_SUPP_VER_MNR) {
1627 return ICE_DDP_PKG_COMPATIBLE_ALREADY_LOADED;
1628 } else {
1629 return ICE_DDP_PKG_ERR;
1630 }
1631}
1632
1633/**
1634 * ice_init_pkg - initialize/download package
1635 * @hw: pointer to the hardware structure
1636 * @buf: pointer to the package buffer
1637 * @len: size of the package buffer
1638 *
1639 * This function initializes a package. The package contains HW tables
1640 * required to do packet processing. First, the function extracts package
1641 * information such as version. Then it finds the ice configuration segment
1642 * within the package; this function then saves a copy of the segment pointer
1643 * within the supplied package buffer. Next, the function will cache any hints
1644 * from the package, followed by downloading the package itself. Note, that if
1645 * a previous PF driver has already downloaded the package successfully, then
1646 * the current driver will not have to download the package again.
1647 *
1648 * The local package contents will be used to query default behavior and to
1649 * update specific sections of the HW's version of the package (e.g. to update
1650 * the parse graph to understand new protocols).
1651 *
1652 * This function stores a pointer to the package buffer memory, and it is
1653 * expected that the supplied buffer will not be freed immediately. If the
1654 * package buffer needs to be freed, such as when read from a file, use
1655 * ice_copy_and_init_pkg() instead of directly calling ice_init_pkg() in this
1656 * case.
1657 */
1658enum ice_ddp_state ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
1659{
1660 bool already_loaded = false;
1661 enum ice_ddp_state state;
1662 struct ice_pkg_hdr *pkg;
1663 struct ice_seg *seg;
1664
1665 if (!buf || !len)
1666 return ICE_DDP_PKG_ERR;
1667
1668 pkg = (struct ice_pkg_hdr *)buf;
1669 state = ice_verify_pkg(pkg, len);
1670 if (state) {
1671 ice_debug(hw, ICE_DBG_INIT, "failed to verify pkg (err: %d)\n",
1672 state);
1673 return state;
1674 }
1675
1676 /* initialize package info */
1677 state = ice_init_pkg_info(hw, pkg);
1678 if (state)
1679 return state;
1680
1681 /* before downloading the package, check package version for
1682 * compatibility with driver
1683 */
1684 state = ice_chk_pkg_compat(hw, pkg, &seg);
1685 if (state)
1686 return state;
1687
1688 /* initialize package hints and then download package */
1689 ice_init_pkg_hints(hw, seg);
1690 state = ice_download_pkg(hw, seg);
1691 if (state == ICE_DDP_PKG_ALREADY_LOADED) {
1692 ice_debug(hw, ICE_DBG_INIT, "package previously loaded - no work.\n");
1693 already_loaded = true;
1694 }
1695
1696 /* Get information on the package currently loaded in HW, then make sure
1697 * the driver is compatible with this version.
1698 */
1699 if (!state || state == ICE_DDP_PKG_ALREADY_LOADED) {
1700 state = ice_get_pkg_info(hw);
1701 if (!state)
1702 state = ice_get_ddp_pkg_state(hw, already_loaded);
1703 }
1704
1705 if (ice_is_init_pkg_successful(state)) {
1706 hw->seg = seg;
1707 /* on successful package download update other required
1708 * registers to support the package and fill HW tables
1709 * with package content.
1710 */
1711 ice_init_pkg_regs(hw);
1712 ice_fill_blk_tbls(hw);
1713 ice_fill_hw_ptype(hw);
1714 ice_get_prof_index_max(hw);
1715 } else {
1716 ice_debug(hw, ICE_DBG_INIT, "package load failed, %d\n",
1717 state);
1718 }
1719
1720 return state;
1721}
1722
1723/**
1724 * ice_copy_and_init_pkg - initialize/download a copy of the package
1725 * @hw: pointer to the hardware structure
1726 * @buf: pointer to the package buffer
1727 * @len: size of the package buffer
1728 *
1729 * This function copies the package buffer, and then calls ice_init_pkg() to
1730 * initialize the copied package contents.
1731 *
1732 * The copying is necessary if the package buffer supplied is constant, or if
1733 * the memory may disappear shortly after calling this function.
1734 *
1735 * If the package buffer resides in the data segment and can be modified, the
1736 * caller is free to use ice_init_pkg() instead of ice_copy_and_init_pkg().
1737 *
1738 * However, if the package buffer needs to be copied first, such as when being
1739 * read from a file, the caller should use ice_copy_and_init_pkg().
1740 *
1741 * This function will first copy the package buffer, before calling
1742 * ice_init_pkg(). The caller is free to immediately destroy the original
1743 * package buffer, as the new copy will be managed by this function and
1744 * related routines.
1745 */
1746enum ice_ddp_state
1747ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len)
1748{
1749 enum ice_ddp_state state;
1750 u8 *buf_copy;
1751
1752 if (!buf || !len)
1753 return ICE_DDP_PKG_ERR;
1754
1755 buf_copy = devm_kmemdup(ice_hw_to_dev(hw), buf, len, GFP_KERNEL);
1756
1757 state = ice_init_pkg(hw, buf_copy, len);
1758 if (!ice_is_init_pkg_successful(state)) {
1759 /* Free the copy, since we failed to initialize the package */
1760 devm_kfree(ice_hw_to_dev(hw), buf_copy);
1761 } else {
1762 /* Track the copied pkg so we can free it later */
1763 hw->pkg_copy = buf_copy;
1764 hw->pkg_size = len;
1765 }
1766
1767 return state;
1768}
1769
1770/**
1771 * ice_is_init_pkg_successful - check if DDP init was successful
1772 * @state: state of the DDP pkg after download
1773 */
1774bool ice_is_init_pkg_successful(enum ice_ddp_state state)
1775{
1776 switch (state) {
1777 case ICE_DDP_PKG_SUCCESS:
1778 case ICE_DDP_PKG_SAME_VERSION_ALREADY_LOADED:
1779 case ICE_DDP_PKG_COMPATIBLE_ALREADY_LOADED:
1780 return true;
1781 default:
1782 return false;
1783 }
1784}
1785
1786/**
1787 * ice_pkg_buf_alloc
1788 * @hw: pointer to the HW structure
1789 *
1790 * Allocates a package buffer and returns a pointer to the buffer header.
1791 * Note: all package contents must be in Little Endian form.
1792 */
1793static struct ice_buf_build *ice_pkg_buf_alloc(struct ice_hw *hw)
1794{
1795 struct ice_buf_build *bld;
1796 struct ice_buf_hdr *buf;
1797
1798 bld = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*bld), GFP_KERNEL);
1799 if (!bld)
1800 return NULL;
1801
1802 buf = (struct ice_buf_hdr *)bld;
1803 buf->data_end = cpu_to_le16(offsetof(struct ice_buf_hdr,
1804 section_entry));
1805 return bld;
1806}
1807
1808static bool ice_is_gtp_u_profile(u16 prof_idx)
1809{
1810 return (prof_idx >= ICE_PROFID_IPV6_GTPU_TEID &&
1811 prof_idx <= ICE_PROFID_IPV6_GTPU_IPV6_TCP_INNER) ||
1812 prof_idx == ICE_PROFID_IPV4_GTPU_TEID;
1813}
1814
1815static bool ice_is_gtp_c_profile(u16 prof_idx)
1816{
1817 switch (prof_idx) {
1818 case ICE_PROFID_IPV4_GTPC_TEID:
1819 case ICE_PROFID_IPV4_GTPC_NO_TEID:
1820 case ICE_PROFID_IPV6_GTPC_TEID:
1821 case ICE_PROFID_IPV6_GTPC_NO_TEID:
1822 return true;
1823 default:
1824 return false;
1825 }
1826}
1827
1828/**
1829 * ice_get_sw_prof_type - determine switch profile type
1830 * @hw: pointer to the HW structure
1831 * @fv: pointer to the switch field vector
1832 * @prof_idx: profile index to check
1833 */
1834static enum ice_prof_type
1835ice_get_sw_prof_type(struct ice_hw *hw, struct ice_fv *fv, u32 prof_idx)
1836{
1837 u16 i;
1838
1839 if (ice_is_gtp_c_profile(prof_idx))
1840 return ICE_PROF_TUN_GTPC;
1841
1842 if (ice_is_gtp_u_profile(prof_idx))
1843 return ICE_PROF_TUN_GTPU;
1844
1845 for (i = 0; i < hw->blk[ICE_BLK_SW].es.fvw; i++) {
1846 /* UDP tunnel will have UDP_OF protocol ID and VNI offset */
1847 if (fv->ew[i].prot_id == (u8)ICE_PROT_UDP_OF &&
1848 fv->ew[i].off == ICE_VNI_OFFSET)
1849 return ICE_PROF_TUN_UDP;
1850
1851 /* GRE tunnel will have GRE protocol */
1852 if (fv->ew[i].prot_id == (u8)ICE_PROT_GRE_OF)
1853 return ICE_PROF_TUN_GRE;
1854 }
1855
1856 return ICE_PROF_NON_TUN;
1857}
1858
1859/**
1860 * ice_get_sw_fv_bitmap - Get switch field vector bitmap based on profile type
1861 * @hw: pointer to hardware structure
1862 * @req_profs: type of profiles requested
1863 * @bm: pointer to memory for returning the bitmap of field vectors
1864 */
1865void
1866ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type req_profs,
1867 unsigned long *bm)
1868{
1869 struct ice_pkg_enum state;
1870 struct ice_seg *ice_seg;
1871 struct ice_fv *fv;
1872
1873 if (req_profs == ICE_PROF_ALL) {
1874 bitmap_set(bm, 0, ICE_MAX_NUM_PROFILES);
1875 return;
1876 }
1877
1878 memset(&state, 0, sizeof(state));
1879 bitmap_zero(bm, ICE_MAX_NUM_PROFILES);
1880 ice_seg = hw->seg;
1881 do {
1882 enum ice_prof_type prof_type;
1883 u32 offset;
1884
1885 fv = ice_pkg_enum_entry(ice_seg, &state, ICE_SID_FLD_VEC_SW,
1886 &offset, ice_sw_fv_handler);
1887 ice_seg = NULL;
1888
1889 if (fv) {
1890 /* Determine field vector type */
1891 prof_type = ice_get_sw_prof_type(hw, fv, offset);
1892
1893 if (req_profs & prof_type)
1894 set_bit((u16)offset, bm);
1895 }
1896 } while (fv);
1897}
1898
1899/**
1900 * ice_get_sw_fv_list
1901 * @hw: pointer to the HW structure
1902 * @lkups: list of protocol types
1903 * @bm: bitmap of field vectors to consider
1904 * @fv_list: Head of a list
1905 *
1906 * Finds all the field vector entries from switch block that contain
1907 * a given protocol ID and offset and returns a list of structures of type
1908 * "ice_sw_fv_list_entry". Every structure in the list has a field vector
1909 * definition and profile ID information
1910 * NOTE: The caller of the function is responsible for freeing the memory
1911 * allocated for every list entry.
1912 */
1913int
1914ice_get_sw_fv_list(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups,
1915 unsigned long *bm, struct list_head *fv_list)
1916{
1917 struct ice_sw_fv_list_entry *fvl;
1918 struct ice_sw_fv_list_entry *tmp;
1919 struct ice_pkg_enum state;
1920 struct ice_seg *ice_seg;
1921 struct ice_fv *fv;
1922 u32 offset;
1923
1924 memset(&state, 0, sizeof(state));
1925
1926 if (!lkups->n_val_words || !hw->seg)
1927 return -EINVAL;
1928
1929 ice_seg = hw->seg;
1930 do {
1931 u16 i;
1932
1933 fv = ice_pkg_enum_entry(ice_seg, &state, ICE_SID_FLD_VEC_SW,
1934 &offset, ice_sw_fv_handler);
1935 if (!fv)
1936 break;
1937 ice_seg = NULL;
1938
1939 /* If field vector is not in the bitmap list, then skip this
1940 * profile.
1941 */
1942 if (!test_bit((u16)offset, bm))
1943 continue;
1944
1945 for (i = 0; i < lkups->n_val_words; i++) {
1946 int j;
1947
1948 for (j = 0; j < hw->blk[ICE_BLK_SW].es.fvw; j++)
1949 if (fv->ew[j].prot_id ==
1950 lkups->fv_words[i].prot_id &&
1951 fv->ew[j].off == lkups->fv_words[i].off)
1952 break;
1953 if (j >= hw->blk[ICE_BLK_SW].es.fvw)
1954 break;
1955 if (i + 1 == lkups->n_val_words) {
1956 fvl = devm_kzalloc(ice_hw_to_dev(hw),
1957 sizeof(*fvl), GFP_KERNEL);
1958 if (!fvl)
1959 goto err;
1960 fvl->fv_ptr = fv;
1961 fvl->profile_id = offset;
1962 list_add(&fvl->list_entry, fv_list);
1963 break;
1964 }
1965 }
1966 } while (fv);
1967 if (list_empty(fv_list)) {
1968 dev_warn(ice_hw_to_dev(hw), "Required profiles not found in currently loaded DDP package");
1969 return -EIO;
1970 }
1971
1972 return 0;
1973
1974err:
1975 list_for_each_entry_safe(fvl, tmp, fv_list, list_entry) {
1976 list_del(&fvl->list_entry);
1977 devm_kfree(ice_hw_to_dev(hw), fvl);
1978 }
1979
1980 return -ENOMEM;
1981}
1982
1983/**
1984 * ice_init_prof_result_bm - Initialize the profile result index bitmap
1985 * @hw: pointer to hardware structure
1986 */
1987void ice_init_prof_result_bm(struct ice_hw *hw)
1988{
1989 struct ice_pkg_enum state;
1990 struct ice_seg *ice_seg;
1991 struct ice_fv *fv;
1992
1993 memset(&state, 0, sizeof(state));
1994
1995 if (!hw->seg)
1996 return;
1997
1998 ice_seg = hw->seg;
1999 do {
2000 u32 off;
2001 u16 i;
2002
2003 fv = ice_pkg_enum_entry(ice_seg, &state, ICE_SID_FLD_VEC_SW,
2004 &off, ice_sw_fv_handler);
2005 ice_seg = NULL;
2006 if (!fv)
2007 break;
2008
2009 bitmap_zero(hw->switch_info->prof_res_bm[off],
2010 ICE_MAX_FV_WORDS);
2011
2012 /* Determine empty field vector indices, these can be
2013 * used for recipe results. Skip index 0, since it is
2014 * always used for Switch ID.
2015 */
2016 for (i = 1; i < ICE_MAX_FV_WORDS; i++)
2017 if (fv->ew[i].prot_id == ICE_PROT_INVALID &&
2018 fv->ew[i].off == ICE_FV_OFFSET_INVAL)
2019 set_bit(i, hw->switch_info->prof_res_bm[off]);
2020 } while (fv);
2021}
2022
2023/**
2024 * ice_pkg_buf_free
2025 * @hw: pointer to the HW structure
2026 * @bld: pointer to pkg build (allocated by ice_pkg_buf_alloc())
2027 *
2028 * Frees a package buffer
2029 */
2030void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld)
2031{
2032 devm_kfree(ice_hw_to_dev(hw), bld);
2033}
2034
2035/**
2036 * ice_pkg_buf_reserve_section
2037 * @bld: pointer to pkg build (allocated by ice_pkg_buf_alloc())
2038 * @count: the number of sections to reserve
2039 *
2040 * Reserves one or more section table entries in a package buffer. This routine
2041 * can be called multiple times as long as they are made before calling
2042 * ice_pkg_buf_alloc_section(). Once ice_pkg_buf_alloc_section()
2043 * is called once, the number of sections that can be allocated will not be able
2044 * to be increased; not using all reserved sections is fine, but this will
2045 * result in some wasted space in the buffer.
2046 * Note: all package contents must be in Little Endian form.
2047 */
2048static int
2049ice_pkg_buf_reserve_section(struct ice_buf_build *bld, u16 count)
2050{
2051 struct ice_buf_hdr *buf;
2052 u16 section_count;
2053 u16 data_end;
2054
2055 if (!bld)
2056 return -EINVAL;
2057
2058 buf = (struct ice_buf_hdr *)&bld->buf;
2059
2060 /* already an active section, can't increase table size */
2061 section_count = le16_to_cpu(buf->section_count);
2062 if (section_count > 0)
2063 return -EIO;
2064
2065 if (bld->reserved_section_table_entries + count > ICE_MAX_S_COUNT)
2066 return -EIO;
2067 bld->reserved_section_table_entries += count;
2068
2069 data_end = le16_to_cpu(buf->data_end) +
2070 flex_array_size(buf, section_entry, count);
2071 buf->data_end = cpu_to_le16(data_end);
2072
2073 return 0;
2074}
2075
2076/**
2077 * ice_pkg_buf_alloc_section
2078 * @bld: pointer to pkg build (allocated by ice_pkg_buf_alloc())
2079 * @type: the section type value
2080 * @size: the size of the section to reserve (in bytes)
2081 *
2082 * Reserves memory in the buffer for a section's content and updates the
2083 * buffers' status accordingly. This routine returns a pointer to the first
2084 * byte of the section start within the buffer, which is used to fill in the
2085 * section contents.
2086 * Note: all package contents must be in Little Endian form.
2087 */
2088static void *
2089ice_pkg_buf_alloc_section(struct ice_buf_build *bld, u32 type, u16 size)
2090{
2091 struct ice_buf_hdr *buf;
2092 u16 sect_count;
2093 u16 data_end;
2094
2095 if (!bld || !type || !size)
2096 return NULL;
2097
2098 buf = (struct ice_buf_hdr *)&bld->buf;
2099
2100 /* check for enough space left in buffer */
2101 data_end = le16_to_cpu(buf->data_end);
2102
2103 /* section start must align on 4 byte boundary */
2104 data_end = ALIGN(data_end, 4);
2105
2106 if ((data_end + size) > ICE_MAX_S_DATA_END)
2107 return NULL;
2108
2109 /* check for more available section table entries */
2110 sect_count = le16_to_cpu(buf->section_count);
2111 if (sect_count < bld->reserved_section_table_entries) {
2112 void *section_ptr = ((u8 *)buf) + data_end;
2113
2114 buf->section_entry[sect_count].offset = cpu_to_le16(data_end);
2115 buf->section_entry[sect_count].size = cpu_to_le16(size);
2116 buf->section_entry[sect_count].type = cpu_to_le32(type);
2117
2118 data_end += size;
2119 buf->data_end = cpu_to_le16(data_end);
2120
2121 buf->section_count = cpu_to_le16(sect_count + 1);
2122 return section_ptr;
2123 }
2124
2125 /* no free section table entries */
2126 return NULL;
2127}
2128
2129/**
2130 * ice_pkg_buf_alloc_single_section
2131 * @hw: pointer to the HW structure
2132 * @type: the section type value
2133 * @size: the size of the section to reserve (in bytes)
2134 * @section: returns pointer to the section
2135 *
2136 * Allocates a package buffer with a single section.
2137 * Note: all package contents must be in Little Endian form.
2138 */
2139struct ice_buf_build *
2140ice_pkg_buf_alloc_single_section(struct ice_hw *hw, u32 type, u16 size,
2141 void **section)
2142{
2143 struct ice_buf_build *buf;
2144
2145 if (!section)
2146 return NULL;
2147
2148 buf = ice_pkg_buf_alloc(hw);
2149 if (!buf)
2150 return NULL;
2151
2152 if (ice_pkg_buf_reserve_section(buf, 1))
2153 goto ice_pkg_buf_alloc_single_section_err;
2154
2155 *section = ice_pkg_buf_alloc_section(buf, type, size);
2156 if (!*section)
2157 goto ice_pkg_buf_alloc_single_section_err;
2158
2159 return buf;
2160
2161ice_pkg_buf_alloc_single_section_err:
2162 ice_pkg_buf_free(hw, buf);
2163 return NULL;
2164}
2165
2166/**
2167 * ice_pkg_buf_get_active_sections
2168 * @bld: pointer to pkg build (allocated by ice_pkg_buf_alloc())
2169 *
2170 * Returns the number of active sections. Before using the package buffer
2171 * in an update package command, the caller should make sure that there is at
2172 * least one active section - otherwise, the buffer is not legal and should
2173 * not be used.
2174 * Note: all package contents must be in Little Endian form.
2175 */
2176static u16 ice_pkg_buf_get_active_sections(struct ice_buf_build *bld)
2177{
2178 struct ice_buf_hdr *buf;
2179
2180 if (!bld)
2181 return 0;
2182
2183 buf = (struct ice_buf_hdr *)&bld->buf;
2184 return le16_to_cpu(buf->section_count);
2185}
2186
2187/**
2188 * ice_pkg_buf
2189 * @bld: pointer to pkg build (allocated by ice_pkg_buf_alloc())
2190 *
2191 * Return a pointer to the buffer's header
2192 */
2193struct ice_buf *ice_pkg_buf(struct ice_buf_build *bld)
2194{
2195 if (!bld)
2196 return NULL;
2197
2198 return &bld->buf;
2199}
2200
2201/**
2202 * ice_get_open_tunnel_port - retrieve an open tunnel port
2203 * @hw: pointer to the HW structure
2204 * @port: returns open port
2205 * @type: type of tunnel, can be TNL_LAST if it doesn't matter
2206 */
2207bool
2208ice_get_open_tunnel_port(struct ice_hw *hw, u16 *port,
2209 enum ice_tunnel_type type)
2210{
2211 bool res = false;
2212 u16 i;
2213
2214 mutex_lock(&hw->tnl_lock);
2215
2216 for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++)
2217 if (hw->tnl.tbl[i].valid && hw->tnl.tbl[i].port &&
2218 (type == TNL_LAST || type == hw->tnl.tbl[i].type)) {
2219 *port = hw->tnl.tbl[i].port;
2220 res = true;
2221 break;
2222 }
2223
2224 mutex_unlock(&hw->tnl_lock);
2225
2226 return res;
2227}
2228
2229/**
2230 * ice_upd_dvm_boost_entry
2231 * @hw: pointer to the HW structure
2232 * @entry: pointer to double vlan boost entry info
2233 */
2234static int
2235ice_upd_dvm_boost_entry(struct ice_hw *hw, struct ice_dvm_entry *entry)
2236{
2237 struct ice_boost_tcam_section *sect_rx, *sect_tx;
2238 int status = -ENOSPC;
2239 struct ice_buf_build *bld;
2240 u8 val, dc, nm;
2241
2242 bld = ice_pkg_buf_alloc(hw);
2243 if (!bld)
2244 return -ENOMEM;
2245
2246 /* allocate 2 sections, one for Rx parser, one for Tx parser */
2247 if (ice_pkg_buf_reserve_section(bld, 2))
2248 goto ice_upd_dvm_boost_entry_err;
2249
2250 sect_rx = ice_pkg_buf_alloc_section(bld, ICE_SID_RXPARSER_BOOST_TCAM,
2251 struct_size(sect_rx, tcam, 1));
2252 if (!sect_rx)
2253 goto ice_upd_dvm_boost_entry_err;
2254 sect_rx->count = cpu_to_le16(1);
2255
2256 sect_tx = ice_pkg_buf_alloc_section(bld, ICE_SID_TXPARSER_BOOST_TCAM,
2257 struct_size(sect_tx, tcam, 1));
2258 if (!sect_tx)
2259 goto ice_upd_dvm_boost_entry_err;
2260 sect_tx->count = cpu_to_le16(1);
2261
2262 /* copy original boost entry to update package buffer */
2263 memcpy(sect_rx->tcam, entry->boost_entry, sizeof(*sect_rx->tcam));
2264
2265 /* re-write the don't care and never match bits accordingly */
2266 if (entry->enable) {
2267 /* all bits are don't care */
2268 val = 0x00;
2269 dc = 0xFF;
2270 nm = 0x00;
2271 } else {
2272 /* disable, one never match bit, the rest are don't care */
2273 val = 0x00;
2274 dc = 0xF7;
2275 nm = 0x08;
2276 }
2277
2278 ice_set_key((u8 *)§_rx->tcam[0].key, sizeof(sect_rx->tcam[0].key),
2279 &val, NULL, &dc, &nm, 0, sizeof(u8));
2280
2281 /* exact copy of entry to Tx section entry */
2282 memcpy(sect_tx->tcam, sect_rx->tcam, sizeof(*sect_tx->tcam));
2283
2284 status = ice_update_pkg_no_lock(hw, ice_pkg_buf(bld), 1);
2285
2286ice_upd_dvm_boost_entry_err:
2287 ice_pkg_buf_free(hw, bld);
2288
2289 return status;
2290}
2291
2292/**
2293 * ice_set_dvm_boost_entries
2294 * @hw: pointer to the HW structure
2295 *
2296 * Enable double vlan by updating the appropriate boost tcam entries.
2297 */
2298int ice_set_dvm_boost_entries(struct ice_hw *hw)
2299{
2300 int status;
2301 u16 i;
2302
2303 for (i = 0; i < hw->dvm_upd.count; i++) {
2304 status = ice_upd_dvm_boost_entry(hw, &hw->dvm_upd.tbl[i]);
2305 if (status)
2306 return status;
2307 }
2308
2309 return 0;
2310}
2311
2312/**
2313 * ice_tunnel_idx_to_entry - convert linear index to the sparse one
2314 * @hw: pointer to the HW structure
2315 * @type: type of tunnel
2316 * @idx: linear index
2317 *
2318 * Stack assumes we have 2 linear tables with indexes [0, count_valid),
2319 * but really the port table may be sprase, and types are mixed, so convert
2320 * the stack index into the device index.
2321 */
2322static u16 ice_tunnel_idx_to_entry(struct ice_hw *hw, enum ice_tunnel_type type,
2323 u16 idx)
2324{
2325 u16 i;
2326
2327 for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++)
2328 if (hw->tnl.tbl[i].valid &&
2329 hw->tnl.tbl[i].type == type &&
2330 idx-- == 0)
2331 return i;
2332
2333 WARN_ON_ONCE(1);
2334 return 0;
2335}
2336
2337/**
2338 * ice_create_tunnel
2339 * @hw: pointer to the HW structure
2340 * @index: device table entry
2341 * @type: type of tunnel
2342 * @port: port of tunnel to create
2343 *
2344 * Create a tunnel by updating the parse graph in the parser. We do that by
2345 * creating a package buffer with the tunnel info and issuing an update package
2346 * command.
2347 */
2348static int
2349ice_create_tunnel(struct ice_hw *hw, u16 index,
2350 enum ice_tunnel_type type, u16 port)
2351{
2352 struct ice_boost_tcam_section *sect_rx, *sect_tx;
2353 struct ice_buf_build *bld;
2354 int status = -ENOSPC;
2355
2356 mutex_lock(&hw->tnl_lock);
2357
2358 bld = ice_pkg_buf_alloc(hw);
2359 if (!bld) {
2360 status = -ENOMEM;
2361 goto ice_create_tunnel_end;
2362 }
2363
2364 /* allocate 2 sections, one for Rx parser, one for Tx parser */
2365 if (ice_pkg_buf_reserve_section(bld, 2))
2366 goto ice_create_tunnel_err;
2367
2368 sect_rx = ice_pkg_buf_alloc_section(bld, ICE_SID_RXPARSER_BOOST_TCAM,
2369 struct_size(sect_rx, tcam, 1));
2370 if (!sect_rx)
2371 goto ice_create_tunnel_err;
2372 sect_rx->count = cpu_to_le16(1);
2373
2374 sect_tx = ice_pkg_buf_alloc_section(bld, ICE_SID_TXPARSER_BOOST_TCAM,
2375 struct_size(sect_tx, tcam, 1));
2376 if (!sect_tx)
2377 goto ice_create_tunnel_err;
2378 sect_tx->count = cpu_to_le16(1);
2379
2380 /* copy original boost entry to update package buffer */
2381 memcpy(sect_rx->tcam, hw->tnl.tbl[index].boost_entry,
2382 sizeof(*sect_rx->tcam));
2383
2384 /* over-write the never-match dest port key bits with the encoded port
2385 * bits
2386 */
2387 ice_set_key((u8 *)§_rx->tcam[0].key, sizeof(sect_rx->tcam[0].key),
2388 (u8 *)&port, NULL, NULL, NULL,
2389 (u16)offsetof(struct ice_boost_key_value, hv_dst_port_key),
2390 sizeof(sect_rx->tcam[0].key.key.hv_dst_port_key));
2391
2392 /* exact copy of entry to Tx section entry */
2393 memcpy(sect_tx->tcam, sect_rx->tcam, sizeof(*sect_tx->tcam));
2394
2395 status = ice_update_pkg(hw, ice_pkg_buf(bld), 1);
2396 if (!status)
2397 hw->tnl.tbl[index].port = port;
2398
2399ice_create_tunnel_err:
2400 ice_pkg_buf_free(hw, bld);
2401
2402ice_create_tunnel_end:
2403 mutex_unlock(&hw->tnl_lock);
2404
2405 return status;
2406}
2407
2408/**
2409 * ice_destroy_tunnel
2410 * @hw: pointer to the HW structure
2411 * @index: device table entry
2412 * @type: type of tunnel
2413 * @port: port of tunnel to destroy (ignored if the all parameter is true)
2414 *
2415 * Destroys a tunnel or all tunnels by creating an update package buffer
2416 * targeting the specific updates requested and then performing an update
2417 * package.
2418 */
2419static int
2420ice_destroy_tunnel(struct ice_hw *hw, u16 index, enum ice_tunnel_type type,
2421 u16 port)
2422{
2423 struct ice_boost_tcam_section *sect_rx, *sect_tx;
2424 struct ice_buf_build *bld;
2425 int status = -ENOSPC;
2426
2427 mutex_lock(&hw->tnl_lock);
2428
2429 if (WARN_ON(!hw->tnl.tbl[index].valid ||
2430 hw->tnl.tbl[index].type != type ||
2431 hw->tnl.tbl[index].port != port)) {
2432 status = -EIO;
2433 goto ice_destroy_tunnel_end;
2434 }
2435
2436 bld = ice_pkg_buf_alloc(hw);
2437 if (!bld) {
2438 status = -ENOMEM;
2439 goto ice_destroy_tunnel_end;
2440 }
2441
2442 /* allocate 2 sections, one for Rx parser, one for Tx parser */
2443 if (ice_pkg_buf_reserve_section(bld, 2))
2444 goto ice_destroy_tunnel_err;
2445
2446 sect_rx = ice_pkg_buf_alloc_section(bld, ICE_SID_RXPARSER_BOOST_TCAM,
2447 struct_size(sect_rx, tcam, 1));
2448 if (!sect_rx)
2449 goto ice_destroy_tunnel_err;
2450 sect_rx->count = cpu_to_le16(1);
2451
2452 sect_tx = ice_pkg_buf_alloc_section(bld, ICE_SID_TXPARSER_BOOST_TCAM,
2453 struct_size(sect_tx, tcam, 1));
2454 if (!sect_tx)
2455 goto ice_destroy_tunnel_err;
2456 sect_tx->count = cpu_to_le16(1);
2457
2458 /* copy original boost entry to update package buffer, one copy to Rx
2459 * section, another copy to the Tx section
2460 */
2461 memcpy(sect_rx->tcam, hw->tnl.tbl[index].boost_entry,
2462 sizeof(*sect_rx->tcam));
2463 memcpy(sect_tx->tcam, hw->tnl.tbl[index].boost_entry,
2464 sizeof(*sect_tx->tcam));
2465
2466 status = ice_update_pkg(hw, ice_pkg_buf(bld), 1);
2467 if (!status)
2468 hw->tnl.tbl[index].port = 0;
2469
2470ice_destroy_tunnel_err:
2471 ice_pkg_buf_free(hw, bld);
2472
2473ice_destroy_tunnel_end:
2474 mutex_unlock(&hw->tnl_lock);
2475
2476 return status;
2477}
2478
2479int ice_udp_tunnel_set_port(struct net_device *netdev, unsigned int table,
2480 unsigned int idx, struct udp_tunnel_info *ti)
2481{
2482 struct ice_netdev_priv *np = netdev_priv(netdev);
2483 struct ice_vsi *vsi = np->vsi;
2484 struct ice_pf *pf = vsi->back;
2485 enum ice_tunnel_type tnl_type;
2486 int status;
2487 u16 index;
2488
2489 tnl_type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? TNL_VXLAN : TNL_GENEVE;
2490 index = ice_tunnel_idx_to_entry(&pf->hw, tnl_type, idx);
2491
2492 status = ice_create_tunnel(&pf->hw, index, tnl_type, ntohs(ti->port));
2493 if (status) {
2494 netdev_err(netdev, "Error adding UDP tunnel - %d\n",
2495 status);
2496 return -EIO;
2497 }
2498
2499 udp_tunnel_nic_set_port_priv(netdev, table, idx, index);
2500 return 0;
2501}
2502
2503int ice_udp_tunnel_unset_port(struct net_device *netdev, unsigned int table,
2504 unsigned int idx, struct udp_tunnel_info *ti)
2505{
2506 struct ice_netdev_priv *np = netdev_priv(netdev);
2507 struct ice_vsi *vsi = np->vsi;
2508 struct ice_pf *pf = vsi->back;
2509 enum ice_tunnel_type tnl_type;
2510 int status;
2511
2512 tnl_type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? TNL_VXLAN : TNL_GENEVE;
2513
2514 status = ice_destroy_tunnel(&pf->hw, ti->hw_priv, tnl_type,
2515 ntohs(ti->port));
2516 if (status) {
2517 netdev_err(netdev, "Error removing UDP tunnel - %d\n",
2518 status);
2519 return -EIO;
2520 }
2521
2522 return 0;
2523}
2524
2525/**
2526 * ice_find_prot_off - find prot ID and offset pair, based on prof and FV index
2527 * @hw: pointer to the hardware structure
2528 * @blk: hardware block
2529 * @prof: profile ID
2530 * @fv_idx: field vector word index
2531 * @prot: variable to receive the protocol ID
2532 * @off: variable to receive the protocol offset
2533 */
2534int
2535ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 fv_idx,
2536 u8 *prot, u16 *off)
2537{
2538 struct ice_fv_word *fv_ext;
2539
2540 if (prof >= hw->blk[blk].es.count)
2541 return -EINVAL;
2542
2543 if (fv_idx >= hw->blk[blk].es.fvw)
2544 return -EINVAL;
2545
2546 fv_ext = hw->blk[blk].es.t + (prof * hw->blk[blk].es.fvw);
2547
2548 *prot = fv_ext[fv_idx].prot_id;
2549 *off = fv_ext[fv_idx].off;
2550
2551 return 0;
2552}
2553
2554/* PTG Management */
2555
2556/**
2557 * ice_ptg_find_ptype - Search for packet type group using packet type (ptype)
2558 * @hw: pointer to the hardware structure
2559 * @blk: HW block
2560 * @ptype: the ptype to search for
2561 * @ptg: pointer to variable that receives the PTG
2562 *
2563 * This function will search the PTGs for a particular ptype, returning the
2564 * PTG ID that contains it through the PTG parameter, with the value of
2565 * ICE_DEFAULT_PTG (0) meaning it is part the default PTG.
2566 */
2567static int
2568ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg)
2569{
2570 if (ptype >= ICE_XLT1_CNT || !ptg)
2571 return -EINVAL;
2572
2573 *ptg = hw->blk[blk].xlt1.ptypes[ptype].ptg;
2574 return 0;
2575}
2576
2577/**
2578 * ice_ptg_alloc_val - Allocates a new packet type group ID by value
2579 * @hw: pointer to the hardware structure
2580 * @blk: HW block
2581 * @ptg: the PTG to allocate
2582 *
2583 * This function allocates a given packet type group ID specified by the PTG
2584 * parameter.
2585 */
2586static void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg)
2587{
2588 hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true;
2589}
2590
2591/**
2592 * ice_ptg_remove_ptype - Removes ptype from a particular packet type group
2593 * @hw: pointer to the hardware structure
2594 * @blk: HW block
2595 * @ptype: the ptype to remove
2596 * @ptg: the PTG to remove the ptype from
2597 *
2598 * This function will remove the ptype from the specific PTG, and move it to
2599 * the default PTG (ICE_DEFAULT_PTG).
2600 */
2601static int
2602ice_ptg_remove_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
2603{
2604 struct ice_ptg_ptype **ch;
2605 struct ice_ptg_ptype *p;
2606
2607 if (ptype > ICE_XLT1_CNT - 1)
2608 return -EINVAL;
2609
2610 if (!hw->blk[blk].xlt1.ptg_tbl[ptg].in_use)
2611 return -ENOENT;
2612
2613 /* Should not happen if .in_use is set, bad config */
2614 if (!hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype)
2615 return -EIO;
2616
2617 /* find the ptype within this PTG, and bypass the link over it */
2618 p = hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;
2619 ch = &hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;
2620 while (p) {
2621 if (ptype == (p - hw->blk[blk].xlt1.ptypes)) {
2622 *ch = p->next_ptype;
2623 break;
2624 }
2625
2626 ch = &p->next_ptype;
2627 p = p->next_ptype;
2628 }
2629
2630 hw->blk[blk].xlt1.ptypes[ptype].ptg = ICE_DEFAULT_PTG;
2631 hw->blk[blk].xlt1.ptypes[ptype].next_ptype = NULL;
2632
2633 return 0;
2634}
2635
2636/**
2637 * ice_ptg_add_mv_ptype - Adds/moves ptype to a particular packet type group
2638 * @hw: pointer to the hardware structure
2639 * @blk: HW block
2640 * @ptype: the ptype to add or move
2641 * @ptg: the PTG to add or move the ptype to
2642 *
2643 * This function will either add or move a ptype to a particular PTG depending
2644 * on if the ptype is already part of another group. Note that using a
2645 * destination PTG ID of ICE_DEFAULT_PTG (0) will move the ptype to the
2646 * default PTG.
2647 */
2648static int
2649ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
2650{
2651 u8 original_ptg;
2652 int status;
2653
2654 if (ptype > ICE_XLT1_CNT - 1)
2655 return -EINVAL;
2656
2657 if (!hw->blk[blk].xlt1.ptg_tbl[ptg].in_use && ptg != ICE_DEFAULT_PTG)
2658 return -ENOENT;
2659
2660 status = ice_ptg_find_ptype(hw, blk, ptype, &original_ptg);
2661 if (status)
2662 return status;
2663
2664 /* Is ptype already in the correct PTG? */
2665 if (original_ptg == ptg)
2666 return 0;
2667
2668 /* Remove from original PTG and move back to the default PTG */
2669 if (original_ptg != ICE_DEFAULT_PTG)
2670 ice_ptg_remove_ptype(hw, blk, ptype, original_ptg);
2671
2672 /* Moving to default PTG? Then we're done with this request */
2673 if (ptg == ICE_DEFAULT_PTG)
2674 return 0;
2675
2676 /* Add ptype to PTG at beginning of list */
2677 hw->blk[blk].xlt1.ptypes[ptype].next_ptype =
2678 hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;
2679 hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype =
2680 &hw->blk[blk].xlt1.ptypes[ptype];
2681
2682 hw->blk[blk].xlt1.ptypes[ptype].ptg = ptg;
2683 hw->blk[blk].xlt1.t[ptype] = ptg;
2684
2685 return 0;
2686}
2687
2688/* Block / table size info */
2689struct ice_blk_size_details {
2690 u16 xlt1; /* # XLT1 entries */
2691 u16 xlt2; /* # XLT2 entries */
2692 u16 prof_tcam; /* # profile ID TCAM entries */
2693 u16 prof_id; /* # profile IDs */
2694 u8 prof_cdid_bits; /* # CDID one-hot bits used in key */
2695 u16 prof_redir; /* # profile redirection entries */
2696 u16 es; /* # extraction sequence entries */
2697 u16 fvw; /* # field vector words */
2698 u8 overwrite; /* overwrite existing entries allowed */
2699 u8 reverse; /* reverse FV order */
2700};
2701
2702static const struct ice_blk_size_details blk_sizes[ICE_BLK_COUNT] = {
2703 /**
2704 * Table Definitions
2705 * XLT1 - Number of entries in XLT1 table
2706 * XLT2 - Number of entries in XLT2 table
2707 * TCAM - Number of entries Profile ID TCAM table
2708 * CDID - Control Domain ID of the hardware block
2709 * PRED - Number of entries in the Profile Redirection Table
2710 * FV - Number of entries in the Field Vector
2711 * FVW - Width (in WORDs) of the Field Vector
2712 * OVR - Overwrite existing table entries
2713 * REV - Reverse FV
2714 */
2715 /* XLT1 , XLT2 ,TCAM, PID,CDID,PRED, FV, FVW */
2716 /* Overwrite , Reverse FV */
2717 /* SW */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 256, 0, 256, 256, 48,
2718 false, false },
2719 /* ACL */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 32,
2720 false, false },
2721 /* FD */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 24,
2722 false, true },
2723 /* RSS */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 24,
2724 true, true },
2725 /* PE */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 64, 32, 0, 32, 32, 24,
2726 false, false },
2727};
2728
2729enum ice_sid_all {
2730 ICE_SID_XLT1_OFF = 0,
2731 ICE_SID_XLT2_OFF,
2732 ICE_SID_PR_OFF,
2733 ICE_SID_PR_REDIR_OFF,
2734 ICE_SID_ES_OFF,
2735 ICE_SID_OFF_COUNT,
2736};
2737
2738/* Characteristic handling */
2739
2740/**
2741 * ice_match_prop_lst - determine if properties of two lists match
2742 * @list1: first properties list
2743 * @list2: second properties list
2744 *
2745 * Count, cookies and the order must match in order to be considered equivalent.
2746 */
2747static bool
2748ice_match_prop_lst(struct list_head *list1, struct list_head *list2)
2749{
2750 struct ice_vsig_prof *tmp1;
2751 struct ice_vsig_prof *tmp2;
2752 u16 chk_count = 0;
2753 u16 count = 0;
2754
2755 /* compare counts */
2756 list_for_each_entry(tmp1, list1, list)
2757 count++;
2758 list_for_each_entry(tmp2, list2, list)
2759 chk_count++;
2760 /* cppcheck-suppress knownConditionTrueFalse */
2761 if (!count || count != chk_count)
2762 return false;
2763
2764 tmp1 = list_first_entry(list1, struct ice_vsig_prof, list);
2765 tmp2 = list_first_entry(list2, struct ice_vsig_prof, list);
2766
2767 /* profile cookies must compare, and in the exact same order to take
2768 * into account priority
2769 */
2770 while (count--) {
2771 if (tmp2->profile_cookie != tmp1->profile_cookie)
2772 return false;
2773
2774 tmp1 = list_next_entry(tmp1, list);
2775 tmp2 = list_next_entry(tmp2, list);
2776 }
2777
2778 return true;
2779}
2780
2781/* VSIG Management */
2782
2783/**
2784 * ice_vsig_find_vsi - find a VSIG that contains a specified VSI
2785 * @hw: pointer to the hardware structure
2786 * @blk: HW block
2787 * @vsi: VSI of interest
2788 * @vsig: pointer to receive the VSI group
2789 *
2790 * This function will lookup the VSI entry in the XLT2 list and return
2791 * the VSI group its associated with.
2792 */
2793static int
2794ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
2795{
2796 if (!vsig || vsi >= ICE_MAX_VSI)
2797 return -EINVAL;
2798
2799 /* As long as there's a default or valid VSIG associated with the input
2800 * VSI, the functions returns a success. Any handling of VSIG will be
2801 * done by the following add, update or remove functions.
2802 */
2803 *vsig = hw->blk[blk].xlt2.vsis[vsi].vsig;
2804
2805 return 0;
2806}
2807
2808/**
2809 * ice_vsig_alloc_val - allocate a new VSIG by value
2810 * @hw: pointer to the hardware structure
2811 * @blk: HW block
2812 * @vsig: the VSIG to allocate
2813 *
2814 * This function will allocate a given VSIG specified by the VSIG parameter.
2815 */
2816static u16 ice_vsig_alloc_val(struct ice_hw *hw, enum ice_block blk, u16 vsig)
2817{
2818 u16 idx = vsig & ICE_VSIG_IDX_M;
2819
2820 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use) {
2821 INIT_LIST_HEAD(&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst);
2822 hw->blk[blk].xlt2.vsig_tbl[idx].in_use = true;
2823 }
2824
2825 return ICE_VSIG_VALUE(idx, hw->pf_id);
2826}
2827
2828/**
2829 * ice_vsig_alloc - Finds a free entry and allocates a new VSIG
2830 * @hw: pointer to the hardware structure
2831 * @blk: HW block
2832 *
2833 * This function will iterate through the VSIG list and mark the first
2834 * unused entry for the new VSIG entry as used and return that value.
2835 */
2836static u16 ice_vsig_alloc(struct ice_hw *hw, enum ice_block blk)
2837{
2838 u16 i;
2839
2840 for (i = 1; i < ICE_MAX_VSIGS; i++)
2841 if (!hw->blk[blk].xlt2.vsig_tbl[i].in_use)
2842 return ice_vsig_alloc_val(hw, blk, i);
2843
2844 return ICE_DEFAULT_VSIG;
2845}
2846
2847/**
2848 * ice_find_dup_props_vsig - find VSI group with a specified set of properties
2849 * @hw: pointer to the hardware structure
2850 * @blk: HW block
2851 * @chs: characteristic list
2852 * @vsig: returns the VSIG with the matching profiles, if found
2853 *
2854 * Each VSIG is associated with a characteristic set; i.e. all VSIs under
2855 * a group have the same characteristic set. To check if there exists a VSIG
2856 * which has the same characteristics as the input characteristics; this
2857 * function will iterate through the XLT2 list and return the VSIG that has a
2858 * matching configuration. In order to make sure that priorities are accounted
2859 * for, the list must match exactly, including the order in which the
2860 * characteristics are listed.
2861 */
2862static int
2863ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
2864 struct list_head *chs, u16 *vsig)
2865{
2866 struct ice_xlt2 *xlt2 = &hw->blk[blk].xlt2;
2867 u16 i;
2868
2869 for (i = 0; i < xlt2->count; i++)
2870 if (xlt2->vsig_tbl[i].in_use &&
2871 ice_match_prop_lst(chs, &xlt2->vsig_tbl[i].prop_lst)) {
2872 *vsig = ICE_VSIG_VALUE(i, hw->pf_id);
2873 return 0;
2874 }
2875
2876 return -ENOENT;
2877}
2878
2879/**
2880 * ice_vsig_free - free VSI group
2881 * @hw: pointer to the hardware structure
2882 * @blk: HW block
2883 * @vsig: VSIG to remove
2884 *
2885 * The function will remove all VSIs associated with the input VSIG and move
2886 * them to the DEFAULT_VSIG and mark the VSIG available.
2887 */
2888static int ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
2889{
2890 struct ice_vsig_prof *dtmp, *del;
2891 struct ice_vsig_vsi *vsi_cur;
2892 u16 idx;
2893
2894 idx = vsig & ICE_VSIG_IDX_M;
2895 if (idx >= ICE_MAX_VSIGS)
2896 return -EINVAL;
2897
2898 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
2899 return -ENOENT;
2900
2901 hw->blk[blk].xlt2.vsig_tbl[idx].in_use = false;
2902
2903 vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
2904 /* If the VSIG has at least 1 VSI then iterate through the
2905 * list and remove the VSIs before deleting the group.
2906 */
2907 if (vsi_cur) {
2908 /* remove all vsis associated with this VSIG XLT2 entry */
2909 do {
2910 struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
2911
2912 vsi_cur->vsig = ICE_DEFAULT_VSIG;
2913 vsi_cur->changed = 1;
2914 vsi_cur->next_vsi = NULL;
2915 vsi_cur = tmp;
2916 } while (vsi_cur);
2917
2918 /* NULL terminate head of VSI list */
2919 hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
2920 }
2921
2922 /* free characteristic list */
2923 list_for_each_entry_safe(del, dtmp,
2924 &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
2925 list) {
2926 list_del(&del->list);
2927 devm_kfree(ice_hw_to_dev(hw), del);
2928 }
2929
2930 /* if VSIG characteristic list was cleared for reset
2931 * re-initialize the list head
2932 */
2933 INIT_LIST_HEAD(&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst);
2934
2935 return 0;
2936}
2937
2938/**
2939 * ice_vsig_remove_vsi - remove VSI from VSIG
2940 * @hw: pointer to the hardware structure
2941 * @blk: HW block
2942 * @vsi: VSI to remove
2943 * @vsig: VSI group to remove from
2944 *
2945 * The function will remove the input VSI from its VSI group and move it
2946 * to the DEFAULT_VSIG.
2947 */
2948static int
2949ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
2950{
2951 struct ice_vsig_vsi **vsi_head, *vsi_cur, *vsi_tgt;
2952 u16 idx;
2953
2954 idx = vsig & ICE_VSIG_IDX_M;
2955
2956 if (vsi >= ICE_MAX_VSI || idx >= ICE_MAX_VSIGS)
2957 return -EINVAL;
2958
2959 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
2960 return -ENOENT;
2961
2962 /* entry already in default VSIG, don't have to remove */
2963 if (idx == ICE_DEFAULT_VSIG)
2964 return 0;
2965
2966 vsi_head = &hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
2967 if (!(*vsi_head))
2968 return -EIO;
2969
2970 vsi_tgt = &hw->blk[blk].xlt2.vsis[vsi];
2971 vsi_cur = (*vsi_head);
2972
2973 /* iterate the VSI list, skip over the entry to be removed */
2974 while (vsi_cur) {
2975 if (vsi_tgt == vsi_cur) {
2976 (*vsi_head) = vsi_cur->next_vsi;
2977 break;
2978 }
2979 vsi_head = &vsi_cur->next_vsi;
2980 vsi_cur = vsi_cur->next_vsi;
2981 }
2982
2983 /* verify if VSI was removed from group list */
2984 if (!vsi_cur)
2985 return -ENOENT;
2986
2987 vsi_cur->vsig = ICE_DEFAULT_VSIG;
2988 vsi_cur->changed = 1;
2989 vsi_cur->next_vsi = NULL;
2990
2991 return 0;
2992}
2993
2994/**
2995 * ice_vsig_add_mv_vsi - add or move a VSI to a VSI group
2996 * @hw: pointer to the hardware structure
2997 * @blk: HW block
2998 * @vsi: VSI to move
2999 * @vsig: destination VSI group
3000 *
3001 * This function will move or add the input VSI to the target VSIG.
3002 * The function will find the original VSIG the VSI belongs to and
3003 * move the entry to the DEFAULT_VSIG, update the original VSIG and
3004 * then move entry to the new VSIG.
3005 */
3006static int
3007ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
3008{
3009 struct ice_vsig_vsi *tmp;
3010 u16 orig_vsig, idx;
3011 int status;
3012
3013 idx = vsig & ICE_VSIG_IDX_M;
3014
3015 if (vsi >= ICE_MAX_VSI || idx >= ICE_MAX_VSIGS)
3016 return -EINVAL;
3017
3018 /* if VSIG not in use and VSIG is not default type this VSIG
3019 * doesn't exist.
3020 */
3021 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use &&
3022 vsig != ICE_DEFAULT_VSIG)
3023 return -ENOENT;
3024
3025 status = ice_vsig_find_vsi(hw, blk, vsi, &orig_vsig);
3026 if (status)
3027 return status;
3028
3029 /* no update required if vsigs match */
3030 if (orig_vsig == vsig)
3031 return 0;
3032
3033 if (orig_vsig != ICE_DEFAULT_VSIG) {
3034 /* remove entry from orig_vsig and add to default VSIG */
3035 status = ice_vsig_remove_vsi(hw, blk, vsi, orig_vsig);
3036 if (status)
3037 return status;
3038 }
3039
3040 if (idx == ICE_DEFAULT_VSIG)
3041 return 0;
3042
3043 /* Create VSI entry and add VSIG and prop_mask values */
3044 hw->blk[blk].xlt2.vsis[vsi].vsig = vsig;
3045 hw->blk[blk].xlt2.vsis[vsi].changed = 1;
3046
3047 /* Add new entry to the head of the VSIG list */
3048 tmp = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
3049 hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi =
3050 &hw->blk[blk].xlt2.vsis[vsi];
3051 hw->blk[blk].xlt2.vsis[vsi].next_vsi = tmp;
3052 hw->blk[blk].xlt2.t[vsi] = vsig;
3053
3054 return 0;
3055}
3056
3057/**
3058 * ice_prof_has_mask_idx - determine if profile index masking is identical
3059 * @hw: pointer to the hardware structure
3060 * @blk: HW block
3061 * @prof: profile to check
3062 * @idx: profile index to check
3063 * @mask: mask to match
3064 */
3065static bool
3066ice_prof_has_mask_idx(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 idx,
3067 u16 mask)
3068{
3069 bool expect_no_mask = false;
3070 bool found = false;
3071 bool match = false;
3072 u16 i;
3073
3074 /* If mask is 0x0000 or 0xffff, then there is no masking */
3075 if (mask == 0 || mask == 0xffff)
3076 expect_no_mask = true;
3077
3078 /* Scan the enabled masks on this profile, for the specified idx */
3079 for (i = hw->blk[blk].masks.first; i < hw->blk[blk].masks.first +
3080 hw->blk[blk].masks.count; i++)
3081 if (hw->blk[blk].es.mask_ena[prof] & BIT(i))
3082 if (hw->blk[blk].masks.masks[i].in_use &&
3083 hw->blk[blk].masks.masks[i].idx == idx) {
3084 found = true;
3085 if (hw->blk[blk].masks.masks[i].mask == mask)
3086 match = true;
3087 break;
3088 }
3089
3090 if (expect_no_mask) {
3091 if (found)
3092 return false;
3093 } else {
3094 if (!match)
3095 return false;
3096 }
3097
3098 return true;
3099}
3100
3101/**
3102 * ice_prof_has_mask - determine if profile masking is identical
3103 * @hw: pointer to the hardware structure
3104 * @blk: HW block
3105 * @prof: profile to check
3106 * @masks: masks to match
3107 */
3108static bool
3109ice_prof_has_mask(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 *masks)
3110{
3111 u16 i;
3112
3113 /* es->mask_ena[prof] will have the mask */
3114 for (i = 0; i < hw->blk[blk].es.fvw; i++)
3115 if (!ice_prof_has_mask_idx(hw, blk, prof, i, masks[i]))
3116 return false;
3117
3118 return true;
3119}
3120
3121/**
3122 * ice_find_prof_id_with_mask - find profile ID for a given field vector
3123 * @hw: pointer to the hardware structure
3124 * @blk: HW block
3125 * @fv: field vector to search for
3126 * @masks: masks for FV
3127 * @prof_id: receives the profile ID
3128 */
3129static int
3130ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk,
3131 struct ice_fv_word *fv, u16 *masks, u8 *prof_id)
3132{
3133 struct ice_es *es = &hw->blk[blk].es;
3134 u8 i;
3135
3136 /* For FD, we don't want to re-use a existed profile with the same
3137 * field vector and mask. This will cause rule interference.
3138 */
3139 if (blk == ICE_BLK_FD)
3140 return -ENOENT;
3141
3142 for (i = 0; i < (u8)es->count; i++) {
3143 u16 off = i * es->fvw;
3144
3145 if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv)))
3146 continue;
3147
3148 /* check if masks settings are the same for this profile */
3149 if (masks && !ice_prof_has_mask(hw, blk, i, masks))
3150 continue;
3151
3152 *prof_id = i;
3153 return 0;
3154 }
3155
3156 return -ENOENT;
3157}
3158
3159/**
3160 * ice_prof_id_rsrc_type - get profile ID resource type for a block type
3161 * @blk: the block type
3162 * @rsrc_type: pointer to variable to receive the resource type
3163 */
3164static bool ice_prof_id_rsrc_type(enum ice_block blk, u16 *rsrc_type)
3165{
3166 switch (blk) {
3167 case ICE_BLK_FD:
3168 *rsrc_type = ICE_AQC_RES_TYPE_FD_PROF_BLDR_PROFID;
3169 break;
3170 case ICE_BLK_RSS:
3171 *rsrc_type = ICE_AQC_RES_TYPE_HASH_PROF_BLDR_PROFID;
3172 break;
3173 default:
3174 return false;
3175 }
3176 return true;
3177}
3178
3179/**
3180 * ice_tcam_ent_rsrc_type - get TCAM entry resource type for a block type
3181 * @blk: the block type
3182 * @rsrc_type: pointer to variable to receive the resource type
3183 */
3184static bool ice_tcam_ent_rsrc_type(enum ice_block blk, u16 *rsrc_type)
3185{
3186 switch (blk) {
3187 case ICE_BLK_FD:
3188 *rsrc_type = ICE_AQC_RES_TYPE_FD_PROF_BLDR_TCAM;
3189 break;
3190 case ICE_BLK_RSS:
3191 *rsrc_type = ICE_AQC_RES_TYPE_HASH_PROF_BLDR_TCAM;
3192 break;
3193 default:
3194 return false;
3195 }
3196 return true;
3197}
3198
3199/**
3200 * ice_alloc_tcam_ent - allocate hardware TCAM entry
3201 * @hw: pointer to the HW struct
3202 * @blk: the block to allocate the TCAM for
3203 * @btm: true to allocate from bottom of table, false to allocate from top
3204 * @tcam_idx: pointer to variable to receive the TCAM entry
3205 *
3206 * This function allocates a new entry in a Profile ID TCAM for a specific
3207 * block.
3208 */
3209static int
3210ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, bool btm,
3211 u16 *tcam_idx)
3212{
3213 u16 res_type;
3214
3215 if (!ice_tcam_ent_rsrc_type(blk, &res_type))
3216 return -EINVAL;
3217
3218 return ice_alloc_hw_res(hw, res_type, 1, btm, tcam_idx);
3219}
3220
3221/**
3222 * ice_free_tcam_ent - free hardware TCAM entry
3223 * @hw: pointer to the HW struct
3224 * @blk: the block from which to free the TCAM entry
3225 * @tcam_idx: the TCAM entry to free
3226 *
3227 * This function frees an entry in a Profile ID TCAM for a specific block.
3228 */
3229static int
3230ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
3231{
3232 u16 res_type;
3233
3234 if (!ice_tcam_ent_rsrc_type(blk, &res_type))
3235 return -EINVAL;
3236
3237 return ice_free_hw_res(hw, res_type, 1, &tcam_idx);
3238}
3239
3240/**
3241 * ice_alloc_prof_id - allocate profile ID
3242 * @hw: pointer to the HW struct
3243 * @blk: the block to allocate the profile ID for
3244 * @prof_id: pointer to variable to receive the profile ID
3245 *
3246 * This function allocates a new profile ID, which also corresponds to a Field
3247 * Vector (Extraction Sequence) entry.
3248 */
3249static int ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
3250{
3251 u16 res_type;
3252 u16 get_prof;
3253 int status;
3254
3255 if (!ice_prof_id_rsrc_type(blk, &res_type))
3256 return -EINVAL;
3257
3258 status = ice_alloc_hw_res(hw, res_type, 1, false, &get_prof);
3259 if (!status)
3260 *prof_id = (u8)get_prof;
3261
3262 return status;
3263}
3264
3265/**
3266 * ice_free_prof_id - free profile ID
3267 * @hw: pointer to the HW struct
3268 * @blk: the block from which to free the profile ID
3269 * @prof_id: the profile ID to free
3270 *
3271 * This function frees a profile ID, which also corresponds to a Field Vector.
3272 */
3273static int ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
3274{
3275 u16 tmp_prof_id = (u16)prof_id;
3276 u16 res_type;
3277
3278 if (!ice_prof_id_rsrc_type(blk, &res_type))
3279 return -EINVAL;
3280
3281 return ice_free_hw_res(hw, res_type, 1, &tmp_prof_id);
3282}
3283
3284/**
3285 * ice_prof_inc_ref - increment reference count for profile
3286 * @hw: pointer to the HW struct
3287 * @blk: the block from which to free the profile ID
3288 * @prof_id: the profile ID for which to increment the reference count
3289 */
3290static int ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
3291{
3292 if (prof_id > hw->blk[blk].es.count)
3293 return -EINVAL;
3294
3295 hw->blk[blk].es.ref_count[prof_id]++;
3296
3297 return 0;
3298}
3299
3300/**
3301 * ice_write_prof_mask_reg - write profile mask register
3302 * @hw: pointer to the HW struct
3303 * @blk: hardware block
3304 * @mask_idx: mask index
3305 * @idx: index of the FV which will use the mask
3306 * @mask: the 16-bit mask
3307 */
3308static void
3309ice_write_prof_mask_reg(struct ice_hw *hw, enum ice_block blk, u16 mask_idx,
3310 u16 idx, u16 mask)
3311{
3312 u32 offset;
3313 u32 val;
3314
3315 switch (blk) {
3316 case ICE_BLK_RSS:
3317 offset = GLQF_HMASK(mask_idx);
3318 val = (idx << GLQF_HMASK_MSK_INDEX_S) & GLQF_HMASK_MSK_INDEX_M;
3319 val |= (mask << GLQF_HMASK_MASK_S) & GLQF_HMASK_MASK_M;
3320 break;
3321 case ICE_BLK_FD:
3322 offset = GLQF_FDMASK(mask_idx);
3323 val = (idx << GLQF_FDMASK_MSK_INDEX_S) & GLQF_FDMASK_MSK_INDEX_M;
3324 val |= (mask << GLQF_FDMASK_MASK_S) & GLQF_FDMASK_MASK_M;
3325 break;
3326 default:
3327 ice_debug(hw, ICE_DBG_PKG, "No profile masks for block %d\n",
3328 blk);
3329 return;
3330 }
3331
3332 wr32(hw, offset, val);
3333 ice_debug(hw, ICE_DBG_PKG, "write mask, blk %d (%d): %x = %x\n",
3334 blk, idx, offset, val);
3335}
3336
3337/**
3338 * ice_write_prof_mask_enable_res - write profile mask enable register
3339 * @hw: pointer to the HW struct
3340 * @blk: hardware block
3341 * @prof_id: profile ID
3342 * @enable_mask: enable mask
3343 */
3344static void
3345ice_write_prof_mask_enable_res(struct ice_hw *hw, enum ice_block blk,
3346 u16 prof_id, u32 enable_mask)
3347{
3348 u32 offset;
3349
3350 switch (blk) {
3351 case ICE_BLK_RSS:
3352 offset = GLQF_HMASK_SEL(prof_id);
3353 break;
3354 case ICE_BLK_FD:
3355 offset = GLQF_FDMASK_SEL(prof_id);
3356 break;
3357 default:
3358 ice_debug(hw, ICE_DBG_PKG, "No profile masks for block %d\n",
3359 blk);
3360 return;
3361 }
3362
3363 wr32(hw, offset, enable_mask);
3364 ice_debug(hw, ICE_DBG_PKG, "write mask enable, blk %d (%d): %x = %x\n",
3365 blk, prof_id, offset, enable_mask);
3366}
3367
3368/**
3369 * ice_init_prof_masks - initial prof masks
3370 * @hw: pointer to the HW struct
3371 * @blk: hardware block
3372 */
3373static void ice_init_prof_masks(struct ice_hw *hw, enum ice_block blk)
3374{
3375 u16 per_pf;
3376 u16 i;
3377
3378 mutex_init(&hw->blk[blk].masks.lock);
3379
3380 per_pf = ICE_PROF_MASK_COUNT / hw->dev_caps.num_funcs;
3381
3382 hw->blk[blk].masks.count = per_pf;
3383 hw->blk[blk].masks.first = hw->pf_id * per_pf;
3384
3385 memset(hw->blk[blk].masks.masks, 0, sizeof(hw->blk[blk].masks.masks));
3386
3387 for (i = hw->blk[blk].masks.first;
3388 i < hw->blk[blk].masks.first + hw->blk[blk].masks.count; i++)
3389 ice_write_prof_mask_reg(hw, blk, i, 0, 0);
3390}
3391
3392/**
3393 * ice_init_all_prof_masks - initialize all prof masks
3394 * @hw: pointer to the HW struct
3395 */
3396static void ice_init_all_prof_masks(struct ice_hw *hw)
3397{
3398 ice_init_prof_masks(hw, ICE_BLK_RSS);
3399 ice_init_prof_masks(hw, ICE_BLK_FD);
3400}
3401
3402/**
3403 * ice_alloc_prof_mask - allocate profile mask
3404 * @hw: pointer to the HW struct
3405 * @blk: hardware block
3406 * @idx: index of FV which will use the mask
3407 * @mask: the 16-bit mask
3408 * @mask_idx: variable to receive the mask index
3409 */
3410static int
3411ice_alloc_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 idx, u16 mask,
3412 u16 *mask_idx)
3413{
3414 bool found_unused = false, found_copy = false;
3415 u16 unused_idx = 0, copy_idx = 0;
3416 int status = -ENOSPC;
3417 u16 i;
3418
3419 if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
3420 return -EINVAL;
3421
3422 mutex_lock(&hw->blk[blk].masks.lock);
3423
3424 for (i = hw->blk[blk].masks.first;
3425 i < hw->blk[blk].masks.first + hw->blk[blk].masks.count; i++)
3426 if (hw->blk[blk].masks.masks[i].in_use) {
3427 /* if mask is in use and it exactly duplicates the
3428 * desired mask and index, then in can be reused
3429 */
3430 if (hw->blk[blk].masks.masks[i].mask == mask &&
3431 hw->blk[blk].masks.masks[i].idx == idx) {
3432 found_copy = true;
3433 copy_idx = i;
3434 break;
3435 }
3436 } else {
3437 /* save off unused index, but keep searching in case
3438 * there is an exact match later on
3439 */
3440 if (!found_unused) {
3441 found_unused = true;
3442 unused_idx = i;
3443 }
3444 }
3445
3446 if (found_copy)
3447 i = copy_idx;
3448 else if (found_unused)
3449 i = unused_idx;
3450 else
3451 goto err_ice_alloc_prof_mask;
3452
3453 /* update mask for a new entry */
3454 if (found_unused) {
3455 hw->blk[blk].masks.masks[i].in_use = true;
3456 hw->blk[blk].masks.masks[i].mask = mask;
3457 hw->blk[blk].masks.masks[i].idx = idx;
3458 hw->blk[blk].masks.masks[i].ref = 0;
3459 ice_write_prof_mask_reg(hw, blk, i, idx, mask);
3460 }
3461
3462 hw->blk[blk].masks.masks[i].ref++;
3463 *mask_idx = i;
3464 status = 0;
3465
3466err_ice_alloc_prof_mask:
3467 mutex_unlock(&hw->blk[blk].masks.lock);
3468
3469 return status;
3470}
3471
3472/**
3473 * ice_free_prof_mask - free profile mask
3474 * @hw: pointer to the HW struct
3475 * @blk: hardware block
3476 * @mask_idx: index of mask
3477 */
3478static int
3479ice_free_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 mask_idx)
3480{
3481 if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
3482 return -EINVAL;
3483
3484 if (!(mask_idx >= hw->blk[blk].masks.first &&
3485 mask_idx < hw->blk[blk].masks.first + hw->blk[blk].masks.count))
3486 return -ENOENT;
3487
3488 mutex_lock(&hw->blk[blk].masks.lock);
3489
3490 if (!hw->blk[blk].masks.masks[mask_idx].in_use)
3491 goto exit_ice_free_prof_mask;
3492
3493 if (hw->blk[blk].masks.masks[mask_idx].ref > 1) {
3494 hw->blk[blk].masks.masks[mask_idx].ref--;
3495 goto exit_ice_free_prof_mask;
3496 }
3497
3498 /* remove mask */
3499 hw->blk[blk].masks.masks[mask_idx].in_use = false;
3500 hw->blk[blk].masks.masks[mask_idx].mask = 0;
3501 hw->blk[blk].masks.masks[mask_idx].idx = 0;
3502
3503 /* update mask as unused entry */
3504 ice_debug(hw, ICE_DBG_PKG, "Free mask, blk %d, mask %d\n", blk,
3505 mask_idx);
3506 ice_write_prof_mask_reg(hw, blk, mask_idx, 0, 0);
3507
3508exit_ice_free_prof_mask:
3509 mutex_unlock(&hw->blk[blk].masks.lock);
3510
3511 return 0;
3512}
3513
3514/**
3515 * ice_free_prof_masks - free all profile masks for a profile
3516 * @hw: pointer to the HW struct
3517 * @blk: hardware block
3518 * @prof_id: profile ID
3519 */
3520static int
3521ice_free_prof_masks(struct ice_hw *hw, enum ice_block blk, u16 prof_id)
3522{
3523 u32 mask_bm;
3524 u16 i;
3525
3526 if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
3527 return -EINVAL;
3528
3529 mask_bm = hw->blk[blk].es.mask_ena[prof_id];
3530 for (i = 0; i < BITS_PER_BYTE * sizeof(mask_bm); i++)
3531 if (mask_bm & BIT(i))
3532 ice_free_prof_mask(hw, blk, i);
3533
3534 return 0;
3535}
3536
3537/**
3538 * ice_shutdown_prof_masks - releases lock for masking
3539 * @hw: pointer to the HW struct
3540 * @blk: hardware block
3541 *
3542 * This should be called before unloading the driver
3543 */
3544static void ice_shutdown_prof_masks(struct ice_hw *hw, enum ice_block blk)
3545{
3546 u16 i;
3547
3548 mutex_lock(&hw->blk[blk].masks.lock);
3549
3550 for (i = hw->blk[blk].masks.first;
3551 i < hw->blk[blk].masks.first + hw->blk[blk].masks.count; i++) {
3552 ice_write_prof_mask_reg(hw, blk, i, 0, 0);
3553
3554 hw->blk[blk].masks.masks[i].in_use = false;
3555 hw->blk[blk].masks.masks[i].idx = 0;
3556 hw->blk[blk].masks.masks[i].mask = 0;
3557 }
3558
3559 mutex_unlock(&hw->blk[blk].masks.lock);
3560 mutex_destroy(&hw->blk[blk].masks.lock);
3561}
3562
3563/**
3564 * ice_shutdown_all_prof_masks - releases all locks for masking
3565 * @hw: pointer to the HW struct
3566 *
3567 * This should be called before unloading the driver
3568 */
3569static void ice_shutdown_all_prof_masks(struct ice_hw *hw)
3570{
3571 ice_shutdown_prof_masks(hw, ICE_BLK_RSS);
3572 ice_shutdown_prof_masks(hw, ICE_BLK_FD);
3573}
3574
3575/**
3576 * ice_update_prof_masking - set registers according to masking
3577 * @hw: pointer to the HW struct
3578 * @blk: hardware block
3579 * @prof_id: profile ID
3580 * @masks: masks
3581 */
3582static int
3583ice_update_prof_masking(struct ice_hw *hw, enum ice_block blk, u16 prof_id,
3584 u16 *masks)
3585{
3586 bool err = false;
3587 u32 ena_mask = 0;
3588 u16 idx;
3589 u16 i;
3590
3591 /* Only support FD and RSS masking, otherwise nothing to be done */
3592 if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
3593 return 0;
3594
3595 for (i = 0; i < hw->blk[blk].es.fvw; i++)
3596 if (masks[i] && masks[i] != 0xFFFF) {
3597 if (!ice_alloc_prof_mask(hw, blk, i, masks[i], &idx)) {
3598 ena_mask |= BIT(idx);
3599 } else {
3600 /* not enough bitmaps */
3601 err = true;
3602 break;
3603 }
3604 }
3605
3606 if (err) {
3607 /* free any bitmaps we have allocated */
3608 for (i = 0; i < BITS_PER_BYTE * sizeof(ena_mask); i++)
3609 if (ena_mask & BIT(i))
3610 ice_free_prof_mask(hw, blk, i);
3611
3612 return -EIO;
3613 }
3614
3615 /* enable the masks for this profile */
3616 ice_write_prof_mask_enable_res(hw, blk, prof_id, ena_mask);
3617
3618 /* store enabled masks with profile so that they can be freed later */
3619 hw->blk[blk].es.mask_ena[prof_id] = ena_mask;
3620
3621 return 0;
3622}
3623
3624/**
3625 * ice_write_es - write an extraction sequence to hardware
3626 * @hw: pointer to the HW struct
3627 * @blk: the block in which to write the extraction sequence
3628 * @prof_id: the profile ID to write
3629 * @fv: pointer to the extraction sequence to write - NULL to clear extraction
3630 */
3631static void
3632ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
3633 struct ice_fv_word *fv)
3634{
3635 u16 off;
3636
3637 off = prof_id * hw->blk[blk].es.fvw;
3638 if (!fv) {
3639 memset(&hw->blk[blk].es.t[off], 0,
3640 hw->blk[blk].es.fvw * sizeof(*fv));
3641 hw->blk[blk].es.written[prof_id] = false;
3642 } else {
3643 memcpy(&hw->blk[blk].es.t[off], fv,
3644 hw->blk[blk].es.fvw * sizeof(*fv));
3645 }
3646}
3647
3648/**
3649 * ice_prof_dec_ref - decrement reference count for profile
3650 * @hw: pointer to the HW struct
3651 * @blk: the block from which to free the profile ID
3652 * @prof_id: the profile ID for which to decrement the reference count
3653 */
3654static int
3655ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
3656{
3657 if (prof_id > hw->blk[blk].es.count)
3658 return -EINVAL;
3659
3660 if (hw->blk[blk].es.ref_count[prof_id] > 0) {
3661 if (!--hw->blk[blk].es.ref_count[prof_id]) {
3662 ice_write_es(hw, blk, prof_id, NULL);
3663 ice_free_prof_masks(hw, blk, prof_id);
3664 return ice_free_prof_id(hw, blk, prof_id);
3665 }
3666 }
3667
3668 return 0;
3669}
3670
3671/* Block / table section IDs */
3672static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = {
3673 /* SWITCH */
3674 { ICE_SID_XLT1_SW,
3675 ICE_SID_XLT2_SW,
3676 ICE_SID_PROFID_TCAM_SW,
3677 ICE_SID_PROFID_REDIR_SW,
3678 ICE_SID_FLD_VEC_SW
3679 },
3680
3681 /* ACL */
3682 { ICE_SID_XLT1_ACL,
3683 ICE_SID_XLT2_ACL,
3684 ICE_SID_PROFID_TCAM_ACL,
3685 ICE_SID_PROFID_REDIR_ACL,
3686 ICE_SID_FLD_VEC_ACL
3687 },
3688
3689 /* FD */
3690 { ICE_SID_XLT1_FD,
3691 ICE_SID_XLT2_FD,
3692 ICE_SID_PROFID_TCAM_FD,
3693 ICE_SID_PROFID_REDIR_FD,
3694 ICE_SID_FLD_VEC_FD
3695 },
3696
3697 /* RSS */
3698 { ICE_SID_XLT1_RSS,
3699 ICE_SID_XLT2_RSS,
3700 ICE_SID_PROFID_TCAM_RSS,
3701 ICE_SID_PROFID_REDIR_RSS,
3702 ICE_SID_FLD_VEC_RSS
3703 },
3704
3705 /* PE */
3706 { ICE_SID_XLT1_PE,
3707 ICE_SID_XLT2_PE,
3708 ICE_SID_PROFID_TCAM_PE,
3709 ICE_SID_PROFID_REDIR_PE,
3710 ICE_SID_FLD_VEC_PE
3711 }
3712};
3713
3714/**
3715 * ice_init_sw_xlt1_db - init software XLT1 database from HW tables
3716 * @hw: pointer to the hardware structure
3717 * @blk: the HW block to initialize
3718 */
3719static void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
3720{
3721 u16 pt;
3722
3723 for (pt = 0; pt < hw->blk[blk].xlt1.count; pt++) {
3724 u8 ptg;
3725
3726 ptg = hw->blk[blk].xlt1.t[pt];
3727 if (ptg != ICE_DEFAULT_PTG) {
3728 ice_ptg_alloc_val(hw, blk, ptg);
3729 ice_ptg_add_mv_ptype(hw, blk, pt, ptg);
3730 }
3731 }
3732}
3733
3734/**
3735 * ice_init_sw_xlt2_db - init software XLT2 database from HW tables
3736 * @hw: pointer to the hardware structure
3737 * @blk: the HW block to initialize
3738 */
3739static void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
3740{
3741 u16 vsi;
3742
3743 for (vsi = 0; vsi < hw->blk[blk].xlt2.count; vsi++) {
3744 u16 vsig;
3745
3746 vsig = hw->blk[blk].xlt2.t[vsi];
3747 if (vsig) {
3748 ice_vsig_alloc_val(hw, blk, vsig);
3749 ice_vsig_add_mv_vsi(hw, blk, vsi, vsig);
3750 /* no changes at this time, since this has been
3751 * initialized from the original package
3752 */
3753 hw->blk[blk].xlt2.vsis[vsi].changed = 0;
3754 }
3755 }
3756}
3757
3758/**
3759 * ice_init_sw_db - init software database from HW tables
3760 * @hw: pointer to the hardware structure
3761 */
3762static void ice_init_sw_db(struct ice_hw *hw)
3763{
3764 u16 i;
3765
3766 for (i = 0; i < ICE_BLK_COUNT; i++) {
3767 ice_init_sw_xlt1_db(hw, (enum ice_block)i);
3768 ice_init_sw_xlt2_db(hw, (enum ice_block)i);
3769 }
3770}
3771
3772/**
3773 * ice_fill_tbl - Reads content of a single table type into database
3774 * @hw: pointer to the hardware structure
3775 * @block_id: Block ID of the table to copy
3776 * @sid: Section ID of the table to copy
3777 *
3778 * Will attempt to read the entire content of a given table of a single block
3779 * into the driver database. We assume that the buffer will always
3780 * be as large or larger than the data contained in the package. If
3781 * this condition is not met, there is most likely an error in the package
3782 * contents.
3783 */
3784static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
3785{
3786 u32 dst_len, sect_len, offset = 0;
3787 struct ice_prof_redir_section *pr;
3788 struct ice_prof_id_section *pid;
3789 struct ice_xlt1_section *xlt1;
3790 struct ice_xlt2_section *xlt2;
3791 struct ice_sw_fv_section *es;
3792 struct ice_pkg_enum state;
3793 u8 *src, *dst;
3794 void *sect;
3795
3796 /* if the HW segment pointer is null then the first iteration of
3797 * ice_pkg_enum_section() will fail. In this case the HW tables will
3798 * not be filled and return success.
3799 */
3800 if (!hw->seg) {
3801 ice_debug(hw, ICE_DBG_PKG, "hw->seg is NULL, tables are not filled\n");
3802 return;
3803 }
3804
3805 memset(&state, 0, sizeof(state));
3806
3807 sect = ice_pkg_enum_section(hw->seg, &state, sid);
3808
3809 while (sect) {
3810 switch (sid) {
3811 case ICE_SID_XLT1_SW:
3812 case ICE_SID_XLT1_FD:
3813 case ICE_SID_XLT1_RSS:
3814 case ICE_SID_XLT1_ACL:
3815 case ICE_SID_XLT1_PE:
3816 xlt1 = sect;
3817 src = xlt1->value;
3818 sect_len = le16_to_cpu(xlt1->count) *
3819 sizeof(*hw->blk[block_id].xlt1.t);
3820 dst = hw->blk[block_id].xlt1.t;
3821 dst_len = hw->blk[block_id].xlt1.count *
3822 sizeof(*hw->blk[block_id].xlt1.t);
3823 break;
3824 case ICE_SID_XLT2_SW:
3825 case ICE_SID_XLT2_FD:
3826 case ICE_SID_XLT2_RSS:
3827 case ICE_SID_XLT2_ACL:
3828 case ICE_SID_XLT2_PE:
3829 xlt2 = sect;
3830 src = (__force u8 *)xlt2->value;
3831 sect_len = le16_to_cpu(xlt2->count) *
3832 sizeof(*hw->blk[block_id].xlt2.t);
3833 dst = (u8 *)hw->blk[block_id].xlt2.t;
3834 dst_len = hw->blk[block_id].xlt2.count *
3835 sizeof(*hw->blk[block_id].xlt2.t);
3836 break;
3837 case ICE_SID_PROFID_TCAM_SW:
3838 case ICE_SID_PROFID_TCAM_FD:
3839 case ICE_SID_PROFID_TCAM_RSS:
3840 case ICE_SID_PROFID_TCAM_ACL:
3841 case ICE_SID_PROFID_TCAM_PE:
3842 pid = sect;
3843 src = (u8 *)pid->entry;
3844 sect_len = le16_to_cpu(pid->count) *
3845 sizeof(*hw->blk[block_id].prof.t);
3846 dst = (u8 *)hw->blk[block_id].prof.t;
3847 dst_len = hw->blk[block_id].prof.count *
3848 sizeof(*hw->blk[block_id].prof.t);
3849 break;
3850 case ICE_SID_PROFID_REDIR_SW:
3851 case ICE_SID_PROFID_REDIR_FD:
3852 case ICE_SID_PROFID_REDIR_RSS:
3853 case ICE_SID_PROFID_REDIR_ACL:
3854 case ICE_SID_PROFID_REDIR_PE:
3855 pr = sect;
3856 src = pr->redir_value;
3857 sect_len = le16_to_cpu(pr->count) *
3858 sizeof(*hw->blk[block_id].prof_redir.t);
3859 dst = hw->blk[block_id].prof_redir.t;
3860 dst_len = hw->blk[block_id].prof_redir.count *
3861 sizeof(*hw->blk[block_id].prof_redir.t);
3862 break;
3863 case ICE_SID_FLD_VEC_SW:
3864 case ICE_SID_FLD_VEC_FD:
3865 case ICE_SID_FLD_VEC_RSS:
3866 case ICE_SID_FLD_VEC_ACL:
3867 case ICE_SID_FLD_VEC_PE:
3868 es = sect;
3869 src = (u8 *)es->fv;
3870 sect_len = (u32)(le16_to_cpu(es->count) *
3871 hw->blk[block_id].es.fvw) *
3872 sizeof(*hw->blk[block_id].es.t);
3873 dst = (u8 *)hw->blk[block_id].es.t;
3874 dst_len = (u32)(hw->blk[block_id].es.count *
3875 hw->blk[block_id].es.fvw) *
3876 sizeof(*hw->blk[block_id].es.t);
3877 break;
3878 default:
3879 return;
3880 }
3881
3882 /* if the section offset exceeds destination length, terminate
3883 * table fill.
3884 */
3885 if (offset > dst_len)
3886 return;
3887
3888 /* if the sum of section size and offset exceed destination size
3889 * then we are out of bounds of the HW table size for that PF.
3890 * Changing section length to fill the remaining table space
3891 * of that PF.
3892 */
3893 if ((offset + sect_len) > dst_len)
3894 sect_len = dst_len - offset;
3895
3896 memcpy(dst + offset, src, sect_len);
3897 offset += sect_len;
3898 sect = ice_pkg_enum_section(NULL, &state, sid);
3899 }
3900}
3901
3902/**
3903 * ice_fill_blk_tbls - Read package context for tables
3904 * @hw: pointer to the hardware structure
3905 *
3906 * Reads the current package contents and populates the driver
3907 * database with the data iteratively for all advanced feature
3908 * blocks. Assume that the HW tables have been allocated.
3909 */
3910void ice_fill_blk_tbls(struct ice_hw *hw)
3911{
3912 u8 i;
3913
3914 for (i = 0; i < ICE_BLK_COUNT; i++) {
3915 enum ice_block blk_id = (enum ice_block)i;
3916
3917 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].xlt1.sid);
3918 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].xlt2.sid);
3919 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].prof.sid);
3920 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].prof_redir.sid);
3921 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].es.sid);
3922 }
3923
3924 ice_init_sw_db(hw);
3925}
3926
3927/**
3928 * ice_free_prof_map - free profile map
3929 * @hw: pointer to the hardware structure
3930 * @blk_idx: HW block index
3931 */
3932static void ice_free_prof_map(struct ice_hw *hw, u8 blk_idx)
3933{
3934 struct ice_es *es = &hw->blk[blk_idx].es;
3935 struct ice_prof_map *del, *tmp;
3936
3937 mutex_lock(&es->prof_map_lock);
3938 list_for_each_entry_safe(del, tmp, &es->prof_map, list) {
3939 list_del(&del->list);
3940 devm_kfree(ice_hw_to_dev(hw), del);
3941 }
3942 INIT_LIST_HEAD(&es->prof_map);
3943 mutex_unlock(&es->prof_map_lock);
3944}
3945
3946/**
3947 * ice_free_flow_profs - free flow profile entries
3948 * @hw: pointer to the hardware structure
3949 * @blk_idx: HW block index
3950 */
3951static void ice_free_flow_profs(struct ice_hw *hw, u8 blk_idx)
3952{
3953 struct ice_flow_prof *p, *tmp;
3954
3955 mutex_lock(&hw->fl_profs_locks[blk_idx]);
3956 list_for_each_entry_safe(p, tmp, &hw->fl_profs[blk_idx], l_entry) {
3957 struct ice_flow_entry *e, *t;
3958
3959 list_for_each_entry_safe(e, t, &p->entries, l_entry)
3960 ice_flow_rem_entry(hw, (enum ice_block)blk_idx,
3961 ICE_FLOW_ENTRY_HNDL(e));
3962
3963 list_del(&p->l_entry);
3964
3965 mutex_destroy(&p->entries_lock);
3966 devm_kfree(ice_hw_to_dev(hw), p);
3967 }
3968 mutex_unlock(&hw->fl_profs_locks[blk_idx]);
3969
3970 /* if driver is in reset and tables are being cleared
3971 * re-initialize the flow profile list heads
3972 */
3973 INIT_LIST_HEAD(&hw->fl_profs[blk_idx]);
3974}
3975
3976/**
3977 * ice_free_vsig_tbl - free complete VSIG table entries
3978 * @hw: pointer to the hardware structure
3979 * @blk: the HW block on which to free the VSIG table entries
3980 */
3981static void ice_free_vsig_tbl(struct ice_hw *hw, enum ice_block blk)
3982{
3983 u16 i;
3984
3985 if (!hw->blk[blk].xlt2.vsig_tbl)
3986 return;
3987
3988 for (i = 1; i < ICE_MAX_VSIGS; i++)
3989 if (hw->blk[blk].xlt2.vsig_tbl[i].in_use)
3990 ice_vsig_free(hw, blk, i);
3991}
3992
3993/**
3994 * ice_free_hw_tbls - free hardware table memory
3995 * @hw: pointer to the hardware structure
3996 */
3997void ice_free_hw_tbls(struct ice_hw *hw)
3998{
3999 struct ice_rss_cfg *r, *rt;
4000 u8 i;
4001
4002 for (i = 0; i < ICE_BLK_COUNT; i++) {
4003 if (hw->blk[i].is_list_init) {
4004 struct ice_es *es = &hw->blk[i].es;
4005
4006 ice_free_prof_map(hw, i);
4007 mutex_destroy(&es->prof_map_lock);
4008
4009 ice_free_flow_profs(hw, i);
4010 mutex_destroy(&hw->fl_profs_locks[i]);
4011
4012 hw->blk[i].is_list_init = false;
4013 }
4014 ice_free_vsig_tbl(hw, (enum ice_block)i);
4015 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt1.ptypes);
4016 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt1.ptg_tbl);
4017 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt1.t);
4018 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt2.t);
4019 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt2.vsig_tbl);
4020 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt2.vsis);
4021 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].prof.t);
4022 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].prof_redir.t);
4023 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.t);
4024 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.ref_count);
4025 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.written);
4026 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.mask_ena);
4027 }
4028
4029 list_for_each_entry_safe(r, rt, &hw->rss_list_head, l_entry) {
4030 list_del(&r->l_entry);
4031 devm_kfree(ice_hw_to_dev(hw), r);
4032 }
4033 mutex_destroy(&hw->rss_locks);
4034 ice_shutdown_all_prof_masks(hw);
4035 memset(hw->blk, 0, sizeof(hw->blk));
4036}
4037
4038/**
4039 * ice_init_flow_profs - init flow profile locks and list heads
4040 * @hw: pointer to the hardware structure
4041 * @blk_idx: HW block index
4042 */
4043static void ice_init_flow_profs(struct ice_hw *hw, u8 blk_idx)
4044{
4045 mutex_init(&hw->fl_profs_locks[blk_idx]);
4046 INIT_LIST_HEAD(&hw->fl_profs[blk_idx]);
4047}
4048
4049/**
4050 * ice_clear_hw_tbls - clear HW tables and flow profiles
4051 * @hw: pointer to the hardware structure
4052 */
4053void ice_clear_hw_tbls(struct ice_hw *hw)
4054{
4055 u8 i;
4056
4057 for (i = 0; i < ICE_BLK_COUNT; i++) {
4058 struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;
4059 struct ice_prof_tcam *prof = &hw->blk[i].prof;
4060 struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;
4061 struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;
4062 struct ice_es *es = &hw->blk[i].es;
4063
4064 if (hw->blk[i].is_list_init) {
4065 ice_free_prof_map(hw, i);
4066 ice_free_flow_profs(hw, i);
4067 }
4068
4069 ice_free_vsig_tbl(hw, (enum ice_block)i);
4070
4071 memset(xlt1->ptypes, 0, xlt1->count * sizeof(*xlt1->ptypes));
4072 memset(xlt1->ptg_tbl, 0,
4073 ICE_MAX_PTGS * sizeof(*xlt1->ptg_tbl));
4074 memset(xlt1->t, 0, xlt1->count * sizeof(*xlt1->t));
4075
4076 memset(xlt2->vsis, 0, xlt2->count * sizeof(*xlt2->vsis));
4077 memset(xlt2->vsig_tbl, 0,
4078 xlt2->count * sizeof(*xlt2->vsig_tbl));
4079 memset(xlt2->t, 0, xlt2->count * sizeof(*xlt2->t));
4080
4081 memset(prof->t, 0, prof->count * sizeof(*prof->t));
4082 memset(prof_redir->t, 0,
4083 prof_redir->count * sizeof(*prof_redir->t));
4084
4085 memset(es->t, 0, es->count * sizeof(*es->t) * es->fvw);
4086 memset(es->ref_count, 0, es->count * sizeof(*es->ref_count));
4087 memset(es->written, 0, es->count * sizeof(*es->written));
4088 memset(es->mask_ena, 0, es->count * sizeof(*es->mask_ena));
4089 }
4090}
4091
4092/**
4093 * ice_init_hw_tbls - init hardware table memory
4094 * @hw: pointer to the hardware structure
4095 */
4096int ice_init_hw_tbls(struct ice_hw *hw)
4097{
4098 u8 i;
4099
4100 mutex_init(&hw->rss_locks);
4101 INIT_LIST_HEAD(&hw->rss_list_head);
4102 ice_init_all_prof_masks(hw);
4103 for (i = 0; i < ICE_BLK_COUNT; i++) {
4104 struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;
4105 struct ice_prof_tcam *prof = &hw->blk[i].prof;
4106 struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;
4107 struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;
4108 struct ice_es *es = &hw->blk[i].es;
4109 u16 j;
4110
4111 if (hw->blk[i].is_list_init)
4112 continue;
4113
4114 ice_init_flow_profs(hw, i);
4115 mutex_init(&es->prof_map_lock);
4116 INIT_LIST_HEAD(&es->prof_map);
4117 hw->blk[i].is_list_init = true;
4118
4119 hw->blk[i].overwrite = blk_sizes[i].overwrite;
4120 es->reverse = blk_sizes[i].reverse;
4121
4122 xlt1->sid = ice_blk_sids[i][ICE_SID_XLT1_OFF];
4123 xlt1->count = blk_sizes[i].xlt1;
4124
4125 xlt1->ptypes = devm_kcalloc(ice_hw_to_dev(hw), xlt1->count,
4126 sizeof(*xlt1->ptypes), GFP_KERNEL);
4127
4128 if (!xlt1->ptypes)
4129 goto err;
4130
4131 xlt1->ptg_tbl = devm_kcalloc(ice_hw_to_dev(hw), ICE_MAX_PTGS,
4132 sizeof(*xlt1->ptg_tbl),
4133 GFP_KERNEL);
4134
4135 if (!xlt1->ptg_tbl)
4136 goto err;
4137
4138 xlt1->t = devm_kcalloc(ice_hw_to_dev(hw), xlt1->count,
4139 sizeof(*xlt1->t), GFP_KERNEL);
4140 if (!xlt1->t)
4141 goto err;
4142
4143 xlt2->sid = ice_blk_sids[i][ICE_SID_XLT2_OFF];
4144 xlt2->count = blk_sizes[i].xlt2;
4145
4146 xlt2->vsis = devm_kcalloc(ice_hw_to_dev(hw), xlt2->count,
4147 sizeof(*xlt2->vsis), GFP_KERNEL);
4148
4149 if (!xlt2->vsis)
4150 goto err;
4151
4152 xlt2->vsig_tbl = devm_kcalloc(ice_hw_to_dev(hw), xlt2->count,
4153 sizeof(*xlt2->vsig_tbl),
4154 GFP_KERNEL);
4155 if (!xlt2->vsig_tbl)
4156 goto err;
4157
4158 for (j = 0; j < xlt2->count; j++)
4159 INIT_LIST_HEAD(&xlt2->vsig_tbl[j].prop_lst);
4160
4161 xlt2->t = devm_kcalloc(ice_hw_to_dev(hw), xlt2->count,
4162 sizeof(*xlt2->t), GFP_KERNEL);
4163 if (!xlt2->t)
4164 goto err;
4165
4166 prof->sid = ice_blk_sids[i][ICE_SID_PR_OFF];
4167 prof->count = blk_sizes[i].prof_tcam;
4168 prof->max_prof_id = blk_sizes[i].prof_id;
4169 prof->cdid_bits = blk_sizes[i].prof_cdid_bits;
4170 prof->t = devm_kcalloc(ice_hw_to_dev(hw), prof->count,
4171 sizeof(*prof->t), GFP_KERNEL);
4172
4173 if (!prof->t)
4174 goto err;
4175
4176 prof_redir->sid = ice_blk_sids[i][ICE_SID_PR_REDIR_OFF];
4177 prof_redir->count = blk_sizes[i].prof_redir;
4178 prof_redir->t = devm_kcalloc(ice_hw_to_dev(hw),
4179 prof_redir->count,
4180 sizeof(*prof_redir->t),
4181 GFP_KERNEL);
4182
4183 if (!prof_redir->t)
4184 goto err;
4185
4186 es->sid = ice_blk_sids[i][ICE_SID_ES_OFF];
4187 es->count = blk_sizes[i].es;
4188 es->fvw = blk_sizes[i].fvw;
4189 es->t = devm_kcalloc(ice_hw_to_dev(hw),
4190 (u32)(es->count * es->fvw),
4191 sizeof(*es->t), GFP_KERNEL);
4192 if (!es->t)
4193 goto err;
4194
4195 es->ref_count = devm_kcalloc(ice_hw_to_dev(hw), es->count,
4196 sizeof(*es->ref_count),
4197 GFP_KERNEL);
4198 if (!es->ref_count)
4199 goto err;
4200
4201 es->written = devm_kcalloc(ice_hw_to_dev(hw), es->count,
4202 sizeof(*es->written), GFP_KERNEL);
4203 if (!es->written)
4204 goto err;
4205
4206 es->mask_ena = devm_kcalloc(ice_hw_to_dev(hw), es->count,
4207 sizeof(*es->mask_ena), GFP_KERNEL);
4208 if (!es->mask_ena)
4209 goto err;
4210 }
4211 return 0;
4212
4213err:
4214 ice_free_hw_tbls(hw);
4215 return -ENOMEM;
4216}
4217
4218/**
4219 * ice_prof_gen_key - generate profile ID key
4220 * @hw: pointer to the HW struct
4221 * @blk: the block in which to write profile ID to
4222 * @ptg: packet type group (PTG) portion of key
4223 * @vsig: VSIG portion of key
4224 * @cdid: CDID portion of key
4225 * @flags: flag portion of key
4226 * @vl_msk: valid mask
4227 * @dc_msk: don't care mask
4228 * @nm_msk: never match mask
4229 * @key: output of profile ID key
4230 */
4231static int
4232ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
4233 u8 cdid, u16 flags, u8 vl_msk[ICE_TCAM_KEY_VAL_SZ],
4234 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ], u8 nm_msk[ICE_TCAM_KEY_VAL_SZ],
4235 u8 key[ICE_TCAM_KEY_SZ])
4236{
4237 struct ice_prof_id_key inkey;
4238
4239 inkey.xlt1 = ptg;
4240 inkey.xlt2_cdid = cpu_to_le16(vsig);
4241 inkey.flags = cpu_to_le16(flags);
4242
4243 switch (hw->blk[blk].prof.cdid_bits) {
4244 case 0:
4245 break;
4246 case 2:
4247#define ICE_CD_2_M 0xC000U
4248#define ICE_CD_2_S 14
4249 inkey.xlt2_cdid &= ~cpu_to_le16(ICE_CD_2_M);
4250 inkey.xlt2_cdid |= cpu_to_le16(BIT(cdid) << ICE_CD_2_S);
4251 break;
4252 case 4:
4253#define ICE_CD_4_M 0xF000U
4254#define ICE_CD_4_S 12
4255 inkey.xlt2_cdid &= ~cpu_to_le16(ICE_CD_4_M);
4256 inkey.xlt2_cdid |= cpu_to_le16(BIT(cdid) << ICE_CD_4_S);
4257 break;
4258 case 8:
4259#define ICE_CD_8_M 0xFF00U
4260#define ICE_CD_8_S 16
4261 inkey.xlt2_cdid &= ~cpu_to_le16(ICE_CD_8_M);
4262 inkey.xlt2_cdid |= cpu_to_le16(BIT(cdid) << ICE_CD_8_S);
4263 break;
4264 default:
4265 ice_debug(hw, ICE_DBG_PKG, "Error in profile config\n");
4266 break;
4267 }
4268
4269 return ice_set_key(key, ICE_TCAM_KEY_SZ, (u8 *)&inkey, vl_msk, dc_msk,
4270 nm_msk, 0, ICE_TCAM_KEY_SZ / 2);
4271}
4272
4273/**
4274 * ice_tcam_write_entry - write TCAM entry
4275 * @hw: pointer to the HW struct
4276 * @blk: the block in which to write profile ID to
4277 * @idx: the entry index to write to
4278 * @prof_id: profile ID
4279 * @ptg: packet type group (PTG) portion of key
4280 * @vsig: VSIG portion of key
4281 * @cdid: CDID portion of key
4282 * @flags: flag portion of key
4283 * @vl_msk: valid mask
4284 * @dc_msk: don't care mask
4285 * @nm_msk: never match mask
4286 */
4287static int
4288ice_tcam_write_entry(struct ice_hw *hw, enum ice_block blk, u16 idx,
4289 u8 prof_id, u8 ptg, u16 vsig, u8 cdid, u16 flags,
4290 u8 vl_msk[ICE_TCAM_KEY_VAL_SZ],
4291 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ],
4292 u8 nm_msk[ICE_TCAM_KEY_VAL_SZ])
4293{
4294 struct ice_prof_tcam_entry;
4295 int status;
4296
4297 status = ice_prof_gen_key(hw, blk, ptg, vsig, cdid, flags, vl_msk,
4298 dc_msk, nm_msk, hw->blk[blk].prof.t[idx].key);
4299 if (!status) {
4300 hw->blk[blk].prof.t[idx].addr = cpu_to_le16(idx);
4301 hw->blk[blk].prof.t[idx].prof_id = prof_id;
4302 }
4303
4304 return status;
4305}
4306
4307/**
4308 * ice_vsig_get_ref - returns number of VSIs belong to a VSIG
4309 * @hw: pointer to the hardware structure
4310 * @blk: HW block
4311 * @vsig: VSIG to query
4312 * @refs: pointer to variable to receive the reference count
4313 */
4314static int
4315ice_vsig_get_ref(struct ice_hw *hw, enum ice_block blk, u16 vsig, u16 *refs)
4316{
4317 u16 idx = vsig & ICE_VSIG_IDX_M;
4318 struct ice_vsig_vsi *ptr;
4319
4320 *refs = 0;
4321
4322 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
4323 return -ENOENT;
4324
4325 ptr = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
4326 while (ptr) {
4327 (*refs)++;
4328 ptr = ptr->next_vsi;
4329 }
4330
4331 return 0;
4332}
4333
4334/**
4335 * ice_has_prof_vsig - check to see if VSIG has a specific profile
4336 * @hw: pointer to the hardware structure
4337 * @blk: HW block
4338 * @vsig: VSIG to check against
4339 * @hdl: profile handle
4340 */
4341static bool
4342ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
4343{
4344 u16 idx = vsig & ICE_VSIG_IDX_M;
4345 struct ice_vsig_prof *ent;
4346
4347 list_for_each_entry(ent, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
4348 list)
4349 if (ent->profile_cookie == hdl)
4350 return true;
4351
4352 ice_debug(hw, ICE_DBG_INIT, "Characteristic list for VSI group %d not found.\n",
4353 vsig);
4354 return false;
4355}
4356
4357/**
4358 * ice_prof_bld_es - build profile ID extraction sequence changes
4359 * @hw: pointer to the HW struct
4360 * @blk: hardware block
4361 * @bld: the update package buffer build to add to
4362 * @chgs: the list of changes to make in hardware
4363 */
4364static int
4365ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
4366 struct ice_buf_build *bld, struct list_head *chgs)
4367{
4368 u16 vec_size = hw->blk[blk].es.fvw * sizeof(struct ice_fv_word);
4369 struct ice_chs_chg *tmp;
4370
4371 list_for_each_entry(tmp, chgs, list_entry)
4372 if (tmp->type == ICE_PTG_ES_ADD && tmp->add_prof) {
4373 u16 off = tmp->prof_id * hw->blk[blk].es.fvw;
4374 struct ice_pkg_es *p;
4375 u32 id;
4376
4377 id = ice_sect_id(blk, ICE_VEC_TBL);
4378 p = ice_pkg_buf_alloc_section(bld, id,
4379 struct_size(p, es, 1) +
4380 vec_size -
4381 sizeof(p->es[0]));
4382
4383 if (!p)
4384 return -ENOSPC;
4385
4386 p->count = cpu_to_le16(1);
4387 p->offset = cpu_to_le16(tmp->prof_id);
4388
4389 memcpy(p->es, &hw->blk[blk].es.t[off], vec_size);
4390 }
4391
4392 return 0;
4393}
4394
4395/**
4396 * ice_prof_bld_tcam - build profile ID TCAM changes
4397 * @hw: pointer to the HW struct
4398 * @blk: hardware block
4399 * @bld: the update package buffer build to add to
4400 * @chgs: the list of changes to make in hardware
4401 */
4402static int
4403ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
4404 struct ice_buf_build *bld, struct list_head *chgs)
4405{
4406 struct ice_chs_chg *tmp;
4407
4408 list_for_each_entry(tmp, chgs, list_entry)
4409 if (tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) {
4410 struct ice_prof_id_section *p;
4411 u32 id;
4412
4413 id = ice_sect_id(blk, ICE_PROF_TCAM);
4414 p = ice_pkg_buf_alloc_section(bld, id,
4415 struct_size(p, entry, 1));
4416
4417 if (!p)
4418 return -ENOSPC;
4419
4420 p->count = cpu_to_le16(1);
4421 p->entry[0].addr = cpu_to_le16(tmp->tcam_idx);
4422 p->entry[0].prof_id = tmp->prof_id;
4423
4424 memcpy(p->entry[0].key,
4425 &hw->blk[blk].prof.t[tmp->tcam_idx].key,
4426 sizeof(hw->blk[blk].prof.t->key));
4427 }
4428
4429 return 0;
4430}
4431
4432/**
4433 * ice_prof_bld_xlt1 - build XLT1 changes
4434 * @blk: hardware block
4435 * @bld: the update package buffer build to add to
4436 * @chgs: the list of changes to make in hardware
4437 */
4438static int
4439ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
4440 struct list_head *chgs)
4441{
4442 struct ice_chs_chg *tmp;
4443
4444 list_for_each_entry(tmp, chgs, list_entry)
4445 if (tmp->type == ICE_PTG_ES_ADD && tmp->add_ptg) {
4446 struct ice_xlt1_section *p;
4447 u32 id;
4448
4449 id = ice_sect_id(blk, ICE_XLT1);
4450 p = ice_pkg_buf_alloc_section(bld, id,
4451 struct_size(p, value, 1));
4452
4453 if (!p)
4454 return -ENOSPC;
4455
4456 p->count = cpu_to_le16(1);
4457 p->offset = cpu_to_le16(tmp->ptype);
4458 p->value[0] = tmp->ptg;
4459 }
4460
4461 return 0;
4462}
4463
4464/**
4465 * ice_prof_bld_xlt2 - build XLT2 changes
4466 * @blk: hardware block
4467 * @bld: the update package buffer build to add to
4468 * @chgs: the list of changes to make in hardware
4469 */
4470static int
4471ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,
4472 struct list_head *chgs)
4473{
4474 struct ice_chs_chg *tmp;
4475
4476 list_for_each_entry(tmp, chgs, list_entry) {
4477 struct ice_xlt2_section *p;
4478 u32 id;
4479
4480 switch (tmp->type) {
4481 case ICE_VSIG_ADD:
4482 case ICE_VSI_MOVE:
4483 case ICE_VSIG_REM:
4484 id = ice_sect_id(blk, ICE_XLT2);
4485 p = ice_pkg_buf_alloc_section(bld, id,
4486 struct_size(p, value, 1));
4487
4488 if (!p)
4489 return -ENOSPC;
4490
4491 p->count = cpu_to_le16(1);
4492 p->offset = cpu_to_le16(tmp->vsi);
4493 p->value[0] = cpu_to_le16(tmp->vsig);
4494 break;
4495 default:
4496 break;
4497 }
4498 }
4499
4500 return 0;
4501}
4502
4503/**
4504 * ice_upd_prof_hw - update hardware using the change list
4505 * @hw: pointer to the HW struct
4506 * @blk: hardware block
4507 * @chgs: the list of changes to make in hardware
4508 */
4509static int
4510ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
4511 struct list_head *chgs)
4512{
4513 struct ice_buf_build *b;
4514 struct ice_chs_chg *tmp;
4515 u16 pkg_sects;
4516 u16 xlt1 = 0;
4517 u16 xlt2 = 0;
4518 u16 tcam = 0;
4519 u16 es = 0;
4520 int status;
4521 u16 sects;
4522
4523 /* count number of sections we need */
4524 list_for_each_entry(tmp, chgs, list_entry) {
4525 switch (tmp->type) {
4526 case ICE_PTG_ES_ADD:
4527 if (tmp->add_ptg)
4528 xlt1++;
4529 if (tmp->add_prof)
4530 es++;
4531 break;
4532 case ICE_TCAM_ADD:
4533 tcam++;
4534 break;
4535 case ICE_VSIG_ADD:
4536 case ICE_VSI_MOVE:
4537 case ICE_VSIG_REM:
4538 xlt2++;
4539 break;
4540 default:
4541 break;
4542 }
4543 }
4544 sects = xlt1 + xlt2 + tcam + es;
4545
4546 if (!sects)
4547 return 0;
4548
4549 /* Build update package buffer */
4550 b = ice_pkg_buf_alloc(hw);
4551 if (!b)
4552 return -ENOMEM;
4553
4554 status = ice_pkg_buf_reserve_section(b, sects);
4555 if (status)
4556 goto error_tmp;
4557
4558 /* Preserve order of table update: ES, TCAM, PTG, VSIG */
4559 if (es) {
4560 status = ice_prof_bld_es(hw, blk, b, chgs);
4561 if (status)
4562 goto error_tmp;
4563 }
4564
4565 if (tcam) {
4566 status = ice_prof_bld_tcam(hw, blk, b, chgs);
4567 if (status)
4568 goto error_tmp;
4569 }
4570
4571 if (xlt1) {
4572 status = ice_prof_bld_xlt1(blk, b, chgs);
4573 if (status)
4574 goto error_tmp;
4575 }
4576
4577 if (xlt2) {
4578 status = ice_prof_bld_xlt2(blk, b, chgs);
4579 if (status)
4580 goto error_tmp;
4581 }
4582
4583 /* After package buffer build check if the section count in buffer is
4584 * non-zero and matches the number of sections detected for package
4585 * update.
4586 */
4587 pkg_sects = ice_pkg_buf_get_active_sections(b);
4588 if (!pkg_sects || pkg_sects != sects) {
4589 status = -EINVAL;
4590 goto error_tmp;
4591 }
4592
4593 /* update package */
4594 status = ice_update_pkg(hw, ice_pkg_buf(b), 1);
4595 if (status == -EIO)
4596 ice_debug(hw, ICE_DBG_INIT, "Unable to update HW profile\n");
4597
4598error_tmp:
4599 ice_pkg_buf_free(hw, b);
4600 return status;
4601}
4602
4603/**
4604 * ice_update_fd_mask - set Flow Director Field Vector mask for a profile
4605 * @hw: pointer to the HW struct
4606 * @prof_id: profile ID
4607 * @mask_sel: mask select
4608 *
4609 * This function enable any of the masks selected by the mask select parameter
4610 * for the profile specified.
4611 */
4612static void ice_update_fd_mask(struct ice_hw *hw, u16 prof_id, u32 mask_sel)
4613{
4614 wr32(hw, GLQF_FDMASK_SEL(prof_id), mask_sel);
4615
4616 ice_debug(hw, ICE_DBG_INIT, "fd mask(%d): %x = %x\n", prof_id,
4617 GLQF_FDMASK_SEL(prof_id), mask_sel);
4618}
4619
4620struct ice_fd_src_dst_pair {
4621 u8 prot_id;
4622 u8 count;
4623 u16 off;
4624};
4625
4626static const struct ice_fd_src_dst_pair ice_fd_pairs[] = {
4627 /* These are defined in pairs */
4628 { ICE_PROT_IPV4_OF_OR_S, 2, 12 },
4629 { ICE_PROT_IPV4_OF_OR_S, 2, 16 },
4630
4631 { ICE_PROT_IPV4_IL, 2, 12 },
4632 { ICE_PROT_IPV4_IL, 2, 16 },
4633
4634 { ICE_PROT_IPV6_OF_OR_S, 8, 8 },
4635 { ICE_PROT_IPV6_OF_OR_S, 8, 24 },
4636
4637 { ICE_PROT_IPV6_IL, 8, 8 },
4638 { ICE_PROT_IPV6_IL, 8, 24 },
4639
4640 { ICE_PROT_TCP_IL, 1, 0 },
4641 { ICE_PROT_TCP_IL, 1, 2 },
4642
4643 { ICE_PROT_UDP_OF, 1, 0 },
4644 { ICE_PROT_UDP_OF, 1, 2 },
4645
4646 { ICE_PROT_UDP_IL_OR_S, 1, 0 },
4647 { ICE_PROT_UDP_IL_OR_S, 1, 2 },
4648
4649 { ICE_PROT_SCTP_IL, 1, 0 },
4650 { ICE_PROT_SCTP_IL, 1, 2 }
4651};
4652
4653#define ICE_FD_SRC_DST_PAIR_COUNT ARRAY_SIZE(ice_fd_pairs)
4654
4655/**
4656 * ice_update_fd_swap - set register appropriately for a FD FV extraction
4657 * @hw: pointer to the HW struct
4658 * @prof_id: profile ID
4659 * @es: extraction sequence (length of array is determined by the block)
4660 */
4661static int
4662ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
4663{
4664 DECLARE_BITMAP(pair_list, ICE_FD_SRC_DST_PAIR_COUNT);
4665 u8 pair_start[ICE_FD_SRC_DST_PAIR_COUNT] = { 0 };
4666#define ICE_FD_FV_NOT_FOUND (-2)
4667 s8 first_free = ICE_FD_FV_NOT_FOUND;
4668 u8 used[ICE_MAX_FV_WORDS] = { 0 };
4669 s8 orig_free, si;
4670 u32 mask_sel = 0;
4671 u8 i, j, k;
4672
4673 bitmap_zero(pair_list, ICE_FD_SRC_DST_PAIR_COUNT);
4674
4675 /* This code assumes that the Flow Director field vectors are assigned
4676 * from the end of the FV indexes working towards the zero index, that
4677 * only complete fields will be included and will be consecutive, and
4678 * that there are no gaps between valid indexes.
4679 */
4680
4681 /* Determine swap fields present */
4682 for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
4683 /* Find the first free entry, assuming right to left population.
4684 * This is where we can start adding additional pairs if needed.
4685 */
4686 if (first_free == ICE_FD_FV_NOT_FOUND && es[i].prot_id !=
4687 ICE_PROT_INVALID)
4688 first_free = i - 1;
4689
4690 for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++)
4691 if (es[i].prot_id == ice_fd_pairs[j].prot_id &&
4692 es[i].off == ice_fd_pairs[j].off) {
4693 __set_bit(j, pair_list);
4694 pair_start[j] = i;
4695 }
4696 }
4697
4698 orig_free = first_free;
4699
4700 /* determine missing swap fields that need to be added */
4701 for (i = 0; i < ICE_FD_SRC_DST_PAIR_COUNT; i += 2) {
4702 u8 bit1 = test_bit(i + 1, pair_list);
4703 u8 bit0 = test_bit(i, pair_list);
4704
4705 if (bit0 ^ bit1) {
4706 u8 index;
4707
4708 /* add the appropriate 'paired' entry */
4709 if (!bit0)
4710 index = i;
4711 else
4712 index = i + 1;
4713
4714 /* check for room */
4715 if (first_free + 1 < (s8)ice_fd_pairs[index].count)
4716 return -ENOSPC;
4717
4718 /* place in extraction sequence */
4719 for (k = 0; k < ice_fd_pairs[index].count; k++) {
4720 es[first_free - k].prot_id =
4721 ice_fd_pairs[index].prot_id;
4722 es[first_free - k].off =
4723 ice_fd_pairs[index].off + (k * 2);
4724
4725 if (k > first_free)
4726 return -EIO;
4727
4728 /* keep track of non-relevant fields */
4729 mask_sel |= BIT(first_free - k);
4730 }
4731
4732 pair_start[index] = first_free;
4733 first_free -= ice_fd_pairs[index].count;
4734 }
4735 }
4736
4737 /* fill in the swap array */
4738 si = hw->blk[ICE_BLK_FD].es.fvw - 1;
4739 while (si >= 0) {
4740 u8 indexes_used = 1;
4741
4742 /* assume flat at this index */
4743#define ICE_SWAP_VALID 0x80
4744 used[si] = si | ICE_SWAP_VALID;
4745
4746 if (orig_free == ICE_FD_FV_NOT_FOUND || si <= orig_free) {
4747 si -= indexes_used;
4748 continue;
4749 }
4750
4751 /* check for a swap location */
4752 for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++)
4753 if (es[si].prot_id == ice_fd_pairs[j].prot_id &&
4754 es[si].off == ice_fd_pairs[j].off) {
4755 u8 idx;
4756
4757 /* determine the appropriate matching field */
4758 idx = j + ((j % 2) ? -1 : 1);
4759
4760 indexes_used = ice_fd_pairs[idx].count;
4761 for (k = 0; k < indexes_used; k++) {
4762 used[si - k] = (pair_start[idx] - k) |
4763 ICE_SWAP_VALID;
4764 }
4765
4766 break;
4767 }
4768
4769 si -= indexes_used;
4770 }
4771
4772 /* for each set of 4 swap and 4 inset indexes, write the appropriate
4773 * register
4774 */
4775 for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) {
4776 u32 raw_swap = 0;
4777 u32 raw_in = 0;
4778
4779 for (k = 0; k < 4; k++) {
4780 u8 idx;
4781
4782 idx = (j * 4) + k;
4783 if (used[idx] && !(mask_sel & BIT(idx))) {
4784 raw_swap |= used[idx] << (k * BITS_PER_BYTE);
4785#define ICE_INSET_DFLT 0x9f
4786 raw_in |= ICE_INSET_DFLT << (k * BITS_PER_BYTE);
4787 }
4788 }
4789
4790 /* write the appropriate swap register set */
4791 wr32(hw, GLQF_FDSWAP(prof_id, j), raw_swap);
4792
4793 ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %08x\n",
4794 prof_id, j, GLQF_FDSWAP(prof_id, j), raw_swap);
4795
4796 /* write the appropriate inset register set */
4797 wr32(hw, GLQF_FDINSET(prof_id, j), raw_in);
4798
4799 ice_debug(hw, ICE_DBG_INIT, "inset wr(%d, %d): %x = %08x\n",
4800 prof_id, j, GLQF_FDINSET(prof_id, j), raw_in);
4801 }
4802
4803 /* initially clear the mask select for this profile */
4804 ice_update_fd_mask(hw, prof_id, 0);
4805
4806 return 0;
4807}
4808
4809/* The entries here needs to match the order of enum ice_ptype_attrib */
4810static const struct ice_ptype_attrib_info ice_ptype_attributes[] = {
4811 { ICE_GTP_PDU_EH, ICE_GTP_PDU_FLAG_MASK },
4812 { ICE_GTP_SESSION, ICE_GTP_FLAGS_MASK },
4813 { ICE_GTP_DOWNLINK, ICE_GTP_FLAGS_MASK },
4814 { ICE_GTP_UPLINK, ICE_GTP_FLAGS_MASK },
4815};
4816
4817/**
4818 * ice_get_ptype_attrib_info - get PTYPE attribute information
4819 * @type: attribute type
4820 * @info: pointer to variable to the attribute information
4821 */
4822static void
4823ice_get_ptype_attrib_info(enum ice_ptype_attrib_type type,
4824 struct ice_ptype_attrib_info *info)
4825{
4826 *info = ice_ptype_attributes[type];
4827}
4828
4829/**
4830 * ice_add_prof_attrib - add any PTG with attributes to profile
4831 * @prof: pointer to the profile to which PTG entries will be added
4832 * @ptg: PTG to be added
4833 * @ptype: PTYPE that needs to be looked up
4834 * @attr: array of attributes that will be considered
4835 * @attr_cnt: number of elements in the attribute array
4836 */
4837static int
4838ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,
4839 const struct ice_ptype_attributes *attr, u16 attr_cnt)
4840{
4841 bool found = false;
4842 u16 i;
4843
4844 for (i = 0; i < attr_cnt; i++)
4845 if (attr[i].ptype == ptype) {
4846 found = true;
4847
4848 prof->ptg[prof->ptg_cnt] = ptg;
4849 ice_get_ptype_attrib_info(attr[i].attrib,
4850 &prof->attr[prof->ptg_cnt]);
4851
4852 if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE)
4853 return -ENOSPC;
4854 }
4855
4856 if (!found)
4857 return -ENOENT;
4858
4859 return 0;
4860}
4861
4862/**
4863 * ice_add_prof - add profile
4864 * @hw: pointer to the HW struct
4865 * @blk: hardware block
4866 * @id: profile tracking ID
4867 * @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits)
4868 * @attr: array of attributes
4869 * @attr_cnt: number of elements in attr array
4870 * @es: extraction sequence (length of array is determined by the block)
4871 * @masks: mask for extraction sequence
4872 *
4873 * This function registers a profile, which matches a set of PTYPES with a
4874 * particular extraction sequence. While the hardware profile is allocated
4875 * it will not be written until the first call to ice_add_flow that specifies
4876 * the ID value used here.
4877 */
4878int
4879ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
4880 const struct ice_ptype_attributes *attr, u16 attr_cnt,
4881 struct ice_fv_word *es, u16 *masks)
4882{
4883 u32 bytes = DIV_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE);
4884 DECLARE_BITMAP(ptgs_used, ICE_XLT1_CNT);
4885 struct ice_prof_map *prof;
4886 u8 byte = 0;
4887 u8 prof_id;
4888 int status;
4889
4890 bitmap_zero(ptgs_used, ICE_XLT1_CNT);
4891
4892 mutex_lock(&hw->blk[blk].es.prof_map_lock);
4893
4894 /* search for existing profile */
4895 status = ice_find_prof_id_with_mask(hw, blk, es, masks, &prof_id);
4896 if (status) {
4897 /* allocate profile ID */
4898 status = ice_alloc_prof_id(hw, blk, &prof_id);
4899 if (status)
4900 goto err_ice_add_prof;
4901 if (blk == ICE_BLK_FD) {
4902 /* For Flow Director block, the extraction sequence may
4903 * need to be altered in the case where there are paired
4904 * fields that have no match. This is necessary because
4905 * for Flow Director, src and dest fields need to paired
4906 * for filter programming and these values are swapped
4907 * during Tx.
4908 */
4909 status = ice_update_fd_swap(hw, prof_id, es);
4910 if (status)
4911 goto err_ice_add_prof;
4912 }
4913 status = ice_update_prof_masking(hw, blk, prof_id, masks);
4914 if (status)
4915 goto err_ice_add_prof;
4916
4917 /* and write new es */
4918 ice_write_es(hw, blk, prof_id, es);
4919 }
4920
4921 ice_prof_inc_ref(hw, blk, prof_id);
4922
4923 /* add profile info */
4924 prof = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*prof), GFP_KERNEL);
4925 if (!prof) {
4926 status = -ENOMEM;
4927 goto err_ice_add_prof;
4928 }
4929
4930 prof->profile_cookie = id;
4931 prof->prof_id = prof_id;
4932 prof->ptg_cnt = 0;
4933 prof->context = 0;
4934
4935 /* build list of ptgs */
4936 while (bytes && prof->ptg_cnt < ICE_MAX_PTG_PER_PROFILE) {
4937 u8 bit;
4938
4939 if (!ptypes[byte]) {
4940 bytes--;
4941 byte++;
4942 continue;
4943 }
4944
4945 /* Examine 8 bits per byte */
4946 for_each_set_bit(bit, (unsigned long *)&ptypes[byte],
4947 BITS_PER_BYTE) {
4948 u16 ptype;
4949 u8 ptg;
4950
4951 ptype = byte * BITS_PER_BYTE + bit;
4952
4953 /* The package should place all ptypes in a non-zero
4954 * PTG, so the following call should never fail.
4955 */
4956 if (ice_ptg_find_ptype(hw, blk, ptype, &ptg))
4957 continue;
4958
4959 /* If PTG is already added, skip and continue */
4960 if (test_bit(ptg, ptgs_used))
4961 continue;
4962
4963 __set_bit(ptg, ptgs_used);
4964 /* Check to see there are any attributes for
4965 * this PTYPE, and add them if found.
4966 */
4967 status = ice_add_prof_attrib(prof, ptg, ptype,
4968 attr, attr_cnt);
4969 if (status == -ENOSPC)
4970 break;
4971 if (status) {
4972 /* This is simple a PTYPE/PTG with no
4973 * attribute
4974 */
4975 prof->ptg[prof->ptg_cnt] = ptg;
4976 prof->attr[prof->ptg_cnt].flags = 0;
4977 prof->attr[prof->ptg_cnt].mask = 0;
4978
4979 if (++prof->ptg_cnt >=
4980 ICE_MAX_PTG_PER_PROFILE)
4981 break;
4982 }
4983 }
4984
4985 bytes--;
4986 byte++;
4987 }
4988
4989 list_add(&prof->list, &hw->blk[blk].es.prof_map);
4990 status = 0;
4991
4992err_ice_add_prof:
4993 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
4994 return status;
4995}
4996
4997/**
4998 * ice_search_prof_id - Search for a profile tracking ID
4999 * @hw: pointer to the HW struct
5000 * @blk: hardware block
5001 * @id: profile tracking ID
5002 *
5003 * This will search for a profile tracking ID which was previously added.
5004 * The profile map lock should be held before calling this function.
5005 */
5006static struct ice_prof_map *
5007ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id)
5008{
5009 struct ice_prof_map *entry = NULL;
5010 struct ice_prof_map *map;
5011
5012 list_for_each_entry(map, &hw->blk[blk].es.prof_map, list)
5013 if (map->profile_cookie == id) {
5014 entry = map;
5015 break;
5016 }
5017
5018 return entry;
5019}
5020
5021/**
5022 * ice_vsig_prof_id_count - count profiles in a VSIG
5023 * @hw: pointer to the HW struct
5024 * @blk: hardware block
5025 * @vsig: VSIG to remove the profile from
5026 */
5027static u16
5028ice_vsig_prof_id_count(struct ice_hw *hw, enum ice_block blk, u16 vsig)
5029{
5030 u16 idx = vsig & ICE_VSIG_IDX_M, count = 0;
5031 struct ice_vsig_prof *p;
5032
5033 list_for_each_entry(p, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
5034 list)
5035 count++;
5036
5037 return count;
5038}
5039
5040/**
5041 * ice_rel_tcam_idx - release a TCAM index
5042 * @hw: pointer to the HW struct
5043 * @blk: hardware block
5044 * @idx: the index to release
5045 */
5046static int ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
5047{
5048 /* Masks to invoke a never match entry */
5049 u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
5050 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFE, 0xFF, 0xFF, 0xFF, 0xFF };
5051 u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x01, 0x00, 0x00, 0x00, 0x00 };
5052 int status;
5053
5054 /* write the TCAM entry */
5055 status = ice_tcam_write_entry(hw, blk, idx, 0, 0, 0, 0, 0, vl_msk,
5056 dc_msk, nm_msk);
5057 if (status)
5058 return status;
5059
5060 /* release the TCAM entry */
5061 status = ice_free_tcam_ent(hw, blk, idx);
5062
5063 return status;
5064}
5065
5066/**
5067 * ice_rem_prof_id - remove one profile from a VSIG
5068 * @hw: pointer to the HW struct
5069 * @blk: hardware block
5070 * @prof: pointer to profile structure to remove
5071 */
5072static int
5073ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
5074 struct ice_vsig_prof *prof)
5075{
5076 int status;
5077 u16 i;
5078
5079 for (i = 0; i < prof->tcam_count; i++)
5080 if (prof->tcam[i].in_use) {
5081 prof->tcam[i].in_use = false;
5082 status = ice_rel_tcam_idx(hw, blk,
5083 prof->tcam[i].tcam_idx);
5084 if (status)
5085 return -EIO;
5086 }
5087
5088 return 0;
5089}
5090
5091/**
5092 * ice_rem_vsig - remove VSIG
5093 * @hw: pointer to the HW struct
5094 * @blk: hardware block
5095 * @vsig: the VSIG to remove
5096 * @chg: the change list
5097 */
5098static int
5099ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
5100 struct list_head *chg)
5101{
5102 u16 idx = vsig & ICE_VSIG_IDX_M;
5103 struct ice_vsig_vsi *vsi_cur;
5104 struct ice_vsig_prof *d, *t;
5105 int status;
5106
5107 /* remove TCAM entries */
5108 list_for_each_entry_safe(d, t,
5109 &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
5110 list) {
5111 status = ice_rem_prof_id(hw, blk, d);
5112 if (status)
5113 return status;
5114
5115 list_del(&d->list);
5116 devm_kfree(ice_hw_to_dev(hw), d);
5117 }
5118
5119 /* Move all VSIS associated with this VSIG to the default VSIG */
5120 vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
5121 /* If the VSIG has at least 1 VSI then iterate through the list
5122 * and remove the VSIs before deleting the group.
5123 */
5124 if (vsi_cur)
5125 do {
5126 struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
5127 struct ice_chs_chg *p;
5128
5129 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p),
5130 GFP_KERNEL);
5131 if (!p)
5132 return -ENOMEM;
5133
5134 p->type = ICE_VSIG_REM;
5135 p->orig_vsig = vsig;
5136 p->vsig = ICE_DEFAULT_VSIG;
5137 p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
5138
5139 list_add(&p->list_entry, chg);
5140
5141 vsi_cur = tmp;
5142 } while (vsi_cur);
5143
5144 return ice_vsig_free(hw, blk, vsig);
5145}
5146
5147/**
5148 * ice_rem_prof_id_vsig - remove a specific profile from a VSIG
5149 * @hw: pointer to the HW struct
5150 * @blk: hardware block
5151 * @vsig: VSIG to remove the profile from
5152 * @hdl: profile handle indicating which profile to remove
5153 * @chg: list to receive a record of changes
5154 */
5155static int
5156ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
5157 struct list_head *chg)
5158{
5159 u16 idx = vsig & ICE_VSIG_IDX_M;
5160 struct ice_vsig_prof *p, *t;
5161 int status;
5162
5163 list_for_each_entry_safe(p, t,
5164 &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
5165 list)
5166 if (p->profile_cookie == hdl) {
5167 if (ice_vsig_prof_id_count(hw, blk, vsig) == 1)
5168 /* this is the last profile, remove the VSIG */
5169 return ice_rem_vsig(hw, blk, vsig, chg);
5170
5171 status = ice_rem_prof_id(hw, blk, p);
5172 if (!status) {
5173 list_del(&p->list);
5174 devm_kfree(ice_hw_to_dev(hw), p);
5175 }
5176 return status;
5177 }
5178
5179 return -ENOENT;
5180}
5181
5182/**
5183 * ice_rem_flow_all - remove all flows with a particular profile
5184 * @hw: pointer to the HW struct
5185 * @blk: hardware block
5186 * @id: profile tracking ID
5187 */
5188static int ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
5189{
5190 struct ice_chs_chg *del, *tmp;
5191 struct list_head chg;
5192 int status;
5193 u16 i;
5194
5195 INIT_LIST_HEAD(&chg);
5196
5197 for (i = 1; i < ICE_MAX_VSIGS; i++)
5198 if (hw->blk[blk].xlt2.vsig_tbl[i].in_use) {
5199 if (ice_has_prof_vsig(hw, blk, i, id)) {
5200 status = ice_rem_prof_id_vsig(hw, blk, i, id,
5201 &chg);
5202 if (status)
5203 goto err_ice_rem_flow_all;
5204 }
5205 }
5206
5207 status = ice_upd_prof_hw(hw, blk, &chg);
5208
5209err_ice_rem_flow_all:
5210 list_for_each_entry_safe(del, tmp, &chg, list_entry) {
5211 list_del(&del->list_entry);
5212 devm_kfree(ice_hw_to_dev(hw), del);
5213 }
5214
5215 return status;
5216}
5217
5218/**
5219 * ice_rem_prof - remove profile
5220 * @hw: pointer to the HW struct
5221 * @blk: hardware block
5222 * @id: profile tracking ID
5223 *
5224 * This will remove the profile specified by the ID parameter, which was
5225 * previously created through ice_add_prof. If any existing entries
5226 * are associated with this profile, they will be removed as well.
5227 */
5228int ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
5229{
5230 struct ice_prof_map *pmap;
5231 int status;
5232
5233 mutex_lock(&hw->blk[blk].es.prof_map_lock);
5234
5235 pmap = ice_search_prof_id(hw, blk, id);
5236 if (!pmap) {
5237 status = -ENOENT;
5238 goto err_ice_rem_prof;
5239 }
5240
5241 /* remove all flows with this profile */
5242 status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
5243 if (status)
5244 goto err_ice_rem_prof;
5245
5246 /* dereference profile, and possibly remove */
5247 ice_prof_dec_ref(hw, blk, pmap->prof_id);
5248
5249 list_del(&pmap->list);
5250 devm_kfree(ice_hw_to_dev(hw), pmap);
5251
5252err_ice_rem_prof:
5253 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
5254 return status;
5255}
5256
5257/**
5258 * ice_get_prof - get profile
5259 * @hw: pointer to the HW struct
5260 * @blk: hardware block
5261 * @hdl: profile handle
5262 * @chg: change list
5263 */
5264static int
5265ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl,
5266 struct list_head *chg)
5267{
5268 struct ice_prof_map *map;
5269 struct ice_chs_chg *p;
5270 int status = 0;
5271 u16 i;
5272
5273 mutex_lock(&hw->blk[blk].es.prof_map_lock);
5274 /* Get the details on the profile specified by the handle ID */
5275 map = ice_search_prof_id(hw, blk, hdl);
5276 if (!map) {
5277 status = -ENOENT;
5278 goto err_ice_get_prof;
5279 }
5280
5281 for (i = 0; i < map->ptg_cnt; i++)
5282 if (!hw->blk[blk].es.written[map->prof_id]) {
5283 /* add ES to change list */
5284 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p),
5285 GFP_KERNEL);
5286 if (!p) {
5287 status = -ENOMEM;
5288 goto err_ice_get_prof;
5289 }
5290
5291 p->type = ICE_PTG_ES_ADD;
5292 p->ptype = 0;
5293 p->ptg = map->ptg[i];
5294 p->add_ptg = 0;
5295
5296 p->add_prof = 1;
5297 p->prof_id = map->prof_id;
5298
5299 hw->blk[blk].es.written[map->prof_id] = true;
5300
5301 list_add(&p->list_entry, chg);
5302 }
5303
5304err_ice_get_prof:
5305 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
5306 /* let caller clean up the change list */
5307 return status;
5308}
5309
5310/**
5311 * ice_get_profs_vsig - get a copy of the list of profiles from a VSIG
5312 * @hw: pointer to the HW struct
5313 * @blk: hardware block
5314 * @vsig: VSIG from which to copy the list
5315 * @lst: output list
5316 *
5317 * This routine makes a copy of the list of profiles in the specified VSIG.
5318 */
5319static int
5320ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
5321 struct list_head *lst)
5322{
5323 struct ice_vsig_prof *ent1, *ent2;
5324 u16 idx = vsig & ICE_VSIG_IDX_M;
5325
5326 list_for_each_entry(ent1, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
5327 list) {
5328 struct ice_vsig_prof *p;
5329
5330 /* copy to the input list */
5331 p = devm_kmemdup(ice_hw_to_dev(hw), ent1, sizeof(*p),
5332 GFP_KERNEL);
5333 if (!p)
5334 goto err_ice_get_profs_vsig;
5335
5336 list_add_tail(&p->list, lst);
5337 }
5338
5339 return 0;
5340
5341err_ice_get_profs_vsig:
5342 list_for_each_entry_safe(ent1, ent2, lst, list) {
5343 list_del(&ent1->list);
5344 devm_kfree(ice_hw_to_dev(hw), ent1);
5345 }
5346
5347 return -ENOMEM;
5348}
5349
5350/**
5351 * ice_add_prof_to_lst - add profile entry to a list
5352 * @hw: pointer to the HW struct
5353 * @blk: hardware block
5354 * @lst: the list to be added to
5355 * @hdl: profile handle of entry to add
5356 */
5357static int
5358ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
5359 struct list_head *lst, u64 hdl)
5360{
5361 struct ice_prof_map *map;
5362 struct ice_vsig_prof *p;
5363 int status = 0;
5364 u16 i;
5365
5366 mutex_lock(&hw->blk[blk].es.prof_map_lock);
5367 map = ice_search_prof_id(hw, blk, hdl);
5368 if (!map) {
5369 status = -ENOENT;
5370 goto err_ice_add_prof_to_lst;
5371 }
5372
5373 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
5374 if (!p) {
5375 status = -ENOMEM;
5376 goto err_ice_add_prof_to_lst;
5377 }
5378
5379 p->profile_cookie = map->profile_cookie;
5380 p->prof_id = map->prof_id;
5381 p->tcam_count = map->ptg_cnt;
5382
5383 for (i = 0; i < map->ptg_cnt; i++) {
5384 p->tcam[i].prof_id = map->prof_id;
5385 p->tcam[i].tcam_idx = ICE_INVALID_TCAM;
5386 p->tcam[i].ptg = map->ptg[i];
5387 }
5388
5389 list_add(&p->list, lst);
5390
5391err_ice_add_prof_to_lst:
5392 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
5393 return status;
5394}
5395
5396/**
5397 * ice_move_vsi - move VSI to another VSIG
5398 * @hw: pointer to the HW struct
5399 * @blk: hardware block
5400 * @vsi: the VSI to move
5401 * @vsig: the VSIG to move the VSI to
5402 * @chg: the change list
5403 */
5404static int
5405ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig,
5406 struct list_head *chg)
5407{
5408 struct ice_chs_chg *p;
5409 u16 orig_vsig;
5410 int status;
5411
5412 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
5413 if (!p)
5414 return -ENOMEM;
5415
5416 status = ice_vsig_find_vsi(hw, blk, vsi, &orig_vsig);
5417 if (!status)
5418 status = ice_vsig_add_mv_vsi(hw, blk, vsi, vsig);
5419
5420 if (status) {
5421 devm_kfree(ice_hw_to_dev(hw), p);
5422 return status;
5423 }
5424
5425 p->type = ICE_VSI_MOVE;
5426 p->vsi = vsi;
5427 p->orig_vsig = orig_vsig;
5428 p->vsig = vsig;
5429
5430 list_add(&p->list_entry, chg);
5431
5432 return 0;
5433}
5434
5435/**
5436 * ice_rem_chg_tcam_ent - remove a specific TCAM entry from change list
5437 * @hw: pointer to the HW struct
5438 * @idx: the index of the TCAM entry to remove
5439 * @chg: the list of change structures to search
5440 */
5441static void
5442ice_rem_chg_tcam_ent(struct ice_hw *hw, u16 idx, struct list_head *chg)
5443{
5444 struct ice_chs_chg *pos, *tmp;
5445
5446 list_for_each_entry_safe(tmp, pos, chg, list_entry)
5447 if (tmp->type == ICE_TCAM_ADD && tmp->tcam_idx == idx) {
5448 list_del(&tmp->list_entry);
5449 devm_kfree(ice_hw_to_dev(hw), tmp);
5450 }
5451}
5452
5453/**
5454 * ice_prof_tcam_ena_dis - add enable or disable TCAM change
5455 * @hw: pointer to the HW struct
5456 * @blk: hardware block
5457 * @enable: true to enable, false to disable
5458 * @vsig: the VSIG of the TCAM entry
5459 * @tcam: pointer the TCAM info structure of the TCAM to disable
5460 * @chg: the change list
5461 *
5462 * This function appends an enable or disable TCAM entry in the change log
5463 */
5464static int
5465ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
5466 u16 vsig, struct ice_tcam_inf *tcam,
5467 struct list_head *chg)
5468{
5469 struct ice_chs_chg *p;
5470 int status;
5471
5472 u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
5473 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0x00, 0x00, 0x00 };
5474 u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x00, 0x00, 0x00, 0x00, 0x00 };
5475
5476 /* if disabling, free the TCAM */
5477 if (!enable) {
5478 status = ice_rel_tcam_idx(hw, blk, tcam->tcam_idx);
5479
5480 /* if we have already created a change for this TCAM entry, then
5481 * we need to remove that entry, in order to prevent writing to
5482 * a TCAM entry we no longer will have ownership of.
5483 */
5484 ice_rem_chg_tcam_ent(hw, tcam->tcam_idx, chg);
5485 tcam->tcam_idx = 0;
5486 tcam->in_use = 0;
5487 return status;
5488 }
5489
5490 /* for re-enabling, reallocate a TCAM */
5491 /* for entries with empty attribute masks, allocate entry from
5492 * the bottom of the TCAM table; otherwise, allocate from the
5493 * top of the table in order to give it higher priority
5494 */
5495 status = ice_alloc_tcam_ent(hw, blk, tcam->attr.mask == 0,
5496 &tcam->tcam_idx);
5497 if (status)
5498 return status;
5499
5500 /* add TCAM to change list */
5501 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
5502 if (!p)
5503 return -ENOMEM;
5504
5505 status = ice_tcam_write_entry(hw, blk, tcam->tcam_idx, tcam->prof_id,
5506 tcam->ptg, vsig, 0, tcam->attr.flags,
5507 vl_msk, dc_msk, nm_msk);
5508 if (status)
5509 goto err_ice_prof_tcam_ena_dis;
5510
5511 tcam->in_use = 1;
5512
5513 p->type = ICE_TCAM_ADD;
5514 p->add_tcam_idx = true;
5515 p->prof_id = tcam->prof_id;
5516 p->ptg = tcam->ptg;
5517 p->vsig = 0;
5518 p->tcam_idx = tcam->tcam_idx;
5519
5520 /* log change */
5521 list_add(&p->list_entry, chg);
5522
5523 return 0;
5524
5525err_ice_prof_tcam_ena_dis:
5526 devm_kfree(ice_hw_to_dev(hw), p);
5527 return status;
5528}
5529
5530/**
5531 * ice_adj_prof_priorities - adjust profile based on priorities
5532 * @hw: pointer to the HW struct
5533 * @blk: hardware block
5534 * @vsig: the VSIG for which to adjust profile priorities
5535 * @chg: the change list
5536 */
5537static int
5538ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
5539 struct list_head *chg)
5540{
5541 DECLARE_BITMAP(ptgs_used, ICE_XLT1_CNT);
5542 struct ice_vsig_prof *t;
5543 int status;
5544 u16 idx;
5545
5546 bitmap_zero(ptgs_used, ICE_XLT1_CNT);
5547 idx = vsig & ICE_VSIG_IDX_M;
5548
5549 /* Priority is based on the order in which the profiles are added. The
5550 * newest added profile has highest priority and the oldest added
5551 * profile has the lowest priority. Since the profile property list for
5552 * a VSIG is sorted from newest to oldest, this code traverses the list
5553 * in order and enables the first of each PTG that it finds (that is not
5554 * already enabled); it also disables any duplicate PTGs that it finds
5555 * in the older profiles (that are currently enabled).
5556 */
5557
5558 list_for_each_entry(t, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
5559 list) {
5560 u16 i;
5561
5562 for (i = 0; i < t->tcam_count; i++) {
5563 /* Scan the priorities from newest to oldest.
5564 * Make sure that the newest profiles take priority.
5565 */
5566 if (test_bit(t->tcam[i].ptg, ptgs_used) &&
5567 t->tcam[i].in_use) {
5568 /* need to mark this PTG as never match, as it
5569 * was already in use and therefore duplicate
5570 * (and lower priority)
5571 */
5572 status = ice_prof_tcam_ena_dis(hw, blk, false,
5573 vsig,
5574 &t->tcam[i],
5575 chg);
5576 if (status)
5577 return status;
5578 } else if (!test_bit(t->tcam[i].ptg, ptgs_used) &&
5579 !t->tcam[i].in_use) {
5580 /* need to enable this PTG, as it in not in use
5581 * and not enabled (highest priority)
5582 */
5583 status = ice_prof_tcam_ena_dis(hw, blk, true,
5584 vsig,
5585 &t->tcam[i],
5586 chg);
5587 if (status)
5588 return status;
5589 }
5590
5591 /* keep track of used ptgs */
5592 __set_bit(t->tcam[i].ptg, ptgs_used);
5593 }
5594 }
5595
5596 return 0;
5597}
5598
5599/**
5600 * ice_add_prof_id_vsig - add profile to VSIG
5601 * @hw: pointer to the HW struct
5602 * @blk: hardware block
5603 * @vsig: the VSIG to which this profile is to be added
5604 * @hdl: the profile handle indicating the profile to add
5605 * @rev: true to add entries to the end of the list
5606 * @chg: the change list
5607 */
5608static int
5609ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
5610 bool rev, struct list_head *chg)
5611{
5612 /* Masks that ignore flags */
5613 u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
5614 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0x00, 0x00, 0x00 };
5615 u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x00, 0x00, 0x00, 0x00, 0x00 };
5616 struct ice_prof_map *map;
5617 struct ice_vsig_prof *t;
5618 struct ice_chs_chg *p;
5619 u16 vsig_idx, i;
5620 int status = 0;
5621
5622 /* Error, if this VSIG already has this profile */
5623 if (ice_has_prof_vsig(hw, blk, vsig, hdl))
5624 return -EEXIST;
5625
5626 /* new VSIG profile structure */
5627 t = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*t), GFP_KERNEL);
5628 if (!t)
5629 return -ENOMEM;
5630
5631 mutex_lock(&hw->blk[blk].es.prof_map_lock);
5632 /* Get the details on the profile specified by the handle ID */
5633 map = ice_search_prof_id(hw, blk, hdl);
5634 if (!map) {
5635 status = -ENOENT;
5636 goto err_ice_add_prof_id_vsig;
5637 }
5638
5639 t->profile_cookie = map->profile_cookie;
5640 t->prof_id = map->prof_id;
5641 t->tcam_count = map->ptg_cnt;
5642
5643 /* create TCAM entries */
5644 for (i = 0; i < map->ptg_cnt; i++) {
5645 u16 tcam_idx;
5646
5647 /* add TCAM to change list */
5648 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
5649 if (!p) {
5650 status = -ENOMEM;
5651 goto err_ice_add_prof_id_vsig;
5652 }
5653
5654 /* allocate the TCAM entry index */
5655 /* for entries with empty attribute masks, allocate entry from
5656 * the bottom of the TCAM table; otherwise, allocate from the
5657 * top of the table in order to give it higher priority
5658 */
5659 status = ice_alloc_tcam_ent(hw, blk, map->attr[i].mask == 0,
5660 &tcam_idx);
5661 if (status) {
5662 devm_kfree(ice_hw_to_dev(hw), p);
5663 goto err_ice_add_prof_id_vsig;
5664 }
5665
5666 t->tcam[i].ptg = map->ptg[i];
5667 t->tcam[i].prof_id = map->prof_id;
5668 t->tcam[i].tcam_idx = tcam_idx;
5669 t->tcam[i].attr = map->attr[i];
5670 t->tcam[i].in_use = true;
5671
5672 p->type = ICE_TCAM_ADD;
5673 p->add_tcam_idx = true;
5674 p->prof_id = t->tcam[i].prof_id;
5675 p->ptg = t->tcam[i].ptg;
5676 p->vsig = vsig;
5677 p->tcam_idx = t->tcam[i].tcam_idx;
5678
5679 /* write the TCAM entry */
5680 status = ice_tcam_write_entry(hw, blk, t->tcam[i].tcam_idx,
5681 t->tcam[i].prof_id,
5682 t->tcam[i].ptg, vsig, 0, 0,
5683 vl_msk, dc_msk, nm_msk);
5684 if (status) {
5685 devm_kfree(ice_hw_to_dev(hw), p);
5686 goto err_ice_add_prof_id_vsig;
5687 }
5688
5689 /* log change */
5690 list_add(&p->list_entry, chg);
5691 }
5692
5693 /* add profile to VSIG */
5694 vsig_idx = vsig & ICE_VSIG_IDX_M;
5695 if (rev)
5696 list_add_tail(&t->list,
5697 &hw->blk[blk].xlt2.vsig_tbl[vsig_idx].prop_lst);
5698 else
5699 list_add(&t->list,
5700 &hw->blk[blk].xlt2.vsig_tbl[vsig_idx].prop_lst);
5701
5702 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
5703 return status;
5704
5705err_ice_add_prof_id_vsig:
5706 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
5707 /* let caller clean up the change list */
5708 devm_kfree(ice_hw_to_dev(hw), t);
5709 return status;
5710}
5711
5712/**
5713 * ice_create_prof_id_vsig - add a new VSIG with a single profile
5714 * @hw: pointer to the HW struct
5715 * @blk: hardware block
5716 * @vsi: the initial VSI that will be in VSIG
5717 * @hdl: the profile handle of the profile that will be added to the VSIG
5718 * @chg: the change list
5719 */
5720static int
5721ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
5722 struct list_head *chg)
5723{
5724 struct ice_chs_chg *p;
5725 u16 new_vsig;
5726 int status;
5727
5728 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
5729 if (!p)
5730 return -ENOMEM;
5731
5732 new_vsig = ice_vsig_alloc(hw, blk);
5733 if (!new_vsig) {
5734 status = -EIO;
5735 goto err_ice_create_prof_id_vsig;
5736 }
5737
5738 status = ice_move_vsi(hw, blk, vsi, new_vsig, chg);
5739 if (status)
5740 goto err_ice_create_prof_id_vsig;
5741
5742 status = ice_add_prof_id_vsig(hw, blk, new_vsig, hdl, false, chg);
5743 if (status)
5744 goto err_ice_create_prof_id_vsig;
5745
5746 p->type = ICE_VSIG_ADD;
5747 p->vsi = vsi;
5748 p->orig_vsig = ICE_DEFAULT_VSIG;
5749 p->vsig = new_vsig;
5750
5751 list_add(&p->list_entry, chg);
5752
5753 return 0;
5754
5755err_ice_create_prof_id_vsig:
5756 /* let caller clean up the change list */
5757 devm_kfree(ice_hw_to_dev(hw), p);
5758 return status;
5759}
5760
5761/**
5762 * ice_create_vsig_from_lst - create a new VSIG with a list of profiles
5763 * @hw: pointer to the HW struct
5764 * @blk: hardware block
5765 * @vsi: the initial VSI that will be in VSIG
5766 * @lst: the list of profile that will be added to the VSIG
5767 * @new_vsig: return of new VSIG
5768 * @chg: the change list
5769 */
5770static int
5771ice_create_vsig_from_lst(struct ice_hw *hw, enum ice_block blk, u16 vsi,
5772 struct list_head *lst, u16 *new_vsig,
5773 struct list_head *chg)
5774{
5775 struct ice_vsig_prof *t;
5776 int status;
5777 u16 vsig;
5778
5779 vsig = ice_vsig_alloc(hw, blk);
5780 if (!vsig)
5781 return -EIO;
5782
5783 status = ice_move_vsi(hw, blk, vsi, vsig, chg);
5784 if (status)
5785 return status;
5786
5787 list_for_each_entry(t, lst, list) {
5788 /* Reverse the order here since we are copying the list */
5789 status = ice_add_prof_id_vsig(hw, blk, vsig, t->profile_cookie,
5790 true, chg);
5791 if (status)
5792 return status;
5793 }
5794
5795 *new_vsig = vsig;
5796
5797 return 0;
5798}
5799
5800/**
5801 * ice_find_prof_vsig - find a VSIG with a specific profile handle
5802 * @hw: pointer to the HW struct
5803 * @blk: hardware block
5804 * @hdl: the profile handle of the profile to search for
5805 * @vsig: returns the VSIG with the matching profile
5806 */
5807static bool
5808ice_find_prof_vsig(struct ice_hw *hw, enum ice_block blk, u64 hdl, u16 *vsig)
5809{
5810 struct ice_vsig_prof *t;
5811 struct list_head lst;
5812 int status;
5813
5814 INIT_LIST_HEAD(&lst);
5815
5816 t = kzalloc(sizeof(*t), GFP_KERNEL);
5817 if (!t)
5818 return false;
5819
5820 t->profile_cookie = hdl;
5821 list_add(&t->list, &lst);
5822
5823 status = ice_find_dup_props_vsig(hw, blk, &lst, vsig);
5824
5825 list_del(&t->list);
5826 kfree(t);
5827
5828 return !status;
5829}
5830
5831/**
5832 * ice_add_prof_id_flow - add profile flow
5833 * @hw: pointer to the HW struct
5834 * @blk: hardware block
5835 * @vsi: the VSI to enable with the profile specified by ID
5836 * @hdl: profile handle
5837 *
5838 * Calling this function will update the hardware tables to enable the
5839 * profile indicated by the ID parameter for the VSIs specified in the VSI
5840 * array. Once successfully called, the flow will be enabled.
5841 */
5842int
5843ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
5844{
5845 struct ice_vsig_prof *tmp1, *del1;
5846 struct ice_chs_chg *tmp, *del;
5847 struct list_head union_lst;
5848 struct list_head chg;
5849 int status;
5850 u16 vsig;
5851
5852 INIT_LIST_HEAD(&union_lst);
5853 INIT_LIST_HEAD(&chg);
5854
5855 /* Get profile */
5856 status = ice_get_prof(hw, blk, hdl, &chg);
5857 if (status)
5858 return status;
5859
5860 /* determine if VSI is already part of a VSIG */
5861 status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
5862 if (!status && vsig) {
5863 bool only_vsi;
5864 u16 or_vsig;
5865 u16 ref;
5866
5867 /* found in VSIG */
5868 or_vsig = vsig;
5869
5870 /* make sure that there is no overlap/conflict between the new
5871 * characteristics and the existing ones; we don't support that
5872 * scenario
5873 */
5874 if (ice_has_prof_vsig(hw, blk, vsig, hdl)) {
5875 status = -EEXIST;
5876 goto err_ice_add_prof_id_flow;
5877 }
5878
5879 /* last VSI in the VSIG? */
5880 status = ice_vsig_get_ref(hw, blk, vsig, &ref);
5881 if (status)
5882 goto err_ice_add_prof_id_flow;
5883 only_vsi = (ref == 1);
5884
5885 /* create a union of the current profiles and the one being
5886 * added
5887 */
5888 status = ice_get_profs_vsig(hw, blk, vsig, &union_lst);
5889 if (status)
5890 goto err_ice_add_prof_id_flow;
5891
5892 status = ice_add_prof_to_lst(hw, blk, &union_lst, hdl);
5893 if (status)
5894 goto err_ice_add_prof_id_flow;
5895
5896 /* search for an existing VSIG with an exact charc match */
5897 status = ice_find_dup_props_vsig(hw, blk, &union_lst, &vsig);
5898 if (!status) {
5899 /* move VSI to the VSIG that matches */
5900 status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
5901 if (status)
5902 goto err_ice_add_prof_id_flow;
5903
5904 /* VSI has been moved out of or_vsig. If the or_vsig had
5905 * only that VSI it is now empty and can be removed.
5906 */
5907 if (only_vsi) {
5908 status = ice_rem_vsig(hw, blk, or_vsig, &chg);
5909 if (status)
5910 goto err_ice_add_prof_id_flow;
5911 }
5912 } else if (only_vsi) {
5913 /* If the original VSIG only contains one VSI, then it
5914 * will be the requesting VSI. In this case the VSI is
5915 * not sharing entries and we can simply add the new
5916 * profile to the VSIG.
5917 */
5918 status = ice_add_prof_id_vsig(hw, blk, vsig, hdl, false,
5919 &chg);
5920 if (status)
5921 goto err_ice_add_prof_id_flow;
5922
5923 /* Adjust priorities */
5924 status = ice_adj_prof_priorities(hw, blk, vsig, &chg);
5925 if (status)
5926 goto err_ice_add_prof_id_flow;
5927 } else {
5928 /* No match, so we need a new VSIG */
5929 status = ice_create_vsig_from_lst(hw, blk, vsi,
5930 &union_lst, &vsig,
5931 &chg);
5932 if (status)
5933 goto err_ice_add_prof_id_flow;
5934
5935 /* Adjust priorities */
5936 status = ice_adj_prof_priorities(hw, blk, vsig, &chg);
5937 if (status)
5938 goto err_ice_add_prof_id_flow;
5939 }
5940 } else {
5941 /* need to find or add a VSIG */
5942 /* search for an existing VSIG with an exact charc match */
5943 if (ice_find_prof_vsig(hw, blk, hdl, &vsig)) {
5944 /* found an exact match */
5945 /* add or move VSI to the VSIG that matches */
5946 status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
5947 if (status)
5948 goto err_ice_add_prof_id_flow;
5949 } else {
5950 /* we did not find an exact match */
5951 /* we need to add a VSIG */
5952 status = ice_create_prof_id_vsig(hw, blk, vsi, hdl,
5953 &chg);
5954 if (status)
5955 goto err_ice_add_prof_id_flow;
5956 }
5957 }
5958
5959 /* update hardware */
5960 if (!status)
5961 status = ice_upd_prof_hw(hw, blk, &chg);
5962
5963err_ice_add_prof_id_flow:
5964 list_for_each_entry_safe(del, tmp, &chg, list_entry) {
5965 list_del(&del->list_entry);
5966 devm_kfree(ice_hw_to_dev(hw), del);
5967 }
5968
5969 list_for_each_entry_safe(del1, tmp1, &union_lst, list) {
5970 list_del(&del1->list);
5971 devm_kfree(ice_hw_to_dev(hw), del1);
5972 }
5973
5974 return status;
5975}
5976
5977/**
5978 * ice_rem_prof_from_list - remove a profile from list
5979 * @hw: pointer to the HW struct
5980 * @lst: list to remove the profile from
5981 * @hdl: the profile handle indicating the profile to remove
5982 */
5983static int
5984ice_rem_prof_from_list(struct ice_hw *hw, struct list_head *lst, u64 hdl)
5985{
5986 struct ice_vsig_prof *ent, *tmp;
5987
5988 list_for_each_entry_safe(ent, tmp, lst, list)
5989 if (ent->profile_cookie == hdl) {
5990 list_del(&ent->list);
5991 devm_kfree(ice_hw_to_dev(hw), ent);
5992 return 0;
5993 }
5994
5995 return -ENOENT;
5996}
5997
5998/**
5999 * ice_rem_prof_id_flow - remove flow
6000 * @hw: pointer to the HW struct
6001 * @blk: hardware block
6002 * @vsi: the VSI from which to remove the profile specified by ID
6003 * @hdl: profile tracking handle
6004 *
6005 * Calling this function will update the hardware tables to remove the
6006 * profile indicated by the ID parameter for the VSIs specified in the VSI
6007 * array. Once successfully called, the flow will be disabled.
6008 */
6009int
6010ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
6011{
6012 struct ice_vsig_prof *tmp1, *del1;
6013 struct ice_chs_chg *tmp, *del;
6014 struct list_head chg, copy;
6015 int status;
6016 u16 vsig;
6017
6018 INIT_LIST_HEAD(©);
6019 INIT_LIST_HEAD(&chg);
6020
6021 /* determine if VSI is already part of a VSIG */
6022 status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
6023 if (!status && vsig) {
6024 bool last_profile;
6025 bool only_vsi;
6026 u16 ref;
6027
6028 /* found in VSIG */
6029 last_profile = ice_vsig_prof_id_count(hw, blk, vsig) == 1;
6030 status = ice_vsig_get_ref(hw, blk, vsig, &ref);
6031 if (status)
6032 goto err_ice_rem_prof_id_flow;
6033 only_vsi = (ref == 1);
6034
6035 if (only_vsi) {
6036 /* If the original VSIG only contains one reference,
6037 * which will be the requesting VSI, then the VSI is not
6038 * sharing entries and we can simply remove the specific
6039 * characteristics from the VSIG.
6040 */
6041
6042 if (last_profile) {
6043 /* If there are no profiles left for this VSIG,
6044 * then simply remove the VSIG.
6045 */
6046 status = ice_rem_vsig(hw, blk, vsig, &chg);
6047 if (status)
6048 goto err_ice_rem_prof_id_flow;
6049 } else {
6050 status = ice_rem_prof_id_vsig(hw, blk, vsig,
6051 hdl, &chg);
6052 if (status)
6053 goto err_ice_rem_prof_id_flow;
6054
6055 /* Adjust priorities */
6056 status = ice_adj_prof_priorities(hw, blk, vsig,
6057 &chg);
6058 if (status)
6059 goto err_ice_rem_prof_id_flow;
6060 }
6061
6062 } else {
6063 /* Make a copy of the VSIG's list of Profiles */
6064 status = ice_get_profs_vsig(hw, blk, vsig, ©);
6065 if (status)
6066 goto err_ice_rem_prof_id_flow;
6067
6068 /* Remove specified profile entry from the list */
6069 status = ice_rem_prof_from_list(hw, ©, hdl);
6070 if (status)
6071 goto err_ice_rem_prof_id_flow;
6072
6073 if (list_empty(©)) {
6074 status = ice_move_vsi(hw, blk, vsi,
6075 ICE_DEFAULT_VSIG, &chg);
6076 if (status)
6077 goto err_ice_rem_prof_id_flow;
6078
6079 } else if (!ice_find_dup_props_vsig(hw, blk, ©,
6080 &vsig)) {
6081 /* found an exact match */
6082 /* add or move VSI to the VSIG that matches */
6083 /* Search for a VSIG with a matching profile
6084 * list
6085 */
6086
6087 /* Found match, move VSI to the matching VSIG */
6088 status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
6089 if (status)
6090 goto err_ice_rem_prof_id_flow;
6091 } else {
6092 /* since no existing VSIG supports this
6093 * characteristic pattern, we need to create a
6094 * new VSIG and TCAM entries
6095 */
6096 status = ice_create_vsig_from_lst(hw, blk, vsi,
6097 ©, &vsig,
6098 &chg);
6099 if (status)
6100 goto err_ice_rem_prof_id_flow;
6101
6102 /* Adjust priorities */
6103 status = ice_adj_prof_priorities(hw, blk, vsig,
6104 &chg);
6105 if (status)
6106 goto err_ice_rem_prof_id_flow;
6107 }
6108 }
6109 } else {
6110 status = -ENOENT;
6111 }
6112
6113 /* update hardware tables */
6114 if (!status)
6115 status = ice_upd_prof_hw(hw, blk, &chg);
6116
6117err_ice_rem_prof_id_flow:
6118 list_for_each_entry_safe(del, tmp, &chg, list_entry) {
6119 list_del(&del->list_entry);
6120 devm_kfree(ice_hw_to_dev(hw), del);
6121 }
6122
6123 list_for_each_entry_safe(del1, tmp1, ©, list) {
6124 list_del(&del1->list);
6125 devm_kfree(ice_hw_to_dev(hw), del1);
6126 }
6127
6128 return status;
6129}