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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SH7705 Setup
4 *
5 * Copyright (C) 2006 - 2009 Paul Mundt
6 * Copyright (C) 2007 Nobuhiro Iwamatsu
7 */
8#include <linux/platform_device.h>
9#include <linux/init.h>
10#include <linux/irq.h>
11#include <linux/serial.h>
12#include <linux/serial_sci.h>
13#include <linux/sh_timer.h>
14#include <linux/sh_intc.h>
15#include <asm/rtc.h>
16#include <cpu/serial.h>
17#include <asm/platform_early.h>
18
19enum {
20 UNUSED = 0,
21
22 /* interrupt sources */
23 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
24 PINT07, PINT815,
25
26 DMAC, SCIF0, SCIF2, ADC_ADI, USB,
27
28 TPU0, TPU1, TPU2, TPU3,
29 TMU0, TMU1, TMU2,
30
31 RTC, WDT, REF_RCMI,
32};
33
34static struct intc_vect vectors[] __initdata = {
35 /* IRQ0->5 are handled in setup-sh3.c */
36 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
37 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
38 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
39 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
40 INTC_VECT(SCIF0, 0x8e0),
41 INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
42 INTC_VECT(SCIF2, 0x960),
43 INTC_VECT(ADC_ADI, 0x980),
44 INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
45 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
46 INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
47 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
48 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
49 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
50 INTC_VECT(RTC, 0x4c0),
51 INTC_VECT(WDT, 0x560),
52 INTC_VECT(REF_RCMI, 0x580),
53};
54
55static struct intc_prio_reg prio_registers[] __initdata = {
56 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
57 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
58 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
59 { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
60 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
61 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } },
62 { 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } },
63 { 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } },
64
65};
66
67static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
68 NULL, prio_registers, NULL);
69
70static struct plat_sci_port scif0_platform_data = {
71 .scscr = SCSCR_CKE1,
72 .type = PORT_SCIF,
73 .ops = &sh770x_sci_port_ops,
74 .regtype = SCIx_SH7705_SCIF_REGTYPE,
75};
76
77static struct resource scif0_resources[] = {
78 DEFINE_RES_MEM(0xa4410000, 0x100),
79 DEFINE_RES_IRQ(evt2irq(0x900)),
80};
81
82static struct platform_device scif0_device = {
83 .name = "sh-sci",
84 .id = 0,
85 .resource = scif0_resources,
86 .num_resources = ARRAY_SIZE(scif0_resources),
87 .dev = {
88 .platform_data = &scif0_platform_data,
89 },
90};
91
92static struct plat_sci_port scif1_platform_data = {
93 .type = PORT_SCIF,
94 .ops = &sh770x_sci_port_ops,
95 .regtype = SCIx_SH7705_SCIF_REGTYPE,
96};
97
98static struct resource scif1_resources[] = {
99 DEFINE_RES_MEM(0xa4400000, 0x100),
100 DEFINE_RES_IRQ(evt2irq(0x880)),
101};
102
103static struct platform_device scif1_device = {
104 .name = "sh-sci",
105 .id = 1,
106 .resource = scif1_resources,
107 .num_resources = ARRAY_SIZE(scif1_resources),
108 .dev = {
109 .platform_data = &scif1_platform_data,
110 },
111};
112
113static struct resource rtc_resources[] = {
114 [0] = {
115 .start = 0xfffffec0,
116 .end = 0xfffffec0 + 0x1e,
117 .flags = IORESOURCE_IO,
118 },
119 [1] = {
120 .start = evt2irq(0x480),
121 .flags = IORESOURCE_IRQ,
122 },
123};
124
125static struct sh_rtc_platform_info rtc_info = {
126 .capabilities = RTC_CAP_4_DIGIT_YEAR,
127};
128
129static struct platform_device rtc_device = {
130 .name = "sh-rtc",
131 .id = -1,
132 .num_resources = ARRAY_SIZE(rtc_resources),
133 .resource = rtc_resources,
134 .dev = {
135 .platform_data = &rtc_info,
136 },
137};
138
139static struct sh_timer_config tmu0_platform_data = {
140 .channels_mask = 7,
141};
142
143static struct resource tmu0_resources[] = {
144 DEFINE_RES_MEM(0xfffffe90, 0x2c),
145 DEFINE_RES_IRQ(evt2irq(0x400)),
146 DEFINE_RES_IRQ(evt2irq(0x420)),
147 DEFINE_RES_IRQ(evt2irq(0x440)),
148};
149
150static struct platform_device tmu0_device = {
151 .name = "sh-tmu-sh3",
152 .id = 0,
153 .dev = {
154 .platform_data = &tmu0_platform_data,
155 },
156 .resource = tmu0_resources,
157 .num_resources = ARRAY_SIZE(tmu0_resources),
158};
159
160static struct platform_device *sh7705_devices[] __initdata = {
161 &scif0_device,
162 &scif1_device,
163 &tmu0_device,
164 &rtc_device,
165};
166
167static int __init sh7705_devices_setup(void)
168{
169 return platform_add_devices(sh7705_devices,
170 ARRAY_SIZE(sh7705_devices));
171}
172arch_initcall(sh7705_devices_setup);
173
174static struct platform_device *sh7705_early_devices[] __initdata = {
175 &scif0_device,
176 &scif1_device,
177 &tmu0_device,
178};
179
180void __init plat_early_device_setup(void)
181{
182 sh_early_platform_add_devices(sh7705_early_devices,
183 ARRAY_SIZE(sh7705_early_devices));
184}
185
186void __init plat_irq_setup(void)
187{
188 register_intc_controller(&intc_desc);
189 plat_irq_setup_sh3();
190}
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SH7705 Setup
4 *
5 * Copyright (C) 2006 - 2009 Paul Mundt
6 * Copyright (C) 2007 Nobuhiro Iwamatsu
7 */
8#include <linux/platform_device.h>
9#include <linux/init.h>
10#include <linux/irq.h>
11#include <linux/serial.h>
12#include <linux/serial_sci.h>
13#include <linux/sh_timer.h>
14#include <linux/sh_intc.h>
15#include <asm/rtc.h>
16#include <cpu/serial.h>
17#include <asm/platform_early.h>
18
19enum {
20 UNUSED = 0,
21
22 /* interrupt sources */
23 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
24 PINT07, PINT815,
25
26 DMAC, SCIF0, SCIF2, ADC_ADI, USB,
27
28 TPU0, TPU1, TPU2, TPU3,
29 TMU0, TMU1, TMU2,
30
31 RTC, WDT, REF_RCMI,
32};
33
34static struct intc_vect vectors[] __initdata = {
35 /* IRQ0->5 are handled in setup-sh3.c */
36 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
37 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
38 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
39 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
40 INTC_VECT(SCIF0, 0x8e0),
41 INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
42 INTC_VECT(SCIF2, 0x960),
43 INTC_VECT(ADC_ADI, 0x980),
44 INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
45 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
46 INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
47 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
48 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
49 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
50 INTC_VECT(RTC, 0x4c0),
51 INTC_VECT(WDT, 0x560),
52 INTC_VECT(REF_RCMI, 0x580),
53};
54
55static struct intc_prio_reg prio_registers[] __initdata = {
56 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
57 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
58 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
59 { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
60 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
61 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } },
62 { 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } },
63 { 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } },
64
65};
66
67static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
68 NULL, prio_registers, NULL);
69
70static struct plat_sci_port scif0_platform_data = {
71 .scscr = SCSCR_CKE1,
72 .type = PORT_SCIF,
73 .ops = &sh770x_sci_port_ops,
74 .regtype = SCIx_SH7705_SCIF_REGTYPE,
75};
76
77static struct resource scif0_resources[] = {
78 DEFINE_RES_MEM(0xa4410000, 0x100),
79 DEFINE_RES_IRQ(evt2irq(0x900)),
80};
81
82static struct platform_device scif0_device = {
83 .name = "sh-sci",
84 .id = 0,
85 .resource = scif0_resources,
86 .num_resources = ARRAY_SIZE(scif0_resources),
87 .dev = {
88 .platform_data = &scif0_platform_data,
89 },
90};
91
92static struct plat_sci_port scif1_platform_data = {
93 .type = PORT_SCIF,
94 .ops = &sh770x_sci_port_ops,
95 .regtype = SCIx_SH7705_SCIF_REGTYPE,
96};
97
98static struct resource scif1_resources[] = {
99 DEFINE_RES_MEM(0xa4400000, 0x100),
100 DEFINE_RES_IRQ(evt2irq(0x880)),
101};
102
103static struct platform_device scif1_device = {
104 .name = "sh-sci",
105 .id = 1,
106 .resource = scif1_resources,
107 .num_resources = ARRAY_SIZE(scif1_resources),
108 .dev = {
109 .platform_data = &scif1_platform_data,
110 },
111};
112
113static struct resource rtc_resources[] = {
114 [0] = {
115 .start = 0xfffffec0,
116 .end = 0xfffffec0 + 0x1e,
117 .flags = IORESOURCE_IO,
118 },
119 [1] = {
120 .start = evt2irq(0x480),
121 .flags = IORESOURCE_IRQ,
122 },
123};
124
125static struct sh_rtc_platform_info rtc_info = {
126 .capabilities = RTC_CAP_4_DIGIT_YEAR,
127};
128
129static struct platform_device rtc_device = {
130 .name = "sh-rtc",
131 .id = -1,
132 .num_resources = ARRAY_SIZE(rtc_resources),
133 .resource = rtc_resources,
134 .dev = {
135 .platform_data = &rtc_info,
136 },
137};
138
139static struct sh_timer_config tmu0_platform_data = {
140 .channels_mask = 7,
141};
142
143static struct resource tmu0_resources[] = {
144 DEFINE_RES_MEM(0xfffffe90, 0x2c),
145 DEFINE_RES_IRQ(evt2irq(0x400)),
146 DEFINE_RES_IRQ(evt2irq(0x420)),
147 DEFINE_RES_IRQ(evt2irq(0x440)),
148};
149
150static struct platform_device tmu0_device = {
151 .name = "sh-tmu-sh3",
152 .id = 0,
153 .dev = {
154 .platform_data = &tmu0_platform_data,
155 },
156 .resource = tmu0_resources,
157 .num_resources = ARRAY_SIZE(tmu0_resources),
158};
159
160static struct platform_device *sh7705_devices[] __initdata = {
161 &scif0_device,
162 &scif1_device,
163 &tmu0_device,
164 &rtc_device,
165};
166
167static int __init sh7705_devices_setup(void)
168{
169 return platform_add_devices(sh7705_devices,
170 ARRAY_SIZE(sh7705_devices));
171}
172arch_initcall(sh7705_devices_setup);
173
174static struct platform_device *sh7705_early_devices[] __initdata = {
175 &scif0_device,
176 &scif1_device,
177 &tmu0_device,
178};
179
180void __init plat_early_device_setup(void)
181{
182 sh_early_platform_add_devices(sh7705_early_devices,
183 ARRAY_SIZE(sh7705_early_devices));
184}
185
186void __init plat_irq_setup(void)
187{
188 register_intc_controller(&intc_desc);
189 plat_irq_setup_sh3();
190}