1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
  4 */
  5/dts-v1/;
  6
  7#include "am33xx.dtsi"
  8#include "am335x-bone-common.dtsi"
  9#include "am335x-boneblack-common.dtsi"
 10#include "am335x-boneblack-hdmi.dtsi"
 11
 12/ {
 13	model = "TI AM335x BeagleBone Black";
 14	compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
 15};
 16
 17&cpu0_opp_table {
 18	/*
 19	 * All PG 2.0 silicon may not support 1GHz but some of the early
 20	 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
 21	 * to support 1GHz OPP so enable it for PG 2.0 on this board.
 22	 */
 23	opp-1000000000 {
 24		/* OPP Nitro */
 25		opp-supported-hw = <0x06 0x0100>;
 26	};
 27};
 28
 29&gpio0 {
 30	gpio-line-names =
 31		"[mdio_data]",
 32		"[mdio_clk]",
 33		"P9_22 [spi0_sclk]",
 34		"P9_21 [spi0_d0]",
 35		"P9_18 [spi0_d1]",
 36		"P9_17 [spi0_cs0]",
 37		"[mmc0_cd]",
 38		"P8_42A [ecappwm0]",
 39		"P8_35 [lcd d12]",
 40		"P8_33 [lcd d13]",
 41		"P8_31 [lcd d14]",
 42		"P8_32 [lcd d15]",
 43		"P9_20 [i2c2_sda]",
 44		"P9_19 [i2c2_scl]",
 45		"P9_26 [uart1_rxd]",
 46		"P9_24 [uart1_txd]",
 47		"[rmii1_txd3]",
 48		"[rmii1_txd2]",
 49		"[usb0_drvvbus]",
 50		"[hdmi cec]",
 51		"P9_41B",
 52		"[rmii1_txd1]",
 53		"P8_19 [ehrpwm2a]",
 54		"P8_13 [ehrpwm2b]",
 55		"NC",
 56		"NC",
 57		"P8_14",
 58		"P8_17",
 59		"[rmii1_txd0]",
 60		"[rmii1_refclk]",
 61		"P9_11 [uart4_rxd]",
 62		"P9_13 [uart4_txd]";
 63};
 64
 65&gpio1 {
 66	gpio-line-names =
 67		"P8_25 [mmc1_dat0]",
 68		"[mmc1_dat1]",
 69		"P8_5 [mmc1_dat2]",
 70		"P8_6 [mmc1_dat3]",
 71		"P8_23 [mmc1_dat4]",
 72		"P8_22 [mmc1_dat5]",
 73		"P8_3 [mmc1_dat6]",
 74		"P8_4 [mmc1_dat7]",
 75		"NC",
 76		"NC",
 77		"NC",
 78		"NC",
 79		"P8_12",
 80		"P8_11",
 81		"P8_16",
 82		"P8_15",
 83		"P9_15A",
 84		"P9_23",
 85		"P9_14 [ehrpwm1a]",
 86		"P9_16 [ehrpwm1b]",
 87		"[emmc rst]",
 88		"[usr0 led]",
 89		"[usr1 led]",
 90		"[usr2 led]",
 91		"[usr3 led]",
 92		"[hdmi irq]",
 93		"[usb vbus oc]",
 94		"[hdmi audio]",
 95		"P9_12",
 96		"P8_26",
 97		"P8_21 [emmc]",
 98		"P8_20 [emmc]";
 99};
100
101&gpio2 {
102	gpio-line-names =
103		"P9_15B",
104		"P8_18",
105		"P8_7",
106		"P8_8",
107		"P8_10",
108		"P8_9",
109		"P8_45 [hdmi]",
110		"P8_46 [hdmi]",
111		"P8_43 [hdmi]",
112		"P8_44 [hdmi]",
113		"P8_41 [hdmi]",
114		"P8_42 [hdmi]",
115		"P8_39 [hdmi]",
116		"P8_40 [hdmi]",
117		"P8_37 [hdmi]",
118		"P8_38 [hdmi]",
119		"P8_36 [hdmi]",
120		"P8_34 [hdmi]",
121		"[rmii1_rxd3]",
122		"[rmii1_rxd2]",
123		"[rmii1_rxd1]",
124		"[rmii1_rxd0]",
125		"P8_27 [hdmi]",
126		"P8_29 [hdmi]",
127		"P8_28 [hdmi]",
128		"P8_30 [hdmi]",
129		"[mmc0_dat3]",
130		"[mmc0_dat2]",
131		"[mmc0_dat1]",
132		"[mmc0_dat0]",
133		"[mmc0_clk]",
134		"[mmc0_cmd]";
135};
136
137&gpio3 {
138	gpio-line-names =
139		"[mii col]",
140		"[mii crs]",
141		"[mii rx err]",
142		"[mii tx en]",
143		"[mii rx dv]",
144		"[i2c0 sda]",
145		"[i2c0 scl]",
146		"[jtag emu0]",
147		"[jtag emu1]",
148		"[mii tx clk]",
149		"[mii rx clk]",
150		"NC",
151		"NC",
152		"[usb vbus en]",
153		"P9_31 [spi1_sclk]",
154		"P9_29 [spi1_d0]",
155		"P9_30 [spi1_d1]",
156		"P9_28 [spi1_cs0]",
157		"P9_42B [ecappwm0]",
158		"P9_27",
159		"P9_41A",
160		"P9_25",
161		"NC",
162		"NC",
163		"NC",
164		"NC",
165		"NC",
166		"NC",
167		"NC",
168		"NC",
169		"NC",
170		"NC";
171};
172
173&baseboard_eeprom {
174	vcc-supply = <&ldo4_reg>;
175};