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1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (C) 2019-2021, Intel Corporation. */
3
4#ifndef _ICE_TC_LIB_H_
5#define _ICE_TC_LIB_H_
6
7#include <linux/bits.h>
8#include <net/pfcp.h>
9
10#define ICE_TC_FLWR_FIELD_DST_MAC BIT(0)
11#define ICE_TC_FLWR_FIELD_SRC_MAC BIT(1)
12#define ICE_TC_FLWR_FIELD_VLAN BIT(2)
13#define ICE_TC_FLWR_FIELD_DEST_IPV4 BIT(3)
14#define ICE_TC_FLWR_FIELD_SRC_IPV4 BIT(4)
15#define ICE_TC_FLWR_FIELD_DEST_IPV6 BIT(5)
16#define ICE_TC_FLWR_FIELD_SRC_IPV6 BIT(6)
17#define ICE_TC_FLWR_FIELD_DEST_L4_PORT BIT(7)
18#define ICE_TC_FLWR_FIELD_SRC_L4_PORT BIT(8)
19#define ICE_TC_FLWR_FIELD_TENANT_ID BIT(9)
20#define ICE_TC_FLWR_FIELD_ENC_DEST_IPV4 BIT(10)
21#define ICE_TC_FLWR_FIELD_ENC_SRC_IPV4 BIT(11)
22#define ICE_TC_FLWR_FIELD_ENC_DEST_IPV6 BIT(12)
23#define ICE_TC_FLWR_FIELD_ENC_SRC_IPV6 BIT(13)
24#define ICE_TC_FLWR_FIELD_ENC_DEST_L4_PORT BIT(14)
25#define ICE_TC_FLWR_FIELD_ENC_SRC_L4_PORT BIT(15)
26#define ICE_TC_FLWR_FIELD_ENC_DST_MAC BIT(16)
27#define ICE_TC_FLWR_FIELD_ETH_TYPE_ID BIT(17)
28#define ICE_TC_FLWR_FIELD_GTP_OPTS BIT(18)
29#define ICE_TC_FLWR_FIELD_CVLAN BIT(19)
30#define ICE_TC_FLWR_FIELD_PPPOE_SESSID BIT(20)
31#define ICE_TC_FLWR_FIELD_PPP_PROTO BIT(21)
32#define ICE_TC_FLWR_FIELD_IP_TOS BIT(22)
33#define ICE_TC_FLWR_FIELD_IP_TTL BIT(23)
34#define ICE_TC_FLWR_FIELD_ENC_IP_TOS BIT(24)
35#define ICE_TC_FLWR_FIELD_ENC_IP_TTL BIT(25)
36#define ICE_TC_FLWR_FIELD_L2TPV3_SESSID BIT(26)
37#define ICE_TC_FLWR_FIELD_VLAN_PRIO BIT(27)
38#define ICE_TC_FLWR_FIELD_CVLAN_PRIO BIT(28)
39#define ICE_TC_FLWR_FIELD_VLAN_TPID BIT(29)
40#define ICE_TC_FLWR_FIELD_PFCP_OPTS BIT(30)
41
42#define ICE_TC_FLOWER_MASK_32 0xFFFFFFFF
43
44#define ICE_IPV6_HDR_TC_MASK 0xFF00000
45
46struct ice_indr_block_priv {
47 struct net_device *netdev;
48 struct ice_netdev_priv *np;
49 struct list_head list;
50};
51
52struct ice_tc_flower_action {
53 /* forward action specific params */
54 union {
55 struct {
56 u32 tc_class; /* forward to hw_tc */
57 u32 rsvd;
58 } tc;
59 struct {
60 u16 queue; /* forward to queue */
61 /* To add filter in HW, absolute queue number in global
62 * space of queues (between 0...N) is needed
63 */
64 u16 hw_queue;
65 } q;
66 } fwd;
67 enum ice_sw_fwd_act_type fltr_act;
68};
69
70struct ice_tc_vlan_hdr {
71 __be16 vlan_id; /* Only last 12 bits valid */
72 __be16 vlan_prio; /* Only last 3 bits valid (valid values: 0..7) */
73 __be16 vlan_tpid;
74};
75
76struct ice_tc_pppoe_hdr {
77 __be16 session_id;
78 __be16 ppp_proto;
79};
80
81struct ice_tc_l2_hdr {
82 u8 dst_mac[ETH_ALEN];
83 u8 src_mac[ETH_ALEN];
84 __be16 n_proto; /* Ethernet Protocol */
85};
86
87struct ice_tc_l3_hdr {
88 u8 ip_proto; /* IPPROTO value */
89 union {
90 struct {
91 struct in_addr dst_ip;
92 struct in_addr src_ip;
93 } v4;
94 struct {
95 struct in6_addr dst_ip6;
96 struct in6_addr src_ip6;
97 } v6;
98 } ip;
99#define dst_ipv6 ip.v6.dst_ip6.s6_addr32
100#define dst_ipv6_addr ip.v6.dst_ip6.s6_addr
101#define src_ipv6 ip.v6.src_ip6.s6_addr32
102#define src_ipv6_addr ip.v6.src_ip6.s6_addr
103#define dst_ipv4 ip.v4.dst_ip.s_addr
104#define src_ipv4 ip.v4.src_ip.s_addr
105
106 u8 tos;
107 u8 ttl;
108};
109
110struct ice_tc_l2tpv3_hdr {
111 __be32 session_id;
112};
113
114struct ice_tc_l4_hdr {
115 __be16 dst_port;
116 __be16 src_port;
117};
118
119struct ice_tc_flower_lyr_2_4_hdrs {
120 /* L2 layer fields with their mask */
121 struct ice_tc_l2_hdr l2_key;
122 struct ice_tc_l2_hdr l2_mask;
123 struct ice_tc_vlan_hdr vlan_hdr;
124 struct ice_tc_vlan_hdr cvlan_hdr;
125 struct ice_tc_pppoe_hdr pppoe_hdr;
126 struct ice_tc_l2tpv3_hdr l2tpv3_hdr;
127 /* L3 (IPv4[6]) layer fields with their mask */
128 struct ice_tc_l3_hdr l3_key;
129 struct ice_tc_l3_hdr l3_mask;
130
131 /* L4 layer fields with their mask */
132 struct ice_tc_l4_hdr l4_key;
133 struct ice_tc_l4_hdr l4_mask;
134};
135
136enum ice_eswitch_fltr_direction {
137 ICE_ESWITCH_FLTR_INGRESS,
138 ICE_ESWITCH_FLTR_EGRESS,
139};
140
141struct ice_tc_flower_fltr {
142 struct hlist_node tc_flower_node;
143
144 /* cookie becomes filter_rule_id if rule is added successfully */
145 unsigned long cookie;
146
147 /* add_adv_rule returns information like recipe ID, rule_id. Store
148 * those values since they are needed to remove advanced rule
149 */
150 u16 rid;
151 u16 rule_id;
152 /* VSI handle of the destination VSI (it could be main PF VSI, CHNL_VSI,
153 * VF VSI)
154 */
155 u16 dest_vsi_handle;
156 /* ptr to destination VSI */
157 struct ice_vsi *dest_vsi;
158 /* direction of fltr for eswitch use case */
159 enum ice_eswitch_fltr_direction direction;
160
161 /* Parsed TC flower configuration params */
162 struct ice_tc_flower_lyr_2_4_hdrs outer_headers;
163 struct ice_tc_flower_lyr_2_4_hdrs inner_headers;
164 struct ice_vsi *src_vsi;
165 __be32 tenant_id;
166 struct gtp_pdu_session_info gtp_pdu_info_keys;
167 struct gtp_pdu_session_info gtp_pdu_info_masks;
168 struct pfcp_metadata pfcp_meta_keys;
169 struct pfcp_metadata pfcp_meta_masks;
170 u32 flags;
171 u8 tunnel_type;
172 struct ice_tc_flower_action action;
173
174 /* cache ptr which is used wherever needed to communicate netlink
175 * messages
176 */
177 struct netlink_ext_ack *extack;
178};
179
180/**
181 * ice_is_chnl_fltr - is this a valid channel filter
182 * @f: Pointer to tc-flower filter
183 *
184 * Criteria to determine of given filter is valid channel filter
185 * or not is based on its destination.
186 * For forward to VSI action, if destination is valid hw_tc (aka tc_class)
187 * and in supported range of TCs for ADQ, then return true.
188 * For forward to queue, as long as dest_vsi is valid and it is of type
189 * VSI_CHNL (PF ADQ VSI is of type VSI_CHNL), return true.
190 * NOTE: For forward to queue, correct dest_vsi is still set in tc_fltr based
191 * on destination queue specified.
192 */
193static inline bool ice_is_chnl_fltr(struct ice_tc_flower_fltr *f)
194{
195 if (f->action.fltr_act == ICE_FWD_TO_VSI)
196 return f->action.fwd.tc.tc_class >= ICE_CHNL_START_TC &&
197 f->action.fwd.tc.tc_class < ICE_CHNL_MAX_TC;
198 else if (f->action.fltr_act == ICE_FWD_TO_Q)
199 return f->dest_vsi && f->dest_vsi->type == ICE_VSI_CHNL;
200
201 return false;
202}
203
204/**
205 * ice_chnl_dmac_fltr_cnt - DMAC based CHNL filter count
206 * @pf: Pointer to PF
207 */
208static inline int ice_chnl_dmac_fltr_cnt(struct ice_pf *pf)
209{
210 return pf->num_dmac_chnl_fltrs;
211}
212
213struct ice_vsi *ice_locate_vsi_using_queue(struct ice_vsi *vsi, int queue);
214int
215ice_add_cls_flower(struct net_device *netdev, struct ice_vsi *vsi,
216 struct flow_cls_offload *cls_flower);
217int
218ice_del_cls_flower(struct ice_vsi *vsi, struct flow_cls_offload *cls_flower);
219void ice_replay_tc_fltrs(struct ice_pf *pf);
220bool ice_is_tunnel_supported(struct net_device *dev);
221
222static inline bool ice_is_forward_action(enum ice_sw_fwd_act_type fltr_act)
223{
224 switch (fltr_act) {
225 case ICE_FWD_TO_VSI:
226 case ICE_FWD_TO_Q:
227 return true;
228 default:
229 return false;
230 }
231}
232#endif /* _ICE_TC_LIB_H_ */
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (C) 2019-2021, Intel Corporation. */
3
4#ifndef _ICE_TC_LIB_H_
5#define _ICE_TC_LIB_H_
6
7#define ICE_TC_FLWR_FIELD_DST_MAC BIT(0)
8#define ICE_TC_FLWR_FIELD_SRC_MAC BIT(1)
9#define ICE_TC_FLWR_FIELD_VLAN BIT(2)
10#define ICE_TC_FLWR_FIELD_DEST_IPV4 BIT(3)
11#define ICE_TC_FLWR_FIELD_SRC_IPV4 BIT(4)
12#define ICE_TC_FLWR_FIELD_DEST_IPV6 BIT(5)
13#define ICE_TC_FLWR_FIELD_SRC_IPV6 BIT(6)
14#define ICE_TC_FLWR_FIELD_DEST_L4_PORT BIT(7)
15#define ICE_TC_FLWR_FIELD_SRC_L4_PORT BIT(8)
16#define ICE_TC_FLWR_FIELD_TENANT_ID BIT(9)
17#define ICE_TC_FLWR_FIELD_ENC_DEST_IPV4 BIT(10)
18#define ICE_TC_FLWR_FIELD_ENC_SRC_IPV4 BIT(11)
19#define ICE_TC_FLWR_FIELD_ENC_DEST_IPV6 BIT(12)
20#define ICE_TC_FLWR_FIELD_ENC_SRC_IPV6 BIT(13)
21#define ICE_TC_FLWR_FIELD_ENC_DEST_L4_PORT BIT(14)
22#define ICE_TC_FLWR_FIELD_ENC_SRC_L4_PORT BIT(15)
23#define ICE_TC_FLWR_FIELD_ENC_DST_MAC BIT(16)
24#define ICE_TC_FLWR_FIELD_ETH_TYPE_ID BIT(17)
25#define ICE_TC_FLWR_FIELD_ENC_OPTS BIT(18)
26#define ICE_TC_FLWR_FIELD_CVLAN BIT(19)
27#define ICE_TC_FLWR_FIELD_PPPOE_SESSID BIT(20)
28#define ICE_TC_FLWR_FIELD_PPP_PROTO BIT(21)
29#define ICE_TC_FLWR_FIELD_IP_TOS BIT(22)
30#define ICE_TC_FLWR_FIELD_IP_TTL BIT(23)
31#define ICE_TC_FLWR_FIELD_ENC_IP_TOS BIT(24)
32#define ICE_TC_FLWR_FIELD_ENC_IP_TTL BIT(25)
33#define ICE_TC_FLWR_FIELD_L2TPV3_SESSID BIT(26)
34#define ICE_TC_FLWR_FIELD_VLAN_PRIO BIT(27)
35#define ICE_TC_FLWR_FIELD_CVLAN_PRIO BIT(28)
36
37#define ICE_TC_FLOWER_MASK_32 0xFFFFFFFF
38
39#define ICE_IPV6_HDR_TC_MASK 0xFF00000
40
41struct ice_indr_block_priv {
42 struct net_device *netdev;
43 struct ice_netdev_priv *np;
44 struct list_head list;
45};
46
47struct ice_tc_flower_action {
48 /* forward action specific params */
49 union {
50 struct {
51 u32 tc_class; /* forward to hw_tc */
52 u32 rsvd;
53 } tc;
54 struct {
55 u16 queue; /* forward to queue */
56 /* To add filter in HW, absolute queue number in global
57 * space of queues (between 0...N) is needed
58 */
59 u16 hw_queue;
60 } q;
61 } fwd;
62 enum ice_sw_fwd_act_type fltr_act;
63};
64
65struct ice_tc_vlan_hdr {
66 __be16 vlan_id; /* Only last 12 bits valid */
67 __be16 vlan_prio; /* Only last 3 bits valid (valid values: 0..7) */
68 __be16 vlan_tpid;
69};
70
71struct ice_tc_pppoe_hdr {
72 __be16 session_id;
73 __be16 ppp_proto;
74};
75
76struct ice_tc_l2_hdr {
77 u8 dst_mac[ETH_ALEN];
78 u8 src_mac[ETH_ALEN];
79 __be16 n_proto; /* Ethernet Protocol */
80};
81
82struct ice_tc_l3_hdr {
83 u8 ip_proto; /* IPPROTO value */
84 union {
85 struct {
86 struct in_addr dst_ip;
87 struct in_addr src_ip;
88 } v4;
89 struct {
90 struct in6_addr dst_ip6;
91 struct in6_addr src_ip6;
92 } v6;
93 } ip;
94#define dst_ipv6 ip.v6.dst_ip6.s6_addr32
95#define dst_ipv6_addr ip.v6.dst_ip6.s6_addr
96#define src_ipv6 ip.v6.src_ip6.s6_addr32
97#define src_ipv6_addr ip.v6.src_ip6.s6_addr
98#define dst_ipv4 ip.v4.dst_ip.s_addr
99#define src_ipv4 ip.v4.src_ip.s_addr
100
101 u8 tos;
102 u8 ttl;
103};
104
105struct ice_tc_l2tpv3_hdr {
106 __be32 session_id;
107};
108
109struct ice_tc_l4_hdr {
110 __be16 dst_port;
111 __be16 src_port;
112};
113
114struct ice_tc_flower_lyr_2_4_hdrs {
115 /* L2 layer fields with their mask */
116 struct ice_tc_l2_hdr l2_key;
117 struct ice_tc_l2_hdr l2_mask;
118 struct ice_tc_vlan_hdr vlan_hdr;
119 struct ice_tc_vlan_hdr cvlan_hdr;
120 struct ice_tc_pppoe_hdr pppoe_hdr;
121 struct ice_tc_l2tpv3_hdr l2tpv3_hdr;
122 /* L3 (IPv4[6]) layer fields with their mask */
123 struct ice_tc_l3_hdr l3_key;
124 struct ice_tc_l3_hdr l3_mask;
125
126 /* L4 layer fields with their mask */
127 struct ice_tc_l4_hdr l4_key;
128 struct ice_tc_l4_hdr l4_mask;
129};
130
131enum ice_eswitch_fltr_direction {
132 ICE_ESWITCH_FLTR_INGRESS,
133 ICE_ESWITCH_FLTR_EGRESS,
134};
135
136struct ice_tc_flower_fltr {
137 struct hlist_node tc_flower_node;
138
139 /* cookie becomes filter_rule_id if rule is added successfully */
140 unsigned long cookie;
141
142 /* add_adv_rule returns information like recipe ID, rule_id. Store
143 * those values since they are needed to remove advanced rule
144 */
145 u16 rid;
146 u16 rule_id;
147 /* VSI handle of the destination VSI (it could be main PF VSI, CHNL_VSI,
148 * VF VSI)
149 */
150 u16 dest_vsi_handle;
151 /* ptr to destination VSI */
152 struct ice_vsi *dest_vsi;
153 /* direction of fltr for eswitch use case */
154 enum ice_eswitch_fltr_direction direction;
155
156 /* Parsed TC flower configuration params */
157 struct ice_tc_flower_lyr_2_4_hdrs outer_headers;
158 struct ice_tc_flower_lyr_2_4_hdrs inner_headers;
159 struct ice_vsi *src_vsi;
160 __be32 tenant_id;
161 struct gtp_pdu_session_info gtp_pdu_info_keys;
162 struct gtp_pdu_session_info gtp_pdu_info_masks;
163 u32 flags;
164 u8 tunnel_type;
165 struct ice_tc_flower_action action;
166
167 /* cache ptr which is used wherever needed to communicate netlink
168 * messages
169 */
170 struct netlink_ext_ack *extack;
171};
172
173/**
174 * ice_is_chnl_fltr - is this a valid channel filter
175 * @f: Pointer to tc-flower filter
176 *
177 * Criteria to determine of given filter is valid channel filter
178 * or not is based on its destination.
179 * For forward to VSI action, if destination is valid hw_tc (aka tc_class)
180 * and in supported range of TCs for ADQ, then return true.
181 * For forward to queue, as long as dest_vsi is valid and it is of type
182 * VSI_CHNL (PF ADQ VSI is of type VSI_CHNL), return true.
183 * NOTE: For forward to queue, correct dest_vsi is still set in tc_fltr based
184 * on destination queue specified.
185 */
186static inline bool ice_is_chnl_fltr(struct ice_tc_flower_fltr *f)
187{
188 if (f->action.fltr_act == ICE_FWD_TO_VSI)
189 return f->action.fwd.tc.tc_class >= ICE_CHNL_START_TC &&
190 f->action.fwd.tc.tc_class < ICE_CHNL_MAX_TC;
191 else if (f->action.fltr_act == ICE_FWD_TO_Q)
192 return f->dest_vsi && f->dest_vsi->type == ICE_VSI_CHNL;
193
194 return false;
195}
196
197/**
198 * ice_chnl_dmac_fltr_cnt - DMAC based CHNL filter count
199 * @pf: Pointer to PF
200 */
201static inline int ice_chnl_dmac_fltr_cnt(struct ice_pf *pf)
202{
203 return pf->num_dmac_chnl_fltrs;
204}
205
206int
207ice_add_cls_flower(struct net_device *netdev, struct ice_vsi *vsi,
208 struct flow_cls_offload *cls_flower);
209int
210ice_del_cls_flower(struct ice_vsi *vsi, struct flow_cls_offload *cls_flower);
211void ice_replay_tc_fltrs(struct ice_pf *pf);
212bool ice_is_tunnel_supported(struct net_device *dev);
213
214#endif /* _ICE_TC_LIB_H_ */