1/* SPDX-License-Identifier: GPL-2.0 */
 2#ifndef _ASM_X86_MICROCODE_INTEL_H
 3#define _ASM_X86_MICROCODE_INTEL_H
 4
 5#include <asm/microcode.h>
 6
 7struct microcode_header_intel {
 8	unsigned int            hdrver;
 9	unsigned int            rev;
10	unsigned int            date;
11	unsigned int            sig;
12	unsigned int            cksum;
13	unsigned int            ldrver;
14	unsigned int            pf;
15	unsigned int            datasize;
16	unsigned int            totalsize;
17	unsigned int            metasize;
18	unsigned int            reserved[2];
19};
20
21struct microcode_intel {
22	struct microcode_header_intel hdr;
23	unsigned int            bits[];
24};
25
26/* microcode format is extended from prescott processors */
27struct extended_signature {
28	unsigned int            sig;
29	unsigned int            pf;
30	unsigned int            cksum;
31};
32
33struct extended_sigtable {
34	unsigned int            count;
35	unsigned int            cksum;
36	unsigned int            reserved[3];
37	struct extended_signature sigs[];
38};
39
40#define DEFAULT_UCODE_DATASIZE	(2000)
41#define MC_HEADER_SIZE		(sizeof(struct microcode_header_intel))
42#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
43#define EXT_HEADER_SIZE		(sizeof(struct extended_sigtable))
44#define EXT_SIGNATURE_SIZE	(sizeof(struct extended_signature))
45#define MC_HEADER_TYPE_MICROCODE	1
46#define MC_HEADER_TYPE_IFS		2
47
48#define get_totalsize(mc) \
49	(((struct microcode_intel *)mc)->hdr.datasize ? \
50	 ((struct microcode_intel *)mc)->hdr.totalsize : \
51	 DEFAULT_UCODE_TOTALSIZE)
52
53#define get_datasize(mc) \
54	(((struct microcode_intel *)mc)->hdr.datasize ? \
55	 ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
56
57#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
58
59static inline u32 intel_get_microcode_revision(void)
60{
61	u32 rev, dummy;
62
63	native_wrmsrl(MSR_IA32_UCODE_REV, 0);
64
65	/* As documented in the SDM: Do a CPUID 1 here */
66	native_cpuid_eax(1);
67
68	/* get the current revision from MSR 0x8B */
69	native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
70
71	return rev;
72}
73
74#ifdef CONFIG_MICROCODE_INTEL
75extern void __init load_ucode_intel_bsp(void);
76extern void load_ucode_intel_ap(void);
77extern void show_ucode_info_early(void);
78extern int __init save_microcode_in_initrd_intel(void);
79void reload_ucode_intel(void);
80#else
81static inline __init void load_ucode_intel_bsp(void) {}
82static inline void load_ucode_intel_ap(void) {}
83static inline void show_ucode_info_early(void) {}
84static inline int __init save_microcode_in_initrd_intel(void) { return -EINVAL; }
85static inline void reload_ucode_intel(void) {}
86#endif
87
88#endif /* _ASM_X86_MICROCODE_INTEL_H */