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1# SPDX-License-Identifier: GPL-2.0
2config SUPERH
3 def_bool y
4 select ARCH_32BIT_OFF_T
5 select ARCH_HAS_CPU_CACHE_ALIASING
6 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
7 select ARCH_HAS_BINFMT_FLAT if !MMU
8 select ARCH_HAS_CPU_FINALIZE_INIT
9 select ARCH_HAS_CURRENT_STACK_POINTER
10 select ARCH_HAS_GIGANTIC_PAGE
11 select ARCH_HAS_GCOV_PROFILE_ALL
12 select ARCH_HAS_PTE_SPECIAL
13 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
14 select ARCH_HIBERNATION_POSSIBLE if MMU
15 select ARCH_MIGHT_HAVE_PC_PARPORT
16 select ARCH_WANT_IPC_PARSE_VERSION
17 select ARCH_NEED_CMPXCHG_1_EMU
18 select CPU_NO_EFFICIENT_FFS
19 select DMA_DECLARE_COHERENT
20 select GENERIC_ATOMIC64
21 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
22 select GENERIC_IDLE_POLL_SETUP
23 select GENERIC_IRQ_SHOW
24 select GENERIC_LIB_ASHLDI3
25 select GENERIC_LIB_ASHRDI3
26 select GENERIC_LIB_LSHRDI3
27 select GENERIC_PCI_IOMAP if PCI
28 select GENERIC_SCHED_CLOCK
29 select GENERIC_SMP_IDLE_THREAD
30 select GUP_GET_PXX_LOW_HIGH if X2TLB
31 select HAS_IOPORT if HAS_IOPORT_MAP
32 select GENERIC_IOREMAP if MMU
33 select HAVE_ARCH_AUDITSYSCALL
34 select HAVE_ARCH_KGDB
35 select HAVE_ARCH_SECCOMP_FILTER
36 select HAVE_ARCH_TRACEHOOK
37 select HAVE_DEBUG_BUGVERBOSE
38 select HAVE_DEBUG_KMEMLEAK
39 select HAVE_DYNAMIC_FTRACE
40 select HAVE_GUP_FAST if MMU
41 select HAVE_FUNCTION_GRAPH_TRACER
42 select HAVE_FUNCTION_TRACER
43 select HAVE_FTRACE_MCOUNT_RECORD
44 select HAVE_HW_BREAKPOINT
45 select HAVE_IOREMAP_PROT if MMU && !X2TLB
46 select HAVE_KERNEL_BZIP2
47 select HAVE_KERNEL_GZIP
48 select HAVE_KERNEL_LZMA
49 select HAVE_KERNEL_LZO
50 select HAVE_KERNEL_XZ
51 select HAVE_KPROBES
52 select HAVE_KRETPROBES
53 select HAVE_MIXED_BREAKPOINTS_REGS
54 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
55 select HAVE_NMI
56 select HAVE_PATA_PLATFORM
57 select HAVE_PERF_EVENTS
58 select HAVE_REGS_AND_STACK_ACCESS_API
59 select HAVE_UID16
60 select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS
61 select HAVE_STACKPROTECTOR
62 select HAVE_SYSCALL_TRACEPOINTS
63 select IRQ_FORCED_THREADING
64 select LOCK_MM_AND_FIND_VMA
65 select MODULES_USE_ELF_RELA
66 select NEED_SG_DMA_LENGTH
67 select NO_DMA if !MMU && !DMA_COHERENT
68 select NO_GENERIC_PCI_IOPORT_MAP if PCI
69 select OLD_SIGACTION
70 select OLD_SIGSUSPEND
71 select PCI_DOMAINS if PCI
72 select PERF_EVENTS
73 select PERF_USE_VMALLOC
74 select RTC_LIB
75 select SPARSE_IRQ
76 select TRACE_IRQFLAGS_SUPPORT
77 help
78 The SuperH is a RISC processor targeted for use in embedded systems
79 and consumer electronics; it was also used in the Sega Dreamcast
80 gaming console. The SuperH port has a home page at
81 <http://www.linux-sh.org/>.
82
83config GENERIC_BUG
84 def_bool y
85 depends on BUG
86
87config GENERIC_HWEIGHT
88 def_bool y
89
90config GENERIC_CALIBRATE_DELAY
91 bool
92
93config GENERIC_LOCKBREAK
94 def_bool y
95 depends on SMP && PREEMPTION
96
97config ARCH_SUSPEND_POSSIBLE
98 def_bool n
99
100config ARCH_HIBERNATION_POSSIBLE
101 def_bool n
102
103config SYS_SUPPORTS_APM_EMULATION
104 bool
105 select ARCH_SUSPEND_POSSIBLE
106
107config SYS_SUPPORTS_SMP
108 bool
109
110config SYS_SUPPORTS_NUMA
111 bool
112
113config STACKTRACE_SUPPORT
114 def_bool y
115
116config LOCKDEP_SUPPORT
117 def_bool y
118
119config ARCH_HAS_ILOG2_U32
120 def_bool n
121
122config ARCH_HAS_ILOG2_U64
123 def_bool n
124
125config NO_IOPORT_MAP
126 def_bool !PCI
127 depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE && \
128 !SH_DREAMCAST
129
130config IO_TRAPPED
131 bool
132
133config SWAP_IO_SPACE
134 bool
135
136config DMA_COHERENT
137 bool
138
139config DMA_NONCOHERENT
140 def_bool !NO_DMA && !DMA_COHERENT
141 select ARCH_HAS_DMA_PREP_COHERENT
142 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
143 select DMA_DIRECT_REMAP
144
145config PGTABLE_LEVELS
146 default 3 if X2TLB
147 default 2
148
149menu "System type"
150
151#
152# Processor families
153#
154config CPU_SH2
155 bool
156 select SH_INTC
157
158config CPU_SH2A
159 bool
160 select CPU_SH2
161 select UNCACHED_MAPPING
162
163config CPU_J2
164 bool
165 select CPU_SH2
166 select OF
167 select OF_EARLY_FLATTREE
168
169config CPU_SH3
170 bool
171 select CPU_HAS_INTEVT
172 select CPU_HAS_SR_RB
173 select SH_INTC
174 select SYS_SUPPORTS_SH_TMU
175
176config CPU_SH4
177 bool
178 select ARCH_SUPPORTS_HUGETLBFS if MMU
179 select CPU_HAS_INTEVT
180 select CPU_HAS_SR_RB
181 select CPU_HAS_FPU if !CPU_SH4AL_DSP
182 select SH_INTC
183 select SYS_SUPPORTS_SH_TMU
184
185config CPU_SH4A
186 bool
187 select CPU_SH4
188
189config CPU_SH4AL_DSP
190 bool
191 select CPU_SH4A
192 select CPU_HAS_DSP
193
194config CPU_SHX2
195 bool
196
197config CPU_SHX3
198 bool
199 select DMA_COHERENT
200 select SYS_SUPPORTS_SMP
201 select SYS_SUPPORTS_NUMA
202
203config ARCH_SHMOBILE
204 bool
205 select ARCH_SUSPEND_POSSIBLE
206 select PM
207
208config CPU_HAS_PMU
209 depends on CPU_SH4 || CPU_SH4A
210 default y
211 bool
212
213choice
214 prompt "Processor sub-type selection"
215
216#
217# Processor subtypes
218#
219
220# SH-2 Processor Support
221
222config CPU_SUBTYPE_SH7619
223 bool "Support SH7619 processor"
224 select CPU_SH2
225 select SYS_SUPPORTS_SH_CMT
226
227config CPU_SUBTYPE_J2
228 bool "Support J2 processor"
229 select CPU_J2
230 select SYS_SUPPORTS_SMP
231 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
232
233# SH-2A Processor Support
234
235config CPU_SUBTYPE_SH7201
236 bool "Support SH7201 processor"
237 select CPU_SH2A
238 select CPU_HAS_FPU
239 select SYS_SUPPORTS_SH_MTU2
240
241config CPU_SUBTYPE_SH7203
242 bool "Support SH7203 processor"
243 select CPU_SH2A
244 select CPU_HAS_FPU
245 select SYS_SUPPORTS_SH_CMT
246 select SYS_SUPPORTS_SH_MTU2
247 select PINCTRL
248
249config CPU_SUBTYPE_SH7206
250 bool "Support SH7206 processor"
251 select CPU_SH2A
252 select SYS_SUPPORTS_SH_CMT
253 select SYS_SUPPORTS_SH_MTU2
254
255config CPU_SUBTYPE_SH7263
256 bool "Support SH7263 processor"
257 select CPU_SH2A
258 select CPU_HAS_FPU
259 select SYS_SUPPORTS_SH_CMT
260 select SYS_SUPPORTS_SH_MTU2
261
262config CPU_SUBTYPE_SH7264
263 bool "Support SH7264 processor"
264 select CPU_SH2A
265 select CPU_HAS_FPU
266 select SYS_SUPPORTS_SH_CMT
267 select SYS_SUPPORTS_SH_MTU2
268 select PINCTRL
269
270config CPU_SUBTYPE_SH7269
271 bool "Support SH7269 processor"
272 select CPU_SH2A
273 select CPU_HAS_FPU
274 select SYS_SUPPORTS_SH_CMT
275 select SYS_SUPPORTS_SH_MTU2
276 select PINCTRL
277
278config CPU_SUBTYPE_MXG
279 bool "Support MX-G processor"
280 select CPU_SH2A
281 select SYS_SUPPORTS_SH_MTU2
282 help
283 Select MX-G if running on an R8A03022BG part.
284
285# SH-3 Processor Support
286
287config CPU_SUBTYPE_SH7705
288 bool "Support SH7705 processor"
289 select CPU_SH3
290
291config CPU_SUBTYPE_SH7706
292 bool "Support SH7706 processor"
293 select CPU_SH3
294 help
295 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
296
297config CPU_SUBTYPE_SH7707
298 bool "Support SH7707 processor"
299 select CPU_SH3
300 help
301 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
302
303config CPU_SUBTYPE_SH7708
304 bool "Support SH7708 processor"
305 select CPU_SH3
306 help
307 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
308 if you have a 100 Mhz SH-3 HD6417708R CPU.
309
310config CPU_SUBTYPE_SH7709
311 bool "Support SH7709 processor"
312 select CPU_SH3
313 help
314 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
315
316config CPU_SUBTYPE_SH7710
317 bool "Support SH7710 processor"
318 select CPU_SH3
319 select CPU_HAS_DSP
320 help
321 Select SH7710 if you have a SH3-DSP SH7710 CPU.
322
323config CPU_SUBTYPE_SH7712
324 bool "Support SH7712 processor"
325 select CPU_SH3
326 select CPU_HAS_DSP
327 help
328 Select SH7712 if you have a SH3-DSP SH7712 CPU.
329
330config CPU_SUBTYPE_SH7720
331 bool "Support SH7720 processor"
332 select CPU_SH3
333 select CPU_HAS_DSP
334 select SYS_SUPPORTS_SH_CMT
335 select USB_OHCI_SH if USB_OHCI_HCD
336 select PINCTRL
337 help
338 Select SH7720 if you have a SH3-DSP SH7720 CPU.
339
340config CPU_SUBTYPE_SH7721
341 bool "Support SH7721 processor"
342 select CPU_SH3
343 select CPU_HAS_DSP
344 select SYS_SUPPORTS_SH_CMT
345 select USB_OHCI_SH if USB_OHCI_HCD
346 help
347 Select SH7721 if you have a SH3-DSP SH7721 CPU.
348
349# SH-4 Processor Support
350
351config CPU_SUBTYPE_SH7750
352 bool "Support SH7750 processor"
353 select CPU_SH4
354 help
355 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
356
357config CPU_SUBTYPE_SH7091
358 bool "Support SH7091 processor"
359 select CPU_SH4
360 help
361 Select SH7091 if you have an SH-4 based Sega device (such as
362 the Dreamcast, Naomi, and Naomi 2).
363
364config CPU_SUBTYPE_SH7750R
365 bool "Support SH7750R processor"
366 select CPU_SH4
367
368config CPU_SUBTYPE_SH7750S
369 bool "Support SH7750S processor"
370 select CPU_SH4
371
372config CPU_SUBTYPE_SH7751
373 bool "Support SH7751 processor"
374 select CPU_SH4
375 help
376 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
377 or if you have a HD6417751R CPU.
378
379config CPU_SUBTYPE_SH7751R
380 bool "Support SH7751R processor"
381 select CPU_SH4
382
383config CPU_SUBTYPE_SH7760
384 bool "Support SH7760 processor"
385 select CPU_SH4
386
387# SH-4A Processor Support
388
389config CPU_SUBTYPE_SH7723
390 bool "Support SH7723 processor"
391 select CPU_SH4A
392 select CPU_SHX2
393 select ARCH_SHMOBILE
394 select ARCH_SPARSEMEM_ENABLE
395 select SYS_SUPPORTS_SH_CMT
396 select PINCTRL
397 help
398 Select SH7723 if you have an SH-MobileR2 CPU.
399
400config CPU_SUBTYPE_SH7724
401 bool "Support SH7724 processor"
402 select CPU_SH4A
403 select CPU_SHX2
404 select ARCH_SHMOBILE
405 select ARCH_SPARSEMEM_ENABLE
406 select SYS_SUPPORTS_SH_CMT
407 select PINCTRL
408 help
409 Select SH7724 if you have an SH-MobileR2R CPU.
410
411config CPU_SUBTYPE_SH7734
412 bool "Support SH7734 processor"
413 select CPU_SH4A
414 select CPU_SHX2
415 select PINCTRL
416 help
417 Select SH7734 if you have a SH4A SH7734 CPU.
418
419config CPU_SUBTYPE_SH7757
420 bool "Support SH7757 processor"
421 select CPU_SH4A
422 select CPU_SHX2
423 select PINCTRL
424 help
425 Select SH7757 if you have a SH4A SH7757 CPU.
426
427config CPU_SUBTYPE_SH7763
428 bool "Support SH7763 processor"
429 select CPU_SH4A
430 select USB_OHCI_SH if USB_OHCI_HCD
431 help
432 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
433
434config CPU_SUBTYPE_SH7770
435 bool "Support SH7770 processor"
436 select CPU_SH4A
437
438config CPU_SUBTYPE_SH7780
439 bool "Support SH7780 processor"
440 select CPU_SH4A
441
442config CPU_SUBTYPE_SH7785
443 bool "Support SH7785 processor"
444 select CPU_SH4A
445 select CPU_SHX2
446 select ARCH_SPARSEMEM_ENABLE
447 select SYS_SUPPORTS_NUMA
448 select PINCTRL
449
450config CPU_SUBTYPE_SH7786
451 bool "Support SH7786 processor"
452 select CPU_SH4A
453 select CPU_SHX3
454 select CPU_HAS_PTEAEX
455 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
456 select USB_OHCI_SH if USB_OHCI_HCD
457 select USB_EHCI_SH if USB_EHCI_HCD
458 select PINCTRL
459
460config CPU_SUBTYPE_SHX3
461 bool "Support SH-X3 processor"
462 select CPU_SH4A
463 select CPU_SHX3
464 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
465 select GPIOLIB
466 select PINCTRL
467
468# SH4AL-DSP Processor Support
469
470config CPU_SUBTYPE_SH7343
471 bool "Support SH7343 processor"
472 select CPU_SH4AL_DSP
473 select ARCH_SHMOBILE
474 select SYS_SUPPORTS_SH_CMT
475
476config CPU_SUBTYPE_SH7722
477 bool "Support SH7722 processor"
478 select CPU_SH4AL_DSP
479 select CPU_SHX2
480 select ARCH_SHMOBILE
481 select ARCH_SPARSEMEM_ENABLE
482 select SYS_SUPPORTS_NUMA
483 select SYS_SUPPORTS_SH_CMT
484 select PINCTRL
485
486config CPU_SUBTYPE_SH7366
487 bool "Support SH7366 processor"
488 select CPU_SH4AL_DSP
489 select CPU_SHX2
490 select ARCH_SHMOBILE
491 select ARCH_SPARSEMEM_ENABLE
492 select SYS_SUPPORTS_NUMA
493 select SYS_SUPPORTS_SH_CMT
494
495endchoice
496
497source "arch/sh/mm/Kconfig"
498
499source "arch/sh/Kconfig.cpu"
500
501source "arch/sh/boards/Kconfig"
502
503menu "Timer and clock configuration"
504
505config SH_PCLK_FREQ
506 int "Peripheral clock frequency (in Hz)"
507 depends on SH_CLK_CPG_LEGACY
508 default "31250000" if CPU_SUBTYPE_SH7619
509 default "33333333" if CPU_SUBTYPE_SH7770 || \
510 CPU_SUBTYPE_SH7760 || \
511 CPU_SUBTYPE_SH7705 || \
512 CPU_SUBTYPE_SH7203 || \
513 CPU_SUBTYPE_SH7206 || \
514 CPU_SUBTYPE_SH7263 || \
515 CPU_SUBTYPE_MXG
516 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
517 default "50000000"
518 help
519 This option is used to specify the peripheral clock frequency.
520 This is necessary for determining the reference clock value on
521 platforms lacking an RTC.
522
523config SH_CLK_CPG
524 def_bool y
525
526config SH_CLK_CPG_LEGACY
527 depends on SH_CLK_CPG
528 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
529 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
530 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
531 !CPU_SUBTYPE_SH7269
532
533endmenu
534
535menu "CPU Frequency scaling"
536source "drivers/cpufreq/Kconfig"
537endmenu
538
539source "arch/sh/drivers/Kconfig"
540
541endmenu
542
543menu "Kernel features"
544
545source "kernel/Kconfig.hz"
546
547config ARCH_SUPPORTS_KEXEC
548 def_bool MMU
549
550config ARCH_SUPPORTS_CRASH_DUMP
551 def_bool BROKEN_ON_SMP
552
553config ARCH_DEFAULT_CRASH_DUMP
554 def_bool y
555
556config ARCH_SUPPORTS_KEXEC_JUMP
557 def_bool y
558
559config PHYSICAL_START
560 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
561 default MEMORY_START
562 help
563 This gives the physical address where the kernel is loaded
564 and is ordinarily the same as MEMORY_START.
565
566 Different values are primarily used in the case of kexec on panic
567 where the fail safe kernel needs to run at a different address
568 than the panic-ed kernel.
569
570config SMP
571 bool "Symmetric multi-processing support"
572 depends on SYS_SUPPORTS_SMP
573 help
574 This enables support for systems with more than one CPU. If you have
575 a system with only one CPU, say N. If you have a system with more
576 than one CPU, say Y.
577
578 If you say N here, the kernel will run on uni- and multiprocessor
579 machines, but will use only one CPU of a multiprocessor machine. If
580 you say Y here, the kernel will run on many, but not all,
581 uniprocessor machines. On a uniprocessor machine, the kernel
582 will run faster if you say N here.
583
584 People using multiprocessor machines who say Y here should also say
585 Y to "Enhanced Real Time Clock Support", below.
586
587 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
588 available at <https://www.tldp.org/docs.html#howto>.
589
590 If you don't know what to do here, say N.
591
592config NR_CPUS
593 int "Maximum number of CPUs (2-32)"
594 range 2 32
595 depends on SMP
596 default "4" if CPU_SUBTYPE_SHX3
597 default "2"
598 help
599 This allows you to specify the maximum number of CPUs which this
600 kernel will support. The maximum supported value is 32 and the
601 minimum value which makes sense is 2.
602
603 This is purely to save memory - each supported CPU adds
604 approximately eight kilobytes to the kernel image.
605
606config HOTPLUG_CPU
607 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
608 depends on SMP
609 help
610 Say Y here to experiment with turning CPUs off and on. CPUs
611 can be controlled through /sys/devices/system/cpu.
612
613config GUSA
614 def_bool y
615 depends on !SMP
616 help
617 This enables support for gUSA (general UserSpace Atomicity).
618 This is the default implementation for both UP and non-ll/sc
619 CPUs, and is used by the libc, amongst others.
620
621 For additional information, design information can be found
622 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
623
624 This should only be disabled for special cases where alternate
625 atomicity implementations exist.
626
627config GUSA_RB
628 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
629 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
630 help
631 Enabling this option will allow the kernel to implement some
632 atomic operations using a software implementation of load-locked/
633 store-conditional (LLSC). On machines which do not have hardware
634 LLSC, this should be more efficient than the other alternative of
635 disabling interrupts around the atomic sequence.
636
637config HW_PERF_EVENTS
638 bool "Enable hardware performance counter support for perf events"
639 depends on PERF_EVENTS && CPU_HAS_PMU
640 default y
641 help
642 Enable hardware performance counter support for perf events. If
643 disabled, perf events will use software events only.
644
645source "drivers/sh/Kconfig"
646
647endmenu
648
649menu "Boot options"
650
651config USE_BUILTIN_DTB
652 bool "Use builtin DTB"
653 default n
654 depends on SH_DEVICE_TREE
655 help
656 Link a device tree blob for particular hardware into the kernel,
657 suppressing use of the DTB pointer provided by the bootloader.
658 This option should only be used with legacy bootloaders that are
659 not capable of providing a DTB to the kernel, or for experimental
660 hardware without stable device tree bindings.
661
662config BUILTIN_DTB_SOURCE
663 string "Source file for builtin DTB"
664 default ""
665 depends on USE_BUILTIN_DTB
666 help
667 Base name (without suffix, relative to arch/sh/boot/dts) for the
668 a DTS file that will be used to produce the DTB linked into the
669 kernel.
670
671config ZERO_PAGE_OFFSET
672 hex
673 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
674 SH_7751_SOLUTION_ENGINE
675 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
676 default "0x00002000" if PAGE_SIZE_8KB
677 default "0x00001000"
678 help
679 This sets the default offset of zero page.
680
681config BOOT_LINK_OFFSET
682 hex
683 default "0x00210000" if SH_SHMIN
684 default "0x00810000" if SH_7780_SOLUTION_ENGINE
685 default "0x009e0000" if SH_TITAN
686 default "0x01800000" if SH_SDK7780
687 default "0x02000000" if SH_EDOSK7760
688 default "0x00800000"
689 help
690 This option allows you to set the link address offset of the zImage.
691 This can be useful if you are on a board which has a small amount of
692 memory.
693
694config ENTRY_OFFSET
695 hex
696 default "0x00001000" if PAGE_SIZE_4KB
697 default "0x00002000" if PAGE_SIZE_8KB
698 default "0x00004000" if PAGE_SIZE_16KB
699 default "0x00010000" if PAGE_SIZE_64KB
700 default "0x00000000"
701
702config ROMIMAGE_MMCIF
703 bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
704 depends on CPU_SUBTYPE_SH7724
705 help
706 Say Y here to include experimental MMCIF loading code in
707 romImage. With this enabled it is possible to write the romImage
708 kernel image to an MMC card and boot the kernel straight from
709 the reset vector. At reset the processor Mask ROM will load the
710 first part of the romImage which in turn loads the rest the kernel
711 image to RAM using the MMCIF hardware block.
712
713choice
714 prompt "Kernel command line"
715 default CMDLINE_OVERWRITE
716 help
717 Setting this option allows the kernel command line arguments
718 to be set.
719
720config CMDLINE_OVERWRITE
721 bool "Overwrite bootloader kernel arguments"
722 help
723 Given string will overwrite any arguments passed in by
724 a bootloader.
725
726config CMDLINE_EXTEND
727 bool "Extend bootloader kernel arguments"
728 help
729 Given string will be concatenated with arguments passed in
730 by a bootloader.
731
732config CMDLINE_FROM_BOOTLOADER
733 bool "Use bootloader kernel arguments"
734 help
735 Uses the command-line options passed by the boot loader.
736
737endchoice
738
739config CMDLINE
740 string "Kernel command line arguments string"
741 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
742 default "console=ttySC1,115200"
743
744endmenu
745
746menu "Bus options"
747
748config MAPLE
749 bool "Maple Bus support"
750 depends on SH_DREAMCAST
751 help
752 The Maple Bus is SEGA's serial communication bus for peripherals
753 on the Dreamcast. Without this bus support you won't be able to
754 get your Dreamcast keyboard etc to work, so most users
755 probably want to say 'Y' here, unless you are only using the
756 Dreamcast with a serial line terminal or a remote network
757 connection.
758
759endmenu
760
761menu "Power management options (EXPERIMENTAL)"
762
763source "kernel/power/Kconfig"
764
765source "drivers/cpuidle/Kconfig"
766
767endmenu
1# SPDX-License-Identifier: GPL-2.0
2config SUPERH
3 def_bool y
4 select ARCH_32BIT_OFF_T
5 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM && MMU
6 select ARCH_ENABLE_MEMORY_HOTREMOVE if SPARSEMEM && MMU
7 select ARCH_HAVE_CUSTOM_GPIO_H
8 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
9 select ARCH_HAS_BINFMT_FLAT if !MMU
10 select ARCH_HAS_CURRENT_STACK_POINTER
11 select ARCH_HAS_GIGANTIC_PAGE
12 select ARCH_HAS_GCOV_PROFILE_ALL
13 select ARCH_HAS_PTE_SPECIAL
14 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
15 select ARCH_HIBERNATION_POSSIBLE if MMU
16 select ARCH_MIGHT_HAVE_PC_PARPORT
17 select ARCH_WANT_IPC_PARSE_VERSION
18 select CPU_NO_EFFICIENT_FFS
19 select DMA_DECLARE_COHERENT
20 select GENERIC_ATOMIC64
21 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
22 select GENERIC_IDLE_POLL_SETUP
23 select GENERIC_IRQ_SHOW
24 select GENERIC_PCI_IOMAP if PCI
25 select GENERIC_SCHED_CLOCK
26 select GENERIC_SMP_IDLE_THREAD
27 select GUP_GET_PXX_LOW_HIGH if X2TLB
28 select HAVE_ARCH_AUDITSYSCALL
29 select HAVE_ARCH_KGDB
30 select HAVE_ARCH_SECCOMP_FILTER
31 select HAVE_ARCH_TRACEHOOK
32 select HAVE_DEBUG_BUGVERBOSE
33 select HAVE_DEBUG_KMEMLEAK
34 select HAVE_DYNAMIC_FTRACE
35 select HAVE_FAST_GUP if MMU
36 select HAVE_FUNCTION_GRAPH_TRACER
37 select HAVE_FUNCTION_TRACER
38 select HAVE_FTRACE_MCOUNT_RECORD
39 select HAVE_HW_BREAKPOINT
40 select HAVE_IOREMAP_PROT if MMU && !X2TLB
41 select HAVE_KERNEL_BZIP2
42 select HAVE_KERNEL_GZIP
43 select HAVE_KERNEL_LZMA
44 select HAVE_KERNEL_LZO
45 select HAVE_KERNEL_XZ
46 select HAVE_KPROBES
47 select HAVE_KRETPROBES
48 select HAVE_MIXED_BREAKPOINTS_REGS
49 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
50 select HAVE_NMI
51 select HAVE_PATA_PLATFORM
52 select HAVE_PERF_EVENTS
53 select HAVE_REGS_AND_STACK_ACCESS_API
54 select HAVE_UID16
55 select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS
56 select HAVE_STACKPROTECTOR
57 select HAVE_SYSCALL_TRACEPOINTS
58 select IRQ_FORCED_THREADING
59 select MODULES_USE_ELF_RELA
60 select NEED_SG_DMA_LENGTH
61 select NO_DMA if !MMU && !DMA_COHERENT
62 select NO_GENERIC_PCI_IOPORT_MAP if PCI
63 select OLD_SIGACTION
64 select OLD_SIGSUSPEND
65 select PCI_DOMAINS if PCI
66 select PERF_EVENTS
67 select PERF_USE_VMALLOC
68 select RTC_LIB
69 select SPARSE_IRQ
70 select TRACE_IRQFLAGS_SUPPORT
71 help
72 The SuperH is a RISC processor targeted for use in embedded systems
73 and consumer electronics; it was also used in the Sega Dreamcast
74 gaming console. The SuperH port has a home page at
75 <http://www.linux-sh.org/>.
76
77config GENERIC_BUG
78 def_bool y
79 depends on BUG
80
81config GENERIC_HWEIGHT
82 def_bool y
83
84config GENERIC_CALIBRATE_DELAY
85 bool
86
87config GENERIC_LOCKBREAK
88 def_bool y
89 depends on SMP && PREEMPTION
90
91config ARCH_SUSPEND_POSSIBLE
92 def_bool n
93
94config ARCH_HIBERNATION_POSSIBLE
95 def_bool n
96
97config SYS_SUPPORTS_APM_EMULATION
98 bool
99 select ARCH_SUSPEND_POSSIBLE
100
101config SYS_SUPPORTS_SMP
102 bool
103
104config SYS_SUPPORTS_NUMA
105 bool
106
107config STACKTRACE_SUPPORT
108 def_bool y
109
110config LOCKDEP_SUPPORT
111 def_bool y
112
113config ARCH_HAS_ILOG2_U32
114 def_bool n
115
116config ARCH_HAS_ILOG2_U64
117 def_bool n
118
119config NO_IOPORT_MAP
120 def_bool !PCI
121 depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \
122 !SH_SOLUTION_ENGINE
123
124config IO_TRAPPED
125 bool
126
127config SWAP_IO_SPACE
128 bool
129
130config DMA_COHERENT
131 bool
132
133config DMA_NONCOHERENT
134 def_bool !NO_DMA && !DMA_COHERENT
135 select ARCH_HAS_DMA_PREP_COHERENT
136 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
137 select DMA_DIRECT_REMAP
138
139config PGTABLE_LEVELS
140 default 3 if X2TLB
141 default 2
142
143menu "System type"
144
145#
146# Processor families
147#
148config CPU_SH2
149 bool
150 select SH_INTC
151
152config CPU_SH2A
153 bool
154 select CPU_SH2
155 select UNCACHED_MAPPING
156
157config CPU_J2
158 bool
159 select CPU_SH2
160 select OF
161 select OF_EARLY_FLATTREE
162
163config CPU_SH3
164 bool
165 select CPU_HAS_INTEVT
166 select CPU_HAS_SR_RB
167 select SH_INTC
168 select SYS_SUPPORTS_SH_TMU
169
170config CPU_SH4
171 bool
172 select ARCH_SUPPORTS_HUGETLBFS if MMU
173 select CPU_HAS_INTEVT
174 select CPU_HAS_SR_RB
175 select CPU_HAS_FPU if !CPU_SH4AL_DSP
176 select SH_INTC
177 select SYS_SUPPORTS_SH_TMU
178
179config CPU_SH4A
180 bool
181 select CPU_SH4
182
183config CPU_SH4AL_DSP
184 bool
185 select CPU_SH4A
186 select CPU_HAS_DSP
187
188config CPU_SHX2
189 bool
190
191config CPU_SHX3
192 bool
193 select DMA_COHERENT
194 select SYS_SUPPORTS_SMP
195 select SYS_SUPPORTS_NUMA
196
197config ARCH_SHMOBILE
198 bool
199 select ARCH_SUSPEND_POSSIBLE
200 select PM
201
202config CPU_HAS_PMU
203 depends on CPU_SH4 || CPU_SH4A
204 default y
205 bool
206
207choice
208 prompt "Processor sub-type selection"
209
210#
211# Processor subtypes
212#
213
214# SH-2 Processor Support
215
216config CPU_SUBTYPE_SH7619
217 bool "Support SH7619 processor"
218 select CPU_SH2
219 select SYS_SUPPORTS_SH_CMT
220
221config CPU_SUBTYPE_J2
222 bool "Support J2 processor"
223 select CPU_J2
224 select SYS_SUPPORTS_SMP
225 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
226
227# SH-2A Processor Support
228
229config CPU_SUBTYPE_SH7201
230 bool "Support SH7201 processor"
231 select CPU_SH2A
232 select CPU_HAS_FPU
233 select SYS_SUPPORTS_SH_MTU2
234
235config CPU_SUBTYPE_SH7203
236 bool "Support SH7203 processor"
237 select CPU_SH2A
238 select CPU_HAS_FPU
239 select SYS_SUPPORTS_SH_CMT
240 select SYS_SUPPORTS_SH_MTU2
241 select PINCTRL
242
243config CPU_SUBTYPE_SH7206
244 bool "Support SH7206 processor"
245 select CPU_SH2A
246 select SYS_SUPPORTS_SH_CMT
247 select SYS_SUPPORTS_SH_MTU2
248
249config CPU_SUBTYPE_SH7263
250 bool "Support SH7263 processor"
251 select CPU_SH2A
252 select CPU_HAS_FPU
253 select SYS_SUPPORTS_SH_CMT
254 select SYS_SUPPORTS_SH_MTU2
255
256config CPU_SUBTYPE_SH7264
257 bool "Support SH7264 processor"
258 select CPU_SH2A
259 select CPU_HAS_FPU
260 select SYS_SUPPORTS_SH_CMT
261 select SYS_SUPPORTS_SH_MTU2
262 select PINCTRL
263
264config CPU_SUBTYPE_SH7269
265 bool "Support SH7269 processor"
266 select CPU_SH2A
267 select CPU_HAS_FPU
268 select SYS_SUPPORTS_SH_CMT
269 select SYS_SUPPORTS_SH_MTU2
270 select PINCTRL
271
272config CPU_SUBTYPE_MXG
273 bool "Support MX-G processor"
274 select CPU_SH2A
275 select SYS_SUPPORTS_SH_MTU2
276 help
277 Select MX-G if running on an R8A03022BG part.
278
279# SH-3 Processor Support
280
281config CPU_SUBTYPE_SH7705
282 bool "Support SH7705 processor"
283 select CPU_SH3
284
285config CPU_SUBTYPE_SH7706
286 bool "Support SH7706 processor"
287 select CPU_SH3
288 help
289 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
290
291config CPU_SUBTYPE_SH7707
292 bool "Support SH7707 processor"
293 select CPU_SH3
294 help
295 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
296
297config CPU_SUBTYPE_SH7708
298 bool "Support SH7708 processor"
299 select CPU_SH3
300 help
301 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
302 if you have a 100 Mhz SH-3 HD6417708R CPU.
303
304config CPU_SUBTYPE_SH7709
305 bool "Support SH7709 processor"
306 select CPU_SH3
307 help
308 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
309
310config CPU_SUBTYPE_SH7710
311 bool "Support SH7710 processor"
312 select CPU_SH3
313 select CPU_HAS_DSP
314 help
315 Select SH7710 if you have a SH3-DSP SH7710 CPU.
316
317config CPU_SUBTYPE_SH7712
318 bool "Support SH7712 processor"
319 select CPU_SH3
320 select CPU_HAS_DSP
321 help
322 Select SH7712 if you have a SH3-DSP SH7712 CPU.
323
324config CPU_SUBTYPE_SH7720
325 bool "Support SH7720 processor"
326 select CPU_SH3
327 select CPU_HAS_DSP
328 select SYS_SUPPORTS_SH_CMT
329 select USB_OHCI_SH if USB_OHCI_HCD
330 select PINCTRL
331 help
332 Select SH7720 if you have a SH3-DSP SH7720 CPU.
333
334config CPU_SUBTYPE_SH7721
335 bool "Support SH7721 processor"
336 select CPU_SH3
337 select CPU_HAS_DSP
338 select SYS_SUPPORTS_SH_CMT
339 select USB_OHCI_SH if USB_OHCI_HCD
340 help
341 Select SH7721 if you have a SH3-DSP SH7721 CPU.
342
343# SH-4 Processor Support
344
345config CPU_SUBTYPE_SH7750
346 bool "Support SH7750 processor"
347 select CPU_SH4
348 help
349 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
350
351config CPU_SUBTYPE_SH7091
352 bool "Support SH7091 processor"
353 select CPU_SH4
354 help
355 Select SH7091 if you have an SH-4 based Sega device (such as
356 the Dreamcast, Naomi, and Naomi 2).
357
358config CPU_SUBTYPE_SH7750R
359 bool "Support SH7750R processor"
360 select CPU_SH4
361
362config CPU_SUBTYPE_SH7750S
363 bool "Support SH7750S processor"
364 select CPU_SH4
365
366config CPU_SUBTYPE_SH7751
367 bool "Support SH7751 processor"
368 select CPU_SH4
369 help
370 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
371 or if you have a HD6417751R CPU.
372
373config CPU_SUBTYPE_SH7751R
374 bool "Support SH7751R processor"
375 select CPU_SH4
376
377config CPU_SUBTYPE_SH7760
378 bool "Support SH7760 processor"
379 select CPU_SH4
380
381config CPU_SUBTYPE_SH4_202
382 bool "Support SH4-202 processor"
383 select CPU_SH4
384
385# SH-4A Processor Support
386
387config CPU_SUBTYPE_SH7723
388 bool "Support SH7723 processor"
389 select CPU_SH4A
390 select CPU_SHX2
391 select ARCH_SHMOBILE
392 select ARCH_SPARSEMEM_ENABLE
393 select SYS_SUPPORTS_SH_CMT
394 select PINCTRL
395 help
396 Select SH7723 if you have an SH-MobileR2 CPU.
397
398config CPU_SUBTYPE_SH7724
399 bool "Support SH7724 processor"
400 select CPU_SH4A
401 select CPU_SHX2
402 select ARCH_SHMOBILE
403 select ARCH_SPARSEMEM_ENABLE
404 select SYS_SUPPORTS_SH_CMT
405 select PINCTRL
406 help
407 Select SH7724 if you have an SH-MobileR2R CPU.
408
409config CPU_SUBTYPE_SH7734
410 bool "Support SH7734 processor"
411 select CPU_SH4A
412 select CPU_SHX2
413 select PINCTRL
414 help
415 Select SH7734 if you have a SH4A SH7734 CPU.
416
417config CPU_SUBTYPE_SH7757
418 bool "Support SH7757 processor"
419 select CPU_SH4A
420 select CPU_SHX2
421 select PINCTRL
422 help
423 Select SH7757 if you have a SH4A SH7757 CPU.
424
425config CPU_SUBTYPE_SH7763
426 bool "Support SH7763 processor"
427 select CPU_SH4A
428 select USB_OHCI_SH if USB_OHCI_HCD
429 help
430 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
431
432config CPU_SUBTYPE_SH7770
433 bool "Support SH7770 processor"
434 select CPU_SH4A
435
436config CPU_SUBTYPE_SH7780
437 bool "Support SH7780 processor"
438 select CPU_SH4A
439
440config CPU_SUBTYPE_SH7785
441 bool "Support SH7785 processor"
442 select CPU_SH4A
443 select CPU_SHX2
444 select ARCH_SPARSEMEM_ENABLE
445 select SYS_SUPPORTS_NUMA
446 select PINCTRL
447
448config CPU_SUBTYPE_SH7786
449 bool "Support SH7786 processor"
450 select CPU_SH4A
451 select CPU_SHX3
452 select CPU_HAS_PTEAEX
453 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
454 select USB_OHCI_SH if USB_OHCI_HCD
455 select USB_EHCI_SH if USB_EHCI_HCD
456 select PINCTRL
457
458config CPU_SUBTYPE_SHX3
459 bool "Support SH-X3 processor"
460 select CPU_SH4A
461 select CPU_SHX3
462 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
463 select GPIOLIB
464 select PINCTRL
465
466# SH4AL-DSP Processor Support
467
468config CPU_SUBTYPE_SH7343
469 bool "Support SH7343 processor"
470 select CPU_SH4AL_DSP
471 select ARCH_SHMOBILE
472 select SYS_SUPPORTS_SH_CMT
473
474config CPU_SUBTYPE_SH7722
475 bool "Support SH7722 processor"
476 select CPU_SH4AL_DSP
477 select CPU_SHX2
478 select ARCH_SHMOBILE
479 select ARCH_SPARSEMEM_ENABLE
480 select SYS_SUPPORTS_NUMA
481 select SYS_SUPPORTS_SH_CMT
482 select PINCTRL
483
484config CPU_SUBTYPE_SH7366
485 bool "Support SH7366 processor"
486 select CPU_SH4AL_DSP
487 select CPU_SHX2
488 select ARCH_SHMOBILE
489 select ARCH_SPARSEMEM_ENABLE
490 select SYS_SUPPORTS_NUMA
491 select SYS_SUPPORTS_SH_CMT
492
493endchoice
494
495source "arch/sh/mm/Kconfig"
496
497source "arch/sh/Kconfig.cpu"
498
499source "arch/sh/boards/Kconfig"
500
501menu "Timer and clock configuration"
502
503config SH_PCLK_FREQ
504 int "Peripheral clock frequency (in Hz)"
505 depends on SH_CLK_CPG_LEGACY
506 default "31250000" if CPU_SUBTYPE_SH7619
507 default "33333333" if CPU_SUBTYPE_SH7770 || \
508 CPU_SUBTYPE_SH7760 || \
509 CPU_SUBTYPE_SH7705 || \
510 CPU_SUBTYPE_SH7203 || \
511 CPU_SUBTYPE_SH7206 || \
512 CPU_SUBTYPE_SH7263 || \
513 CPU_SUBTYPE_MXG
514 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
515 default "66000000" if CPU_SUBTYPE_SH4_202
516 default "50000000"
517 help
518 This option is used to specify the peripheral clock frequency.
519 This is necessary for determining the reference clock value on
520 platforms lacking an RTC.
521
522config SH_CLK_CPG
523 def_bool y
524
525config SH_CLK_CPG_LEGACY
526 depends on SH_CLK_CPG
527 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
528 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
529 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
530 !CPU_SUBTYPE_SH7269
531
532endmenu
533
534menu "CPU Frequency scaling"
535source "drivers/cpufreq/Kconfig"
536endmenu
537
538source "arch/sh/drivers/Kconfig"
539
540endmenu
541
542menu "Kernel features"
543
544source "kernel/Kconfig.hz"
545
546config KEXEC
547 bool "kexec system call (EXPERIMENTAL)"
548 depends on MMU
549 select KEXEC_CORE
550 help
551 kexec is a system call that implements the ability to shutdown your
552 current kernel, and to start another kernel. It is like a reboot
553 but it is independent of the system firmware. And like a reboot
554 you can start any kernel with it, not just Linux.
555
556 The name comes from the similarity to the exec system call.
557
558 It is an ongoing process to be certain the hardware in a machine
559 is properly shutdown, so do not be surprised if this code does not
560 initially work for you. As of this writing the exact hardware
561 interface is strongly in flux, so no good recommendation can be
562 made.
563
564config CRASH_DUMP
565 bool "kernel crash dumps (EXPERIMENTAL)"
566 depends on BROKEN_ON_SMP
567 help
568 Generate crash dump after being started by kexec.
569 This should be normally only set in special crash dump kernels
570 which are loaded in the main kernel with kexec-tools into
571 a specially reserved region and then later executed after
572 a crash by kdump/kexec. The crash dump kernel must be compiled
573 to a memory address not used by the main kernel using
574 PHYSICAL_START.
575
576 For more details see Documentation/admin-guide/kdump/kdump.rst
577
578config KEXEC_JUMP
579 bool "kexec jump (EXPERIMENTAL)"
580 depends on KEXEC && HIBERNATION
581 help
582 Jump between original kernel and kexeced kernel and invoke
583 code via KEXEC
584
585config PHYSICAL_START
586 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
587 default MEMORY_START
588 help
589 This gives the physical address where the kernel is loaded
590 and is ordinarily the same as MEMORY_START.
591
592 Different values are primarily used in the case of kexec on panic
593 where the fail safe kernel needs to run at a different address
594 than the panic-ed kernel.
595
596config SMP
597 bool "Symmetric multi-processing support"
598 depends on SYS_SUPPORTS_SMP
599 help
600 This enables support for systems with more than one CPU. If you have
601 a system with only one CPU, say N. If you have a system with more
602 than one CPU, say Y.
603
604 If you say N here, the kernel will run on uni- and multiprocessor
605 machines, but will use only one CPU of a multiprocessor machine. If
606 you say Y here, the kernel will run on many, but not all,
607 uniprocessor machines. On a uniprocessor machine, the kernel
608 will run faster if you say N here.
609
610 People using multiprocessor machines who say Y here should also say
611 Y to "Enhanced Real Time Clock Support", below.
612
613 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
614 available at <https://www.tldp.org/docs.html#howto>.
615
616 If you don't know what to do here, say N.
617
618config NR_CPUS
619 int "Maximum number of CPUs (2-32)"
620 range 2 32
621 depends on SMP
622 default "4" if CPU_SUBTYPE_SHX3
623 default "2"
624 help
625 This allows you to specify the maximum number of CPUs which this
626 kernel will support. The maximum supported value is 32 and the
627 minimum value which makes sense is 2.
628
629 This is purely to save memory - each supported CPU adds
630 approximately eight kilobytes to the kernel image.
631
632config HOTPLUG_CPU
633 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
634 depends on SMP
635 help
636 Say Y here to experiment with turning CPUs off and on. CPUs
637 can be controlled through /sys/devices/system/cpu.
638
639config GUSA
640 def_bool y
641 depends on !SMP
642 help
643 This enables support for gUSA (general UserSpace Atomicity).
644 This is the default implementation for both UP and non-ll/sc
645 CPUs, and is used by the libc, amongst others.
646
647 For additional information, design information can be found
648 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
649
650 This should only be disabled for special cases where alternate
651 atomicity implementations exist.
652
653config GUSA_RB
654 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
655 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
656 help
657 Enabling this option will allow the kernel to implement some
658 atomic operations using a software implementation of load-locked/
659 store-conditional (LLSC). On machines which do not have hardware
660 LLSC, this should be more efficient than the other alternative of
661 disabling interrupts around the atomic sequence.
662
663config HW_PERF_EVENTS
664 bool "Enable hardware performance counter support for perf events"
665 depends on PERF_EVENTS && CPU_HAS_PMU
666 default y
667 help
668 Enable hardware performance counter support for perf events. If
669 disabled, perf events will use software events only.
670
671source "drivers/sh/Kconfig"
672
673endmenu
674
675menu "Boot options"
676
677config USE_BUILTIN_DTB
678 bool "Use builtin DTB"
679 default n
680 depends on SH_DEVICE_TREE
681 help
682 Link a device tree blob for particular hardware into the kernel,
683 suppressing use of the DTB pointer provided by the bootloader.
684 This option should only be used with legacy bootloaders that are
685 not capable of providing a DTB to the kernel, or for experimental
686 hardware without stable device tree bindings.
687
688config BUILTIN_DTB_SOURCE
689 string "Source file for builtin DTB"
690 default ""
691 depends on USE_BUILTIN_DTB
692 help
693 Base name (without suffix, relative to arch/sh/boot/dts) for the
694 a DTS file that will be used to produce the DTB linked into the
695 kernel.
696
697config ZERO_PAGE_OFFSET
698 hex
699 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
700 SH_7751_SOLUTION_ENGINE
701 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
702 default "0x00002000" if PAGE_SIZE_8KB
703 default "0x00001000"
704 help
705 This sets the default offset of zero page.
706
707config BOOT_LINK_OFFSET
708 hex
709 default "0x00210000" if SH_SHMIN
710 default "0x00810000" if SH_7780_SOLUTION_ENGINE
711 default "0x009e0000" if SH_TITAN
712 default "0x01800000" if SH_SDK7780
713 default "0x02000000" if SH_EDOSK7760
714 default "0x00800000"
715 help
716 This option allows you to set the link address offset of the zImage.
717 This can be useful if you are on a board which has a small amount of
718 memory.
719
720config ENTRY_OFFSET
721 hex
722 default "0x00001000" if PAGE_SIZE_4KB
723 default "0x00002000" if PAGE_SIZE_8KB
724 default "0x00004000" if PAGE_SIZE_16KB
725 default "0x00010000" if PAGE_SIZE_64KB
726 default "0x00000000"
727
728config ROMIMAGE_MMCIF
729 bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
730 depends on CPU_SUBTYPE_SH7724
731 help
732 Say Y here to include experimental MMCIF loading code in
733 romImage. With this enabled it is possible to write the romImage
734 kernel image to an MMC card and boot the kernel straight from
735 the reset vector. At reset the processor Mask ROM will load the
736 first part of the romImage which in turn loads the rest the kernel
737 image to RAM using the MMCIF hardware block.
738
739choice
740 prompt "Kernel command line"
741 optional
742 default CMDLINE_OVERWRITE
743 help
744 Setting this option allows the kernel command line arguments
745 to be set.
746
747config CMDLINE_OVERWRITE
748 bool "Overwrite bootloader kernel arguments"
749 help
750 Given string will overwrite any arguments passed in by
751 a bootloader.
752
753config CMDLINE_EXTEND
754 bool "Extend bootloader kernel arguments"
755 help
756 Given string will be concatenated with arguments passed in
757 by a bootloader.
758
759endchoice
760
761config CMDLINE
762 string "Kernel command line arguments string"
763 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
764 default "console=ttySC1,115200"
765
766endmenu
767
768menu "Bus options"
769
770config SUPERHYWAY
771 tristate "SuperHyway Bus support"
772 depends on CPU_SUBTYPE_SH4_202
773
774config MAPLE
775 bool "Maple Bus support"
776 depends on SH_DREAMCAST
777 help
778 The Maple Bus is SEGA's serial communication bus for peripherals
779 on the Dreamcast. Without this bus support you won't be able to
780 get your Dreamcast keyboard etc to work, so most users
781 probably want to say 'Y' here, unless you are only using the
782 Dreamcast with a serial line terminal or a remote network
783 connection.
784
785endmenu
786
787menu "Power management options (EXPERIMENTAL)"
788
789source "kernel/power/Kconfig"
790
791source "drivers/cpuidle/Kconfig"
792
793endmenu