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1// SPDX-License-Identifier: GPL-2.0
2//
3// Copyright (c) 2011 Samsung Electronics Co., Ltd.
4// http://www.samsung.com
5//
6// Base Samsung platform device definitions
7
8#include <linux/gpio.h>
9#include <linux/kernel.h>
10#include <linux/types.h>
11#include <linux/interrupt.h>
12#include <linux/list.h>
13#include <linux/timer.h>
14#include <linux/init.h>
15#include <linux/serial_core.h>
16#include <linux/serial_s3c.h>
17#include <linux/platform_device.h>
18#include <linux/io.h>
19#include <linux/slab.h>
20#include <linux/string.h>
21#include <linux/dma-mapping.h>
22#include <linux/fb.h>
23#include <linux/gfp.h>
24#include <linux/mmc/host.h>
25#include <linux/ioport.h>
26#include <linux/sizes.h>
27#include <linux/platform_data/s3c-hsotg.h>
28
29#include <asm/irq.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32#include <asm/mach/irq.h>
33
34#include "irqs.h"
35#include "map.h"
36#include "gpio-samsung.h"
37#include "gpio-cfg.h"
38
39#include "cpu.h"
40#include "devs.h"
41#include "fb.h"
42#include <linux/platform_data/i2c-s3c2410.h>
43#include "keypad.h"
44#include "pwm-core.h"
45#include "sdhci.h"
46#include "usb-phy.h"
47#include <linux/platform_data/asoc-s3c.h>
48#include <linux/platform_data/spi-s3c64xx.h>
49
50#define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) }))
51
52/* FB */
53
54#ifdef CONFIG_S3C_DEV_FB
55static struct resource s3c_fb_resource[] = {
56 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
57 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
58 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
59 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
60};
61
62struct platform_device s3c_device_fb = {
63 .name = "s3c-fb",
64 .id = -1,
65 .num_resources = ARRAY_SIZE(s3c_fb_resource),
66 .resource = s3c_fb_resource,
67 .dev = {
68 .dma_mask = &samsung_device_dma_mask,
69 .coherent_dma_mask = DMA_BIT_MASK(32),
70 },
71};
72
73void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
74{
75 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
76 &s3c_device_fb);
77}
78#endif /* CONFIG_S3C_DEV_FB */
79
80/* HSMMC */
81
82#ifdef CONFIG_S3C_DEV_HSMMC
83static struct resource s3c_hsmmc_resource[] = {
84 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
85 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
86};
87
88struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
89 .max_width = 4,
90 .host_caps = (MMC_CAP_4_BIT_DATA |
91 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
92};
93
94struct platform_device s3c_device_hsmmc0 = {
95 .name = "s3c-sdhci",
96 .id = 0,
97 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
98 .resource = s3c_hsmmc_resource,
99 .dev = {
100 .dma_mask = &samsung_device_dma_mask,
101 .coherent_dma_mask = DMA_BIT_MASK(32),
102 .platform_data = &s3c_hsmmc0_def_platdata,
103 },
104};
105
106void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
107{
108 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
109}
110#endif /* CONFIG_S3C_DEV_HSMMC */
111
112#ifdef CONFIG_S3C_DEV_HSMMC1
113static struct resource s3c_hsmmc1_resource[] = {
114 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
115 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
116};
117
118struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
119 .max_width = 4,
120 .host_caps = (MMC_CAP_4_BIT_DATA |
121 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
122};
123
124struct platform_device s3c_device_hsmmc1 = {
125 .name = "s3c-sdhci",
126 .id = 1,
127 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
128 .resource = s3c_hsmmc1_resource,
129 .dev = {
130 .dma_mask = &samsung_device_dma_mask,
131 .coherent_dma_mask = DMA_BIT_MASK(32),
132 .platform_data = &s3c_hsmmc1_def_platdata,
133 },
134};
135
136void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
137{
138 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
139}
140#endif /* CONFIG_S3C_DEV_HSMMC1 */
141
142/* HSMMC2 */
143
144#ifdef CONFIG_S3C_DEV_HSMMC2
145static struct resource s3c_hsmmc2_resource[] = {
146 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
147 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
148};
149
150struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
151 .max_width = 4,
152 .host_caps = (MMC_CAP_4_BIT_DATA |
153 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
154};
155
156struct platform_device s3c_device_hsmmc2 = {
157 .name = "s3c-sdhci",
158 .id = 2,
159 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
160 .resource = s3c_hsmmc2_resource,
161 .dev = {
162 .dma_mask = &samsung_device_dma_mask,
163 .coherent_dma_mask = DMA_BIT_MASK(32),
164 .platform_data = &s3c_hsmmc2_def_platdata,
165 },
166};
167
168void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
169{
170 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
171}
172#endif /* CONFIG_S3C_DEV_HSMMC2 */
173
174#ifdef CONFIG_S3C_DEV_HSMMC3
175static struct resource s3c_hsmmc3_resource[] = {
176 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
177 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
178};
179
180struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
181 .max_width = 4,
182 .host_caps = (MMC_CAP_4_BIT_DATA |
183 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
184};
185
186struct platform_device s3c_device_hsmmc3 = {
187 .name = "s3c-sdhci",
188 .id = 3,
189 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
190 .resource = s3c_hsmmc3_resource,
191 .dev = {
192 .dma_mask = &samsung_device_dma_mask,
193 .coherent_dma_mask = DMA_BIT_MASK(32),
194 .platform_data = &s3c_hsmmc3_def_platdata,
195 },
196};
197
198void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
199{
200 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
201}
202#endif /* CONFIG_S3C_DEV_HSMMC3 */
203
204/* I2C */
205
206static struct resource s3c_i2c0_resource[] = {
207 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
208 [1] = DEFINE_RES_IRQ(IRQ_IIC),
209};
210
211struct platform_device s3c_device_i2c0 = {
212 .name = "s3c2410-i2c",
213 .id = 0,
214 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
215 .resource = s3c_i2c0_resource,
216};
217
218struct s3c2410_platform_i2c default_i2c_data __initdata = {
219 .flags = 0,
220 .slave_addr = 0x10,
221 .frequency = 100*1000,
222 .sda_delay = 100,
223};
224
225void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
226{
227 struct s3c2410_platform_i2c *npd;
228
229 if (!pd) {
230 pd = &default_i2c_data;
231 pd->bus_num = 0;
232 }
233
234 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c0);
235
236 if (!npd->cfg_gpio)
237 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
238}
239
240#ifdef CONFIG_S3C_DEV_I2C1
241static struct resource s3c_i2c1_resource[] = {
242 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
243 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
244};
245
246struct platform_device s3c_device_i2c1 = {
247 .name = "s3c2410-i2c",
248 .id = 1,
249 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
250 .resource = s3c_i2c1_resource,
251};
252
253void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
254{
255 struct s3c2410_platform_i2c *npd;
256
257 if (!pd) {
258 pd = &default_i2c_data;
259 pd->bus_num = 1;
260 }
261
262 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c1);
263
264 if (!npd->cfg_gpio)
265 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
266}
267#endif /* CONFIG_S3C_DEV_I2C1 */
268
269/* KEYPAD */
270
271#ifdef CONFIG_SAMSUNG_DEV_KEYPAD
272static struct resource samsung_keypad_resources[] = {
273 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
274 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
275};
276
277struct platform_device samsung_device_keypad = {
278 .name = "samsung-keypad",
279 .id = -1,
280 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
281 .resource = samsung_keypad_resources,
282};
283
284void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
285{
286 struct samsung_keypad_platdata *npd;
287
288 npd = s3c_set_platdata(pd, sizeof(*npd), &samsung_device_keypad);
289
290 if (!npd->cfg_gpio)
291 npd->cfg_gpio = samsung_keypad_cfg_gpio;
292}
293#endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
294
295/* PWM Timer */
296
297#ifdef CONFIG_SAMSUNG_DEV_PWM
298static struct resource samsung_pwm_resource[] = {
299 DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
300};
301
302struct platform_device samsung_device_pwm = {
303 .name = "samsung-pwm",
304 .id = -1,
305 .num_resources = ARRAY_SIZE(samsung_pwm_resource),
306 .resource = samsung_pwm_resource,
307};
308
309void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
310{
311 samsung_device_pwm.dev.platform_data = pd;
312}
313#endif /* CONFIG_SAMSUNG_DEV_PWM */
314
315/* USB */
316
317#ifdef CONFIG_S3C_DEV_USB_HOST
318static struct resource s3c_usb_resource[] = {
319 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
320 [1] = DEFINE_RES_IRQ(IRQ_USBH),
321};
322
323struct platform_device s3c_device_ohci = {
324 .name = "s3c2410-ohci",
325 .id = -1,
326 .num_resources = ARRAY_SIZE(s3c_usb_resource),
327 .resource = s3c_usb_resource,
328 .dev = {
329 .dma_mask = &samsung_device_dma_mask,
330 .coherent_dma_mask = DMA_BIT_MASK(32),
331 }
332};
333#endif /* CONFIG_S3C_DEV_USB_HOST */
334
335/* USB HSOTG */
336
337#ifdef CONFIG_S3C_DEV_USB_HSOTG
338static struct resource s3c_usb_hsotg_resources[] = {
339 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
340 [1] = DEFINE_RES_IRQ(IRQ_OTG),
341};
342
343struct platform_device s3c_device_usb_hsotg = {
344 .name = "s3c-hsotg",
345 .id = -1,
346 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
347 .resource = s3c_usb_hsotg_resources,
348 .dev = {
349 .dma_mask = &samsung_device_dma_mask,
350 .coherent_dma_mask = DMA_BIT_MASK(32),
351 },
352};
353
354void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd)
355{
356 struct dwc2_hsotg_plat *npd;
357
358 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_usb_hsotg);
359
360 if (!npd->phy_init)
361 npd->phy_init = s3c_usb_phy_init;
362 if (!npd->phy_exit)
363 npd->phy_exit = s3c_usb_phy_exit;
364}
365#endif /* CONFIG_S3C_DEV_USB_HSOTG */
366
367#ifdef CONFIG_S3C64XX_DEV_SPI0
368static struct resource s3c64xx_spi0_resource[] = {
369 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
370 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
371};
372
373struct platform_device s3c64xx_device_spi0 = {
374 .name = "s3c6410-spi",
375 .id = 0,
376 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
377 .resource = s3c64xx_spi0_resource,
378 .dev = {
379 .dma_mask = &samsung_device_dma_mask,
380 .coherent_dma_mask = DMA_BIT_MASK(32),
381 },
382};
383
384void __init s3c64xx_spi0_set_platdata(int src_clk_nr, int num_cs)
385{
386 struct s3c64xx_spi_info pd;
387
388 /* Reject invalid configuration */
389 if (!num_cs || src_clk_nr < 0) {
390 pr_err("%s: Invalid SPI configuration\n", __func__);
391 return;
392 }
393
394 pd.num_cs = num_cs;
395 pd.src_clk_nr = src_clk_nr;
396 pd.cfg_gpio = s3c64xx_spi0_cfg_gpio;
397
398 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
399}
400#endif /* CONFIG_S3C64XX_DEV_SPI0 */
1// SPDX-License-Identifier: GPL-2.0
2//
3// Copyright (c) 2011 Samsung Electronics Co., Ltd.
4// http://www.samsung.com
5//
6// Base Samsung platform device definitions
7
8#include <linux/gpio.h>
9#include <linux/kernel.h>
10#include <linux/types.h>
11#include <linux/interrupt.h>
12#include <linux/list.h>
13#include <linux/timer.h>
14#include <linux/init.h>
15#include <linux/serial_core.h>
16#include <linux/serial_s3c.h>
17#include <linux/platform_device.h>
18#include <linux/io.h>
19#include <linux/slab.h>
20#include <linux/string.h>
21#include <linux/dma-mapping.h>
22#include <linux/fb.h>
23#include <linux/gfp.h>
24#include <linux/mtd/mtd.h>
25#include <linux/mtd/onenand.h>
26#include <linux/mtd/partitions.h>
27#include <linux/mmc/host.h>
28#include <linux/ioport.h>
29#include <linux/sizes.h>
30#include <linux/platform_data/s3c-hsudc.h>
31#include <linux/platform_data/s3c-hsotg.h>
32#include <linux/platform_data/dma-s3c24xx.h>
33
34#include <linux/platform_data/media/s5p_hdmi.h>
35
36#include <asm/irq.h>
37#include <asm/mach/arch.h>
38#include <asm/mach/map.h>
39#include <asm/mach/irq.h>
40
41#include "irqs.h"
42#include "map.h"
43#include "gpio-samsung.h"
44#include "gpio-cfg.h"
45
46#ifdef CONFIG_PLAT_S3C24XX
47#include "regs-s3c2443-clock.h"
48#endif /* CONFIG_PLAT_S3C24XX */
49
50#include "cpu.h"
51#include "devs.h"
52#include <linux/soc/samsung/s3c-adc.h>
53#include <linux/platform_data/ata-samsung_cf.h>
54#include "fb.h"
55#include <linux/platform_data/fb-s3c2410.h>
56#include <linux/platform_data/hwmon-s3c.h>
57#include <linux/platform_data/i2c-s3c2410.h>
58#include "keypad.h"
59#include <linux/platform_data/mmc-s3cmci.h>
60#include <linux/platform_data/mtd-nand-s3c2410.h>
61#include "pwm-core.h"
62#include "sdhci.h"
63#include <linux/platform_data/touchscreen-s3c2410.h>
64#include <linux/platform_data/usb-s3c2410_udc.h>
65#include <linux/platform_data/usb-ohci-s3c2410.h>
66#include "usb-phy.h"
67#include <linux/platform_data/asoc-s3c.h>
68#include <linux/platform_data/spi-s3c64xx.h>
69
70#define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) }))
71
72/* AC97 */
73#ifdef CONFIG_CPU_S3C2440
74static struct resource s3c_ac97_resource[] = {
75 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
76 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
77};
78
79struct platform_device s3c_device_ac97 = {
80 .name = "samsung-ac97",
81 .id = -1,
82 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
83 .resource = s3c_ac97_resource,
84 .dev = {
85 .dma_mask = &samsung_device_dma_mask,
86 .coherent_dma_mask = DMA_BIT_MASK(32),
87 }
88};
89#endif /* CONFIG_CPU_S3C2440 */
90
91/* ADC */
92
93#ifdef CONFIG_PLAT_S3C24XX
94static struct resource s3c_adc_resource[] = {
95 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
96 [1] = DEFINE_RES_IRQ(IRQ_TC),
97 [2] = DEFINE_RES_IRQ(IRQ_ADC),
98};
99
100struct platform_device s3c_device_adc = {
101 .name = "s3c24xx-adc",
102 .id = -1,
103 .num_resources = ARRAY_SIZE(s3c_adc_resource),
104 .resource = s3c_adc_resource,
105};
106#endif /* CONFIG_PLAT_S3C24XX */
107
108#if defined(CONFIG_SAMSUNG_DEV_ADC)
109static struct resource s3c_adc_resource[] = {
110 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
111 [1] = DEFINE_RES_IRQ(IRQ_ADC),
112 [2] = DEFINE_RES_IRQ(IRQ_TC),
113};
114
115struct platform_device s3c_device_adc = {
116 .name = "exynos-adc",
117 .id = -1,
118 .num_resources = ARRAY_SIZE(s3c_adc_resource),
119 .resource = s3c_adc_resource,
120};
121#endif /* CONFIG_SAMSUNG_DEV_ADC */
122
123/* Camif Controller */
124
125#ifdef CONFIG_CPU_S3C2440
126static struct resource s3c_camif_resource[] = {
127 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
128 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
129 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
130};
131
132struct platform_device s3c_device_camif = {
133 .name = "s3c2440-camif",
134 .id = -1,
135 .num_resources = ARRAY_SIZE(s3c_camif_resource),
136 .resource = s3c_camif_resource,
137 .dev = {
138 .dma_mask = &samsung_device_dma_mask,
139 .coherent_dma_mask = DMA_BIT_MASK(32),
140 }
141};
142#endif /* CONFIG_CPU_S3C2440 */
143
144/* FB */
145
146#ifdef CONFIG_S3C_DEV_FB
147static struct resource s3c_fb_resource[] = {
148 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
149 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
150 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
151 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
152};
153
154struct platform_device s3c_device_fb = {
155 .name = "s3c-fb",
156 .id = -1,
157 .num_resources = ARRAY_SIZE(s3c_fb_resource),
158 .resource = s3c_fb_resource,
159 .dev = {
160 .dma_mask = &samsung_device_dma_mask,
161 .coherent_dma_mask = DMA_BIT_MASK(32),
162 },
163};
164
165void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
166{
167 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
168 &s3c_device_fb);
169}
170#endif /* CONFIG_S3C_DEV_FB */
171
172/* HWMON */
173
174#ifdef CONFIG_S3C_DEV_HWMON
175struct platform_device s3c_device_hwmon = {
176 .name = "s3c-hwmon",
177 .id = -1,
178 .dev.parent = &s3c_device_adc.dev,
179};
180
181void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
182{
183 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
184 &s3c_device_hwmon);
185}
186#endif /* CONFIG_S3C_DEV_HWMON */
187
188/* HSMMC */
189
190#ifdef CONFIG_S3C_DEV_HSMMC
191static struct resource s3c_hsmmc_resource[] = {
192 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
193 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
194};
195
196struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
197 .max_width = 4,
198 .host_caps = (MMC_CAP_4_BIT_DATA |
199 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
200};
201
202struct platform_device s3c_device_hsmmc0 = {
203 .name = "s3c-sdhci",
204 .id = 0,
205 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
206 .resource = s3c_hsmmc_resource,
207 .dev = {
208 .dma_mask = &samsung_device_dma_mask,
209 .coherent_dma_mask = DMA_BIT_MASK(32),
210 .platform_data = &s3c_hsmmc0_def_platdata,
211 },
212};
213
214void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
215{
216 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
217}
218#endif /* CONFIG_S3C_DEV_HSMMC */
219
220#ifdef CONFIG_S3C_DEV_HSMMC1
221static struct resource s3c_hsmmc1_resource[] = {
222 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
223 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
224};
225
226struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
227 .max_width = 4,
228 .host_caps = (MMC_CAP_4_BIT_DATA |
229 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
230};
231
232struct platform_device s3c_device_hsmmc1 = {
233 .name = "s3c-sdhci",
234 .id = 1,
235 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
236 .resource = s3c_hsmmc1_resource,
237 .dev = {
238 .dma_mask = &samsung_device_dma_mask,
239 .coherent_dma_mask = DMA_BIT_MASK(32),
240 .platform_data = &s3c_hsmmc1_def_platdata,
241 },
242};
243
244void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
245{
246 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
247}
248#endif /* CONFIG_S3C_DEV_HSMMC1 */
249
250/* HSMMC2 */
251
252#ifdef CONFIG_S3C_DEV_HSMMC2
253static struct resource s3c_hsmmc2_resource[] = {
254 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
255 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
256};
257
258struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
259 .max_width = 4,
260 .host_caps = (MMC_CAP_4_BIT_DATA |
261 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
262};
263
264struct platform_device s3c_device_hsmmc2 = {
265 .name = "s3c-sdhci",
266 .id = 2,
267 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
268 .resource = s3c_hsmmc2_resource,
269 .dev = {
270 .dma_mask = &samsung_device_dma_mask,
271 .coherent_dma_mask = DMA_BIT_MASK(32),
272 .platform_data = &s3c_hsmmc2_def_platdata,
273 },
274};
275
276void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
277{
278 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
279}
280#endif /* CONFIG_S3C_DEV_HSMMC2 */
281
282#ifdef CONFIG_S3C_DEV_HSMMC3
283static struct resource s3c_hsmmc3_resource[] = {
284 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
285 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
286};
287
288struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
289 .max_width = 4,
290 .host_caps = (MMC_CAP_4_BIT_DATA |
291 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
292};
293
294struct platform_device s3c_device_hsmmc3 = {
295 .name = "s3c-sdhci",
296 .id = 3,
297 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
298 .resource = s3c_hsmmc3_resource,
299 .dev = {
300 .dma_mask = &samsung_device_dma_mask,
301 .coherent_dma_mask = DMA_BIT_MASK(32),
302 .platform_data = &s3c_hsmmc3_def_platdata,
303 },
304};
305
306void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
307{
308 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
309}
310#endif /* CONFIG_S3C_DEV_HSMMC3 */
311
312/* I2C */
313
314static struct resource s3c_i2c0_resource[] = {
315 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
316 [1] = DEFINE_RES_IRQ(IRQ_IIC),
317};
318
319struct platform_device s3c_device_i2c0 = {
320 .name = "s3c2410-i2c",
321 .id = 0,
322 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
323 .resource = s3c_i2c0_resource,
324};
325
326struct s3c2410_platform_i2c default_i2c_data __initdata = {
327 .flags = 0,
328 .slave_addr = 0x10,
329 .frequency = 100*1000,
330 .sda_delay = 100,
331};
332
333void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
334{
335 struct s3c2410_platform_i2c *npd;
336
337 if (!pd) {
338 pd = &default_i2c_data;
339 pd->bus_num = 0;
340 }
341
342 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c0);
343
344 if (!npd->cfg_gpio)
345 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
346}
347
348#ifdef CONFIG_S3C_DEV_I2C1
349static struct resource s3c_i2c1_resource[] = {
350 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
351 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
352};
353
354struct platform_device s3c_device_i2c1 = {
355 .name = "s3c2410-i2c",
356 .id = 1,
357 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
358 .resource = s3c_i2c1_resource,
359};
360
361void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
362{
363 struct s3c2410_platform_i2c *npd;
364
365 if (!pd) {
366 pd = &default_i2c_data;
367 pd->bus_num = 1;
368 }
369
370 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c1);
371
372 if (!npd->cfg_gpio)
373 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
374}
375#endif /* CONFIG_S3C_DEV_I2C1 */
376
377#ifdef CONFIG_S3C_DEV_I2C2
378static struct resource s3c_i2c2_resource[] = {
379 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
380 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
381};
382
383struct platform_device s3c_device_i2c2 = {
384 .name = "s3c2410-i2c",
385 .id = 2,
386 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
387 .resource = s3c_i2c2_resource,
388};
389
390void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
391{
392 struct s3c2410_platform_i2c *npd;
393
394 if (!pd) {
395 pd = &default_i2c_data;
396 pd->bus_num = 2;
397 }
398
399 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c2);
400
401 if (!npd->cfg_gpio)
402 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
403}
404#endif /* CONFIG_S3C_DEV_I2C2 */
405
406#ifdef CONFIG_S3C_DEV_I2C3
407static struct resource s3c_i2c3_resource[] = {
408 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
409 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
410};
411
412struct platform_device s3c_device_i2c3 = {
413 .name = "s3c2440-i2c",
414 .id = 3,
415 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
416 .resource = s3c_i2c3_resource,
417};
418
419void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
420{
421 struct s3c2410_platform_i2c *npd;
422
423 if (!pd) {
424 pd = &default_i2c_data;
425 pd->bus_num = 3;
426 }
427
428 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c3);
429
430 if (!npd->cfg_gpio)
431 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
432}
433#endif /*CONFIG_S3C_DEV_I2C3 */
434
435#ifdef CONFIG_S3C_DEV_I2C4
436static struct resource s3c_i2c4_resource[] = {
437 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
438 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
439};
440
441struct platform_device s3c_device_i2c4 = {
442 .name = "s3c2440-i2c",
443 .id = 4,
444 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
445 .resource = s3c_i2c4_resource,
446};
447
448void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
449{
450 struct s3c2410_platform_i2c *npd;
451
452 if (!pd) {
453 pd = &default_i2c_data;
454 pd->bus_num = 4;
455 }
456
457 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c4);
458
459 if (!npd->cfg_gpio)
460 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
461}
462#endif /*CONFIG_S3C_DEV_I2C4 */
463
464#ifdef CONFIG_S3C_DEV_I2C5
465static struct resource s3c_i2c5_resource[] = {
466 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
467 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
468};
469
470struct platform_device s3c_device_i2c5 = {
471 .name = "s3c2440-i2c",
472 .id = 5,
473 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
474 .resource = s3c_i2c5_resource,
475};
476
477void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
478{
479 struct s3c2410_platform_i2c *npd;
480
481 if (!pd) {
482 pd = &default_i2c_data;
483 pd->bus_num = 5;
484 }
485
486 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c5);
487
488 if (!npd->cfg_gpio)
489 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
490}
491#endif /*CONFIG_S3C_DEV_I2C5 */
492
493#ifdef CONFIG_S3C_DEV_I2C6
494static struct resource s3c_i2c6_resource[] = {
495 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
496 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
497};
498
499struct platform_device s3c_device_i2c6 = {
500 .name = "s3c2440-i2c",
501 .id = 6,
502 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
503 .resource = s3c_i2c6_resource,
504};
505
506void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
507{
508 struct s3c2410_platform_i2c *npd;
509
510 if (!pd) {
511 pd = &default_i2c_data;
512 pd->bus_num = 6;
513 }
514
515 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c6);
516
517 if (!npd->cfg_gpio)
518 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
519}
520#endif /* CONFIG_S3C_DEV_I2C6 */
521
522#ifdef CONFIG_S3C_DEV_I2C7
523static struct resource s3c_i2c7_resource[] = {
524 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
525 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
526};
527
528struct platform_device s3c_device_i2c7 = {
529 .name = "s3c2440-i2c",
530 .id = 7,
531 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
532 .resource = s3c_i2c7_resource,
533};
534
535void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
536{
537 struct s3c2410_platform_i2c *npd;
538
539 if (!pd) {
540 pd = &default_i2c_data;
541 pd->bus_num = 7;
542 }
543
544 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c7);
545
546 if (!npd->cfg_gpio)
547 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
548}
549#endif /* CONFIG_S3C_DEV_I2C7 */
550
551/* I2S */
552
553#ifdef CONFIG_PLAT_S3C24XX
554static struct resource s3c_iis_resource[] = {
555 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
556};
557
558struct platform_device s3c_device_iis = {
559 .name = "s3c24xx-iis",
560 .id = -1,
561 .num_resources = ARRAY_SIZE(s3c_iis_resource),
562 .resource = s3c_iis_resource,
563 .dev = {
564 .dma_mask = &samsung_device_dma_mask,
565 .coherent_dma_mask = DMA_BIT_MASK(32),
566 }
567};
568#endif /* CONFIG_PLAT_S3C24XX */
569
570/* IDE CFCON */
571
572#ifdef CONFIG_SAMSUNG_DEV_IDE
573static struct resource s3c_cfcon_resource[] = {
574 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
575 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
576};
577
578struct platform_device s3c_device_cfcon = {
579 .id = 0,
580 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
581 .resource = s3c_cfcon_resource,
582};
583
584void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
585{
586 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
587 &s3c_device_cfcon);
588}
589#endif /* CONFIG_SAMSUNG_DEV_IDE */
590
591/* KEYPAD */
592
593#ifdef CONFIG_SAMSUNG_DEV_KEYPAD
594static struct resource samsung_keypad_resources[] = {
595 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
596 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
597};
598
599struct platform_device samsung_device_keypad = {
600 .name = "samsung-keypad",
601 .id = -1,
602 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
603 .resource = samsung_keypad_resources,
604};
605
606void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
607{
608 struct samsung_keypad_platdata *npd;
609
610 npd = s3c_set_platdata(pd, sizeof(*npd), &samsung_device_keypad);
611
612 if (!npd->cfg_gpio)
613 npd->cfg_gpio = samsung_keypad_cfg_gpio;
614}
615#endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
616
617/* LCD Controller */
618
619#ifdef CONFIG_PLAT_S3C24XX
620static struct resource s3c_lcd_resource[] = {
621 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
622 [1] = DEFINE_RES_IRQ(IRQ_LCD),
623};
624
625struct platform_device s3c_device_lcd = {
626 .name = "s3c2410-lcd",
627 .id = -1,
628 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
629 .resource = s3c_lcd_resource,
630 .dev = {
631 .dma_mask = &samsung_device_dma_mask,
632 .coherent_dma_mask = DMA_BIT_MASK(32),
633 }
634};
635
636void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
637{
638 struct s3c2410fb_mach_info *npd;
639
640 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
641 if (npd) {
642 npd->displays = kmemdup(pd->displays,
643 sizeof(struct s3c2410fb_display) * npd->num_displays,
644 GFP_KERNEL);
645 if (!npd->displays)
646 printk(KERN_ERR "no memory for LCD display data\n");
647 } else {
648 printk(KERN_ERR "no memory for LCD platform data\n");
649 }
650}
651#endif /* CONFIG_PLAT_S3C24XX */
652
653/* NAND */
654
655#ifdef CONFIG_S3C_DEV_NAND
656static struct resource s3c_nand_resource[] = {
657 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
658};
659
660struct platform_device s3c_device_nand = {
661 .name = "s3c2410-nand",
662 .id = -1,
663 .num_resources = ARRAY_SIZE(s3c_nand_resource),
664 .resource = s3c_nand_resource,
665};
666
667/*
668 * s3c_nand_copy_set() - copy nand set data
669 * @set: The new structure, directly copied from the old.
670 *
671 * Copy all the fields from the NAND set field from what is probably __initdata
672 * to new kernel memory. The code returns 0 if the copy happened correctly or
673 * an error code for the calling function to display.
674 *
675 * Note, we currently do not try and look to see if we've already copied the
676 * data in a previous set.
677 */
678static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
679{
680 void *ptr;
681 int size;
682
683 size = sizeof(struct mtd_partition) * set->nr_partitions;
684 if (size) {
685 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
686 set->partitions = ptr;
687
688 if (!ptr)
689 return -ENOMEM;
690 }
691
692 if (set->nr_map && set->nr_chips) {
693 size = sizeof(int) * set->nr_chips;
694 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
695 set->nr_map = ptr;
696
697 if (!ptr)
698 return -ENOMEM;
699 }
700
701 return 0;
702}
703
704void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
705{
706 struct s3c2410_platform_nand *npd;
707 int size;
708 int ret;
709
710 /* note, if we get a failure in allocation, we simply drop out of the
711 * function. If there is so little memory available at initialisation
712 * time then there is little chance the system is going to run.
713 */
714
715 npd = s3c_set_platdata(nand, sizeof(*npd), &s3c_device_nand);
716 if (!npd)
717 return;
718
719 /* now see if we need to copy any of the nand set data */
720
721 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
722 if (size) {
723 struct s3c2410_nand_set *from = npd->sets;
724 struct s3c2410_nand_set *to;
725 int i;
726
727 to = kmemdup(from, size, GFP_KERNEL);
728 npd->sets = to; /* set, even if we failed */
729
730 if (!to) {
731 printk(KERN_ERR "%s: no memory for sets\n", __func__);
732 return;
733 }
734
735 for (i = 0; i < npd->nr_sets; i++) {
736 ret = s3c_nand_copy_set(to);
737 if (ret) {
738 printk(KERN_ERR "%s: failed to copy set %d\n",
739 __func__, i);
740 return;
741 }
742 to++;
743 }
744 }
745}
746#endif /* CONFIG_S3C_DEV_NAND */
747
748/* ONENAND */
749
750#ifdef CONFIG_S3C_DEV_ONENAND
751static struct resource s3c_onenand_resources[] = {
752 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
753 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
754 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
755};
756
757struct platform_device s3c_device_onenand = {
758 .name = "samsung-onenand",
759 .id = 0,
760 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
761 .resource = s3c_onenand_resources,
762};
763#endif /* CONFIG_S3C_DEV_ONENAND */
764
765#ifdef CONFIG_S3C64XX_DEV_ONENAND1
766static struct resource s3c64xx_onenand1_resources[] = {
767 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
768 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
769 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
770};
771
772struct platform_device s3c64xx_device_onenand1 = {
773 .name = "samsung-onenand",
774 .id = 1,
775 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
776 .resource = s3c64xx_onenand1_resources,
777};
778
779void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
780{
781 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
782 &s3c64xx_device_onenand1);
783}
784#endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
785
786/* PWM Timer */
787
788#ifdef CONFIG_SAMSUNG_DEV_PWM
789static struct resource samsung_pwm_resource[] = {
790 DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
791};
792
793struct platform_device samsung_device_pwm = {
794 .name = "samsung-pwm",
795 .id = -1,
796 .num_resources = ARRAY_SIZE(samsung_pwm_resource),
797 .resource = samsung_pwm_resource,
798};
799
800void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
801{
802 samsung_device_pwm.dev.platform_data = pd;
803}
804#endif /* CONFIG_SAMSUNG_DEV_PWM */
805
806/* RTC */
807
808#ifdef CONFIG_PLAT_S3C24XX
809static struct resource s3c_rtc_resource[] = {
810 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
811 [1] = DEFINE_RES_IRQ(IRQ_RTC),
812 [2] = DEFINE_RES_IRQ(IRQ_TICK),
813};
814
815struct platform_device s3c_device_rtc = {
816 .name = "s3c2410-rtc",
817 .id = -1,
818 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
819 .resource = s3c_rtc_resource,
820};
821#endif /* CONFIG_PLAT_S3C24XX */
822
823#ifdef CONFIG_S3C_DEV_RTC
824static struct resource s3c_rtc_resource[] = {
825 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
826 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
827 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
828};
829
830struct platform_device s3c_device_rtc = {
831 .name = "s3c64xx-rtc",
832 .id = -1,
833 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
834 .resource = s3c_rtc_resource,
835};
836#endif /* CONFIG_S3C_DEV_RTC */
837
838/* SDI */
839
840#ifdef CONFIG_PLAT_S3C24XX
841void s3c24xx_mci_def_set_power(unsigned char power_mode, unsigned short vdd)
842{
843 switch (power_mode) {
844 case MMC_POWER_ON:
845 case MMC_POWER_UP:
846 /* Configure GPE5...GPE10 pins in SD mode */
847 s3c_gpio_cfgall_range(S3C2410_GPE(5), 6, S3C_GPIO_SFN(2),
848 S3C_GPIO_PULL_NONE);
849 break;
850
851 case MMC_POWER_OFF:
852 default:
853 gpio_direction_output(S3C2410_GPE(5), 0);
854 break;
855 }
856}
857
858static struct resource s3c_sdi_resource[] = {
859 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
860 [1] = DEFINE_RES_IRQ(IRQ_SDI),
861};
862
863static struct s3c24xx_mci_pdata s3cmci_def_pdata = {
864 /* This is currently here to avoid a number of if (host->pdata)
865 * checks. Any zero fields to ensure reasonable defaults are picked. */
866 .no_wprotect = 1,
867 .no_detect = 1,
868 .set_power = s3c24xx_mci_def_set_power,
869};
870
871struct platform_device s3c_device_sdi = {
872 .name = "s3c2410-sdi",
873 .id = -1,
874 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
875 .resource = s3c_sdi_resource,
876 .dev.platform_data = &s3cmci_def_pdata,
877};
878
879void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
880{
881 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
882 &s3c_device_sdi);
883}
884#endif /* CONFIG_PLAT_S3C24XX */
885
886/* SPI */
887
888#ifdef CONFIG_PLAT_S3C24XX
889static struct resource s3c_spi0_resource[] = {
890 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
891 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
892};
893
894struct platform_device s3c_device_spi0 = {
895 .name = "s3c2410-spi",
896 .id = 0,
897 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
898 .resource = s3c_spi0_resource,
899 .dev = {
900 .dma_mask = &samsung_device_dma_mask,
901 .coherent_dma_mask = DMA_BIT_MASK(32),
902 }
903};
904
905static struct resource s3c_spi1_resource[] = {
906 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
907 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
908};
909
910struct platform_device s3c_device_spi1 = {
911 .name = "s3c2410-spi",
912 .id = 1,
913 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
914 .resource = s3c_spi1_resource,
915 .dev = {
916 .dma_mask = &samsung_device_dma_mask,
917 .coherent_dma_mask = DMA_BIT_MASK(32),
918 }
919};
920#endif /* CONFIG_PLAT_S3C24XX */
921
922/* Touchscreen */
923
924#ifdef CONFIG_PLAT_S3C24XX
925static struct resource s3c_ts_resource[] = {
926 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
927 [1] = DEFINE_RES_IRQ(IRQ_TC),
928};
929
930struct platform_device s3c_device_ts = {
931 .name = "s3c2410-ts",
932 .id = -1,
933 .dev.parent = &s3c_device_adc.dev,
934 .num_resources = ARRAY_SIZE(s3c_ts_resource),
935 .resource = s3c_ts_resource,
936};
937
938void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
939{
940 s3c_set_platdata(hard_s3c2410ts_info,
941 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
942}
943#endif /* CONFIG_PLAT_S3C24XX */
944
945#ifdef CONFIG_SAMSUNG_DEV_TS
946static struct s3c2410_ts_mach_info default_ts_data __initdata = {
947 .delay = 10000,
948 .presc = 49,
949 .oversampling_shift = 2,
950};
951
952void __init s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
953{
954 if (!pd)
955 pd = &default_ts_data;
956
957 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
958 &s3c_device_adc);
959}
960#endif /* CONFIG_SAMSUNG_DEV_TS */
961
962/* USB */
963
964#ifdef CONFIG_S3C_DEV_USB_HOST
965static struct resource s3c_usb_resource[] = {
966 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
967 [1] = DEFINE_RES_IRQ(IRQ_USBH),
968};
969
970struct platform_device s3c_device_ohci = {
971 .name = "s3c2410-ohci",
972 .id = -1,
973 .num_resources = ARRAY_SIZE(s3c_usb_resource),
974 .resource = s3c_usb_resource,
975 .dev = {
976 .dma_mask = &samsung_device_dma_mask,
977 .coherent_dma_mask = DMA_BIT_MASK(32),
978 }
979};
980
981/*
982 * s3c_ohci_set_platdata - initialise OHCI device platform data
983 * @info: The platform data.
984 *
985 * This call copies the @info passed in and sets the device .platform_data
986 * field to that copy. The @info is copied so that the original can be marked
987 * __initdata.
988 */
989
990void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
991{
992 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
993 &s3c_device_ohci);
994}
995#endif /* CONFIG_S3C_DEV_USB_HOST */
996
997/* USB Device (Gadget) */
998
999#ifdef CONFIG_PLAT_S3C24XX
1000static struct resource s3c_usbgadget_resource[] = {
1001 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1002 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1003};
1004
1005struct platform_device s3c_device_usbgadget = {
1006 .name = "s3c2410-usbgadget",
1007 .id = -1,
1008 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1009 .resource = s3c_usbgadget_resource,
1010};
1011
1012void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1013{
1014 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1015}
1016#endif /* CONFIG_PLAT_S3C24XX */
1017
1018/* USB HSOTG */
1019
1020#ifdef CONFIG_S3C_DEV_USB_HSOTG
1021static struct resource s3c_usb_hsotg_resources[] = {
1022 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1023 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1024};
1025
1026struct platform_device s3c_device_usb_hsotg = {
1027 .name = "s3c-hsotg",
1028 .id = -1,
1029 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1030 .resource = s3c_usb_hsotg_resources,
1031 .dev = {
1032 .dma_mask = &samsung_device_dma_mask,
1033 .coherent_dma_mask = DMA_BIT_MASK(32),
1034 },
1035};
1036
1037void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd)
1038{
1039 struct dwc2_hsotg_plat *npd;
1040
1041 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_usb_hsotg);
1042
1043 if (!npd->phy_init)
1044 npd->phy_init = s3c_usb_phy_init;
1045 if (!npd->phy_exit)
1046 npd->phy_exit = s3c_usb_phy_exit;
1047}
1048#endif /* CONFIG_S3C_DEV_USB_HSOTG */
1049
1050/* USB High Spped 2.0 Device (Gadget) */
1051
1052#ifdef CONFIG_PLAT_S3C24XX
1053static struct resource s3c_hsudc_resource[] = {
1054 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1055 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1056};
1057
1058struct platform_device s3c_device_usb_hsudc = {
1059 .name = "s3c-hsudc",
1060 .id = -1,
1061 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1062 .resource = s3c_hsudc_resource,
1063 .dev = {
1064 .dma_mask = &samsung_device_dma_mask,
1065 .coherent_dma_mask = DMA_BIT_MASK(32),
1066 },
1067};
1068
1069void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1070{
1071 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1072 pd->phy_init = s3c_hsudc_init_phy;
1073 pd->phy_uninit = s3c_hsudc_uninit_phy;
1074}
1075#endif /* CONFIG_PLAT_S3C24XX */
1076
1077/* WDT */
1078
1079#ifdef CONFIG_S3C_DEV_WDT
1080static struct resource s3c_wdt_resource[] = {
1081 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1082 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1083};
1084
1085struct platform_device s3c_device_wdt = {
1086 .name = "s3c2410-wdt",
1087 .id = -1,
1088 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1089 .resource = s3c_wdt_resource,
1090};
1091#endif /* CONFIG_S3C_DEV_WDT */
1092
1093#ifdef CONFIG_S3C64XX_DEV_SPI0
1094static struct resource s3c64xx_spi0_resource[] = {
1095 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1096 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1097};
1098
1099struct platform_device s3c64xx_device_spi0 = {
1100 .name = "s3c6410-spi",
1101 .id = 0,
1102 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1103 .resource = s3c64xx_spi0_resource,
1104 .dev = {
1105 .dma_mask = &samsung_device_dma_mask,
1106 .coherent_dma_mask = DMA_BIT_MASK(32),
1107 },
1108};
1109
1110void __init s3c64xx_spi0_set_platdata(int src_clk_nr, int num_cs)
1111{
1112 struct s3c64xx_spi_info pd;
1113
1114 /* Reject invalid configuration */
1115 if (!num_cs || src_clk_nr < 0) {
1116 pr_err("%s: Invalid SPI configuration\n", __func__);
1117 return;
1118 }
1119
1120 pd.num_cs = num_cs;
1121 pd.src_clk_nr = src_clk_nr;
1122 pd.cfg_gpio = s3c64xx_spi0_cfg_gpio;
1123
1124 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1125}
1126#endif /* CONFIG_S3C64XX_DEV_SPI0 */