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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * drivers/net/phy/marvell.c
4 *
5 * Driver for Marvell PHYs
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 *
11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12 */
13#include <linux/kernel.h>
14#include <linux/string.h>
15#include <linux/ctype.h>
16#include <linux/errno.h>
17#include <linux/unistd.h>
18#include <linux/hwmon.h>
19#include <linux/interrupt.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/skbuff.h>
25#include <linux/spinlock.h>
26#include <linux/mm.h>
27#include <linux/module.h>
28#include <linux/mii.h>
29#include <linux/ethtool.h>
30#include <linux/ethtool_netlink.h>
31#include <linux/phy.h>
32#include <linux/marvell_phy.h>
33#include <linux/bitfield.h>
34#include <linux/of.h>
35#include <linux/sfp.h>
36
37#include <linux/io.h>
38#include <asm/irq.h>
39#include <linux/uaccess.h>
40
41#define MII_MARVELL_PHY_PAGE 22
42#define MII_MARVELL_COPPER_PAGE 0x00
43#define MII_MARVELL_FIBER_PAGE 0x01
44#define MII_MARVELL_MSCR_PAGE 0x02
45#define MII_MARVELL_LED_PAGE 0x03
46#define MII_MARVELL_VCT5_PAGE 0x05
47#define MII_MARVELL_MISC_TEST_PAGE 0x06
48#define MII_MARVELL_VCT7_PAGE 0x07
49#define MII_MARVELL_WOL_PAGE 0x11
50#define MII_MARVELL_MODE_PAGE 0x12
51
52#define MII_M1011_IEVENT 0x13
53#define MII_M1011_IEVENT_CLEAR 0x0000
54
55#define MII_M1011_IMASK 0x12
56#define MII_M1011_IMASK_INIT 0x6400
57#define MII_M1011_IMASK_CLEAR 0x0000
58
59#define MII_M1011_PHY_SCR 0x10
60#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
61#define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
62#define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
63#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
64#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
65#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
66
67#define MII_M1011_PHY_SSR 0x11
68#define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
69
70#define MII_M1111_PHY_LED_CONTROL 0x18
71#define MII_M1111_PHY_LED_DIRECT 0x4100
72#define MII_M1111_PHY_LED_COMBINE 0x411c
73#define MII_M1111_PHY_EXT_CR 0x14
74#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
75#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
76#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
77#define MII_M1111_RGMII_RX_DELAY BIT(7)
78#define MII_M1111_RGMII_TX_DELAY BIT(1)
79#define MII_M1111_PHY_EXT_SR 0x1b
80
81#define MII_M1111_HWCFG_MODE_MASK 0xf
82#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
83#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
84#define MII_M1111_HWCFG_MODE_RTBI 0x7
85#define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8
86#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
87#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
88#define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc
89#define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12)
90#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
91#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
92
93#define MII_88E1121_PHY_MSCR_REG 21
94#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
95#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
96#define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
97
98#define MII_88E1121_MISC_TEST 0x1a
99#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
100#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
101#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
102#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
103#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
104#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
105
106#define MII_88E1510_TEMP_SENSOR 0x1b
107#define MII_88E1510_TEMP_SENSOR_MASK 0xff
108
109#define MII_88E1540_COPPER_CTRL3 0x1a
110#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
111#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
112#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
113#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
114#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
115#define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
116
117#define MII_88E6390_MISC_TEST 0x1b
118#define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S (0x0 << 14)
119#define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE (0x1 << 14)
120#define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14)
121#define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE (0x3 << 14)
122#define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 << 14)
123#define MII_88E6393_MISC_TEST_SAMPLES_2048 (0x0 << 11)
124#define MII_88E6393_MISC_TEST_SAMPLES_4096 (0x1 << 11)
125#define MII_88E6393_MISC_TEST_SAMPLES_8192 (0x2 << 11)
126#define MII_88E6393_MISC_TEST_SAMPLES_16384 (0x3 << 11)
127#define MII_88E6393_MISC_TEST_SAMPLES_MASK (0x3 << 11)
128#define MII_88E6393_MISC_TEST_RATE_2_3MS (0x5 << 8)
129#define MII_88E6393_MISC_TEST_RATE_6_4MS (0x6 << 8)
130#define MII_88E6393_MISC_TEST_RATE_11_9MS (0x7 << 8)
131#define MII_88E6393_MISC_TEST_RATE_MASK (0x7 << 8)
132
133#define MII_88E6390_TEMP_SENSOR 0x1c
134#define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK 0xff00
135#define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT 8
136#define MII_88E6390_TEMP_SENSOR_MASK 0xff
137#define MII_88E6390_TEMP_SENSOR_SAMPLES 10
138
139#define MII_88E1318S_PHY_MSCR1_REG 16
140#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
141
142/* Copper Specific Interrupt Enable Register */
143#define MII_88E1318S_PHY_CSIER 0x12
144/* WOL Event Interrupt Enable */
145#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
146
147#define MII_88E1318S_PHY_LED_FUNC 0x10
148#define MII_88E1318S_PHY_LED_FUNC_OFF (0x8)
149#define MII_88E1318S_PHY_LED_FUNC_ON (0x9)
150#define MII_88E1318S_PHY_LED_FUNC_HI_Z (0xa)
151#define MII_88E1318S_PHY_LED_FUNC_BLINK (0xb)
152#define MII_88E1318S_PHY_LED_TCR 0x12
153#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
154#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
155#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
156
157/* Magic Packet MAC address registers */
158#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
159#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
160#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
161
162#define MII_88E1318S_PHY_WOL_CTRL 0x10
163#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
164#define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE BIT(13)
165#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
166
167#define MII_PHY_LED_CTRL 16
168#define MII_88E1121_PHY_LED_DEF 0x0030
169#define MII_88E1510_PHY_LED_DEF 0x1177
170#define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
171
172#define MII_M1011_PHY_STATUS 0x11
173#define MII_M1011_PHY_STATUS_1000 0x8000
174#define MII_M1011_PHY_STATUS_100 0x4000
175#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
176#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
177#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
178#define MII_M1011_PHY_STATUS_LINK 0x0400
179#define MII_M1011_PHY_STATUS_MDIX BIT(6)
180
181#define MII_88E3016_PHY_SPEC_CTRL 0x10
182#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
183#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
184
185#define MII_88E1510_GEN_CTRL_REG_1 0x14
186#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
187#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */
188#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
189/* RGMII to 1000BASE-X */
190#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2
191/* RGMII to 100BASE-FX */
192#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3
193/* RGMII to SGMII */
194#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4
195#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
196
197#define MII_88E1510_MSCR_2 0x15
198
199#define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
200#define MII_VCT5_TX_RX_MDI1_COUPLING 0x11
201#define MII_VCT5_TX_RX_MDI2_COUPLING 0x12
202#define MII_VCT5_TX_RX_MDI3_COUPLING 0x13
203#define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00
204#define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8
205#define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15)
206
207#define MII_VCT5_CTRL 0x17
208#define MII_VCT5_CTRL_ENABLE BIT(15)
209#define MII_VCT5_CTRL_COMPLETE BIT(14)
210#define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11)
211#define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11)
212#define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11)
213#define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11)
214#define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11)
215#define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8)
216#define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8)
217#define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8)
218#define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8)
219#define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8)
220#define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8)
221#define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8)
222#define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8)
223#define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8)
224#define MII_VCT5_CTRL_SAMPLES_SHIFT 8
225#define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6)
226#define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6)
227#define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6)
228#define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6)
229#define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3
230
231#define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18
232#define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511
233#define MII_VCT5_TX_PULSE_CTRL 0x1c
234#define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12)
235#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10)
236#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10)
237#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10)
238#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10)
239#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10
240#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8)
241#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8)
242#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8)
243#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8)
244#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8
245#define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7)
246#define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0)
247
248/* For TDR measurements less than 11 meters, a short pulse should be
249 * used.
250 */
251#define TDR_SHORT_CABLE_LENGTH 11
252
253#define MII_VCT7_PAIR_0_DISTANCE 0x10
254#define MII_VCT7_PAIR_1_DISTANCE 0x11
255#define MII_VCT7_PAIR_2_DISTANCE 0x12
256#define MII_VCT7_PAIR_3_DISTANCE 0x13
257
258#define MII_VCT7_RESULTS 0x14
259#define MII_VCT7_RESULTS_PAIR3_MASK 0xf000
260#define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00
261#define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0
262#define MII_VCT7_RESULTS_PAIR0_MASK 0x000f
263#define MII_VCT7_RESULTS_PAIR3_SHIFT 12
264#define MII_VCT7_RESULTS_PAIR2_SHIFT 8
265#define MII_VCT7_RESULTS_PAIR1_SHIFT 4
266#define MII_VCT7_RESULTS_PAIR0_SHIFT 0
267#define MII_VCT7_RESULTS_INVALID 0
268#define MII_VCT7_RESULTS_OK 1
269#define MII_VCT7_RESULTS_OPEN 2
270#define MII_VCT7_RESULTS_SAME_SHORT 3
271#define MII_VCT7_RESULTS_CROSS_SHORT 4
272#define MII_VCT7_RESULTS_BUSY 9
273
274#define MII_VCT7_CTRL 0x15
275#define MII_VCT7_CTRL_RUN_NOW BIT(15)
276#define MII_VCT7_CTRL_RUN_ANEG BIT(14)
277#define MII_VCT7_CTRL_DISABLE_CROSS BIT(13)
278#define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12)
279#define MII_VCT7_CTRL_IN_PROGRESS BIT(11)
280#define MII_VCT7_CTRL_METERS BIT(10)
281#define MII_VCT7_CTRL_CENTIMETERS 0
282
283#define MII_VCT_TXPINS 0x1A
284#define MII_VCT_RXPINS 0x1B
285#define MII_VCT_SR 0x1C
286#define MII_VCT_TXPINS_ENVCT BIT(15)
287#define MII_VCT_TXRXPINS_VCTTST GENMASK(14, 13)
288#define MII_VCT_TXRXPINS_VCTTST_SHIFT 13
289#define MII_VCT_TXRXPINS_VCTTST_OK 0
290#define MII_VCT_TXRXPINS_VCTTST_SHORT 1
291#define MII_VCT_TXRXPINS_VCTTST_OPEN 2
292#define MII_VCT_TXRXPINS_VCTTST_FAIL 3
293#define MII_VCT_TXRXPINS_AMPRFLN GENMASK(12, 8)
294#define MII_VCT_TXRXPINS_AMPRFLN_SHIFT 8
295#define MII_VCT_TXRXPINS_DISTRFLN GENMASK(7, 0)
296#define MII_VCT_TXRXPINS_DISTRFLN_MAX 0xff
297
298#define M88E3082_PAIR_A BIT(0)
299#define M88E3082_PAIR_B BIT(1)
300
301#define LPA_PAUSE_FIBER 0x180
302#define LPA_PAUSE_ASYM_FIBER 0x100
303
304#define NB_FIBER_STATS 1
305#define NB_STAT_MAX 3
306
307MODULE_DESCRIPTION("Marvell PHY driver");
308MODULE_AUTHOR("Andy Fleming");
309MODULE_LICENSE("GPL");
310
311struct marvell_hw_stat {
312 const char *string;
313 u8 page;
314 u8 reg;
315 u8 bits;
316};
317
318static const struct marvell_hw_stat marvell_hw_stats[] = {
319 { "phy_receive_errors_copper", 0, 21, 16},
320 { "phy_idle_errors", 0, 10, 8 },
321 { "phy_receive_errors_fiber", 1, 21, 16},
322};
323
324static_assert(ARRAY_SIZE(marvell_hw_stats) <= NB_STAT_MAX);
325
326/* "simple" stat list + corresponding marvell_get_*_simple functions are used
327 * on PHYs without a page register
328 */
329struct marvell_hw_stat_simple {
330 const char *string;
331 u8 reg;
332 u8 bits;
333};
334
335static const struct marvell_hw_stat_simple marvell_hw_stats_simple[] = {
336 { "phy_receive_errors", 21, 16},
337};
338
339static_assert(ARRAY_SIZE(marvell_hw_stats_simple) <= NB_STAT_MAX);
340
341enum {
342 M88E3082_VCT_OFF,
343 M88E3082_VCT_PHASE1,
344 M88E3082_VCT_PHASE2,
345};
346
347struct marvell_priv {
348 u64 stats[NB_STAT_MAX];
349 char *hwmon_name;
350 struct device *hwmon_dev;
351 bool cable_test_tdr;
352 u32 first;
353 u32 last;
354 u32 step;
355 s8 pair;
356 u8 vct_phase;
357};
358
359static int marvell_read_page(struct phy_device *phydev)
360{
361 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
362}
363
364static int marvell_write_page(struct phy_device *phydev, int page)
365{
366 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
367}
368
369static int marvell_set_page(struct phy_device *phydev, int page)
370{
371 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
372}
373
374static int marvell_ack_interrupt(struct phy_device *phydev)
375{
376 int err;
377
378 /* Clear the interrupts by reading the reg */
379 err = phy_read(phydev, MII_M1011_IEVENT);
380
381 if (err < 0)
382 return err;
383
384 return 0;
385}
386
387static int marvell_config_intr(struct phy_device *phydev)
388{
389 int err;
390
391 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
392 err = marvell_ack_interrupt(phydev);
393 if (err)
394 return err;
395
396 err = phy_write(phydev, MII_M1011_IMASK,
397 MII_M1011_IMASK_INIT);
398 } else {
399 err = phy_write(phydev, MII_M1011_IMASK,
400 MII_M1011_IMASK_CLEAR);
401 if (err)
402 return err;
403
404 err = marvell_ack_interrupt(phydev);
405 }
406
407 return err;
408}
409
410static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
411{
412 int irq_status;
413
414 irq_status = phy_read(phydev, MII_M1011_IEVENT);
415 if (irq_status < 0) {
416 phy_error(phydev);
417 return IRQ_NONE;
418 }
419
420 if (!(irq_status & MII_M1011_IMASK_INIT))
421 return IRQ_NONE;
422
423 phy_trigger_machine(phydev);
424
425 return IRQ_HANDLED;
426}
427
428static int marvell_set_polarity(struct phy_device *phydev, int polarity)
429{
430 u16 val;
431
432 switch (polarity) {
433 case ETH_TP_MDI:
434 val = MII_M1011_PHY_SCR_MDI;
435 break;
436 case ETH_TP_MDI_X:
437 val = MII_M1011_PHY_SCR_MDI_X;
438 break;
439 case ETH_TP_MDI_AUTO:
440 case ETH_TP_MDI_INVALID:
441 default:
442 val = MII_M1011_PHY_SCR_AUTO_CROSS;
443 break;
444 }
445
446 return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
447 MII_M1011_PHY_SCR_AUTO_CROSS, val);
448}
449
450static int marvell_config_aneg(struct phy_device *phydev)
451{
452 int changed = 0;
453 int err;
454
455 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
456 if (err < 0)
457 return err;
458
459 changed = err;
460
461 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
462 MII_M1111_PHY_LED_DIRECT);
463 if (err < 0)
464 return err;
465
466 err = genphy_config_aneg(phydev);
467 if (err < 0)
468 return err;
469
470 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
471 /* A write to speed/duplex bits (that is performed by
472 * genphy_config_aneg() call above) must be followed by
473 * a software reset. Otherwise, the write has no effect.
474 */
475 err = genphy_soft_reset(phydev);
476 if (err < 0)
477 return err;
478 }
479
480 return 0;
481}
482
483static int m88e1101_config_aneg(struct phy_device *phydev)
484{
485 int err;
486
487 /* This Marvell PHY has an errata which requires
488 * that certain registers get written in order
489 * to restart autonegotiation
490 */
491 err = genphy_soft_reset(phydev);
492 if (err < 0)
493 return err;
494
495 err = phy_write(phydev, 0x1d, 0x1f);
496 if (err < 0)
497 return err;
498
499 err = phy_write(phydev, 0x1e, 0x200c);
500 if (err < 0)
501 return err;
502
503 err = phy_write(phydev, 0x1d, 0x5);
504 if (err < 0)
505 return err;
506
507 err = phy_write(phydev, 0x1e, 0);
508 if (err < 0)
509 return err;
510
511 err = phy_write(phydev, 0x1e, 0x100);
512 if (err < 0)
513 return err;
514
515 return marvell_config_aneg(phydev);
516}
517
518#if IS_ENABLED(CONFIG_OF_MDIO)
519/* Set and/or override some configuration registers based on the
520 * marvell,reg-init property stored in the of_node for the phydev.
521 *
522 * marvell,reg-init = <reg-page reg mask value>,...;
523 *
524 * There may be one or more sets of <reg-page reg mask value>:
525 *
526 * reg-page: which register bank to use.
527 * reg: the register.
528 * mask: if non-zero, ANDed with existing register value.
529 * value: ORed with the masked value and written to the regiser.
530 *
531 */
532static int marvell_of_reg_init(struct phy_device *phydev)
533{
534 const __be32 *paddr;
535 int len, i, saved_page, current_page, ret = 0;
536
537 if (!phydev->mdio.dev.of_node)
538 return 0;
539
540 paddr = of_get_property(phydev->mdio.dev.of_node,
541 "marvell,reg-init", &len);
542 if (!paddr || len < (4 * sizeof(*paddr)))
543 return 0;
544
545 saved_page = phy_save_page(phydev);
546 if (saved_page < 0)
547 goto err;
548 current_page = saved_page;
549
550 len /= sizeof(*paddr);
551 for (i = 0; i < len - 3; i += 4) {
552 u16 page = be32_to_cpup(paddr + i);
553 u16 reg = be32_to_cpup(paddr + i + 1);
554 u16 mask = be32_to_cpup(paddr + i + 2);
555 u16 val_bits = be32_to_cpup(paddr + i + 3);
556 int val;
557
558 if (page != current_page) {
559 current_page = page;
560 ret = marvell_write_page(phydev, page);
561 if (ret < 0)
562 goto err;
563 }
564
565 val = 0;
566 if (mask) {
567 val = __phy_read(phydev, reg);
568 if (val < 0) {
569 ret = val;
570 goto err;
571 }
572 val &= mask;
573 }
574 val |= val_bits;
575
576 ret = __phy_write(phydev, reg, val);
577 if (ret < 0)
578 goto err;
579 }
580err:
581 return phy_restore_page(phydev, saved_page, ret);
582}
583#else
584static int marvell_of_reg_init(struct phy_device *phydev)
585{
586 return 0;
587}
588#endif /* CONFIG_OF_MDIO */
589
590static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
591{
592 int mscr;
593
594 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
595 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
596 MII_88E1121_PHY_MSCR_TX_DELAY;
597 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
598 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
599 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
600 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
601 else
602 mscr = 0;
603
604 return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE,
605 MII_88E1121_PHY_MSCR_REG,
606 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
607}
608
609static int m88e1121_config_aneg(struct phy_device *phydev)
610{
611 int changed = 0;
612 int err = 0;
613
614 if (phy_interface_is_rgmii(phydev)) {
615 err = m88e1121_config_aneg_rgmii_delays(phydev);
616 if (err < 0)
617 return err;
618 }
619
620 changed = err;
621
622 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
623 if (err < 0)
624 return err;
625
626 changed |= err;
627
628 err = genphy_config_aneg(phydev);
629 if (err < 0)
630 return err;
631
632 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
633 /* A software reset is used to ensure a "commit" of the
634 * changes is done.
635 */
636 err = genphy_soft_reset(phydev);
637 if (err < 0)
638 return err;
639 }
640
641 return 0;
642}
643
644static int m88e1318_config_aneg(struct phy_device *phydev)
645{
646 int err;
647
648 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
649 MII_88E1318S_PHY_MSCR1_REG,
650 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
651 if (err < 0)
652 return err;
653
654 return m88e1121_config_aneg(phydev);
655}
656
657/**
658 * linkmode_adv_to_fiber_adv_t
659 * @advertise: the linkmode advertisement settings
660 *
661 * A small helper function that translates linkmode advertisement
662 * settings to phy autonegotiation advertisements for the MII_ADV
663 * register for fiber link.
664 */
665static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
666{
667 u32 result = 0;
668
669 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
670 result |= ADVERTISE_1000XHALF;
671 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
672 result |= ADVERTISE_1000XFULL;
673
674 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
675 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
676 result |= ADVERTISE_1000XPSE_ASYM;
677 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
678 result |= ADVERTISE_1000XPAUSE;
679
680 return result;
681}
682
683/**
684 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
685 * @phydev: target phy_device struct
686 *
687 * Description: If auto-negotiation is enabled, we configure the
688 * advertising, and then restart auto-negotiation. If it is not
689 * enabled, then we write the BMCR. Adapted for fiber link in
690 * some Marvell's devices.
691 */
692static int marvell_config_aneg_fiber(struct phy_device *phydev)
693{
694 int changed = 0;
695 int err;
696 u16 adv;
697
698 if (phydev->autoneg != AUTONEG_ENABLE)
699 return genphy_setup_forced(phydev);
700
701 /* Only allow advertising what this PHY supports */
702 linkmode_and(phydev->advertising, phydev->advertising,
703 phydev->supported);
704
705 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
706
707 /* Setup fiber advertisement */
708 err = phy_modify_changed(phydev, MII_ADVERTISE,
709 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
710 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
711 adv);
712 if (err < 0)
713 return err;
714 if (err > 0)
715 changed = 1;
716
717 return genphy_check_and_restart_aneg(phydev, changed);
718}
719
720static int m88e1111_config_aneg(struct phy_device *phydev)
721{
722 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
723 int err;
724
725 if (extsr < 0)
726 return extsr;
727
728 /* If not using SGMII or copper 1000BaseX modes, use normal process.
729 * Steps below are only required for these modes.
730 */
731 if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
732 (extsr & MII_M1111_HWCFG_MODE_MASK) !=
733 MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
734 return marvell_config_aneg(phydev);
735
736 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
737 if (err < 0)
738 goto error;
739
740 /* Configure the copper link first */
741 err = marvell_config_aneg(phydev);
742 if (err < 0)
743 goto error;
744
745 /* Then the fiber link */
746 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
747 if (err < 0)
748 goto error;
749
750 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
751 /* Do not touch the fiber advertisement if we're in copper->sgmii mode.
752 * Just ensure that SGMII-side autonegotiation is enabled.
753 * If we switched from some other mode to SGMII it may not be.
754 */
755 err = genphy_check_and_restart_aneg(phydev, false);
756 else
757 err = marvell_config_aneg_fiber(phydev);
758 if (err < 0)
759 goto error;
760
761 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
762
763error:
764 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
765 return err;
766}
767
768static int m88e1510_config_aneg(struct phy_device *phydev)
769{
770 int err;
771
772 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
773 if (err < 0)
774 goto error;
775
776 /* Configure the copper link first */
777 err = m88e1318_config_aneg(phydev);
778 if (err < 0)
779 goto error;
780
781 /* Do not touch the fiber page if we're in copper->sgmii mode */
782 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
783 return 0;
784
785 /* Then the fiber link */
786 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
787 if (err < 0)
788 goto error;
789
790 err = marvell_config_aneg_fiber(phydev);
791 if (err < 0)
792 goto error;
793
794 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
795
796error:
797 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
798 return err;
799}
800
801static void marvell_config_led(struct phy_device *phydev)
802{
803 u16 def_config;
804 int err;
805
806 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
807 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
808 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
809 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
810 def_config = MII_88E1121_PHY_LED_DEF;
811 break;
812 /* Default PHY LED config:
813 * LED[0] .. 1000Mbps Link
814 * LED[1] .. 100Mbps Link
815 * LED[2] .. Blink, Activity
816 */
817 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
818 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
819 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
820 else
821 def_config = MII_88E1510_PHY_LED_DEF;
822 break;
823 default:
824 return;
825 }
826
827 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
828 def_config);
829 if (err < 0)
830 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
831}
832
833static int marvell_config_init(struct phy_device *phydev)
834{
835 /* Set default LED */
836 marvell_config_led(phydev);
837
838 /* Set registers from marvell,reg-init DT property */
839 return marvell_of_reg_init(phydev);
840}
841
842static int m88e3016_config_init(struct phy_device *phydev)
843{
844 int ret;
845
846 /* Enable Scrambler and Auto-Crossover */
847 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
848 MII_88E3016_DISABLE_SCRAMBLER,
849 MII_88E3016_AUTO_MDIX_CROSSOVER);
850 if (ret < 0)
851 return ret;
852
853 return marvell_config_init(phydev);
854}
855
856static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
857 u16 mode,
858 int fibre_copper_auto)
859{
860 if (fibre_copper_auto)
861 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
862
863 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
864 MII_M1111_HWCFG_MODE_MASK |
865 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
866 MII_M1111_HWCFG_FIBER_COPPER_RES,
867 mode);
868}
869
870static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
871{
872 int delay;
873
874 switch (phydev->interface) {
875 case PHY_INTERFACE_MODE_RGMII_ID:
876 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
877 break;
878 case PHY_INTERFACE_MODE_RGMII_RXID:
879 delay = MII_M1111_RGMII_RX_DELAY;
880 break;
881 case PHY_INTERFACE_MODE_RGMII_TXID:
882 delay = MII_M1111_RGMII_TX_DELAY;
883 break;
884 default:
885 delay = 0;
886 break;
887 }
888
889 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
890 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
891 delay);
892}
893
894static int m88e1111_config_init_rgmii(struct phy_device *phydev)
895{
896 int temp;
897 int err;
898
899 err = m88e1111_config_init_rgmii_delays(phydev);
900 if (err < 0)
901 return err;
902
903 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
904 if (temp < 0)
905 return temp;
906
907 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
908
909 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
910 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
911 else
912 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
913
914 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
915}
916
917static int m88e1111_config_init_sgmii(struct phy_device *phydev)
918{
919 int err;
920
921 err = m88e1111_config_init_hwcfg_mode(
922 phydev,
923 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
924 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
925 if (err < 0)
926 return err;
927
928 /* make sure copper is selected */
929 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
930}
931
932static int m88e1111_config_init_rtbi(struct phy_device *phydev)
933{
934 int err;
935
936 err = m88e1111_config_init_rgmii_delays(phydev);
937 if (err < 0)
938 return err;
939
940 err = m88e1111_config_init_hwcfg_mode(
941 phydev,
942 MII_M1111_HWCFG_MODE_RTBI,
943 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
944 if (err < 0)
945 return err;
946
947 /* soft reset */
948 err = genphy_soft_reset(phydev);
949 if (err < 0)
950 return err;
951
952 return m88e1111_config_init_hwcfg_mode(
953 phydev,
954 MII_M1111_HWCFG_MODE_RTBI,
955 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
956}
957
958static int m88e1111_config_init_1000basex(struct phy_device *phydev)
959{
960 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
961 int err, mode;
962
963 if (extsr < 0)
964 return extsr;
965
966 /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled.
967 * FIXME: this does not actually enable 1000BaseX auto-negotiation if
968 * it was previously disabled in the Fiber BMCR!
969 */
970 mode = extsr & MII_M1111_HWCFG_MODE_MASK;
971 if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
972 err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
973 MII_M1111_HWCFG_MODE_MASK |
974 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
975 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
976 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
977 if (err < 0)
978 return err;
979 }
980 return 0;
981}
982
983static int m88e1111_config_init(struct phy_device *phydev)
984{
985 int err;
986
987 if (phy_interface_is_rgmii(phydev)) {
988 err = m88e1111_config_init_rgmii(phydev);
989 if (err < 0)
990 return err;
991 }
992
993 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
994 err = m88e1111_config_init_sgmii(phydev);
995 if (err < 0)
996 return err;
997 }
998
999 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
1000 err = m88e1111_config_init_rtbi(phydev);
1001 if (err < 0)
1002 return err;
1003 }
1004
1005 if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
1006 err = m88e1111_config_init_1000basex(phydev);
1007 if (err < 0)
1008 return err;
1009 }
1010
1011 err = marvell_of_reg_init(phydev);
1012 if (err < 0)
1013 return err;
1014
1015 err = genphy_soft_reset(phydev);
1016 if (err < 0)
1017 return err;
1018
1019 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1020 /* If the HWCFG_MODE was changed from another mode (such as
1021 * 1000BaseX) to SGMII, the state of the support bits may have
1022 * also changed now that the PHY has been reset.
1023 * Update the PHY abilities accordingly.
1024 */
1025 err = genphy_read_abilities(phydev);
1026 linkmode_or(phydev->advertising, phydev->advertising,
1027 phydev->supported);
1028 }
1029 return err;
1030}
1031
1032static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
1033{
1034 int val, cnt, enable;
1035
1036 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
1037 if (val < 0)
1038 return val;
1039
1040 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
1041 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
1042
1043 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1044
1045 return 0;
1046}
1047
1048static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
1049{
1050 int val, err;
1051
1052 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
1053 return -E2BIG;
1054
1055 if (!cnt) {
1056 err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
1057 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
1058 } else {
1059 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
1060 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
1061
1062 err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
1063 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
1064 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
1065 val);
1066 }
1067
1068 if (err < 0)
1069 return err;
1070
1071 return genphy_soft_reset(phydev);
1072}
1073
1074static int m88e1111_get_tunable(struct phy_device *phydev,
1075 struct ethtool_tunable *tuna, void *data)
1076{
1077 switch (tuna->id) {
1078 case ETHTOOL_PHY_DOWNSHIFT:
1079 return m88e1111_get_downshift(phydev, data);
1080 default:
1081 return -EOPNOTSUPP;
1082 }
1083}
1084
1085static int m88e1111_set_tunable(struct phy_device *phydev,
1086 struct ethtool_tunable *tuna, const void *data)
1087{
1088 switch (tuna->id) {
1089 case ETHTOOL_PHY_DOWNSHIFT:
1090 return m88e1111_set_downshift(phydev, *(const u8 *)data);
1091 default:
1092 return -EOPNOTSUPP;
1093 }
1094}
1095
1096static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1097{
1098 int val, cnt, enable;
1099
1100 val = phy_read(phydev, MII_M1011_PHY_SCR);
1101 if (val < 0)
1102 return val;
1103
1104 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1105 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1106
1107 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1108
1109 return 0;
1110}
1111
1112static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1113{
1114 int val, err;
1115
1116 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1117 return -E2BIG;
1118
1119 if (!cnt) {
1120 err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1121 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1122 } else {
1123 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1124 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1125
1126 err = phy_modify(phydev, MII_M1011_PHY_SCR,
1127 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1128 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1129 val);
1130 }
1131
1132 if (err < 0)
1133 return err;
1134
1135 return genphy_soft_reset(phydev);
1136}
1137
1138static int m88e1011_get_tunable(struct phy_device *phydev,
1139 struct ethtool_tunable *tuna, void *data)
1140{
1141 switch (tuna->id) {
1142 case ETHTOOL_PHY_DOWNSHIFT:
1143 return m88e1011_get_downshift(phydev, data);
1144 default:
1145 return -EOPNOTSUPP;
1146 }
1147}
1148
1149static int m88e1011_set_tunable(struct phy_device *phydev,
1150 struct ethtool_tunable *tuna, const void *data)
1151{
1152 switch (tuna->id) {
1153 case ETHTOOL_PHY_DOWNSHIFT:
1154 return m88e1011_set_downshift(phydev, *(const u8 *)data);
1155 default:
1156 return -EOPNOTSUPP;
1157 }
1158}
1159
1160static int m88e1112_config_init(struct phy_device *phydev)
1161{
1162 int err;
1163
1164 err = m88e1011_set_downshift(phydev, 3);
1165 if (err < 0)
1166 return err;
1167
1168 return m88e1111_config_init(phydev);
1169}
1170
1171static int m88e1111gbe_config_init(struct phy_device *phydev)
1172{
1173 int err;
1174
1175 err = m88e1111_set_downshift(phydev, 3);
1176 if (err < 0)
1177 return err;
1178
1179 return m88e1111_config_init(phydev);
1180}
1181
1182static int marvell_1011gbe_config_init(struct phy_device *phydev)
1183{
1184 int err;
1185
1186 err = m88e1011_set_downshift(phydev, 3);
1187 if (err < 0)
1188 return err;
1189
1190 return marvell_config_init(phydev);
1191}
1192static int m88e1116r_config_init(struct phy_device *phydev)
1193{
1194 int err;
1195
1196 err = genphy_soft_reset(phydev);
1197 if (err < 0)
1198 return err;
1199
1200 msleep(500);
1201
1202 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1203 if (err < 0)
1204 return err;
1205
1206 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1207 if (err < 0)
1208 return err;
1209
1210 err = m88e1011_set_downshift(phydev, 8);
1211 if (err < 0)
1212 return err;
1213
1214 if (phy_interface_is_rgmii(phydev)) {
1215 err = m88e1121_config_aneg_rgmii_delays(phydev);
1216 if (err < 0)
1217 return err;
1218 }
1219
1220 err = genphy_soft_reset(phydev);
1221 if (err < 0)
1222 return err;
1223
1224 return marvell_config_init(phydev);
1225}
1226
1227static int m88e1318_config_init(struct phy_device *phydev)
1228{
1229 if (phy_interrupt_is_valid(phydev)) {
1230 int err = phy_modify_paged(
1231 phydev, MII_MARVELL_LED_PAGE,
1232 MII_88E1318S_PHY_LED_TCR,
1233 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1234 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1235 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1236 if (err < 0)
1237 return err;
1238 }
1239
1240 return marvell_config_init(phydev);
1241}
1242
1243static int m88e1510_config_init(struct phy_device *phydev)
1244{
1245 static const struct {
1246 u16 reg17, reg16;
1247 } errata_vals[] = {
1248 { 0x214b, 0x2144 },
1249 { 0x0c28, 0x2146 },
1250 { 0xb233, 0x214d },
1251 { 0xcc0c, 0x2159 },
1252 };
1253 int err;
1254 int i;
1255
1256 /* As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/
1257 * 88E1514 Rev A0, Errata Section 5.1:
1258 * If EEE is intended to be used, the following register writes
1259 * must be done once after every hardware reset.
1260 */
1261 err = marvell_set_page(phydev, 0x00FF);
1262 if (err < 0)
1263 return err;
1264
1265 for (i = 0; i < ARRAY_SIZE(errata_vals); ++i) {
1266 err = phy_write(phydev, 17, errata_vals[i].reg17);
1267 if (err)
1268 return err;
1269 err = phy_write(phydev, 16, errata_vals[i].reg16);
1270 if (err)
1271 return err;
1272 }
1273
1274 err = marvell_set_page(phydev, 0x00FB);
1275 if (err < 0)
1276 return err;
1277 err = phy_write(phydev, 07, 0xC00D);
1278 if (err < 0)
1279 return err;
1280 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1281 if (err < 0)
1282 return err;
1283
1284 /* SGMII-to-Copper mode initialization */
1285 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1286 /* Select page 18 */
1287 err = marvell_set_page(phydev, 18);
1288 if (err < 0)
1289 return err;
1290
1291 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1292 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1293 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1294 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1295 if (err < 0)
1296 return err;
1297
1298 /* PHY reset is necessary after changing MODE[2:0] */
1299 err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1300 MII_88E1510_GEN_CTRL_REG_1_RESET);
1301 if (err < 0)
1302 return err;
1303
1304 /* Reset page selection */
1305 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1306 if (err < 0)
1307 return err;
1308 }
1309 err = m88e1011_set_downshift(phydev, 3);
1310 if (err < 0)
1311 return err;
1312
1313 return m88e1318_config_init(phydev);
1314}
1315
1316static int m88e1118_config_aneg(struct phy_device *phydev)
1317{
1318 int err;
1319
1320 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1321 if (err < 0)
1322 return err;
1323
1324 err = genphy_config_aneg(phydev);
1325 if (err < 0)
1326 return err;
1327
1328 return genphy_soft_reset(phydev);
1329}
1330
1331static int m88e1118_config_init(struct phy_device *phydev)
1332{
1333 u16 leds;
1334 int err;
1335
1336 /* Enable 1000 Mbit */
1337 err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE,
1338 MII_88E1121_PHY_MSCR_REG, 0x1070);
1339 if (err < 0)
1340 return err;
1341
1342 if (phy_interface_is_rgmii(phydev)) {
1343 err = m88e1121_config_aneg_rgmii_delays(phydev);
1344 if (err < 0)
1345 return err;
1346 }
1347
1348 /* Adjust LED Control */
1349 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1350 leds = 0x1100;
1351 else
1352 leds = 0x021e;
1353
1354 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds);
1355 if (err < 0)
1356 return err;
1357
1358 err = marvell_of_reg_init(phydev);
1359 if (err < 0)
1360 return err;
1361
1362 /* Reset page register */
1363 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1364 if (err < 0)
1365 return err;
1366
1367 return genphy_soft_reset(phydev);
1368}
1369
1370static int m88e1149_config_init(struct phy_device *phydev)
1371{
1372 int err;
1373
1374 /* Change address */
1375 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1376 if (err < 0)
1377 return err;
1378
1379 /* Enable 1000 Mbit */
1380 err = phy_write(phydev, 0x15, 0x1048);
1381 if (err < 0)
1382 return err;
1383
1384 err = marvell_of_reg_init(phydev);
1385 if (err < 0)
1386 return err;
1387
1388 /* Reset address */
1389 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1390 if (err < 0)
1391 return err;
1392
1393 return genphy_soft_reset(phydev);
1394}
1395
1396static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1397{
1398 int err;
1399
1400 err = m88e1111_config_init_rgmii_delays(phydev);
1401 if (err < 0)
1402 return err;
1403
1404 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1405 err = phy_write(phydev, 0x1d, 0x0012);
1406 if (err < 0)
1407 return err;
1408
1409 err = phy_modify(phydev, 0x1e, 0x0fc0,
1410 2 << 9 | /* 36 ohm */
1411 2 << 6); /* 39 ohm */
1412 if (err < 0)
1413 return err;
1414
1415 err = phy_write(phydev, 0x1d, 0x3);
1416 if (err < 0)
1417 return err;
1418
1419 err = phy_write(phydev, 0x1e, 0x8000);
1420 }
1421 return err;
1422}
1423
1424static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1425{
1426 return m88e1111_config_init_hwcfg_mode(
1427 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1428 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1429}
1430
1431static int m88e1145_config_init(struct phy_device *phydev)
1432{
1433 int err;
1434
1435 /* Take care of errata E0 & E1 */
1436 err = phy_write(phydev, 0x1d, 0x001b);
1437 if (err < 0)
1438 return err;
1439
1440 err = phy_write(phydev, 0x1e, 0x418f);
1441 if (err < 0)
1442 return err;
1443
1444 err = phy_write(phydev, 0x1d, 0x0016);
1445 if (err < 0)
1446 return err;
1447
1448 err = phy_write(phydev, 0x1e, 0xa2da);
1449 if (err < 0)
1450 return err;
1451
1452 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1453 err = m88e1145_config_init_rgmii(phydev);
1454 if (err < 0)
1455 return err;
1456 }
1457
1458 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1459 err = m88e1145_config_init_sgmii(phydev);
1460 if (err < 0)
1461 return err;
1462 }
1463 err = m88e1111_set_downshift(phydev, 3);
1464 if (err < 0)
1465 return err;
1466
1467 err = marvell_of_reg_init(phydev);
1468 if (err < 0)
1469 return err;
1470
1471 return 0;
1472}
1473
1474static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1475{
1476 int val;
1477
1478 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1479 if (val < 0)
1480 return val;
1481
1482 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1483 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1484 return 0;
1485 }
1486
1487 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1488
1489 switch (val) {
1490 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1491 *msecs = 0;
1492 break;
1493 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1494 *msecs = 10;
1495 break;
1496 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1497 *msecs = 20;
1498 break;
1499 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1500 *msecs = 40;
1501 break;
1502 default:
1503 return -EINVAL;
1504 }
1505
1506 return 0;
1507}
1508
1509static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1510{
1511 struct ethtool_keee eee;
1512 int val, ret;
1513
1514 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1515 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1516 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1517
1518 /* According to the Marvell data sheet EEE must be disabled for
1519 * Fast Link Down detection to work properly
1520 */
1521 ret = genphy_c45_ethtool_get_eee(phydev, &eee);
1522 if (!ret && eee.eee_enabled) {
1523 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1524 return -EBUSY;
1525 }
1526
1527 if (*msecs <= 5)
1528 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1529 else if (*msecs <= 15)
1530 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1531 else if (*msecs <= 30)
1532 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1533 else
1534 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1535
1536 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1537
1538 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1539 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1540 if (ret)
1541 return ret;
1542
1543 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1544 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1545}
1546
1547static int m88e1540_get_tunable(struct phy_device *phydev,
1548 struct ethtool_tunable *tuna, void *data)
1549{
1550 switch (tuna->id) {
1551 case ETHTOOL_PHY_FAST_LINK_DOWN:
1552 return m88e1540_get_fld(phydev, data);
1553 case ETHTOOL_PHY_DOWNSHIFT:
1554 return m88e1011_get_downshift(phydev, data);
1555 default:
1556 return -EOPNOTSUPP;
1557 }
1558}
1559
1560static int m88e1540_set_tunable(struct phy_device *phydev,
1561 struct ethtool_tunable *tuna, const void *data)
1562{
1563 switch (tuna->id) {
1564 case ETHTOOL_PHY_FAST_LINK_DOWN:
1565 return m88e1540_set_fld(phydev, data);
1566 case ETHTOOL_PHY_DOWNSHIFT:
1567 return m88e1011_set_downshift(phydev, *(const u8 *)data);
1568 default:
1569 return -EOPNOTSUPP;
1570 }
1571}
1572
1573/* The VOD can be out of specification on link up. Poke an
1574 * undocumented register, in an undocumented page, with a magic value
1575 * to fix this.
1576 */
1577static int m88e6390_errata(struct phy_device *phydev)
1578{
1579 int err;
1580
1581 err = phy_write(phydev, MII_BMCR,
1582 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1583 if (err)
1584 return err;
1585
1586 usleep_range(300, 400);
1587
1588 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1589 if (err)
1590 return err;
1591
1592 return genphy_soft_reset(phydev);
1593}
1594
1595static int m88e6390_config_aneg(struct phy_device *phydev)
1596{
1597 int err;
1598
1599 err = m88e6390_errata(phydev);
1600 if (err)
1601 return err;
1602
1603 return m88e1510_config_aneg(phydev);
1604}
1605
1606/**
1607 * fiber_lpa_mod_linkmode_lpa_t
1608 * @advertising: the linkmode advertisement settings
1609 * @lpa: value of the MII_LPA register for fiber link
1610 *
1611 * A small helper function that translates MII_LPA bits to linkmode LP
1612 * advertisement settings. Other bits in advertising are left
1613 * unchanged.
1614 */
1615static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1616{
1617 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1618 advertising, lpa & LPA_1000XHALF);
1619
1620 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1621 advertising, lpa & LPA_1000XFULL);
1622}
1623
1624static int marvell_read_status_page_an(struct phy_device *phydev,
1625 int fiber, int status)
1626{
1627 int lpa;
1628 int err;
1629
1630 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1631 phydev->link = 0;
1632 return 0;
1633 }
1634
1635 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1636 phydev->duplex = DUPLEX_FULL;
1637 else
1638 phydev->duplex = DUPLEX_HALF;
1639
1640 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1641 case MII_M1011_PHY_STATUS_1000:
1642 phydev->speed = SPEED_1000;
1643 break;
1644
1645 case MII_M1011_PHY_STATUS_100:
1646 phydev->speed = SPEED_100;
1647 break;
1648
1649 default:
1650 phydev->speed = SPEED_10;
1651 break;
1652 }
1653
1654 if (!fiber) {
1655 err = genphy_read_lpa(phydev);
1656 if (err < 0)
1657 return err;
1658
1659 phy_resolve_aneg_pause(phydev);
1660 } else {
1661 lpa = phy_read(phydev, MII_LPA);
1662 if (lpa < 0)
1663 return lpa;
1664
1665 /* The fiber link is only 1000M capable */
1666 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1667
1668 if (phydev->duplex == DUPLEX_FULL) {
1669 if (!(lpa & LPA_PAUSE_FIBER)) {
1670 phydev->pause = 0;
1671 phydev->asym_pause = 0;
1672 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1673 phydev->pause = 1;
1674 phydev->asym_pause = 1;
1675 } else {
1676 phydev->pause = 1;
1677 phydev->asym_pause = 0;
1678 }
1679 }
1680 }
1681
1682 return 0;
1683}
1684
1685/* marvell_read_status_page
1686 *
1687 * Description:
1688 * Check the link, then figure out the current state
1689 * by comparing what we advertise with what the link partner
1690 * advertises. Start by checking the gigabit possibilities,
1691 * then move on to 10/100.
1692 */
1693static int marvell_read_status_page(struct phy_device *phydev, int page)
1694{
1695 int status;
1696 int fiber;
1697 int err;
1698
1699 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1700 if (status < 0)
1701 return status;
1702
1703 /* Use the generic register for copper link status,
1704 * and the PHY status register for fiber link status.
1705 */
1706 if (page == MII_MARVELL_FIBER_PAGE) {
1707 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1708 } else {
1709 err = genphy_update_link(phydev);
1710 if (err)
1711 return err;
1712 }
1713
1714 if (page == MII_MARVELL_FIBER_PAGE)
1715 fiber = 1;
1716 else
1717 fiber = 0;
1718
1719 linkmode_zero(phydev->lp_advertising);
1720 phydev->pause = 0;
1721 phydev->asym_pause = 0;
1722 phydev->speed = SPEED_UNKNOWN;
1723 phydev->duplex = DUPLEX_UNKNOWN;
1724 phydev->port = fiber ? PORT_FIBRE : PORT_TP;
1725
1726 if (fiber) {
1727 phydev->mdix = ETH_TP_MDI_INVALID;
1728 } else {
1729 /* The MDI-X state is set regardless of Autoneg being enabled
1730 * and reflects forced MDI-X state as well as auto resolution
1731 */
1732 if (status & MII_M1011_PHY_STATUS_RESOLVED)
1733 phydev->mdix = status & MII_M1011_PHY_STATUS_MDIX ?
1734 ETH_TP_MDI_X : ETH_TP_MDI;
1735 else
1736 phydev->mdix = ETH_TP_MDI_INVALID;
1737 }
1738
1739 if (phydev->autoneg == AUTONEG_ENABLE)
1740 err = marvell_read_status_page_an(phydev, fiber, status);
1741 else
1742 err = genphy_read_status_fixed(phydev);
1743
1744 return err;
1745}
1746
1747/* marvell_read_status
1748 *
1749 * Some Marvell's phys have two modes: fiber and copper.
1750 * Both need status checked.
1751 * Description:
1752 * First, check the fiber link and status.
1753 * If the fiber link is down, check the copper link and status which
1754 * will be the default value if both link are down.
1755 */
1756static int marvell_read_status(struct phy_device *phydev)
1757{
1758 int err;
1759
1760 /* Check the fiber mode first */
1761 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1762 phydev->supported) &&
1763 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1764 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1765 if (err < 0)
1766 goto error;
1767
1768 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1769 if (err < 0)
1770 goto error;
1771
1772 /* If the fiber link is up, it is the selected and
1773 * used link. In this case, we need to stay in the
1774 * fiber page. Please to be careful about that, avoid
1775 * to restore Copper page in other functions which
1776 * could break the behaviour for some fiber phy like
1777 * 88E1512.
1778 */
1779 if (phydev->link)
1780 return 0;
1781
1782 /* If fiber link is down, check and save copper mode state */
1783 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1784 if (err < 0)
1785 goto error;
1786 }
1787
1788 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1789
1790error:
1791 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1792 return err;
1793}
1794
1795/* marvell_suspend
1796 *
1797 * Some Marvell's phys have two modes: fiber and copper.
1798 * Both need to be suspended
1799 */
1800static int marvell_suspend(struct phy_device *phydev)
1801{
1802 int err;
1803
1804 /* Suspend the fiber mode first */
1805 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1806 phydev->supported)) {
1807 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1808 if (err < 0)
1809 goto error;
1810
1811 /* With the page set, use the generic suspend */
1812 err = genphy_suspend(phydev);
1813 if (err < 0)
1814 goto error;
1815
1816 /* Then, the copper link */
1817 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1818 if (err < 0)
1819 goto error;
1820 }
1821
1822 /* With the page set, use the generic suspend */
1823 return genphy_suspend(phydev);
1824
1825error:
1826 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1827 return err;
1828}
1829
1830/* marvell_resume
1831 *
1832 * Some Marvell's phys have two modes: fiber and copper.
1833 * Both need to be resumed
1834 */
1835static int marvell_resume(struct phy_device *phydev)
1836{
1837 int err;
1838
1839 /* Resume the fiber mode first */
1840 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1841 phydev->supported)) {
1842 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1843 if (err < 0)
1844 goto error;
1845
1846 /* With the page set, use the generic resume */
1847 err = genphy_resume(phydev);
1848 if (err < 0)
1849 goto error;
1850
1851 /* Then, the copper link */
1852 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1853 if (err < 0)
1854 goto error;
1855 }
1856
1857 /* With the page set, use the generic resume */
1858 return genphy_resume(phydev);
1859
1860error:
1861 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1862 return err;
1863}
1864
1865static int marvell_aneg_done(struct phy_device *phydev)
1866{
1867 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1868
1869 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1870}
1871
1872static void m88e1318_get_wol(struct phy_device *phydev,
1873 struct ethtool_wolinfo *wol)
1874{
1875 int ret;
1876
1877 wol->supported = WAKE_MAGIC | WAKE_PHY;
1878 wol->wolopts = 0;
1879
1880 ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1881 MII_88E1318S_PHY_WOL_CTRL);
1882 if (ret < 0)
1883 return;
1884
1885 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1886 wol->wolopts |= WAKE_MAGIC;
1887
1888 if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE)
1889 wol->wolopts |= WAKE_PHY;
1890}
1891
1892static int m88e1318_set_wol(struct phy_device *phydev,
1893 struct ethtool_wolinfo *wol)
1894{
1895 int err = 0, oldpage;
1896
1897 oldpage = phy_save_page(phydev);
1898 if (oldpage < 0)
1899 goto error;
1900
1901 if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) {
1902 /* Explicitly switch to page 0x00, just to be sure */
1903 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1904 if (err < 0)
1905 goto error;
1906
1907 /* If WOL event happened once, the LED[2] interrupt pin
1908 * will not be cleared unless we reading the interrupt status
1909 * register. If interrupts are in use, the normal interrupt
1910 * handling will clear the WOL event. Clear the WOL event
1911 * before enabling it if !phy_interrupt_is_valid()
1912 */
1913 if (!phy_interrupt_is_valid(phydev))
1914 __phy_read(phydev, MII_M1011_IEVENT);
1915
1916 /* Enable the WOL interrupt */
1917 err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1918 MII_88E1318S_PHY_CSIER_WOL_EIE);
1919 if (err < 0)
1920 goto error;
1921
1922 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1923 if (err < 0)
1924 goto error;
1925
1926 /* Setup LED[2] as interrupt pin (active low) */
1927 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1928 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1929 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1930 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1931 if (err < 0)
1932 goto error;
1933 }
1934
1935 if (wol->wolopts & WAKE_MAGIC) {
1936 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1937 if (err < 0)
1938 goto error;
1939
1940 /* Store the device address for the magic packet */
1941 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1942 ((phydev->attached_dev->dev_addr[5] << 8) |
1943 phydev->attached_dev->dev_addr[4]));
1944 if (err < 0)
1945 goto error;
1946 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1947 ((phydev->attached_dev->dev_addr[3] << 8) |
1948 phydev->attached_dev->dev_addr[2]));
1949 if (err < 0)
1950 goto error;
1951 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1952 ((phydev->attached_dev->dev_addr[1] << 8) |
1953 phydev->attached_dev->dev_addr[0]));
1954 if (err < 0)
1955 goto error;
1956
1957 /* Clear WOL status and enable magic packet matching */
1958 err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1959 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1960 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1961 if (err < 0)
1962 goto error;
1963 } else {
1964 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1965 if (err < 0)
1966 goto error;
1967
1968 /* Clear WOL status and disable magic packet matching */
1969 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1970 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1971 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1972 if (err < 0)
1973 goto error;
1974 }
1975
1976 if (wol->wolopts & WAKE_PHY) {
1977 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1978 if (err < 0)
1979 goto error;
1980
1981 /* Clear WOL status and enable link up event */
1982 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1983 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1984 MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE);
1985 if (err < 0)
1986 goto error;
1987 } else {
1988 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1989 if (err < 0)
1990 goto error;
1991
1992 /* Clear WOL status and disable link up event */
1993 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1994 MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE,
1995 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1996 if (err < 0)
1997 goto error;
1998 }
1999
2000error:
2001 return phy_restore_page(phydev, oldpage, err);
2002}
2003
2004static int marvell_get_sset_count(struct phy_device *phydev)
2005{
2006 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
2007 phydev->supported))
2008 return ARRAY_SIZE(marvell_hw_stats);
2009 else
2010 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
2011}
2012
2013static int marvell_get_sset_count_simple(struct phy_device *phydev)
2014{
2015 return ARRAY_SIZE(marvell_hw_stats_simple);
2016}
2017
2018static void marvell_get_strings(struct phy_device *phydev, u8 *data)
2019{
2020 int count = marvell_get_sset_count(phydev);
2021 int i;
2022
2023 for (i = 0; i < count; i++)
2024 ethtool_puts(&data, marvell_hw_stats[i].string);
2025}
2026
2027static void marvell_get_strings_simple(struct phy_device *phydev, u8 *data)
2028{
2029 int count = marvell_get_sset_count_simple(phydev);
2030 int i;
2031
2032 for (i = 0; i < count; i++)
2033 ethtool_puts(&data, marvell_hw_stats_simple[i].string);
2034}
2035
2036static u64 marvell_get_stat(struct phy_device *phydev, int i)
2037{
2038 struct marvell_hw_stat stat = marvell_hw_stats[i];
2039 struct marvell_priv *priv = phydev->priv;
2040 int val;
2041 u64 ret;
2042
2043 val = phy_read_paged(phydev, stat.page, stat.reg);
2044 if (val < 0) {
2045 ret = U64_MAX;
2046 } else {
2047 val = val & ((1 << stat.bits) - 1);
2048 priv->stats[i] += val;
2049 ret = priv->stats[i];
2050 }
2051
2052 return ret;
2053}
2054
2055static u64 marvell_get_stat_simple(struct phy_device *phydev, int i)
2056{
2057 struct marvell_hw_stat_simple stat = marvell_hw_stats_simple[i];
2058 struct marvell_priv *priv = phydev->priv;
2059 int val;
2060 u64 ret;
2061
2062 val = phy_read(phydev, stat.reg);
2063 if (val < 0) {
2064 ret = U64_MAX;
2065 } else {
2066 val = val & ((1 << stat.bits) - 1);
2067 priv->stats[i] += val;
2068 ret = priv->stats[i];
2069 }
2070
2071 return ret;
2072}
2073
2074static void marvell_get_stats(struct phy_device *phydev,
2075 struct ethtool_stats *stats, u64 *data)
2076{
2077 int count = marvell_get_sset_count(phydev);
2078 int i;
2079
2080 for (i = 0; i < count; i++)
2081 data[i] = marvell_get_stat(phydev, i);
2082}
2083
2084static void marvell_get_stats_simple(struct phy_device *phydev,
2085 struct ethtool_stats *stats, u64 *data)
2086{
2087 int count = marvell_get_sset_count_simple(phydev);
2088 int i;
2089
2090 for (i = 0; i < count; i++)
2091 data[i] = marvell_get_stat_simple(phydev, i);
2092}
2093
2094static int m88e1510_loopback(struct phy_device *phydev, bool enable)
2095{
2096 int err;
2097
2098 if (enable) {
2099 u16 bmcr_ctl, mscr2_ctl = 0;
2100
2101 bmcr_ctl = mii_bmcr_encode_fixed(phydev->speed, phydev->duplex);
2102
2103 err = phy_write(phydev, MII_BMCR, bmcr_ctl);
2104 if (err < 0)
2105 return err;
2106
2107 if (phydev->speed == SPEED_1000)
2108 mscr2_ctl = BMCR_SPEED1000;
2109 else if (phydev->speed == SPEED_100)
2110 mscr2_ctl = BMCR_SPEED100;
2111
2112 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
2113 MII_88E1510_MSCR_2, BMCR_SPEED1000 |
2114 BMCR_SPEED100, mscr2_ctl);
2115 if (err < 0)
2116 return err;
2117
2118 /* Need soft reset to have speed configuration takes effect */
2119 err = genphy_soft_reset(phydev);
2120 if (err < 0)
2121 return err;
2122
2123 err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,
2124 BMCR_LOOPBACK);
2125
2126 if (!err) {
2127 /* It takes some time for PHY device to switch
2128 * into/out-of loopback mode.
2129 */
2130 msleep(1000);
2131 }
2132 return err;
2133 } else {
2134 err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);
2135 if (err < 0)
2136 return err;
2137
2138 return phy_config_aneg(phydev);
2139 }
2140}
2141
2142static int marvell_vct5_wait_complete(struct phy_device *phydev)
2143{
2144 int i;
2145 int val;
2146
2147 for (i = 0; i < 32; i++) {
2148 val = __phy_read(phydev, MII_VCT5_CTRL);
2149 if (val < 0)
2150 return val;
2151
2152 if (val & MII_VCT5_CTRL_COMPLETE)
2153 return 0;
2154 }
2155
2156 phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
2157 return -ETIMEDOUT;
2158}
2159
2160static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
2161{
2162 int amplitude;
2163 int val;
2164 int reg;
2165
2166 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
2167 val = __phy_read(phydev, reg);
2168
2169 if (val < 0)
2170 return 0;
2171
2172 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
2173 MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
2174
2175 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
2176 amplitude = -amplitude;
2177
2178 return 1000 * amplitude / 128;
2179}
2180
2181static u32 marvell_vct5_distance2cm(int distance)
2182{
2183 return distance * 805 / 10;
2184}
2185
2186static u32 marvell_vct5_cm2distance(int cm)
2187{
2188 return cm * 10 / 805;
2189}
2190
2191static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
2192 int distance, int pair)
2193{
2194 u16 reg;
2195 int err;
2196 int mV;
2197 int i;
2198
2199 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
2200 distance);
2201 if (err)
2202 return err;
2203
2204 reg = MII_VCT5_CTRL_ENABLE |
2205 MII_VCT5_CTRL_TX_SAME_CHANNEL |
2206 MII_VCT5_CTRL_SAMPLES_DEFAULT |
2207 MII_VCT5_CTRL_SAMPLE_POINT |
2208 MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
2209 err = __phy_write(phydev, MII_VCT5_CTRL, reg);
2210 if (err)
2211 return err;
2212
2213 err = marvell_vct5_wait_complete(phydev);
2214 if (err)
2215 return err;
2216
2217 for (i = 0; i < 4; i++) {
2218 if (pair != PHY_PAIR_ALL && i != pair)
2219 continue;
2220
2221 mV = marvell_vct5_amplitude(phydev, i);
2222 ethnl_cable_test_amplitude(phydev, i, mV);
2223 }
2224
2225 return 0;
2226}
2227
2228static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
2229{
2230 struct marvell_priv *priv = phydev->priv;
2231 int distance;
2232 u16 width;
2233 int page;
2234 int err;
2235 u16 reg;
2236
2237 if (priv->first <= TDR_SHORT_CABLE_LENGTH)
2238 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
2239 else
2240 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2241
2242 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2243 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2244 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2245
2246 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2247 MII_VCT5_TX_PULSE_CTRL, reg);
2248 if (err)
2249 return err;
2250
2251 /* Reading the TDR data is very MDIO heavy. We need to optimize
2252 * access to keep the time to a minimum. So lock the bus once,
2253 * and don't release it until complete. We can then avoid having
2254 * to change the page for every access, greatly speeding things
2255 * up.
2256 */
2257 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2258 if (page < 0)
2259 goto restore_page;
2260
2261 for (distance = priv->first;
2262 distance <= priv->last;
2263 distance += priv->step) {
2264 err = marvell_vct5_amplitude_distance(phydev, distance,
2265 priv->pair);
2266 if (err)
2267 goto restore_page;
2268
2269 if (distance > TDR_SHORT_CABLE_LENGTH &&
2270 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2271 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2272 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2273 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2274 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2275 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
2276 if (err)
2277 goto restore_page;
2278 }
2279 }
2280
2281restore_page:
2282 return phy_restore_page(phydev, page, err);
2283}
2284
2285static int marvell_cable_test_start_common(struct phy_device *phydev)
2286{
2287 int bmcr, bmsr, ret;
2288
2289 /* If auto-negotiation is enabled, but not complete, the cable
2290 * test never completes. So disable auto-neg.
2291 */
2292 bmcr = phy_read(phydev, MII_BMCR);
2293 if (bmcr < 0)
2294 return bmcr;
2295
2296 bmsr = phy_read(phydev, MII_BMSR);
2297
2298 if (bmsr < 0)
2299 return bmsr;
2300
2301 if (bmcr & BMCR_ANENABLE) {
2302 ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2303 if (ret < 0)
2304 return ret;
2305 ret = genphy_soft_reset(phydev);
2306 if (ret < 0)
2307 return ret;
2308 }
2309
2310 /* If the link is up, allow it some time to go down */
2311 if (bmsr & BMSR_LSTATUS)
2312 msleep(1500);
2313
2314 return 0;
2315}
2316
2317static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2318{
2319 struct marvell_priv *priv = phydev->priv;
2320 int ret;
2321
2322 ret = marvell_cable_test_start_common(phydev);
2323 if (ret)
2324 return ret;
2325
2326 priv->cable_test_tdr = false;
2327
2328 /* Reset the VCT5 API control to defaults, otherwise
2329 * VCT7 does not work correctly.
2330 */
2331 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2332 MII_VCT5_CTRL,
2333 MII_VCT5_CTRL_TX_SAME_CHANNEL |
2334 MII_VCT5_CTRL_SAMPLES_DEFAULT |
2335 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2336 MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2337 if (ret)
2338 return ret;
2339
2340 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2341 MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
2342 if (ret)
2343 return ret;
2344
2345 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2346 MII_VCT7_CTRL,
2347 MII_VCT7_CTRL_RUN_NOW |
2348 MII_VCT7_CTRL_CENTIMETERS);
2349}
2350
2351static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2352 const struct phy_tdr_config *cfg)
2353{
2354 struct marvell_priv *priv = phydev->priv;
2355 int ret;
2356
2357 priv->cable_test_tdr = true;
2358 priv->first = marvell_vct5_cm2distance(cfg->first);
2359 priv->last = marvell_vct5_cm2distance(cfg->last);
2360 priv->step = marvell_vct5_cm2distance(cfg->step);
2361 priv->pair = cfg->pair;
2362
2363 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2364 return -EINVAL;
2365
2366 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2367 return -EINVAL;
2368
2369 /* Disable VCT7 */
2370 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2371 MII_VCT7_CTRL, 0);
2372 if (ret)
2373 return ret;
2374
2375 ret = marvell_cable_test_start_common(phydev);
2376 if (ret)
2377 return ret;
2378
2379 ret = ethnl_cable_test_pulse(phydev, 1000);
2380 if (ret)
2381 return ret;
2382
2383 return ethnl_cable_test_step(phydev,
2384 marvell_vct5_distance2cm(priv->first),
2385 marvell_vct5_distance2cm(priv->last),
2386 marvell_vct5_distance2cm(priv->step));
2387}
2388
2389static int marvell_vct7_distance_to_length(int distance, bool meter)
2390{
2391 if (meter)
2392 distance *= 100;
2393
2394 return distance;
2395}
2396
2397static bool marvell_vct7_distance_valid(int result)
2398{
2399 switch (result) {
2400 case MII_VCT7_RESULTS_OPEN:
2401 case MII_VCT7_RESULTS_SAME_SHORT:
2402 case MII_VCT7_RESULTS_CROSS_SHORT:
2403 return true;
2404 }
2405 return false;
2406}
2407
2408static int marvell_vct7_report_length(struct phy_device *phydev,
2409 int pair, bool meter)
2410{
2411 int length;
2412 int ret;
2413
2414 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2415 MII_VCT7_PAIR_0_DISTANCE + pair);
2416 if (ret < 0)
2417 return ret;
2418
2419 length = marvell_vct7_distance_to_length(ret, meter);
2420
2421 ethnl_cable_test_fault_length(phydev, pair, length);
2422
2423 return 0;
2424}
2425
2426static int marvell_vct7_cable_test_report_trans(int result)
2427{
2428 switch (result) {
2429 case MII_VCT7_RESULTS_OK:
2430 return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2431 case MII_VCT7_RESULTS_OPEN:
2432 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2433 case MII_VCT7_RESULTS_SAME_SHORT:
2434 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2435 case MII_VCT7_RESULTS_CROSS_SHORT:
2436 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2437 default:
2438 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2439 }
2440}
2441
2442static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2443{
2444 int pair0, pair1, pair2, pair3;
2445 bool meter;
2446 int ret;
2447
2448 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2449 MII_VCT7_RESULTS);
2450 if (ret < 0)
2451 return ret;
2452
2453 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2454 MII_VCT7_RESULTS_PAIR3_SHIFT;
2455 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2456 MII_VCT7_RESULTS_PAIR2_SHIFT;
2457 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2458 MII_VCT7_RESULTS_PAIR1_SHIFT;
2459 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2460 MII_VCT7_RESULTS_PAIR0_SHIFT;
2461
2462 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2463 marvell_vct7_cable_test_report_trans(pair0));
2464 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2465 marvell_vct7_cable_test_report_trans(pair1));
2466 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2467 marvell_vct7_cable_test_report_trans(pair2));
2468 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2469 marvell_vct7_cable_test_report_trans(pair3));
2470
2471 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2472 if (ret < 0)
2473 return ret;
2474
2475 meter = ret & MII_VCT7_CTRL_METERS;
2476
2477 if (marvell_vct7_distance_valid(pair0))
2478 marvell_vct7_report_length(phydev, 0, meter);
2479 if (marvell_vct7_distance_valid(pair1))
2480 marvell_vct7_report_length(phydev, 1, meter);
2481 if (marvell_vct7_distance_valid(pair2))
2482 marvell_vct7_report_length(phydev, 2, meter);
2483 if (marvell_vct7_distance_valid(pair3))
2484 marvell_vct7_report_length(phydev, 3, meter);
2485
2486 return 0;
2487}
2488
2489static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2490 bool *finished)
2491{
2492 struct marvell_priv *priv = phydev->priv;
2493 int ret;
2494
2495 if (priv->cable_test_tdr) {
2496 ret = marvell_vct5_amplitude_graph(phydev);
2497 *finished = true;
2498 return ret;
2499 }
2500
2501 *finished = false;
2502
2503 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2504 MII_VCT7_CTRL);
2505
2506 if (ret < 0)
2507 return ret;
2508
2509 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2510 *finished = true;
2511
2512 return marvell_vct7_cable_test_report(phydev);
2513 }
2514
2515 return 0;
2516}
2517
2518static int m88e3082_vct_cable_test_start(struct phy_device *phydev)
2519{
2520 struct marvell_priv *priv = phydev->priv;
2521 int ret;
2522
2523 /* It needs some magic workarounds described in VCT manual for this PHY.
2524 */
2525 ret = phy_write(phydev, 29, 0x0003);
2526 if (ret < 0)
2527 return ret;
2528
2529 ret = phy_write(phydev, 30, 0x6440);
2530 if (ret < 0)
2531 return ret;
2532
2533 if (priv->vct_phase == M88E3082_VCT_PHASE1) {
2534 ret = phy_write(phydev, 29, 0x000a);
2535 if (ret < 0)
2536 return ret;
2537
2538 ret = phy_write(phydev, 30, 0x0002);
2539 if (ret < 0)
2540 return ret;
2541 }
2542
2543 ret = phy_write(phydev, MII_BMCR,
2544 BMCR_RESET | BMCR_SPEED100 | BMCR_FULLDPLX);
2545 if (ret < 0)
2546 return ret;
2547
2548 ret = phy_write(phydev, MII_VCT_TXPINS, MII_VCT_TXPINS_ENVCT);
2549 if (ret < 0)
2550 return ret;
2551
2552 ret = phy_write(phydev, 29, 0x0003);
2553 if (ret < 0)
2554 return ret;
2555
2556 ret = phy_write(phydev, 30, 0x0);
2557 if (ret < 0)
2558 return ret;
2559
2560 if (priv->vct_phase == M88E3082_VCT_OFF) {
2561 priv->vct_phase = M88E3082_VCT_PHASE1;
2562 priv->pair = 0;
2563
2564 return 0;
2565 }
2566
2567 ret = phy_write(phydev, 29, 0x000a);
2568 if (ret < 0)
2569 return ret;
2570
2571 ret = phy_write(phydev, 30, 0x0);
2572 if (ret < 0)
2573 return ret;
2574
2575 priv->vct_phase = M88E3082_VCT_PHASE2;
2576
2577 return 0;
2578}
2579
2580static int m88e3082_vct_cable_test_report_trans(int result, u8 distance)
2581{
2582 switch (result) {
2583 case MII_VCT_TXRXPINS_VCTTST_OK:
2584 if (distance == MII_VCT_TXRXPINS_DISTRFLN_MAX)
2585 return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2586 return ETHTOOL_A_CABLE_RESULT_CODE_IMPEDANCE_MISMATCH;
2587 case MII_VCT_TXRXPINS_VCTTST_SHORT:
2588 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2589 case MII_VCT_TXRXPINS_VCTTST_OPEN:
2590 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2591 default:
2592 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2593 }
2594}
2595
2596static u32 m88e3082_vct_distrfln_2_cm(u8 distrfln)
2597{
2598 if (distrfln < 24)
2599 return 0;
2600
2601 /* Original function for meters: y = 0.7861x - 18.862 */
2602 return (7861 * distrfln - 188620) / 100;
2603}
2604
2605static int m88e3082_vct_cable_test_get_status(struct phy_device *phydev,
2606 bool *finished)
2607{
2608 u8 tx_vcttst_res, rx_vcttst_res, tx_distrfln, rx_distrfln;
2609 struct marvell_priv *priv = phydev->priv;
2610 int ret, tx_result, rx_result;
2611 bool done_phase = true;
2612
2613 *finished = false;
2614
2615 ret = phy_read(phydev, MII_VCT_TXPINS);
2616 if (ret < 0)
2617 return ret;
2618 else if (ret & MII_VCT_TXPINS_ENVCT)
2619 return 0;
2620
2621 tx_distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
2622 tx_vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
2623 MII_VCT_TXRXPINS_VCTTST_SHIFT;
2624
2625 ret = phy_read(phydev, MII_VCT_RXPINS);
2626 if (ret < 0)
2627 return ret;
2628
2629 rx_distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
2630 rx_vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
2631 MII_VCT_TXRXPINS_VCTTST_SHIFT;
2632
2633 *finished = true;
2634
2635 switch (priv->vct_phase) {
2636 case M88E3082_VCT_PHASE1:
2637 tx_result = m88e3082_vct_cable_test_report_trans(tx_vcttst_res,
2638 tx_distrfln);
2639 rx_result = m88e3082_vct_cable_test_report_trans(rx_vcttst_res,
2640 rx_distrfln);
2641
2642 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2643 tx_result);
2644 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2645 rx_result);
2646
2647 if (tx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN) {
2648 done_phase = false;
2649 priv->pair |= M88E3082_PAIR_A;
2650 } else if (tx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2651 u8 pair = ETHTOOL_A_CABLE_PAIR_A;
2652 u32 cm = m88e3082_vct_distrfln_2_cm(tx_distrfln);
2653
2654 ethnl_cable_test_fault_length(phydev, pair, cm);
2655 }
2656
2657 if (rx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN) {
2658 done_phase = false;
2659 priv->pair |= M88E3082_PAIR_B;
2660 } else if (rx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2661 u8 pair = ETHTOOL_A_CABLE_PAIR_B;
2662 u32 cm = m88e3082_vct_distrfln_2_cm(rx_distrfln);
2663
2664 ethnl_cable_test_fault_length(phydev, pair, cm);
2665 }
2666
2667 break;
2668 case M88E3082_VCT_PHASE2:
2669 if (priv->pair & M88E3082_PAIR_A &&
2670 tx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN &&
2671 tx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2672 u8 pair = ETHTOOL_A_CABLE_PAIR_A;
2673 u32 cm = m88e3082_vct_distrfln_2_cm(tx_distrfln);
2674
2675 ethnl_cable_test_fault_length(phydev, pair, cm);
2676 }
2677 if (priv->pair & M88E3082_PAIR_B &&
2678 rx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN &&
2679 rx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2680 u8 pair = ETHTOOL_A_CABLE_PAIR_B;
2681 u32 cm = m88e3082_vct_distrfln_2_cm(rx_distrfln);
2682
2683 ethnl_cable_test_fault_length(phydev, pair, cm);
2684 }
2685
2686 break;
2687 default:
2688 return -EINVAL;
2689 }
2690
2691 if (!done_phase) {
2692 *finished = false;
2693 return m88e3082_vct_cable_test_start(phydev);
2694 }
2695 if (*finished)
2696 priv->vct_phase = M88E3082_VCT_OFF;
2697 return 0;
2698}
2699
2700static int m88e1111_vct_cable_test_start(struct phy_device *phydev)
2701{
2702 int ret;
2703
2704 ret = marvell_cable_test_start_common(phydev);
2705 if (ret)
2706 return ret;
2707
2708 /* It needs some magic workarounds described in VCT manual for this PHY.
2709 */
2710 ret = phy_write(phydev, 29, 0x0018);
2711 if (ret < 0)
2712 return ret;
2713
2714 ret = phy_write(phydev, 30, 0x00c2);
2715 if (ret < 0)
2716 return ret;
2717
2718 ret = phy_write(phydev, 30, 0x00ca);
2719 if (ret < 0)
2720 return ret;
2721
2722 ret = phy_write(phydev, 30, 0x00c2);
2723 if (ret < 0)
2724 return ret;
2725
2726 ret = phy_write_paged(phydev, MII_MARVELL_COPPER_PAGE, MII_VCT_SR,
2727 MII_VCT_TXPINS_ENVCT);
2728 if (ret < 0)
2729 return ret;
2730
2731 ret = phy_write(phydev, 29, 0x0018);
2732 if (ret < 0)
2733 return ret;
2734
2735 ret = phy_write(phydev, 30, 0x0042);
2736 if (ret < 0)
2737 return ret;
2738
2739 return 0;
2740}
2741
2742static u32 m88e1111_vct_distrfln_2_cm(u8 distrfln)
2743{
2744 if (distrfln < 36)
2745 return 0;
2746
2747 /* Original function for meters: y = 0.8018x - 28.751 */
2748 return (8018 * distrfln - 287510) / 100;
2749}
2750
2751static int m88e1111_vct_cable_test_get_status(struct phy_device *phydev,
2752 bool *finished)
2753{
2754 u8 vcttst_res, distrfln;
2755 int ret, result;
2756
2757 *finished = false;
2758
2759 /* Each pair use one page: A-0, B-1, C-2, D-3 */
2760 for (u8 i = 0; i < 4; i++) {
2761 ret = phy_read_paged(phydev, i, MII_VCT_SR);
2762 if (ret < 0)
2763 return ret;
2764 else if (i == 0 && ret & MII_VCT_TXPINS_ENVCT)
2765 return 0;
2766
2767 distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
2768 vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
2769 MII_VCT_TXRXPINS_VCTTST_SHIFT;
2770
2771 result = m88e3082_vct_cable_test_report_trans(vcttst_res,
2772 distrfln);
2773 ethnl_cable_test_result(phydev, i, result);
2774
2775 if (distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
2776 u32 cm = m88e1111_vct_distrfln_2_cm(distrfln);
2777
2778 ethnl_cable_test_fault_length(phydev, i, cm);
2779 }
2780 }
2781
2782 *finished = true;
2783 return 0;
2784}
2785
2786#ifdef CONFIG_HWMON
2787struct marvell_hwmon_ops {
2788 int (*config)(struct phy_device *phydev);
2789 int (*get_temp)(struct phy_device *phydev, long *temp);
2790 int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2791 int (*set_temp_critical)(struct phy_device *phydev, long temp);
2792 int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2793};
2794
2795static const struct marvell_hwmon_ops *
2796to_marvell_hwmon_ops(const struct phy_device *phydev)
2797{
2798 return phydev->drv->driver_data;
2799}
2800
2801static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2802{
2803 int oldpage;
2804 int ret = 0;
2805 int val;
2806
2807 *temp = 0;
2808
2809 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2810 if (oldpage < 0)
2811 goto error;
2812
2813 /* Enable temperature sensor */
2814 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2815 if (ret < 0)
2816 goto error;
2817
2818 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2819 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2820 if (ret < 0)
2821 goto error;
2822
2823 /* Wait for temperature to stabilize */
2824 usleep_range(10000, 12000);
2825
2826 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2827 if (val < 0) {
2828 ret = val;
2829 goto error;
2830 }
2831
2832 /* Disable temperature sensor */
2833 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2834 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2835 if (ret < 0)
2836 goto error;
2837
2838 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2839
2840error:
2841 return phy_restore_page(phydev, oldpage, ret);
2842}
2843
2844static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2845{
2846 int ret;
2847
2848 *temp = 0;
2849
2850 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2851 MII_88E1510_TEMP_SENSOR);
2852 if (ret < 0)
2853 return ret;
2854
2855 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2856
2857 return 0;
2858}
2859
2860static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2861{
2862 int ret;
2863
2864 *temp = 0;
2865
2866 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2867 MII_88E1121_MISC_TEST);
2868 if (ret < 0)
2869 return ret;
2870
2871 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2872 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2873 /* convert to mC */
2874 *temp *= 1000;
2875
2876 return 0;
2877}
2878
2879static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2880{
2881 temp = temp / 1000;
2882 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2883
2884 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2885 MII_88E1121_MISC_TEST,
2886 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2887 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2888}
2889
2890static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2891{
2892 int ret;
2893
2894 *alarm = false;
2895
2896 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2897 MII_88E1121_MISC_TEST);
2898 if (ret < 0)
2899 return ret;
2900
2901 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2902
2903 return 0;
2904}
2905
2906static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2907{
2908 int sum = 0;
2909 int oldpage;
2910 int ret = 0;
2911 int i;
2912
2913 *temp = 0;
2914
2915 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2916 if (oldpage < 0)
2917 goto error;
2918
2919 /* Enable temperature sensor */
2920 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2921 if (ret < 0)
2922 goto error;
2923
2924 ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2925 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2926
2927 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2928 if (ret < 0)
2929 goto error;
2930
2931 /* Wait for temperature to stabilize */
2932 usleep_range(10000, 12000);
2933
2934 /* Reading the temperature sense has an errata. You need to read
2935 * a number of times and take an average.
2936 */
2937 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2938 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2939 if (ret < 0)
2940 goto error;
2941 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2942 }
2943
2944 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2945 *temp = (sum - 75) * 1000;
2946
2947 /* Disable temperature sensor */
2948 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2949 if (ret < 0)
2950 goto error;
2951
2952 ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2953 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2954
2955 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2956
2957error:
2958 phy_restore_page(phydev, oldpage, ret);
2959
2960 return ret;
2961}
2962
2963static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
2964{
2965 int err;
2966
2967 err = m88e1510_get_temp(phydev, temp);
2968
2969 /* 88E1510 measures T + 25, while the PHY on 88E6393X switch
2970 * T + 75, so we have to subtract another 50
2971 */
2972 *temp -= 50000;
2973
2974 return err;
2975}
2976
2977static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
2978{
2979 int ret;
2980
2981 *temp = 0;
2982
2983 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2984 MII_88E6390_TEMP_SENSOR);
2985 if (ret < 0)
2986 return ret;
2987
2988 *temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
2989 MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
2990
2991 return 0;
2992}
2993
2994static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
2995{
2996 temp = (temp / 1000) + 75;
2997
2998 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2999 MII_88E6390_TEMP_SENSOR,
3000 MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
3001 temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
3002}
3003
3004static int m88e6393_hwmon_config(struct phy_device *phydev)
3005{
3006 int err;
3007
3008 err = m88e6393_set_temp_critical(phydev, 100000);
3009 if (err)
3010 return err;
3011
3012 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
3013 MII_88E6390_MISC_TEST,
3014 MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
3015 MII_88E6393_MISC_TEST_SAMPLES_MASK |
3016 MII_88E6393_MISC_TEST_RATE_MASK,
3017 MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
3018 MII_88E6393_MISC_TEST_SAMPLES_2048 |
3019 MII_88E6393_MISC_TEST_RATE_2_3MS);
3020}
3021
3022static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
3023 u32 attr, int channel, long *temp)
3024{
3025 struct phy_device *phydev = dev_get_drvdata(dev);
3026 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
3027 int err = -EOPNOTSUPP;
3028
3029 switch (attr) {
3030 case hwmon_temp_input:
3031 if (ops->get_temp)
3032 err = ops->get_temp(phydev, temp);
3033 break;
3034 case hwmon_temp_crit:
3035 if (ops->get_temp_critical)
3036 err = ops->get_temp_critical(phydev, temp);
3037 break;
3038 case hwmon_temp_max_alarm:
3039 if (ops->get_temp_alarm)
3040 err = ops->get_temp_alarm(phydev, temp);
3041 break;
3042 }
3043
3044 return err;
3045}
3046
3047static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
3048 u32 attr, int channel, long temp)
3049{
3050 struct phy_device *phydev = dev_get_drvdata(dev);
3051 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
3052 int err = -EOPNOTSUPP;
3053
3054 switch (attr) {
3055 case hwmon_temp_crit:
3056 if (ops->set_temp_critical)
3057 err = ops->set_temp_critical(phydev, temp);
3058 break;
3059 }
3060
3061 return err;
3062}
3063
3064static umode_t marvell_hwmon_is_visible(const void *data,
3065 enum hwmon_sensor_types type,
3066 u32 attr, int channel)
3067{
3068 const struct phy_device *phydev = data;
3069 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
3070
3071 if (type != hwmon_temp)
3072 return 0;
3073
3074 switch (attr) {
3075 case hwmon_temp_input:
3076 return ops->get_temp ? 0444 : 0;
3077 case hwmon_temp_max_alarm:
3078 return ops->get_temp_alarm ? 0444 : 0;
3079 case hwmon_temp_crit:
3080 return (ops->get_temp_critical ? 0444 : 0) |
3081 (ops->set_temp_critical ? 0200 : 0);
3082 default:
3083 return 0;
3084 }
3085}
3086
3087static u32 marvell_hwmon_chip_config[] = {
3088 HWMON_C_REGISTER_TZ,
3089 0
3090};
3091
3092static const struct hwmon_channel_info marvell_hwmon_chip = {
3093 .type = hwmon_chip,
3094 .config = marvell_hwmon_chip_config,
3095};
3096
3097/* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
3098 * defined for all PHYs, because the hwmon code checks whether the attributes
3099 * exists via the .is_visible method
3100 */
3101static u32 marvell_hwmon_temp_config[] = {
3102 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
3103 0
3104};
3105
3106static const struct hwmon_channel_info marvell_hwmon_temp = {
3107 .type = hwmon_temp,
3108 .config = marvell_hwmon_temp_config,
3109};
3110
3111static const struct hwmon_channel_info * const marvell_hwmon_info[] = {
3112 &marvell_hwmon_chip,
3113 &marvell_hwmon_temp,
3114 NULL
3115};
3116
3117static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
3118 .is_visible = marvell_hwmon_is_visible,
3119 .read = marvell_hwmon_read,
3120 .write = marvell_hwmon_write,
3121};
3122
3123static const struct hwmon_chip_info marvell_hwmon_chip_info = {
3124 .ops = &marvell_hwmon_hwmon_ops,
3125 .info = marvell_hwmon_info,
3126};
3127
3128static int marvell_hwmon_name(struct phy_device *phydev)
3129{
3130 struct marvell_priv *priv = phydev->priv;
3131 struct device *dev = &phydev->mdio.dev;
3132 const char *devname = dev_name(dev);
3133 size_t len = strlen(devname);
3134 int i, j;
3135
3136 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
3137 if (!priv->hwmon_name)
3138 return -ENOMEM;
3139
3140 for (i = j = 0; i < len && devname[i]; i++) {
3141 if (isalnum(devname[i]))
3142 priv->hwmon_name[j++] = devname[i];
3143 }
3144
3145 return 0;
3146}
3147
3148static int marvell_hwmon_probe(struct phy_device *phydev)
3149{
3150 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
3151 struct marvell_priv *priv = phydev->priv;
3152 struct device *dev = &phydev->mdio.dev;
3153 int err;
3154
3155 if (!ops)
3156 return 0;
3157
3158 err = marvell_hwmon_name(phydev);
3159 if (err)
3160 return err;
3161
3162 priv->hwmon_dev = devm_hwmon_device_register_with_info(
3163 dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
3164 if (IS_ERR(priv->hwmon_dev))
3165 return PTR_ERR(priv->hwmon_dev);
3166
3167 if (ops->config)
3168 err = ops->config(phydev);
3169
3170 return err;
3171}
3172
3173static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
3174 .get_temp = m88e1121_get_temp,
3175};
3176
3177static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
3178 .get_temp = m88e1510_get_temp,
3179 .get_temp_critical = m88e1510_get_temp_critical,
3180 .set_temp_critical = m88e1510_set_temp_critical,
3181 .get_temp_alarm = m88e1510_get_temp_alarm,
3182};
3183
3184static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
3185 .get_temp = m88e6390_get_temp,
3186};
3187
3188static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
3189 .config = m88e6393_hwmon_config,
3190 .get_temp = m88e6393_get_temp,
3191 .get_temp_critical = m88e6393_get_temp_critical,
3192 .set_temp_critical = m88e6393_set_temp_critical,
3193 .get_temp_alarm = m88e1510_get_temp_alarm,
3194};
3195
3196#define DEF_MARVELL_HWMON_OPS(s) (&(s))
3197
3198#else
3199
3200#define DEF_MARVELL_HWMON_OPS(s) NULL
3201
3202static int marvell_hwmon_probe(struct phy_device *phydev)
3203{
3204 return 0;
3205}
3206#endif
3207
3208static int m88e1318_led_brightness_set(struct phy_device *phydev,
3209 u8 index, enum led_brightness value)
3210{
3211 int reg;
3212
3213 reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3214 MII_88E1318S_PHY_LED_FUNC);
3215 if (reg < 0)
3216 return reg;
3217
3218 switch (index) {
3219 case 0:
3220 case 1:
3221 case 2:
3222 reg &= ~(0xf << (4 * index));
3223 if (value == LED_OFF)
3224 reg |= MII_88E1318S_PHY_LED_FUNC_OFF << (4 * index);
3225 else
3226 reg |= MII_88E1318S_PHY_LED_FUNC_ON << (4 * index);
3227 break;
3228 default:
3229 return -EINVAL;
3230 }
3231
3232 return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
3233 MII_88E1318S_PHY_LED_FUNC, reg);
3234}
3235
3236static int m88e1318_led_blink_set(struct phy_device *phydev, u8 index,
3237 unsigned long *delay_on,
3238 unsigned long *delay_off)
3239{
3240 int reg;
3241
3242 reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3243 MII_88E1318S_PHY_LED_FUNC);
3244 if (reg < 0)
3245 return reg;
3246
3247 switch (index) {
3248 case 0:
3249 case 1:
3250 case 2:
3251 reg &= ~(0xf << (4 * index));
3252 reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index);
3253 /* Reset default is 84ms */
3254 *delay_on = 84 / 2;
3255 *delay_off = 84 / 2;
3256 break;
3257 default:
3258 return -EINVAL;
3259 }
3260
3261 return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
3262 MII_88E1318S_PHY_LED_FUNC, reg);
3263}
3264
3265struct marvell_led_rules {
3266 int mode;
3267 unsigned long rules;
3268};
3269
3270static const struct marvell_led_rules marvell_led0[] = {
3271 {
3272 .mode = 0,
3273 .rules = BIT(TRIGGER_NETDEV_LINK),
3274 },
3275 {
3276 .mode = 1,
3277 .rules = (BIT(TRIGGER_NETDEV_LINK) |
3278 BIT(TRIGGER_NETDEV_RX) |
3279 BIT(TRIGGER_NETDEV_TX)),
3280 },
3281 {
3282 .mode = 3,
3283 .rules = (BIT(TRIGGER_NETDEV_RX) |
3284 BIT(TRIGGER_NETDEV_TX)),
3285 },
3286 {
3287 .mode = 4,
3288 .rules = (BIT(TRIGGER_NETDEV_RX) |
3289 BIT(TRIGGER_NETDEV_TX)),
3290 },
3291 {
3292 .mode = 5,
3293 .rules = BIT(TRIGGER_NETDEV_TX),
3294 },
3295 {
3296 .mode = 6,
3297 .rules = BIT(TRIGGER_NETDEV_LINK),
3298 },
3299 {
3300 .mode = 7,
3301 .rules = BIT(TRIGGER_NETDEV_LINK_1000),
3302 },
3303 {
3304 .mode = 8,
3305 .rules = 0,
3306 },
3307};
3308
3309static const struct marvell_led_rules marvell_led1[] = {
3310 {
3311 .mode = 1,
3312 .rules = (BIT(TRIGGER_NETDEV_LINK) |
3313 BIT(TRIGGER_NETDEV_RX) |
3314 BIT(TRIGGER_NETDEV_TX)),
3315 },
3316 {
3317 .mode = 2,
3318 .rules = (BIT(TRIGGER_NETDEV_LINK) |
3319 BIT(TRIGGER_NETDEV_RX)),
3320 },
3321 {
3322 .mode = 3,
3323 .rules = (BIT(TRIGGER_NETDEV_RX) |
3324 BIT(TRIGGER_NETDEV_TX)),
3325 },
3326 {
3327 .mode = 4,
3328 .rules = (BIT(TRIGGER_NETDEV_RX) |
3329 BIT(TRIGGER_NETDEV_TX)),
3330 },
3331 {
3332 .mode = 6,
3333 .rules = (BIT(TRIGGER_NETDEV_LINK_100) |
3334 BIT(TRIGGER_NETDEV_LINK_1000)),
3335 },
3336 {
3337 .mode = 7,
3338 .rules = BIT(TRIGGER_NETDEV_LINK_100),
3339 },
3340 {
3341 .mode = 8,
3342 .rules = 0,
3343 },
3344};
3345
3346static const struct marvell_led_rules marvell_led2[] = {
3347 {
3348 .mode = 0,
3349 .rules = BIT(TRIGGER_NETDEV_LINK),
3350 },
3351 {
3352 .mode = 1,
3353 .rules = (BIT(TRIGGER_NETDEV_LINK) |
3354 BIT(TRIGGER_NETDEV_RX) |
3355 BIT(TRIGGER_NETDEV_TX)),
3356 },
3357 {
3358 .mode = 3,
3359 .rules = (BIT(TRIGGER_NETDEV_RX) |
3360 BIT(TRIGGER_NETDEV_TX)),
3361 },
3362 {
3363 .mode = 4,
3364 .rules = (BIT(TRIGGER_NETDEV_RX) |
3365 BIT(TRIGGER_NETDEV_TX)),
3366 },
3367 {
3368 .mode = 5,
3369 .rules = BIT(TRIGGER_NETDEV_TX),
3370 },
3371 {
3372 .mode = 6,
3373 .rules = (BIT(TRIGGER_NETDEV_LINK_10) |
3374 BIT(TRIGGER_NETDEV_LINK_1000)),
3375 },
3376 {
3377 .mode = 7,
3378 .rules = BIT(TRIGGER_NETDEV_LINK_10),
3379 },
3380 {
3381 .mode = 8,
3382 .rules = 0,
3383 },
3384};
3385
3386static int marvell_find_led_mode(unsigned long rules,
3387 const struct marvell_led_rules *marvell_rules,
3388 int count,
3389 int *mode)
3390{
3391 int i;
3392
3393 for (i = 0; i < count; i++) {
3394 if (marvell_rules[i].rules == rules) {
3395 *mode = marvell_rules[i].mode;
3396 return 0;
3397 }
3398 }
3399 return -EOPNOTSUPP;
3400}
3401
3402static int marvell_get_led_mode(u8 index, unsigned long rules, int *mode)
3403{
3404 int ret;
3405
3406 switch (index) {
3407 case 0:
3408 ret = marvell_find_led_mode(rules, marvell_led0,
3409 ARRAY_SIZE(marvell_led0), mode);
3410 break;
3411 case 1:
3412 ret = marvell_find_led_mode(rules, marvell_led1,
3413 ARRAY_SIZE(marvell_led1), mode);
3414 break;
3415 case 2:
3416 ret = marvell_find_led_mode(rules, marvell_led2,
3417 ARRAY_SIZE(marvell_led2), mode);
3418 break;
3419 default:
3420 ret = -EINVAL;
3421 }
3422
3423 return ret;
3424}
3425
3426static int marvell_find_led_rules(unsigned long *rules,
3427 const struct marvell_led_rules *marvell_rules,
3428 int count,
3429 int mode)
3430{
3431 int i;
3432
3433 for (i = 0; i < count; i++) {
3434 if (marvell_rules[i].mode == mode) {
3435 *rules = marvell_rules[i].rules;
3436 return 0;
3437 }
3438 }
3439 return -EOPNOTSUPP;
3440}
3441
3442static int marvell_get_led_rules(u8 index, unsigned long *rules, int mode)
3443{
3444 int ret;
3445
3446 switch (index) {
3447 case 0:
3448 ret = marvell_find_led_rules(rules, marvell_led0,
3449 ARRAY_SIZE(marvell_led0), mode);
3450 break;
3451 case 1:
3452 ret = marvell_find_led_rules(rules, marvell_led1,
3453 ARRAY_SIZE(marvell_led1), mode);
3454 break;
3455 case 2:
3456 ret = marvell_find_led_rules(rules, marvell_led2,
3457 ARRAY_SIZE(marvell_led2), mode);
3458 break;
3459 default:
3460 ret = -EOPNOTSUPP;
3461 }
3462
3463 return ret;
3464}
3465
3466static int m88e1318_led_hw_is_supported(struct phy_device *phydev, u8 index,
3467 unsigned long rules)
3468{
3469 int mode, ret;
3470
3471 switch (index) {
3472 case 0:
3473 case 1:
3474 case 2:
3475 ret = marvell_get_led_mode(index, rules, &mode);
3476 break;
3477 default:
3478 ret = -EINVAL;
3479 }
3480
3481 return ret;
3482}
3483
3484static int m88e1318_led_hw_control_set(struct phy_device *phydev, u8 index,
3485 unsigned long rules)
3486{
3487 int mode, ret, reg;
3488
3489 switch (index) {
3490 case 0:
3491 case 1:
3492 case 2:
3493 ret = marvell_get_led_mode(index, rules, &mode);
3494 break;
3495 default:
3496 ret = -EINVAL;
3497 }
3498
3499 if (ret < 0)
3500 return ret;
3501
3502 reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3503 MII_88E1318S_PHY_LED_FUNC);
3504 if (reg < 0)
3505 return reg;
3506
3507 reg &= ~(0xf << (4 * index));
3508 reg |= mode << (4 * index);
3509 return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
3510 MII_88E1318S_PHY_LED_FUNC, reg);
3511}
3512
3513static int m88e1318_led_hw_control_get(struct phy_device *phydev, u8 index,
3514 unsigned long *rules)
3515{
3516 int mode, reg;
3517
3518 if (index > 2)
3519 return -EINVAL;
3520
3521 reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3522 MII_88E1318S_PHY_LED_FUNC);
3523 if (reg < 0)
3524 return reg;
3525
3526 mode = (reg >> (4 * index)) & 0xf;
3527
3528 return marvell_get_led_rules(index, rules, mode);
3529}
3530
3531static int marvell_probe(struct phy_device *phydev)
3532{
3533 struct marvell_priv *priv;
3534
3535 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
3536 if (!priv)
3537 return -ENOMEM;
3538
3539 phydev->priv = priv;
3540
3541 return marvell_hwmon_probe(phydev);
3542}
3543
3544static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
3545{
3546 DECLARE_PHY_INTERFACE_MASK(interfaces);
3547 struct phy_device *phydev = upstream;
3548 phy_interface_t interface;
3549 struct device *dev;
3550 int oldpage;
3551 int ret = 0;
3552 u16 mode;
3553
3554 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
3555
3556 dev = &phydev->mdio.dev;
3557
3558 sfp_parse_support(phydev->sfp_bus, id, supported, interfaces);
3559 interface = sfp_select_interface(phydev->sfp_bus, supported);
3560
3561 dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
3562
3563 switch (interface) {
3564 case PHY_INTERFACE_MODE_1000BASEX:
3565 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
3566
3567 break;
3568 case PHY_INTERFACE_MODE_100BASEX:
3569 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
3570
3571 break;
3572 case PHY_INTERFACE_MODE_SGMII:
3573 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
3574
3575 break;
3576 default:
3577 dev_err(dev, "Incompatible SFP module inserted\n");
3578
3579 return -EINVAL;
3580 }
3581
3582 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
3583 if (oldpage < 0)
3584 goto error;
3585
3586 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
3587 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
3588 if (ret < 0)
3589 goto error;
3590
3591 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
3592 MII_88E1510_GEN_CTRL_REG_1_RESET);
3593
3594error:
3595 return phy_restore_page(phydev, oldpage, ret);
3596}
3597
3598static void m88e1510_sfp_remove(void *upstream)
3599{
3600 struct phy_device *phydev = upstream;
3601 int oldpage;
3602 int ret = 0;
3603
3604 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
3605 if (oldpage < 0)
3606 goto error;
3607
3608 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
3609 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
3610 MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
3611 if (ret < 0)
3612 goto error;
3613
3614 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
3615 MII_88E1510_GEN_CTRL_REG_1_RESET);
3616
3617error:
3618 phy_restore_page(phydev, oldpage, ret);
3619}
3620
3621static const struct sfp_upstream_ops m88e1510_sfp_ops = {
3622 .module_insert = m88e1510_sfp_insert,
3623 .module_remove = m88e1510_sfp_remove,
3624 .attach = phy_sfp_attach,
3625 .detach = phy_sfp_detach,
3626 .connect_phy = phy_sfp_connect_phy,
3627 .disconnect_phy = phy_sfp_disconnect_phy,
3628};
3629
3630static int m88e1510_probe(struct phy_device *phydev)
3631{
3632 int err;
3633
3634 err = marvell_probe(phydev);
3635 if (err)
3636 return err;
3637
3638 return phy_sfp_probe(phydev, &m88e1510_sfp_ops);
3639}
3640
3641static struct phy_driver marvell_drivers[] = {
3642 {
3643 .phy_id = MARVELL_PHY_ID_88E1101,
3644 .phy_id_mask = MARVELL_PHY_ID_MASK,
3645 .name = "Marvell 88E1101",
3646 /* PHY_GBIT_FEATURES */
3647 .probe = marvell_probe,
3648 .config_init = marvell_config_init,
3649 .config_aneg = m88e1101_config_aneg,
3650 .config_intr = marvell_config_intr,
3651 .handle_interrupt = marvell_handle_interrupt,
3652 .resume = genphy_resume,
3653 .suspend = genphy_suspend,
3654 .read_page = marvell_read_page,
3655 .write_page = marvell_write_page,
3656 .get_sset_count = marvell_get_sset_count,
3657 .get_strings = marvell_get_strings,
3658 .get_stats = marvell_get_stats,
3659 },
3660 {
3661 .phy_id = MARVELL_PHY_ID_88E3082,
3662 .phy_id_mask = MARVELL_PHY_ID_MASK,
3663 .name = "Marvell 88E308X/88E609X Family",
3664 /* PHY_BASIC_FEATURES */
3665 .probe = marvell_probe,
3666 .config_init = marvell_config_init,
3667 .aneg_done = marvell_aneg_done,
3668 .read_status = marvell_read_status,
3669 .resume = genphy_resume,
3670 .suspend = genphy_suspend,
3671 .cable_test_start = m88e3082_vct_cable_test_start,
3672 .cable_test_get_status = m88e3082_vct_cable_test_get_status,
3673 },
3674 {
3675 .phy_id = MARVELL_PHY_ID_88E1112,
3676 .phy_id_mask = MARVELL_PHY_ID_MASK,
3677 .name = "Marvell 88E1112",
3678 /* PHY_GBIT_FEATURES */
3679 .probe = marvell_probe,
3680 .config_init = m88e1112_config_init,
3681 .config_aneg = marvell_config_aneg,
3682 .config_intr = marvell_config_intr,
3683 .handle_interrupt = marvell_handle_interrupt,
3684 .resume = genphy_resume,
3685 .suspend = genphy_suspend,
3686 .read_page = marvell_read_page,
3687 .write_page = marvell_write_page,
3688 .get_sset_count = marvell_get_sset_count,
3689 .get_strings = marvell_get_strings,
3690 .get_stats = marvell_get_stats,
3691 .get_tunable = m88e1011_get_tunable,
3692 .set_tunable = m88e1011_set_tunable,
3693 },
3694 {
3695 .phy_id = MARVELL_PHY_ID_88E1111,
3696 .phy_id_mask = MARVELL_PHY_ID_MASK,
3697 .name = "Marvell 88E1111",
3698 /* PHY_GBIT_FEATURES */
3699 .flags = PHY_POLL_CABLE_TEST,
3700 .probe = marvell_probe,
3701 .config_init = m88e1111gbe_config_init,
3702 .config_aneg = m88e1111_config_aneg,
3703 .read_status = marvell_read_status,
3704 .config_intr = marvell_config_intr,
3705 .handle_interrupt = marvell_handle_interrupt,
3706 .resume = genphy_resume,
3707 .suspend = genphy_suspend,
3708 .read_page = marvell_read_page,
3709 .write_page = marvell_write_page,
3710 .get_sset_count = marvell_get_sset_count,
3711 .get_strings = marvell_get_strings,
3712 .get_stats = marvell_get_stats,
3713 .get_tunable = m88e1111_get_tunable,
3714 .set_tunable = m88e1111_set_tunable,
3715 .cable_test_start = m88e1111_vct_cable_test_start,
3716 .cable_test_get_status = m88e1111_vct_cable_test_get_status,
3717 },
3718 {
3719 .phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
3720 .phy_id_mask = MARVELL_PHY_ID_MASK,
3721 .name = "Marvell 88E1111 (Finisar)",
3722 /* PHY_GBIT_FEATURES */
3723 .probe = marvell_probe,
3724 .config_init = m88e1111gbe_config_init,
3725 .config_aneg = m88e1111_config_aneg,
3726 .read_status = marvell_read_status,
3727 .config_intr = marvell_config_intr,
3728 .handle_interrupt = marvell_handle_interrupt,
3729 .resume = genphy_resume,
3730 .suspend = genphy_suspend,
3731 .read_page = marvell_read_page,
3732 .write_page = marvell_write_page,
3733 .get_sset_count = marvell_get_sset_count,
3734 .get_strings = marvell_get_strings,
3735 .get_stats = marvell_get_stats,
3736 .get_tunable = m88e1111_get_tunable,
3737 .set_tunable = m88e1111_set_tunable,
3738 },
3739 {
3740 .phy_id = MARVELL_PHY_ID_88E1118,
3741 .phy_id_mask = MARVELL_PHY_ID_MASK,
3742 .name = "Marvell 88E1118",
3743 /* PHY_GBIT_FEATURES */
3744 .probe = marvell_probe,
3745 .config_init = m88e1118_config_init,
3746 .config_aneg = m88e1118_config_aneg,
3747 .config_intr = marvell_config_intr,
3748 .handle_interrupt = marvell_handle_interrupt,
3749 .resume = genphy_resume,
3750 .suspend = genphy_suspend,
3751 .read_page = marvell_read_page,
3752 .write_page = marvell_write_page,
3753 .get_sset_count = marvell_get_sset_count,
3754 .get_strings = marvell_get_strings,
3755 .get_stats = marvell_get_stats,
3756 },
3757 {
3758 .phy_id = MARVELL_PHY_ID_88E1121R,
3759 .phy_id_mask = MARVELL_PHY_ID_MASK,
3760 .name = "Marvell 88E1121R",
3761 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
3762 /* PHY_GBIT_FEATURES */
3763 .probe = marvell_probe,
3764 .config_init = marvell_1011gbe_config_init,
3765 .config_aneg = m88e1121_config_aneg,
3766 .read_status = marvell_read_status,
3767 .config_intr = marvell_config_intr,
3768 .handle_interrupt = marvell_handle_interrupt,
3769 .resume = genphy_resume,
3770 .suspend = genphy_suspend,
3771 .read_page = marvell_read_page,
3772 .write_page = marvell_write_page,
3773 .get_sset_count = marvell_get_sset_count,
3774 .get_strings = marvell_get_strings,
3775 .get_stats = marvell_get_stats,
3776 .get_tunable = m88e1011_get_tunable,
3777 .set_tunable = m88e1011_set_tunable,
3778 },
3779 {
3780 .phy_id = MARVELL_PHY_ID_88E1318S,
3781 .phy_id_mask = MARVELL_PHY_ID_MASK,
3782 .name = "Marvell 88E1318S",
3783 /* PHY_GBIT_FEATURES */
3784 .probe = marvell_probe,
3785 .config_init = m88e1318_config_init,
3786 .config_aneg = m88e1318_config_aneg,
3787 .read_status = marvell_read_status,
3788 .config_intr = marvell_config_intr,
3789 .handle_interrupt = marvell_handle_interrupt,
3790 .get_wol = m88e1318_get_wol,
3791 .set_wol = m88e1318_set_wol,
3792 .resume = genphy_resume,
3793 .suspend = genphy_suspend,
3794 .read_page = marvell_read_page,
3795 .write_page = marvell_write_page,
3796 .get_sset_count = marvell_get_sset_count,
3797 .get_strings = marvell_get_strings,
3798 .get_stats = marvell_get_stats,
3799 .led_brightness_set = m88e1318_led_brightness_set,
3800 .led_blink_set = m88e1318_led_blink_set,
3801 .led_hw_is_supported = m88e1318_led_hw_is_supported,
3802 .led_hw_control_set = m88e1318_led_hw_control_set,
3803 .led_hw_control_get = m88e1318_led_hw_control_get,
3804 },
3805 {
3806 .phy_id = MARVELL_PHY_ID_88E1145,
3807 .phy_id_mask = MARVELL_PHY_ID_MASK,
3808 .name = "Marvell 88E1145",
3809 /* PHY_GBIT_FEATURES */
3810 .flags = PHY_POLL_CABLE_TEST,
3811 .probe = marvell_probe,
3812 .config_init = m88e1145_config_init,
3813 .config_aneg = m88e1101_config_aneg,
3814 .config_intr = marvell_config_intr,
3815 .handle_interrupt = marvell_handle_interrupt,
3816 .resume = genphy_resume,
3817 .suspend = genphy_suspend,
3818 .read_page = marvell_read_page,
3819 .write_page = marvell_write_page,
3820 .get_sset_count = marvell_get_sset_count,
3821 .get_strings = marvell_get_strings,
3822 .get_stats = marvell_get_stats,
3823 .get_tunable = m88e1111_get_tunable,
3824 .set_tunable = m88e1111_set_tunable,
3825 .cable_test_start = m88e1111_vct_cable_test_start,
3826 .cable_test_get_status = m88e1111_vct_cable_test_get_status,
3827 },
3828 {
3829 .phy_id = MARVELL_PHY_ID_88E1149R,
3830 .phy_id_mask = MARVELL_PHY_ID_MASK,
3831 .name = "Marvell 88E1149R",
3832 /* PHY_GBIT_FEATURES */
3833 .probe = marvell_probe,
3834 .config_init = m88e1149_config_init,
3835 .config_aneg = m88e1118_config_aneg,
3836 .config_intr = marvell_config_intr,
3837 .handle_interrupt = marvell_handle_interrupt,
3838 .resume = genphy_resume,
3839 .suspend = genphy_suspend,
3840 .read_page = marvell_read_page,
3841 .write_page = marvell_write_page,
3842 .get_sset_count = marvell_get_sset_count,
3843 .get_strings = marvell_get_strings,
3844 .get_stats = marvell_get_stats,
3845 },
3846 {
3847 .phy_id = MARVELL_PHY_ID_88E1240,
3848 .phy_id_mask = MARVELL_PHY_ID_MASK,
3849 .name = "Marvell 88E1240",
3850 /* PHY_GBIT_FEATURES */
3851 .probe = marvell_probe,
3852 .config_init = m88e1112_config_init,
3853 .config_aneg = marvell_config_aneg,
3854 .config_intr = marvell_config_intr,
3855 .handle_interrupt = marvell_handle_interrupt,
3856 .resume = genphy_resume,
3857 .suspend = genphy_suspend,
3858 .read_page = marvell_read_page,
3859 .write_page = marvell_write_page,
3860 .get_sset_count = marvell_get_sset_count,
3861 .get_strings = marvell_get_strings,
3862 .get_stats = marvell_get_stats,
3863 .get_tunable = m88e1011_get_tunable,
3864 .set_tunable = m88e1011_set_tunable,
3865 },
3866 {
3867 .phy_id = MARVELL_PHY_ID_88E1116R,
3868 .phy_id_mask = MARVELL_PHY_ID_MASK,
3869 .name = "Marvell 88E1116R",
3870 /* PHY_GBIT_FEATURES */
3871 .probe = marvell_probe,
3872 .config_init = m88e1116r_config_init,
3873 .config_intr = marvell_config_intr,
3874 .handle_interrupt = marvell_handle_interrupt,
3875 .resume = genphy_resume,
3876 .suspend = genphy_suspend,
3877 .read_page = marvell_read_page,
3878 .write_page = marvell_write_page,
3879 .get_sset_count = marvell_get_sset_count,
3880 .get_strings = marvell_get_strings,
3881 .get_stats = marvell_get_stats,
3882 .get_tunable = m88e1011_get_tunable,
3883 .set_tunable = m88e1011_set_tunable,
3884 },
3885 {
3886 .phy_id = MARVELL_PHY_ID_88E1510,
3887 .phy_id_mask = MARVELL_PHY_ID_MASK,
3888 .name = "Marvell 88E1510",
3889 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3890 .features = PHY_GBIT_FIBRE_FEATURES,
3891 .flags = PHY_POLL_CABLE_TEST,
3892 .probe = m88e1510_probe,
3893 .config_init = m88e1510_config_init,
3894 .config_aneg = m88e1510_config_aneg,
3895 .read_status = marvell_read_status,
3896 .config_intr = marvell_config_intr,
3897 .handle_interrupt = marvell_handle_interrupt,
3898 .get_wol = m88e1318_get_wol,
3899 .set_wol = m88e1318_set_wol,
3900 .resume = marvell_resume,
3901 .suspend = marvell_suspend,
3902 .read_page = marvell_read_page,
3903 .write_page = marvell_write_page,
3904 .get_sset_count = marvell_get_sset_count,
3905 .get_strings = marvell_get_strings,
3906 .get_stats = marvell_get_stats,
3907 .set_loopback = m88e1510_loopback,
3908 .get_tunable = m88e1011_get_tunable,
3909 .set_tunable = m88e1011_set_tunable,
3910 .cable_test_start = marvell_vct7_cable_test_start,
3911 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3912 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3913 .led_brightness_set = m88e1318_led_brightness_set,
3914 .led_blink_set = m88e1318_led_blink_set,
3915 .led_hw_is_supported = m88e1318_led_hw_is_supported,
3916 .led_hw_control_set = m88e1318_led_hw_control_set,
3917 .led_hw_control_get = m88e1318_led_hw_control_get,
3918 },
3919 {
3920 .phy_id = MARVELL_PHY_ID_88E1540,
3921 .phy_id_mask = MARVELL_PHY_ID_MASK,
3922 .name = "Marvell 88E1540",
3923 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3924 /* PHY_GBIT_FEATURES */
3925 .flags = PHY_POLL_CABLE_TEST,
3926 .probe = marvell_probe,
3927 .config_init = marvell_1011gbe_config_init,
3928 .config_aneg = m88e1510_config_aneg,
3929 .read_status = marvell_read_status,
3930 .config_intr = marvell_config_intr,
3931 .handle_interrupt = marvell_handle_interrupt,
3932 .resume = genphy_resume,
3933 .suspend = genphy_suspend,
3934 .read_page = marvell_read_page,
3935 .write_page = marvell_write_page,
3936 .get_sset_count = marvell_get_sset_count,
3937 .get_strings = marvell_get_strings,
3938 .get_stats = marvell_get_stats,
3939 .get_tunable = m88e1540_get_tunable,
3940 .set_tunable = m88e1540_set_tunable,
3941 .cable_test_start = marvell_vct7_cable_test_start,
3942 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3943 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3944 .led_brightness_set = m88e1318_led_brightness_set,
3945 .led_blink_set = m88e1318_led_blink_set,
3946 .led_hw_is_supported = m88e1318_led_hw_is_supported,
3947 .led_hw_control_set = m88e1318_led_hw_control_set,
3948 .led_hw_control_get = m88e1318_led_hw_control_get,
3949 },
3950 {
3951 .phy_id = MARVELL_PHY_ID_88E1545,
3952 .phy_id_mask = MARVELL_PHY_ID_MASK,
3953 .name = "Marvell 88E1545",
3954 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3955 .probe = marvell_probe,
3956 /* PHY_GBIT_FEATURES */
3957 .flags = PHY_POLL_CABLE_TEST,
3958 .config_init = marvell_1011gbe_config_init,
3959 .config_aneg = m88e1510_config_aneg,
3960 .read_status = marvell_read_status,
3961 .config_intr = marvell_config_intr,
3962 .handle_interrupt = marvell_handle_interrupt,
3963 .resume = genphy_resume,
3964 .suspend = genphy_suspend,
3965 .read_page = marvell_read_page,
3966 .write_page = marvell_write_page,
3967 .get_sset_count = marvell_get_sset_count,
3968 .get_strings = marvell_get_strings,
3969 .get_stats = marvell_get_stats,
3970 .get_tunable = m88e1540_get_tunable,
3971 .set_tunable = m88e1540_set_tunable,
3972 .cable_test_start = marvell_vct7_cable_test_start,
3973 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3974 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3975 .led_brightness_set = m88e1318_led_brightness_set,
3976 .led_blink_set = m88e1318_led_blink_set,
3977 .led_hw_is_supported = m88e1318_led_hw_is_supported,
3978 .led_hw_control_set = m88e1318_led_hw_control_set,
3979 .led_hw_control_get = m88e1318_led_hw_control_get,
3980 },
3981 {
3982 .phy_id = MARVELL_PHY_ID_88E3016,
3983 .phy_id_mask = MARVELL_PHY_ID_MASK,
3984 .name = "Marvell 88E3016",
3985 /* PHY_BASIC_FEATURES */
3986 .probe = marvell_probe,
3987 .config_init = m88e3016_config_init,
3988 .aneg_done = marvell_aneg_done,
3989 .read_status = marvell_read_status,
3990 .config_intr = marvell_config_intr,
3991 .handle_interrupt = marvell_handle_interrupt,
3992 .resume = genphy_resume,
3993 .suspend = genphy_suspend,
3994 .read_page = marvell_read_page,
3995 .write_page = marvell_write_page,
3996 .get_sset_count = marvell_get_sset_count,
3997 .get_strings = marvell_get_strings,
3998 .get_stats = marvell_get_stats,
3999 },
4000 {
4001 .phy_id = MARVELL_PHY_ID_88E6250_FAMILY,
4002 .phy_id_mask = MARVELL_PHY_ID_MASK,
4003 .name = "Marvell 88E6250 Family",
4004 /* PHY_BASIC_FEATURES */
4005 .probe = marvell_probe,
4006 .aneg_done = marvell_aneg_done,
4007 .config_intr = marvell_config_intr,
4008 .handle_interrupt = marvell_handle_interrupt,
4009 .resume = genphy_resume,
4010 .suspend = genphy_suspend,
4011 .get_sset_count = marvell_get_sset_count_simple,
4012 .get_strings = marvell_get_strings_simple,
4013 .get_stats = marvell_get_stats_simple,
4014 },
4015 {
4016 .phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
4017 .phy_id_mask = MARVELL_PHY_ID_MASK,
4018 .name = "Marvell 88E6341 Family",
4019 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
4020 /* PHY_GBIT_FEATURES */
4021 .flags = PHY_POLL_CABLE_TEST,
4022 .probe = marvell_probe,
4023 .config_init = marvell_1011gbe_config_init,
4024 .config_aneg = m88e6390_config_aneg,
4025 .read_status = marvell_read_status,
4026 .config_intr = marvell_config_intr,
4027 .handle_interrupt = marvell_handle_interrupt,
4028 .resume = genphy_resume,
4029 .suspend = genphy_suspend,
4030 .read_page = marvell_read_page,
4031 .write_page = marvell_write_page,
4032 .get_sset_count = marvell_get_sset_count,
4033 .get_strings = marvell_get_strings,
4034 .get_stats = marvell_get_stats,
4035 .get_tunable = m88e1540_get_tunable,
4036 .set_tunable = m88e1540_set_tunable,
4037 .cable_test_start = marvell_vct7_cable_test_start,
4038 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
4039 .cable_test_get_status = marvell_vct7_cable_test_get_status,
4040 },
4041 {
4042 .phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
4043 .phy_id_mask = MARVELL_PHY_ID_MASK,
4044 .name = "Marvell 88E6390 Family",
4045 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
4046 /* PHY_GBIT_FEATURES */
4047 .flags = PHY_POLL_CABLE_TEST,
4048 .probe = marvell_probe,
4049 .config_init = marvell_1011gbe_config_init,
4050 .config_aneg = m88e6390_config_aneg,
4051 .read_status = marvell_read_status,
4052 .config_intr = marvell_config_intr,
4053 .handle_interrupt = marvell_handle_interrupt,
4054 .resume = genphy_resume,
4055 .suspend = genphy_suspend,
4056 .read_page = marvell_read_page,
4057 .write_page = marvell_write_page,
4058 .get_sset_count = marvell_get_sset_count,
4059 .get_strings = marvell_get_strings,
4060 .get_stats = marvell_get_stats,
4061 .get_tunable = m88e1540_get_tunable,
4062 .set_tunable = m88e1540_set_tunable,
4063 .cable_test_start = marvell_vct7_cable_test_start,
4064 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
4065 .cable_test_get_status = marvell_vct7_cable_test_get_status,
4066 },
4067 {
4068 .phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
4069 .phy_id_mask = MARVELL_PHY_ID_MASK,
4070 .name = "Marvell 88E6393 Family",
4071 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
4072 /* PHY_GBIT_FEATURES */
4073 .flags = PHY_POLL_CABLE_TEST,
4074 .probe = marvell_probe,
4075 .config_init = marvell_1011gbe_config_init,
4076 .config_aneg = m88e1510_config_aneg,
4077 .read_status = marvell_read_status,
4078 .config_intr = marvell_config_intr,
4079 .handle_interrupt = marvell_handle_interrupt,
4080 .resume = genphy_resume,
4081 .suspend = genphy_suspend,
4082 .read_page = marvell_read_page,
4083 .write_page = marvell_write_page,
4084 .get_sset_count = marvell_get_sset_count,
4085 .get_strings = marvell_get_strings,
4086 .get_stats = marvell_get_stats,
4087 .get_tunable = m88e1540_get_tunable,
4088 .set_tunable = m88e1540_set_tunable,
4089 .cable_test_start = marvell_vct7_cable_test_start,
4090 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
4091 .cable_test_get_status = marvell_vct7_cable_test_get_status,
4092 },
4093 {
4094 .phy_id = MARVELL_PHY_ID_88E1340S,
4095 .phy_id_mask = MARVELL_PHY_ID_MASK,
4096 .name = "Marvell 88E1340S",
4097 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
4098 .probe = marvell_probe,
4099 /* PHY_GBIT_FEATURES */
4100 .config_init = marvell_1011gbe_config_init,
4101 .config_aneg = m88e1510_config_aneg,
4102 .read_status = marvell_read_status,
4103 .config_intr = marvell_config_intr,
4104 .handle_interrupt = marvell_handle_interrupt,
4105 .resume = genphy_resume,
4106 .suspend = genphy_suspend,
4107 .read_page = marvell_read_page,
4108 .write_page = marvell_write_page,
4109 .get_sset_count = marvell_get_sset_count,
4110 .get_strings = marvell_get_strings,
4111 .get_stats = marvell_get_stats,
4112 .get_tunable = m88e1540_get_tunable,
4113 .set_tunable = m88e1540_set_tunable,
4114 },
4115 {
4116 .phy_id = MARVELL_PHY_ID_88E1548P,
4117 .phy_id_mask = MARVELL_PHY_ID_MASK,
4118 .name = "Marvell 88E1548P",
4119 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
4120 .probe = marvell_probe,
4121 .features = PHY_GBIT_FIBRE_FEATURES,
4122 .config_init = marvell_1011gbe_config_init,
4123 .config_aneg = m88e1510_config_aneg,
4124 .read_status = marvell_read_status,
4125 .config_intr = marvell_config_intr,
4126 .handle_interrupt = marvell_handle_interrupt,
4127 .resume = genphy_resume,
4128 .suspend = genphy_suspend,
4129 .read_page = marvell_read_page,
4130 .write_page = marvell_write_page,
4131 .get_sset_count = marvell_get_sset_count,
4132 .get_strings = marvell_get_strings,
4133 .get_stats = marvell_get_stats,
4134 .get_tunable = m88e1540_get_tunable,
4135 .set_tunable = m88e1540_set_tunable,
4136 .led_brightness_set = m88e1318_led_brightness_set,
4137 .led_blink_set = m88e1318_led_blink_set,
4138 .led_hw_is_supported = m88e1318_led_hw_is_supported,
4139 .led_hw_control_set = m88e1318_led_hw_control_set,
4140 .led_hw_control_get = m88e1318_led_hw_control_get,
4141 },
4142};
4143
4144module_phy_driver(marvell_drivers);
4145
4146static struct mdio_device_id __maybe_unused marvell_tbl[] = {
4147 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
4148 { MARVELL_PHY_ID_88E3082, MARVELL_PHY_ID_MASK },
4149 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
4150 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
4151 { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
4152 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
4153 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
4154 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
4155 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
4156 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
4157 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
4158 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
4159 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
4160 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
4161 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
4162 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
4163 { MARVELL_PHY_ID_88E6250_FAMILY, MARVELL_PHY_ID_MASK },
4164 { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
4165 { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
4166 { MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
4167 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
4168 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
4169 { }
4170};
4171
4172MODULE_DEVICE_TABLE(mdio, marvell_tbl);
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * drivers/net/phy/marvell.c
4 *
5 * Driver for Marvell PHYs
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 *
11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12 */
13#include <linux/kernel.h>
14#include <linux/string.h>
15#include <linux/ctype.h>
16#include <linux/errno.h>
17#include <linux/unistd.h>
18#include <linux/hwmon.h>
19#include <linux/interrupt.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/skbuff.h>
25#include <linux/spinlock.h>
26#include <linux/mm.h>
27#include <linux/module.h>
28#include <linux/mii.h>
29#include <linux/ethtool.h>
30#include <linux/ethtool_netlink.h>
31#include <linux/phy.h>
32#include <linux/marvell_phy.h>
33#include <linux/bitfield.h>
34#include <linux/of.h>
35
36#include <linux/io.h>
37#include <asm/irq.h>
38#include <linux/uaccess.h>
39
40#define MII_MARVELL_PHY_PAGE 22
41#define MII_MARVELL_COPPER_PAGE 0x00
42#define MII_MARVELL_FIBER_PAGE 0x01
43#define MII_MARVELL_MSCR_PAGE 0x02
44#define MII_MARVELL_LED_PAGE 0x03
45#define MII_MARVELL_VCT5_PAGE 0x05
46#define MII_MARVELL_MISC_TEST_PAGE 0x06
47#define MII_MARVELL_VCT7_PAGE 0x07
48#define MII_MARVELL_WOL_PAGE 0x11
49
50#define MII_M1011_IEVENT 0x13
51#define MII_M1011_IEVENT_CLEAR 0x0000
52
53#define MII_M1011_IMASK 0x12
54#define MII_M1011_IMASK_INIT 0x6400
55#define MII_M1011_IMASK_CLEAR 0x0000
56
57#define MII_M1011_PHY_SCR 0x10
58#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
59#define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
60#define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
61#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
62#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
63#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
64
65#define MII_M1011_PHY_SSR 0x11
66#define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
67
68#define MII_M1111_PHY_LED_CONTROL 0x18
69#define MII_M1111_PHY_LED_DIRECT 0x4100
70#define MII_M1111_PHY_LED_COMBINE 0x411c
71#define MII_M1111_PHY_EXT_CR 0x14
72#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
73#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
74#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
75#define MII_M1111_RGMII_RX_DELAY BIT(7)
76#define MII_M1111_RGMII_TX_DELAY BIT(1)
77#define MII_M1111_PHY_EXT_SR 0x1b
78
79#define MII_M1111_HWCFG_MODE_MASK 0xf
80#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
81#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
82#define MII_M1111_HWCFG_MODE_RTBI 0x7
83#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
84#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
85#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
86#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
87
88#define MII_88E1121_PHY_MSCR_REG 21
89#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
90#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
91#define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
92
93#define MII_88E1121_MISC_TEST 0x1a
94#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
95#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
96#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
97#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
98#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
99#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
100
101#define MII_88E1510_TEMP_SENSOR 0x1b
102#define MII_88E1510_TEMP_SENSOR_MASK 0xff
103
104#define MII_88E1540_COPPER_CTRL3 0x1a
105#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
106#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
107#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
108#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
109#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
110#define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
111
112#define MII_88E6390_MISC_TEST 0x1b
113#define MII_88E6390_MISC_TEST_SAMPLE_1S 0
114#define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
115#define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
116#define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
117#define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
118
119#define MII_88E6390_TEMP_SENSOR 0x1c
120#define MII_88E6390_TEMP_SENSOR_MASK 0xff
121#define MII_88E6390_TEMP_SENSOR_SAMPLES 10
122
123#define MII_88E1318S_PHY_MSCR1_REG 16
124#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
125
126/* Copper Specific Interrupt Enable Register */
127#define MII_88E1318S_PHY_CSIER 0x12
128/* WOL Event Interrupt Enable */
129#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
130
131/* LED Timer Control Register */
132#define MII_88E1318S_PHY_LED_TCR 0x12
133#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
134#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
135#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
136
137/* Magic Packet MAC address registers */
138#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
139#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
140#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
141
142#define MII_88E1318S_PHY_WOL_CTRL 0x10
143#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
144#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
145
146#define MII_PHY_LED_CTRL 16
147#define MII_88E1121_PHY_LED_DEF 0x0030
148#define MII_88E1510_PHY_LED_DEF 0x1177
149#define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
150
151#define MII_M1011_PHY_STATUS 0x11
152#define MII_M1011_PHY_STATUS_1000 0x8000
153#define MII_M1011_PHY_STATUS_100 0x4000
154#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
155#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
156#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
157#define MII_M1011_PHY_STATUS_LINK 0x0400
158
159#define MII_88E3016_PHY_SPEC_CTRL 0x10
160#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
161#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
162
163#define MII_88E1510_GEN_CTRL_REG_1 0x14
164#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
165#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
166#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
167
168#define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
169#define MII_VCT5_TX_RX_MDI1_COUPLING 0x11
170#define MII_VCT5_TX_RX_MDI2_COUPLING 0x12
171#define MII_VCT5_TX_RX_MDI3_COUPLING 0x13
172#define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00
173#define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8
174#define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15)
175
176#define MII_VCT5_CTRL 0x17
177#define MII_VCT5_CTRL_ENABLE BIT(15)
178#define MII_VCT5_CTRL_COMPLETE BIT(14)
179#define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11)
180#define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11)
181#define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11)
182#define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11)
183#define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11)
184#define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8)
185#define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8)
186#define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8)
187#define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8)
188#define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8)
189#define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8)
190#define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8)
191#define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8)
192#define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8)
193#define MII_VCT5_CTRL_SAMPLES_SHIFT 8
194#define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6)
195#define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6)
196#define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6)
197#define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6)
198#define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3
199
200#define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18
201#define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511
202#define MII_VCT5_TX_PULSE_CTRL 0x1c
203#define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12)
204#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10)
205#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10)
206#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10)
207#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10)
208#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10
209#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8)
210#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8)
211#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8)
212#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8)
213#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8
214#define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7)
215#define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0)
216
217/* For TDR measurements less than 11 meters, a short pulse should be
218 * used.
219 */
220#define TDR_SHORT_CABLE_LENGTH 11
221
222#define MII_VCT7_PAIR_0_DISTANCE 0x10
223#define MII_VCT7_PAIR_1_DISTANCE 0x11
224#define MII_VCT7_PAIR_2_DISTANCE 0x12
225#define MII_VCT7_PAIR_3_DISTANCE 0x13
226
227#define MII_VCT7_RESULTS 0x14
228#define MII_VCT7_RESULTS_PAIR3_MASK 0xf000
229#define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00
230#define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0
231#define MII_VCT7_RESULTS_PAIR0_MASK 0x000f
232#define MII_VCT7_RESULTS_PAIR3_SHIFT 12
233#define MII_VCT7_RESULTS_PAIR2_SHIFT 8
234#define MII_VCT7_RESULTS_PAIR1_SHIFT 4
235#define MII_VCT7_RESULTS_PAIR0_SHIFT 0
236#define MII_VCT7_RESULTS_INVALID 0
237#define MII_VCT7_RESULTS_OK 1
238#define MII_VCT7_RESULTS_OPEN 2
239#define MII_VCT7_RESULTS_SAME_SHORT 3
240#define MII_VCT7_RESULTS_CROSS_SHORT 4
241#define MII_VCT7_RESULTS_BUSY 9
242
243#define MII_VCT7_CTRL 0x15
244#define MII_VCT7_CTRL_RUN_NOW BIT(15)
245#define MII_VCT7_CTRL_RUN_ANEG BIT(14)
246#define MII_VCT7_CTRL_DISABLE_CROSS BIT(13)
247#define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12)
248#define MII_VCT7_CTRL_IN_PROGRESS BIT(11)
249#define MII_VCT7_CTRL_METERS BIT(10)
250#define MII_VCT7_CTRL_CENTIMETERS 0
251
252#define LPA_PAUSE_FIBER 0x180
253#define LPA_PAUSE_ASYM_FIBER 0x100
254
255#define NB_FIBER_STATS 1
256
257MODULE_DESCRIPTION("Marvell PHY driver");
258MODULE_AUTHOR("Andy Fleming");
259MODULE_LICENSE("GPL");
260
261struct marvell_hw_stat {
262 const char *string;
263 u8 page;
264 u8 reg;
265 u8 bits;
266};
267
268static struct marvell_hw_stat marvell_hw_stats[] = {
269 { "phy_receive_errors_copper", 0, 21, 16},
270 { "phy_idle_errors", 0, 10, 8 },
271 { "phy_receive_errors_fiber", 1, 21, 16},
272};
273
274struct marvell_priv {
275 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
276 char *hwmon_name;
277 struct device *hwmon_dev;
278 bool cable_test_tdr;
279 u32 first;
280 u32 last;
281 u32 step;
282 s8 pair;
283};
284
285static int marvell_read_page(struct phy_device *phydev)
286{
287 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
288}
289
290static int marvell_write_page(struct phy_device *phydev, int page)
291{
292 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
293}
294
295static int marvell_set_page(struct phy_device *phydev, int page)
296{
297 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
298}
299
300static int marvell_ack_interrupt(struct phy_device *phydev)
301{
302 int err;
303
304 /* Clear the interrupts by reading the reg */
305 err = phy_read(phydev, MII_M1011_IEVENT);
306
307 if (err < 0)
308 return err;
309
310 return 0;
311}
312
313static int marvell_config_intr(struct phy_device *phydev)
314{
315 int err;
316
317 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
318 err = phy_write(phydev, MII_M1011_IMASK,
319 MII_M1011_IMASK_INIT);
320 else
321 err = phy_write(phydev, MII_M1011_IMASK,
322 MII_M1011_IMASK_CLEAR);
323
324 return err;
325}
326
327static int marvell_set_polarity(struct phy_device *phydev, int polarity)
328{
329 int reg;
330 int err;
331 int val;
332
333 /* get the current settings */
334 reg = phy_read(phydev, MII_M1011_PHY_SCR);
335 if (reg < 0)
336 return reg;
337
338 val = reg;
339 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
340 switch (polarity) {
341 case ETH_TP_MDI:
342 val |= MII_M1011_PHY_SCR_MDI;
343 break;
344 case ETH_TP_MDI_X:
345 val |= MII_M1011_PHY_SCR_MDI_X;
346 break;
347 case ETH_TP_MDI_AUTO:
348 case ETH_TP_MDI_INVALID:
349 default:
350 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
351 break;
352 }
353
354 if (val != reg) {
355 /* Set the new polarity value in the register */
356 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
357 if (err)
358 return err;
359 }
360
361 return val != reg;
362}
363
364static int marvell_config_aneg(struct phy_device *phydev)
365{
366 int changed = 0;
367 int err;
368
369 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
370 if (err < 0)
371 return err;
372
373 changed = err;
374
375 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
376 MII_M1111_PHY_LED_DIRECT);
377 if (err < 0)
378 return err;
379
380 err = genphy_config_aneg(phydev);
381 if (err < 0)
382 return err;
383
384 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
385 /* A write to speed/duplex bits (that is performed by
386 * genphy_config_aneg() call above) must be followed by
387 * a software reset. Otherwise, the write has no effect.
388 */
389 err = genphy_soft_reset(phydev);
390 if (err < 0)
391 return err;
392 }
393
394 return 0;
395}
396
397static int m88e1101_config_aneg(struct phy_device *phydev)
398{
399 int err;
400
401 /* This Marvell PHY has an errata which requires
402 * that certain registers get written in order
403 * to restart autonegotiation
404 */
405 err = genphy_soft_reset(phydev);
406 if (err < 0)
407 return err;
408
409 err = phy_write(phydev, 0x1d, 0x1f);
410 if (err < 0)
411 return err;
412
413 err = phy_write(phydev, 0x1e, 0x200c);
414 if (err < 0)
415 return err;
416
417 err = phy_write(phydev, 0x1d, 0x5);
418 if (err < 0)
419 return err;
420
421 err = phy_write(phydev, 0x1e, 0);
422 if (err < 0)
423 return err;
424
425 err = phy_write(phydev, 0x1e, 0x100);
426 if (err < 0)
427 return err;
428
429 return marvell_config_aneg(phydev);
430}
431
432#if IS_ENABLED(CONFIG_OF_MDIO)
433/* Set and/or override some configuration registers based on the
434 * marvell,reg-init property stored in the of_node for the phydev.
435 *
436 * marvell,reg-init = <reg-page reg mask value>,...;
437 *
438 * There may be one or more sets of <reg-page reg mask value>:
439 *
440 * reg-page: which register bank to use.
441 * reg: the register.
442 * mask: if non-zero, ANDed with existing register value.
443 * value: ORed with the masked value and written to the regiser.
444 *
445 */
446static int marvell_of_reg_init(struct phy_device *phydev)
447{
448 const __be32 *paddr;
449 int len, i, saved_page, current_page, ret = 0;
450
451 if (!phydev->mdio.dev.of_node)
452 return 0;
453
454 paddr = of_get_property(phydev->mdio.dev.of_node,
455 "marvell,reg-init", &len);
456 if (!paddr || len < (4 * sizeof(*paddr)))
457 return 0;
458
459 saved_page = phy_save_page(phydev);
460 if (saved_page < 0)
461 goto err;
462 current_page = saved_page;
463
464 len /= sizeof(*paddr);
465 for (i = 0; i < len - 3; i += 4) {
466 u16 page = be32_to_cpup(paddr + i);
467 u16 reg = be32_to_cpup(paddr + i + 1);
468 u16 mask = be32_to_cpup(paddr + i + 2);
469 u16 val_bits = be32_to_cpup(paddr + i + 3);
470 int val;
471
472 if (page != current_page) {
473 current_page = page;
474 ret = marvell_write_page(phydev, page);
475 if (ret < 0)
476 goto err;
477 }
478
479 val = 0;
480 if (mask) {
481 val = __phy_read(phydev, reg);
482 if (val < 0) {
483 ret = val;
484 goto err;
485 }
486 val &= mask;
487 }
488 val |= val_bits;
489
490 ret = __phy_write(phydev, reg, val);
491 if (ret < 0)
492 goto err;
493 }
494err:
495 return phy_restore_page(phydev, saved_page, ret);
496}
497#else
498static int marvell_of_reg_init(struct phy_device *phydev)
499{
500 return 0;
501}
502#endif /* CONFIG_OF_MDIO */
503
504static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
505{
506 int mscr;
507
508 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
509 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
510 MII_88E1121_PHY_MSCR_TX_DELAY;
511 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
512 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
513 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
514 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
515 else
516 mscr = 0;
517
518 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
519 MII_88E1121_PHY_MSCR_REG,
520 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
521}
522
523static int m88e1121_config_aneg(struct phy_device *phydev)
524{
525 int changed = 0;
526 int err = 0;
527
528 if (phy_interface_is_rgmii(phydev)) {
529 err = m88e1121_config_aneg_rgmii_delays(phydev);
530 if (err < 0)
531 return err;
532 }
533
534 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
535 if (err < 0)
536 return err;
537
538 changed = err;
539
540 err = genphy_config_aneg(phydev);
541 if (err < 0)
542 return err;
543
544 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
545 /* A software reset is used to ensure a "commit" of the
546 * changes is done.
547 */
548 err = genphy_soft_reset(phydev);
549 if (err < 0)
550 return err;
551 }
552
553 return 0;
554}
555
556static int m88e1318_config_aneg(struct phy_device *phydev)
557{
558 int err;
559
560 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
561 MII_88E1318S_PHY_MSCR1_REG,
562 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
563 if (err < 0)
564 return err;
565
566 return m88e1121_config_aneg(phydev);
567}
568
569/**
570 * linkmode_adv_to_fiber_adv_t
571 * @advertise: the linkmode advertisement settings
572 *
573 * A small helper function that translates linkmode advertisement
574 * settings to phy autonegotiation advertisements for the MII_ADV
575 * register for fiber link.
576 */
577static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
578{
579 u32 result = 0;
580
581 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
582 result |= ADVERTISE_1000XHALF;
583 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
584 result |= ADVERTISE_1000XFULL;
585
586 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
587 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
588 result |= ADVERTISE_1000XPSE_ASYM;
589 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
590 result |= ADVERTISE_1000XPAUSE;
591
592 return result;
593}
594
595/**
596 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
597 * @phydev: target phy_device struct
598 *
599 * Description: If auto-negotiation is enabled, we configure the
600 * advertising, and then restart auto-negotiation. If it is not
601 * enabled, then we write the BMCR. Adapted for fiber link in
602 * some Marvell's devices.
603 */
604static int marvell_config_aneg_fiber(struct phy_device *phydev)
605{
606 int changed = 0;
607 int err;
608 u16 adv;
609
610 if (phydev->autoneg != AUTONEG_ENABLE)
611 return genphy_setup_forced(phydev);
612
613 /* Only allow advertising what this PHY supports */
614 linkmode_and(phydev->advertising, phydev->advertising,
615 phydev->supported);
616
617 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
618
619 /* Setup fiber advertisement */
620 err = phy_modify_changed(phydev, MII_ADVERTISE,
621 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
622 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
623 adv);
624 if (err < 0)
625 return err;
626 if (err > 0)
627 changed = 1;
628
629 return genphy_check_and_restart_aneg(phydev, changed);
630}
631
632static int m88e1510_config_aneg(struct phy_device *phydev)
633{
634 int err;
635
636 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
637 if (err < 0)
638 goto error;
639
640 /* Configure the copper link first */
641 err = m88e1318_config_aneg(phydev);
642 if (err < 0)
643 goto error;
644
645 /* Do not touch the fiber page if we're in copper->sgmii mode */
646 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
647 return 0;
648
649 /* Then the fiber link */
650 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
651 if (err < 0)
652 goto error;
653
654 err = marvell_config_aneg_fiber(phydev);
655 if (err < 0)
656 goto error;
657
658 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
659
660error:
661 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
662 return err;
663}
664
665static void marvell_config_led(struct phy_device *phydev)
666{
667 u16 def_config;
668 int err;
669
670 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
671 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
672 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
673 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
674 def_config = MII_88E1121_PHY_LED_DEF;
675 break;
676 /* Default PHY LED config:
677 * LED[0] .. 1000Mbps Link
678 * LED[1] .. 100Mbps Link
679 * LED[2] .. Blink, Activity
680 */
681 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
682 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
683 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
684 else
685 def_config = MII_88E1510_PHY_LED_DEF;
686 break;
687 default:
688 return;
689 }
690
691 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
692 def_config);
693 if (err < 0)
694 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
695}
696
697static int marvell_config_init(struct phy_device *phydev)
698{
699 /* Set defalut LED */
700 marvell_config_led(phydev);
701
702 /* Set registers from marvell,reg-init DT property */
703 return marvell_of_reg_init(phydev);
704}
705
706static int m88e3016_config_init(struct phy_device *phydev)
707{
708 int ret;
709
710 /* Enable Scrambler and Auto-Crossover */
711 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
712 MII_88E3016_DISABLE_SCRAMBLER,
713 MII_88E3016_AUTO_MDIX_CROSSOVER);
714 if (ret < 0)
715 return ret;
716
717 return marvell_config_init(phydev);
718}
719
720static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
721 u16 mode,
722 int fibre_copper_auto)
723{
724 if (fibre_copper_auto)
725 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
726
727 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
728 MII_M1111_HWCFG_MODE_MASK |
729 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
730 MII_M1111_HWCFG_FIBER_COPPER_RES,
731 mode);
732}
733
734static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
735{
736 int delay;
737
738 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
739 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
740 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
741 delay = MII_M1111_RGMII_RX_DELAY;
742 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
743 delay = MII_M1111_RGMII_TX_DELAY;
744 } else {
745 delay = 0;
746 }
747
748 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
749 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
750 delay);
751}
752
753static int m88e1111_config_init_rgmii(struct phy_device *phydev)
754{
755 int temp;
756 int err;
757
758 err = m88e1111_config_init_rgmii_delays(phydev);
759 if (err < 0)
760 return err;
761
762 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
763 if (temp < 0)
764 return temp;
765
766 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
767
768 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
769 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
770 else
771 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
772
773 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
774}
775
776static int m88e1111_config_init_sgmii(struct phy_device *phydev)
777{
778 int err;
779
780 err = m88e1111_config_init_hwcfg_mode(
781 phydev,
782 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
783 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
784 if (err < 0)
785 return err;
786
787 /* make sure copper is selected */
788 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
789}
790
791static int m88e1111_config_init_rtbi(struct phy_device *phydev)
792{
793 int err;
794
795 err = m88e1111_config_init_rgmii_delays(phydev);
796 if (err < 0)
797 return err;
798
799 err = m88e1111_config_init_hwcfg_mode(
800 phydev,
801 MII_M1111_HWCFG_MODE_RTBI,
802 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
803 if (err < 0)
804 return err;
805
806 /* soft reset */
807 err = genphy_soft_reset(phydev);
808 if (err < 0)
809 return err;
810
811 return m88e1111_config_init_hwcfg_mode(
812 phydev,
813 MII_M1111_HWCFG_MODE_RTBI,
814 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
815}
816
817static int m88e1111_config_init(struct phy_device *phydev)
818{
819 int err;
820
821 if (phy_interface_is_rgmii(phydev)) {
822 err = m88e1111_config_init_rgmii(phydev);
823 if (err < 0)
824 return err;
825 }
826
827 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
828 err = m88e1111_config_init_sgmii(phydev);
829 if (err < 0)
830 return err;
831 }
832
833 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
834 err = m88e1111_config_init_rtbi(phydev);
835 if (err < 0)
836 return err;
837 }
838
839 err = marvell_of_reg_init(phydev);
840 if (err < 0)
841 return err;
842
843 return genphy_soft_reset(phydev);
844}
845
846static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
847{
848 int val, cnt, enable;
849
850 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
851 if (val < 0)
852 return val;
853
854 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
855 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
856
857 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
858
859 return 0;
860}
861
862static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
863{
864 int val;
865
866 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
867 return -E2BIG;
868
869 if (!cnt)
870 return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
871 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
872
873 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
874 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
875
876 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
877 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
878 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
879 val);
880}
881
882static int m88e1111_get_tunable(struct phy_device *phydev,
883 struct ethtool_tunable *tuna, void *data)
884{
885 switch (tuna->id) {
886 case ETHTOOL_PHY_DOWNSHIFT:
887 return m88e1111_get_downshift(phydev, data);
888 default:
889 return -EOPNOTSUPP;
890 }
891}
892
893static int m88e1111_set_tunable(struct phy_device *phydev,
894 struct ethtool_tunable *tuna, const void *data)
895{
896 switch (tuna->id) {
897 case ETHTOOL_PHY_DOWNSHIFT:
898 return m88e1111_set_downshift(phydev, *(const u8 *)data);
899 default:
900 return -EOPNOTSUPP;
901 }
902}
903
904static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
905{
906 int val, cnt, enable;
907
908 val = phy_read(phydev, MII_M1011_PHY_SCR);
909 if (val < 0)
910 return val;
911
912 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
913 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
914
915 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
916
917 return 0;
918}
919
920static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
921{
922 int val;
923
924 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
925 return -E2BIG;
926
927 if (!cnt)
928 return phy_clear_bits(phydev, MII_M1011_PHY_SCR,
929 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
930
931 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
932 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
933
934 return phy_modify(phydev, MII_M1011_PHY_SCR,
935 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
936 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
937 val);
938}
939
940static int m88e1011_get_tunable(struct phy_device *phydev,
941 struct ethtool_tunable *tuna, void *data)
942{
943 switch (tuna->id) {
944 case ETHTOOL_PHY_DOWNSHIFT:
945 return m88e1011_get_downshift(phydev, data);
946 default:
947 return -EOPNOTSUPP;
948 }
949}
950
951static int m88e1011_set_tunable(struct phy_device *phydev,
952 struct ethtool_tunable *tuna, const void *data)
953{
954 switch (tuna->id) {
955 case ETHTOOL_PHY_DOWNSHIFT:
956 return m88e1011_set_downshift(phydev, *(const u8 *)data);
957 default:
958 return -EOPNOTSUPP;
959 }
960}
961
962static int m88e1116r_config_init(struct phy_device *phydev)
963{
964 int err;
965
966 err = genphy_soft_reset(phydev);
967 if (err < 0)
968 return err;
969
970 msleep(500);
971
972 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
973 if (err < 0)
974 return err;
975
976 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
977 if (err < 0)
978 return err;
979
980 err = m88e1011_set_downshift(phydev, 8);
981 if (err < 0)
982 return err;
983
984 if (phy_interface_is_rgmii(phydev)) {
985 err = m88e1121_config_aneg_rgmii_delays(phydev);
986 if (err < 0)
987 return err;
988 }
989
990 err = genphy_soft_reset(phydev);
991 if (err < 0)
992 return err;
993
994 return marvell_config_init(phydev);
995}
996
997static int m88e1318_config_init(struct phy_device *phydev)
998{
999 if (phy_interrupt_is_valid(phydev)) {
1000 int err = phy_modify_paged(
1001 phydev, MII_MARVELL_LED_PAGE,
1002 MII_88E1318S_PHY_LED_TCR,
1003 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1004 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1005 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1006 if (err < 0)
1007 return err;
1008 }
1009
1010 return marvell_config_init(phydev);
1011}
1012
1013static int m88e1510_config_init(struct phy_device *phydev)
1014{
1015 int err;
1016
1017 /* SGMII-to-Copper mode initialization */
1018 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1019 /* Select page 18 */
1020 err = marvell_set_page(phydev, 18);
1021 if (err < 0)
1022 return err;
1023
1024 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1025 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1026 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1027 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1028 if (err < 0)
1029 return err;
1030
1031 /* PHY reset is necessary after changing MODE[2:0] */
1032 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
1033 MII_88E1510_GEN_CTRL_REG_1_RESET);
1034 if (err < 0)
1035 return err;
1036
1037 /* Reset page selection */
1038 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1039 if (err < 0)
1040 return err;
1041 }
1042
1043 return m88e1318_config_init(phydev);
1044}
1045
1046static int m88e1118_config_aneg(struct phy_device *phydev)
1047{
1048 int err;
1049
1050 err = genphy_soft_reset(phydev);
1051 if (err < 0)
1052 return err;
1053
1054 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1055 if (err < 0)
1056 return err;
1057
1058 err = genphy_config_aneg(phydev);
1059 return 0;
1060}
1061
1062static int m88e1118_config_init(struct phy_device *phydev)
1063{
1064 int err;
1065
1066 /* Change address */
1067 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1068 if (err < 0)
1069 return err;
1070
1071 /* Enable 1000 Mbit */
1072 err = phy_write(phydev, 0x15, 0x1070);
1073 if (err < 0)
1074 return err;
1075
1076 /* Change address */
1077 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1078 if (err < 0)
1079 return err;
1080
1081 /* Adjust LED Control */
1082 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1083 err = phy_write(phydev, 0x10, 0x1100);
1084 else
1085 err = phy_write(phydev, 0x10, 0x021e);
1086 if (err < 0)
1087 return err;
1088
1089 err = marvell_of_reg_init(phydev);
1090 if (err < 0)
1091 return err;
1092
1093 /* Reset address */
1094 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1095 if (err < 0)
1096 return err;
1097
1098 return genphy_soft_reset(phydev);
1099}
1100
1101static int m88e1149_config_init(struct phy_device *phydev)
1102{
1103 int err;
1104
1105 /* Change address */
1106 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1107 if (err < 0)
1108 return err;
1109
1110 /* Enable 1000 Mbit */
1111 err = phy_write(phydev, 0x15, 0x1048);
1112 if (err < 0)
1113 return err;
1114
1115 err = marvell_of_reg_init(phydev);
1116 if (err < 0)
1117 return err;
1118
1119 /* Reset address */
1120 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1121 if (err < 0)
1122 return err;
1123
1124 return genphy_soft_reset(phydev);
1125}
1126
1127static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1128{
1129 int err;
1130
1131 err = m88e1111_config_init_rgmii_delays(phydev);
1132 if (err < 0)
1133 return err;
1134
1135 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1136 err = phy_write(phydev, 0x1d, 0x0012);
1137 if (err < 0)
1138 return err;
1139
1140 err = phy_modify(phydev, 0x1e, 0x0fc0,
1141 2 << 9 | /* 36 ohm */
1142 2 << 6); /* 39 ohm */
1143 if (err < 0)
1144 return err;
1145
1146 err = phy_write(phydev, 0x1d, 0x3);
1147 if (err < 0)
1148 return err;
1149
1150 err = phy_write(phydev, 0x1e, 0x8000);
1151 }
1152 return err;
1153}
1154
1155static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1156{
1157 return m88e1111_config_init_hwcfg_mode(
1158 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1159 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1160}
1161
1162static int m88e1145_config_init(struct phy_device *phydev)
1163{
1164 int err;
1165
1166 /* Take care of errata E0 & E1 */
1167 err = phy_write(phydev, 0x1d, 0x001b);
1168 if (err < 0)
1169 return err;
1170
1171 err = phy_write(phydev, 0x1e, 0x418f);
1172 if (err < 0)
1173 return err;
1174
1175 err = phy_write(phydev, 0x1d, 0x0016);
1176 if (err < 0)
1177 return err;
1178
1179 err = phy_write(phydev, 0x1e, 0xa2da);
1180 if (err < 0)
1181 return err;
1182
1183 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1184 err = m88e1145_config_init_rgmii(phydev);
1185 if (err < 0)
1186 return err;
1187 }
1188
1189 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1190 err = m88e1145_config_init_sgmii(phydev);
1191 if (err < 0)
1192 return err;
1193 }
1194
1195 err = marvell_of_reg_init(phydev);
1196 if (err < 0)
1197 return err;
1198
1199 return 0;
1200}
1201
1202static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1203{
1204 int val;
1205
1206 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1207 if (val < 0)
1208 return val;
1209
1210 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1211 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1212 return 0;
1213 }
1214
1215 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1216
1217 switch (val) {
1218 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1219 *msecs = 0;
1220 break;
1221 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1222 *msecs = 10;
1223 break;
1224 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1225 *msecs = 20;
1226 break;
1227 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1228 *msecs = 40;
1229 break;
1230 default:
1231 return -EINVAL;
1232 }
1233
1234 return 0;
1235}
1236
1237static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1238{
1239 struct ethtool_eee eee;
1240 int val, ret;
1241
1242 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1243 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1244 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1245
1246 /* According to the Marvell data sheet EEE must be disabled for
1247 * Fast Link Down detection to work properly
1248 */
1249 ret = phy_ethtool_get_eee(phydev, &eee);
1250 if (!ret && eee.eee_enabled) {
1251 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1252 return -EBUSY;
1253 }
1254
1255 if (*msecs <= 5)
1256 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1257 else if (*msecs <= 15)
1258 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1259 else if (*msecs <= 30)
1260 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1261 else
1262 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1263
1264 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1265
1266 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1267 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1268 if (ret)
1269 return ret;
1270
1271 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1272 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1273}
1274
1275static int m88e1540_get_tunable(struct phy_device *phydev,
1276 struct ethtool_tunable *tuna, void *data)
1277{
1278 switch (tuna->id) {
1279 case ETHTOOL_PHY_FAST_LINK_DOWN:
1280 return m88e1540_get_fld(phydev, data);
1281 case ETHTOOL_PHY_DOWNSHIFT:
1282 return m88e1011_get_downshift(phydev, data);
1283 default:
1284 return -EOPNOTSUPP;
1285 }
1286}
1287
1288static int m88e1540_set_tunable(struct phy_device *phydev,
1289 struct ethtool_tunable *tuna, const void *data)
1290{
1291 switch (tuna->id) {
1292 case ETHTOOL_PHY_FAST_LINK_DOWN:
1293 return m88e1540_set_fld(phydev, data);
1294 case ETHTOOL_PHY_DOWNSHIFT:
1295 return m88e1011_set_downshift(phydev, *(const u8 *)data);
1296 default:
1297 return -EOPNOTSUPP;
1298 }
1299}
1300
1301/* The VOD can be out of specification on link up. Poke an
1302 * undocumented register, in an undocumented page, with a magic value
1303 * to fix this.
1304 */
1305static int m88e6390_errata(struct phy_device *phydev)
1306{
1307 int err;
1308
1309 err = phy_write(phydev, MII_BMCR,
1310 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1311 if (err)
1312 return err;
1313
1314 usleep_range(300, 400);
1315
1316 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1317 if (err)
1318 return err;
1319
1320 return genphy_soft_reset(phydev);
1321}
1322
1323static int m88e6390_config_aneg(struct phy_device *phydev)
1324{
1325 int err;
1326
1327 err = m88e6390_errata(phydev);
1328 if (err)
1329 return err;
1330
1331 return m88e1510_config_aneg(phydev);
1332}
1333
1334/**
1335 * fiber_lpa_mod_linkmode_lpa_t
1336 * @advertising: the linkmode advertisement settings
1337 * @lpa: value of the MII_LPA register for fiber link
1338 *
1339 * A small helper function that translates MII_LPA bits to linkmode LP
1340 * advertisement settings. Other bits in advertising are left
1341 * unchanged.
1342 */
1343static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1344{
1345 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1346 advertising, lpa & LPA_1000XHALF);
1347
1348 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1349 advertising, lpa & LPA_1000XFULL);
1350}
1351
1352static int marvell_read_status_page_an(struct phy_device *phydev,
1353 int fiber, int status)
1354{
1355 int lpa;
1356 int err;
1357
1358 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1359 phydev->link = 0;
1360 return 0;
1361 }
1362
1363 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1364 phydev->duplex = DUPLEX_FULL;
1365 else
1366 phydev->duplex = DUPLEX_HALF;
1367
1368 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1369 case MII_M1011_PHY_STATUS_1000:
1370 phydev->speed = SPEED_1000;
1371 break;
1372
1373 case MII_M1011_PHY_STATUS_100:
1374 phydev->speed = SPEED_100;
1375 break;
1376
1377 default:
1378 phydev->speed = SPEED_10;
1379 break;
1380 }
1381
1382 if (!fiber) {
1383 err = genphy_read_lpa(phydev);
1384 if (err < 0)
1385 return err;
1386
1387 phy_resolve_aneg_pause(phydev);
1388 } else {
1389 lpa = phy_read(phydev, MII_LPA);
1390 if (lpa < 0)
1391 return lpa;
1392
1393 /* The fiber link is only 1000M capable */
1394 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1395
1396 if (phydev->duplex == DUPLEX_FULL) {
1397 if (!(lpa & LPA_PAUSE_FIBER)) {
1398 phydev->pause = 0;
1399 phydev->asym_pause = 0;
1400 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1401 phydev->pause = 1;
1402 phydev->asym_pause = 1;
1403 } else {
1404 phydev->pause = 1;
1405 phydev->asym_pause = 0;
1406 }
1407 }
1408 }
1409
1410 return 0;
1411}
1412
1413/* marvell_read_status_page
1414 *
1415 * Description:
1416 * Check the link, then figure out the current state
1417 * by comparing what we advertise with what the link partner
1418 * advertises. Start by checking the gigabit possibilities,
1419 * then move on to 10/100.
1420 */
1421static int marvell_read_status_page(struct phy_device *phydev, int page)
1422{
1423 int status;
1424 int fiber;
1425 int err;
1426
1427 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1428 if (status < 0)
1429 return status;
1430
1431 /* Use the generic register for copper link status,
1432 * and the PHY status register for fiber link status.
1433 */
1434 if (page == MII_MARVELL_FIBER_PAGE) {
1435 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1436 } else {
1437 err = genphy_update_link(phydev);
1438 if (err)
1439 return err;
1440 }
1441
1442 if (page == MII_MARVELL_FIBER_PAGE)
1443 fiber = 1;
1444 else
1445 fiber = 0;
1446
1447 linkmode_zero(phydev->lp_advertising);
1448 phydev->pause = 0;
1449 phydev->asym_pause = 0;
1450 phydev->speed = SPEED_UNKNOWN;
1451 phydev->duplex = DUPLEX_UNKNOWN;
1452
1453 if (phydev->autoneg == AUTONEG_ENABLE)
1454 err = marvell_read_status_page_an(phydev, fiber, status);
1455 else
1456 err = genphy_read_status_fixed(phydev);
1457
1458 return err;
1459}
1460
1461/* marvell_read_status
1462 *
1463 * Some Marvell's phys have two modes: fiber and copper.
1464 * Both need status checked.
1465 * Description:
1466 * First, check the fiber link and status.
1467 * If the fiber link is down, check the copper link and status which
1468 * will be the default value if both link are down.
1469 */
1470static int marvell_read_status(struct phy_device *phydev)
1471{
1472 int err;
1473
1474 /* Check the fiber mode first */
1475 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1476 phydev->supported) &&
1477 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1478 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1479 if (err < 0)
1480 goto error;
1481
1482 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1483 if (err < 0)
1484 goto error;
1485
1486 /* If the fiber link is up, it is the selected and
1487 * used link. In this case, we need to stay in the
1488 * fiber page. Please to be careful about that, avoid
1489 * to restore Copper page in other functions which
1490 * could break the behaviour for some fiber phy like
1491 * 88E1512.
1492 */
1493 if (phydev->link)
1494 return 0;
1495
1496 /* If fiber link is down, check and save copper mode state */
1497 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1498 if (err < 0)
1499 goto error;
1500 }
1501
1502 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1503
1504error:
1505 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1506 return err;
1507}
1508
1509/* marvell_suspend
1510 *
1511 * Some Marvell's phys have two modes: fiber and copper.
1512 * Both need to be suspended
1513 */
1514static int marvell_suspend(struct phy_device *phydev)
1515{
1516 int err;
1517
1518 /* Suspend the fiber mode first */
1519 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1520 phydev->supported)) {
1521 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1522 if (err < 0)
1523 goto error;
1524
1525 /* With the page set, use the generic suspend */
1526 err = genphy_suspend(phydev);
1527 if (err < 0)
1528 goto error;
1529
1530 /* Then, the copper link */
1531 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1532 if (err < 0)
1533 goto error;
1534 }
1535
1536 /* With the page set, use the generic suspend */
1537 return genphy_suspend(phydev);
1538
1539error:
1540 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1541 return err;
1542}
1543
1544/* marvell_resume
1545 *
1546 * Some Marvell's phys have two modes: fiber and copper.
1547 * Both need to be resumed
1548 */
1549static int marvell_resume(struct phy_device *phydev)
1550{
1551 int err;
1552
1553 /* Resume the fiber mode first */
1554 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1555 phydev->supported)) {
1556 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1557 if (err < 0)
1558 goto error;
1559
1560 /* With the page set, use the generic resume */
1561 err = genphy_resume(phydev);
1562 if (err < 0)
1563 goto error;
1564
1565 /* Then, the copper link */
1566 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1567 if (err < 0)
1568 goto error;
1569 }
1570
1571 /* With the page set, use the generic resume */
1572 return genphy_resume(phydev);
1573
1574error:
1575 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1576 return err;
1577}
1578
1579static int marvell_aneg_done(struct phy_device *phydev)
1580{
1581 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1582
1583 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1584}
1585
1586static int m88e1121_did_interrupt(struct phy_device *phydev)
1587{
1588 int imask;
1589
1590 imask = phy_read(phydev, MII_M1011_IEVENT);
1591
1592 if (imask & MII_M1011_IMASK_INIT)
1593 return 1;
1594
1595 return 0;
1596}
1597
1598static void m88e1318_get_wol(struct phy_device *phydev,
1599 struct ethtool_wolinfo *wol)
1600{
1601 int oldpage, ret = 0;
1602
1603 wol->supported = WAKE_MAGIC;
1604 wol->wolopts = 0;
1605
1606 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1607 if (oldpage < 0)
1608 goto error;
1609
1610 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1611 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1612 wol->wolopts |= WAKE_MAGIC;
1613
1614error:
1615 phy_restore_page(phydev, oldpage, ret);
1616}
1617
1618static int m88e1318_set_wol(struct phy_device *phydev,
1619 struct ethtool_wolinfo *wol)
1620{
1621 int err = 0, oldpage;
1622
1623 oldpage = phy_save_page(phydev);
1624 if (oldpage < 0)
1625 goto error;
1626
1627 if (wol->wolopts & WAKE_MAGIC) {
1628 /* Explicitly switch to page 0x00, just to be sure */
1629 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1630 if (err < 0)
1631 goto error;
1632
1633 /* If WOL event happened once, the LED[2] interrupt pin
1634 * will not be cleared unless we reading the interrupt status
1635 * register. If interrupts are in use, the normal interrupt
1636 * handling will clear the WOL event. Clear the WOL event
1637 * before enabling it if !phy_interrupt_is_valid()
1638 */
1639 if (!phy_interrupt_is_valid(phydev))
1640 __phy_read(phydev, MII_M1011_IEVENT);
1641
1642 /* Enable the WOL interrupt */
1643 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1644 MII_88E1318S_PHY_CSIER_WOL_EIE);
1645 if (err < 0)
1646 goto error;
1647
1648 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1649 if (err < 0)
1650 goto error;
1651
1652 /* Setup LED[2] as interrupt pin (active low) */
1653 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1654 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1655 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1656 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1657 if (err < 0)
1658 goto error;
1659
1660 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1661 if (err < 0)
1662 goto error;
1663
1664 /* Store the device address for the magic packet */
1665 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1666 ((phydev->attached_dev->dev_addr[5] << 8) |
1667 phydev->attached_dev->dev_addr[4]));
1668 if (err < 0)
1669 goto error;
1670 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1671 ((phydev->attached_dev->dev_addr[3] << 8) |
1672 phydev->attached_dev->dev_addr[2]));
1673 if (err < 0)
1674 goto error;
1675 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1676 ((phydev->attached_dev->dev_addr[1] << 8) |
1677 phydev->attached_dev->dev_addr[0]));
1678 if (err < 0)
1679 goto error;
1680
1681 /* Clear WOL status and enable magic packet matching */
1682 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1683 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1684 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1685 if (err < 0)
1686 goto error;
1687 } else {
1688 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1689 if (err < 0)
1690 goto error;
1691
1692 /* Clear WOL status and disable magic packet matching */
1693 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1694 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1695 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1696 if (err < 0)
1697 goto error;
1698 }
1699
1700error:
1701 return phy_restore_page(phydev, oldpage, err);
1702}
1703
1704static int marvell_get_sset_count(struct phy_device *phydev)
1705{
1706 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1707 phydev->supported))
1708 return ARRAY_SIZE(marvell_hw_stats);
1709 else
1710 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1711}
1712
1713static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1714{
1715 int count = marvell_get_sset_count(phydev);
1716 int i;
1717
1718 for (i = 0; i < count; i++) {
1719 strlcpy(data + i * ETH_GSTRING_LEN,
1720 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1721 }
1722}
1723
1724static u64 marvell_get_stat(struct phy_device *phydev, int i)
1725{
1726 struct marvell_hw_stat stat = marvell_hw_stats[i];
1727 struct marvell_priv *priv = phydev->priv;
1728 int val;
1729 u64 ret;
1730
1731 val = phy_read_paged(phydev, stat.page, stat.reg);
1732 if (val < 0) {
1733 ret = U64_MAX;
1734 } else {
1735 val = val & ((1 << stat.bits) - 1);
1736 priv->stats[i] += val;
1737 ret = priv->stats[i];
1738 }
1739
1740 return ret;
1741}
1742
1743static void marvell_get_stats(struct phy_device *phydev,
1744 struct ethtool_stats *stats, u64 *data)
1745{
1746 int count = marvell_get_sset_count(phydev);
1747 int i;
1748
1749 for (i = 0; i < count; i++)
1750 data[i] = marvell_get_stat(phydev, i);
1751}
1752
1753static int marvell_vct5_wait_complete(struct phy_device *phydev)
1754{
1755 int i;
1756 int val;
1757
1758 for (i = 0; i < 32; i++) {
1759 val = __phy_read(phydev, MII_VCT5_CTRL);
1760 if (val < 0)
1761 return val;
1762
1763 if (val & MII_VCT5_CTRL_COMPLETE)
1764 return 0;
1765 }
1766
1767 phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
1768 return -ETIMEDOUT;
1769}
1770
1771static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
1772{
1773 int amplitude;
1774 int val;
1775 int reg;
1776
1777 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
1778 val = __phy_read(phydev, reg);
1779
1780 if (val < 0)
1781 return 0;
1782
1783 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
1784 MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
1785
1786 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
1787 amplitude = -amplitude;
1788
1789 return 1000 * amplitude / 128;
1790}
1791
1792static u32 marvell_vct5_distance2cm(int distance)
1793{
1794 return distance * 805 / 10;
1795}
1796
1797static u32 marvell_vct5_cm2distance(int cm)
1798{
1799 return cm * 10 / 805;
1800}
1801
1802static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
1803 int distance, int pair)
1804{
1805 u16 reg;
1806 int err;
1807 int mV;
1808 int i;
1809
1810 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
1811 distance);
1812 if (err)
1813 return err;
1814
1815 reg = MII_VCT5_CTRL_ENABLE |
1816 MII_VCT5_CTRL_TX_SAME_CHANNEL |
1817 MII_VCT5_CTRL_SAMPLES_DEFAULT |
1818 MII_VCT5_CTRL_SAMPLE_POINT |
1819 MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
1820 err = __phy_write(phydev, MII_VCT5_CTRL, reg);
1821 if (err)
1822 return err;
1823
1824 err = marvell_vct5_wait_complete(phydev);
1825 if (err)
1826 return err;
1827
1828 for (i = 0; i < 4; i++) {
1829 if (pair != PHY_PAIR_ALL && i != pair)
1830 continue;
1831
1832 mV = marvell_vct5_amplitude(phydev, i);
1833 ethnl_cable_test_amplitude(phydev, i, mV);
1834 }
1835
1836 return 0;
1837}
1838
1839static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
1840{
1841 struct marvell_priv *priv = phydev->priv;
1842 int distance;
1843 u16 width;
1844 int page;
1845 int err;
1846 u16 reg;
1847
1848 if (priv->first <= TDR_SHORT_CABLE_LENGTH)
1849 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
1850 else
1851 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
1852
1853 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
1854 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
1855 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
1856
1857 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1858 MII_VCT5_TX_PULSE_CTRL, reg);
1859 if (err)
1860 return err;
1861
1862 /* Reading the TDR data is very MDIO heavy. We need to optimize
1863 * access to keep the time to a minimum. So lock the bus once,
1864 * and don't release it until complete. We can then avoid having
1865 * to change the page for every access, greatly speeding things
1866 * up.
1867 */
1868 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
1869 if (page < 0)
1870 goto restore_page;
1871
1872 for (distance = priv->first;
1873 distance <= priv->last;
1874 distance += priv->step) {
1875 err = marvell_vct5_amplitude_distance(phydev, distance,
1876 priv->pair);
1877 if (err)
1878 goto restore_page;
1879
1880 if (distance > TDR_SHORT_CABLE_LENGTH &&
1881 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
1882 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
1883 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
1884 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
1885 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
1886 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
1887 if (err)
1888 goto restore_page;
1889 }
1890 }
1891
1892restore_page:
1893 return phy_restore_page(phydev, page, err);
1894}
1895
1896static int marvell_cable_test_start_common(struct phy_device *phydev)
1897{
1898 int bmcr, bmsr, ret;
1899
1900 /* If auto-negotiation is enabled, but not complete, the cable
1901 * test never completes. So disable auto-neg.
1902 */
1903 bmcr = phy_read(phydev, MII_BMCR);
1904 if (bmcr < 0)
1905 return bmcr;
1906
1907 bmsr = phy_read(phydev, MII_BMSR);
1908
1909 if (bmsr < 0)
1910 return bmsr;
1911
1912 if (bmcr & BMCR_ANENABLE) {
1913 ret = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);
1914 if (ret < 0)
1915 return ret;
1916 ret = genphy_soft_reset(phydev);
1917 if (ret < 0)
1918 return ret;
1919 }
1920
1921 /* If the link is up, allow it some time to go down */
1922 if (bmsr & BMSR_LSTATUS)
1923 msleep(1500);
1924
1925 return 0;
1926}
1927
1928static int marvell_vct7_cable_test_start(struct phy_device *phydev)
1929{
1930 struct marvell_priv *priv = phydev->priv;
1931 int ret;
1932
1933 ret = marvell_cable_test_start_common(phydev);
1934 if (ret)
1935 return ret;
1936
1937 priv->cable_test_tdr = false;
1938
1939 /* Reset the VCT5 API control to defaults, otherwise
1940 * VCT7 does not work correctly.
1941 */
1942 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1943 MII_VCT5_CTRL,
1944 MII_VCT5_CTRL_TX_SAME_CHANNEL |
1945 MII_VCT5_CTRL_SAMPLES_DEFAULT |
1946 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
1947 MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
1948 if (ret)
1949 return ret;
1950
1951 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1952 MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
1953 if (ret)
1954 return ret;
1955
1956 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
1957 MII_VCT7_CTRL,
1958 MII_VCT7_CTRL_RUN_NOW |
1959 MII_VCT7_CTRL_CENTIMETERS);
1960}
1961
1962static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
1963 const struct phy_tdr_config *cfg)
1964{
1965 struct marvell_priv *priv = phydev->priv;
1966 int ret;
1967
1968 priv->cable_test_tdr = true;
1969 priv->first = marvell_vct5_cm2distance(cfg->first);
1970 priv->last = marvell_vct5_cm2distance(cfg->last);
1971 priv->step = marvell_vct5_cm2distance(cfg->step);
1972 priv->pair = cfg->pair;
1973
1974 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
1975 return -EINVAL;
1976
1977 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
1978 return -EINVAL;
1979
1980 /* Disable VCT7 */
1981 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
1982 MII_VCT7_CTRL, 0);
1983 if (ret)
1984 return ret;
1985
1986 ret = marvell_cable_test_start_common(phydev);
1987 if (ret)
1988 return ret;
1989
1990 ret = ethnl_cable_test_pulse(phydev, 1000);
1991 if (ret)
1992 return ret;
1993
1994 return ethnl_cable_test_step(phydev,
1995 marvell_vct5_distance2cm(priv->first),
1996 marvell_vct5_distance2cm(priv->last),
1997 marvell_vct5_distance2cm(priv->step));
1998}
1999
2000static int marvell_vct7_distance_to_length(int distance, bool meter)
2001{
2002 if (meter)
2003 distance *= 100;
2004
2005 return distance;
2006}
2007
2008static bool marvell_vct7_distance_valid(int result)
2009{
2010 switch (result) {
2011 case MII_VCT7_RESULTS_OPEN:
2012 case MII_VCT7_RESULTS_SAME_SHORT:
2013 case MII_VCT7_RESULTS_CROSS_SHORT:
2014 return true;
2015 }
2016 return false;
2017}
2018
2019static int marvell_vct7_report_length(struct phy_device *phydev,
2020 int pair, bool meter)
2021{
2022 int length;
2023 int ret;
2024
2025 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2026 MII_VCT7_PAIR_0_DISTANCE + pair);
2027 if (ret < 0)
2028 return ret;
2029
2030 length = marvell_vct7_distance_to_length(ret, meter);
2031
2032 ethnl_cable_test_fault_length(phydev, pair, length);
2033
2034 return 0;
2035}
2036
2037static int marvell_vct7_cable_test_report_trans(int result)
2038{
2039 switch (result) {
2040 case MII_VCT7_RESULTS_OK:
2041 return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2042 case MII_VCT7_RESULTS_OPEN:
2043 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2044 case MII_VCT7_RESULTS_SAME_SHORT:
2045 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2046 case MII_VCT7_RESULTS_CROSS_SHORT:
2047 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2048 default:
2049 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2050 }
2051}
2052
2053static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2054{
2055 int pair0, pair1, pair2, pair3;
2056 bool meter;
2057 int ret;
2058
2059 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2060 MII_VCT7_RESULTS);
2061 if (ret < 0)
2062 return ret;
2063
2064 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2065 MII_VCT7_RESULTS_PAIR3_SHIFT;
2066 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2067 MII_VCT7_RESULTS_PAIR2_SHIFT;
2068 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2069 MII_VCT7_RESULTS_PAIR1_SHIFT;
2070 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2071 MII_VCT7_RESULTS_PAIR0_SHIFT;
2072
2073 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2074 marvell_vct7_cable_test_report_trans(pair0));
2075 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2076 marvell_vct7_cable_test_report_trans(pair1));
2077 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2078 marvell_vct7_cable_test_report_trans(pair2));
2079 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2080 marvell_vct7_cable_test_report_trans(pair3));
2081
2082 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2083 if (ret < 0)
2084 return ret;
2085
2086 meter = ret & MII_VCT7_CTRL_METERS;
2087
2088 if (marvell_vct7_distance_valid(pair0))
2089 marvell_vct7_report_length(phydev, 0, meter);
2090 if (marvell_vct7_distance_valid(pair1))
2091 marvell_vct7_report_length(phydev, 1, meter);
2092 if (marvell_vct7_distance_valid(pair2))
2093 marvell_vct7_report_length(phydev, 2, meter);
2094 if (marvell_vct7_distance_valid(pair3))
2095 marvell_vct7_report_length(phydev, 3, meter);
2096
2097 return 0;
2098}
2099
2100static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2101 bool *finished)
2102{
2103 struct marvell_priv *priv = phydev->priv;
2104 int ret;
2105
2106 if (priv->cable_test_tdr) {
2107 ret = marvell_vct5_amplitude_graph(phydev);
2108 *finished = true;
2109 return ret;
2110 }
2111
2112 *finished = false;
2113
2114 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2115 MII_VCT7_CTRL);
2116
2117 if (ret < 0)
2118 return ret;
2119
2120 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2121 *finished = true;
2122
2123 return marvell_vct7_cable_test_report(phydev);
2124 }
2125
2126 return 0;
2127}
2128
2129#ifdef CONFIG_HWMON
2130static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2131{
2132 int oldpage;
2133 int ret = 0;
2134 int val;
2135
2136 *temp = 0;
2137
2138 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2139 if (oldpage < 0)
2140 goto error;
2141
2142 /* Enable temperature sensor */
2143 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2144 if (ret < 0)
2145 goto error;
2146
2147 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2148 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2149 if (ret < 0)
2150 goto error;
2151
2152 /* Wait for temperature to stabilize */
2153 usleep_range(10000, 12000);
2154
2155 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2156 if (val < 0) {
2157 ret = val;
2158 goto error;
2159 }
2160
2161 /* Disable temperature sensor */
2162 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2163 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2164 if (ret < 0)
2165 goto error;
2166
2167 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2168
2169error:
2170 return phy_restore_page(phydev, oldpage, ret);
2171}
2172
2173static int m88e1121_hwmon_read(struct device *dev,
2174 enum hwmon_sensor_types type,
2175 u32 attr, int channel, long *temp)
2176{
2177 struct phy_device *phydev = dev_get_drvdata(dev);
2178 int err;
2179
2180 switch (attr) {
2181 case hwmon_temp_input:
2182 err = m88e1121_get_temp(phydev, temp);
2183 break;
2184 default:
2185 return -EOPNOTSUPP;
2186 }
2187
2188 return err;
2189}
2190
2191static umode_t m88e1121_hwmon_is_visible(const void *data,
2192 enum hwmon_sensor_types type,
2193 u32 attr, int channel)
2194{
2195 if (type != hwmon_temp)
2196 return 0;
2197
2198 switch (attr) {
2199 case hwmon_temp_input:
2200 return 0444;
2201 default:
2202 return 0;
2203 }
2204}
2205
2206static u32 m88e1121_hwmon_chip_config[] = {
2207 HWMON_C_REGISTER_TZ,
2208 0
2209};
2210
2211static const struct hwmon_channel_info m88e1121_hwmon_chip = {
2212 .type = hwmon_chip,
2213 .config = m88e1121_hwmon_chip_config,
2214};
2215
2216static u32 m88e1121_hwmon_temp_config[] = {
2217 HWMON_T_INPUT,
2218 0
2219};
2220
2221static const struct hwmon_channel_info m88e1121_hwmon_temp = {
2222 .type = hwmon_temp,
2223 .config = m88e1121_hwmon_temp_config,
2224};
2225
2226static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
2227 &m88e1121_hwmon_chip,
2228 &m88e1121_hwmon_temp,
2229 NULL
2230};
2231
2232static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
2233 .is_visible = m88e1121_hwmon_is_visible,
2234 .read = m88e1121_hwmon_read,
2235};
2236
2237static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
2238 .ops = &m88e1121_hwmon_hwmon_ops,
2239 .info = m88e1121_hwmon_info,
2240};
2241
2242static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2243{
2244 int ret;
2245
2246 *temp = 0;
2247
2248 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2249 MII_88E1510_TEMP_SENSOR);
2250 if (ret < 0)
2251 return ret;
2252
2253 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2254
2255 return 0;
2256}
2257
2258static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2259{
2260 int ret;
2261
2262 *temp = 0;
2263
2264 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2265 MII_88E1121_MISC_TEST);
2266 if (ret < 0)
2267 return ret;
2268
2269 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2270 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2271 /* convert to mC */
2272 *temp *= 1000;
2273
2274 return 0;
2275}
2276
2277static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2278{
2279 temp = temp / 1000;
2280 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2281
2282 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2283 MII_88E1121_MISC_TEST,
2284 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2285 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2286}
2287
2288static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2289{
2290 int ret;
2291
2292 *alarm = false;
2293
2294 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2295 MII_88E1121_MISC_TEST);
2296 if (ret < 0)
2297 return ret;
2298
2299 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2300
2301 return 0;
2302}
2303
2304static int m88e1510_hwmon_read(struct device *dev,
2305 enum hwmon_sensor_types type,
2306 u32 attr, int channel, long *temp)
2307{
2308 struct phy_device *phydev = dev_get_drvdata(dev);
2309 int err;
2310
2311 switch (attr) {
2312 case hwmon_temp_input:
2313 err = m88e1510_get_temp(phydev, temp);
2314 break;
2315 case hwmon_temp_crit:
2316 err = m88e1510_get_temp_critical(phydev, temp);
2317 break;
2318 case hwmon_temp_max_alarm:
2319 err = m88e1510_get_temp_alarm(phydev, temp);
2320 break;
2321 default:
2322 return -EOPNOTSUPP;
2323 }
2324
2325 return err;
2326}
2327
2328static int m88e1510_hwmon_write(struct device *dev,
2329 enum hwmon_sensor_types type,
2330 u32 attr, int channel, long temp)
2331{
2332 struct phy_device *phydev = dev_get_drvdata(dev);
2333 int err;
2334
2335 switch (attr) {
2336 case hwmon_temp_crit:
2337 err = m88e1510_set_temp_critical(phydev, temp);
2338 break;
2339 default:
2340 return -EOPNOTSUPP;
2341 }
2342 return err;
2343}
2344
2345static umode_t m88e1510_hwmon_is_visible(const void *data,
2346 enum hwmon_sensor_types type,
2347 u32 attr, int channel)
2348{
2349 if (type != hwmon_temp)
2350 return 0;
2351
2352 switch (attr) {
2353 case hwmon_temp_input:
2354 case hwmon_temp_max_alarm:
2355 return 0444;
2356 case hwmon_temp_crit:
2357 return 0644;
2358 default:
2359 return 0;
2360 }
2361}
2362
2363static u32 m88e1510_hwmon_temp_config[] = {
2364 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2365 0
2366};
2367
2368static const struct hwmon_channel_info m88e1510_hwmon_temp = {
2369 .type = hwmon_temp,
2370 .config = m88e1510_hwmon_temp_config,
2371};
2372
2373static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
2374 &m88e1121_hwmon_chip,
2375 &m88e1510_hwmon_temp,
2376 NULL
2377};
2378
2379static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
2380 .is_visible = m88e1510_hwmon_is_visible,
2381 .read = m88e1510_hwmon_read,
2382 .write = m88e1510_hwmon_write,
2383};
2384
2385static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
2386 .ops = &m88e1510_hwmon_hwmon_ops,
2387 .info = m88e1510_hwmon_info,
2388};
2389
2390static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2391{
2392 int sum = 0;
2393 int oldpage;
2394 int ret = 0;
2395 int i;
2396
2397 *temp = 0;
2398
2399 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2400 if (oldpage < 0)
2401 goto error;
2402
2403 /* Enable temperature sensor */
2404 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2405 if (ret < 0)
2406 goto error;
2407
2408 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
2409 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
2410 MII_88E6390_MISC_TEST_SAMPLE_1S;
2411
2412 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2413 if (ret < 0)
2414 goto error;
2415
2416 /* Wait for temperature to stabilize */
2417 usleep_range(10000, 12000);
2418
2419 /* Reading the temperature sense has an errata. You need to read
2420 * a number of times and take an average.
2421 */
2422 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2423 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2424 if (ret < 0)
2425 goto error;
2426 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2427 }
2428
2429 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2430 *temp = (sum - 75) * 1000;
2431
2432 /* Disable temperature sensor */
2433 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2434 if (ret < 0)
2435 goto error;
2436
2437 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
2438 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
2439
2440 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2441
2442error:
2443 phy_restore_page(phydev, oldpage, ret);
2444
2445 return ret;
2446}
2447
2448static int m88e6390_hwmon_read(struct device *dev,
2449 enum hwmon_sensor_types type,
2450 u32 attr, int channel, long *temp)
2451{
2452 struct phy_device *phydev = dev_get_drvdata(dev);
2453 int err;
2454
2455 switch (attr) {
2456 case hwmon_temp_input:
2457 err = m88e6390_get_temp(phydev, temp);
2458 break;
2459 default:
2460 return -EOPNOTSUPP;
2461 }
2462
2463 return err;
2464}
2465
2466static umode_t m88e6390_hwmon_is_visible(const void *data,
2467 enum hwmon_sensor_types type,
2468 u32 attr, int channel)
2469{
2470 if (type != hwmon_temp)
2471 return 0;
2472
2473 switch (attr) {
2474 case hwmon_temp_input:
2475 return 0444;
2476 default:
2477 return 0;
2478 }
2479}
2480
2481static u32 m88e6390_hwmon_temp_config[] = {
2482 HWMON_T_INPUT,
2483 0
2484};
2485
2486static const struct hwmon_channel_info m88e6390_hwmon_temp = {
2487 .type = hwmon_temp,
2488 .config = m88e6390_hwmon_temp_config,
2489};
2490
2491static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
2492 &m88e1121_hwmon_chip,
2493 &m88e6390_hwmon_temp,
2494 NULL
2495};
2496
2497static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
2498 .is_visible = m88e6390_hwmon_is_visible,
2499 .read = m88e6390_hwmon_read,
2500};
2501
2502static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
2503 .ops = &m88e6390_hwmon_hwmon_ops,
2504 .info = m88e6390_hwmon_info,
2505};
2506
2507static int marvell_hwmon_name(struct phy_device *phydev)
2508{
2509 struct marvell_priv *priv = phydev->priv;
2510 struct device *dev = &phydev->mdio.dev;
2511 const char *devname = dev_name(dev);
2512 size_t len = strlen(devname);
2513 int i, j;
2514
2515 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2516 if (!priv->hwmon_name)
2517 return -ENOMEM;
2518
2519 for (i = j = 0; i < len && devname[i]; i++) {
2520 if (isalnum(devname[i]))
2521 priv->hwmon_name[j++] = devname[i];
2522 }
2523
2524 return 0;
2525}
2526
2527static int marvell_hwmon_probe(struct phy_device *phydev,
2528 const struct hwmon_chip_info *chip)
2529{
2530 struct marvell_priv *priv = phydev->priv;
2531 struct device *dev = &phydev->mdio.dev;
2532 int err;
2533
2534 err = marvell_hwmon_name(phydev);
2535 if (err)
2536 return err;
2537
2538 priv->hwmon_dev = devm_hwmon_device_register_with_info(
2539 dev, priv->hwmon_name, phydev, chip, NULL);
2540
2541 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
2542}
2543
2544static int m88e1121_hwmon_probe(struct phy_device *phydev)
2545{
2546 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
2547}
2548
2549static int m88e1510_hwmon_probe(struct phy_device *phydev)
2550{
2551 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
2552}
2553
2554static int m88e6390_hwmon_probe(struct phy_device *phydev)
2555{
2556 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
2557}
2558#else
2559static int m88e1121_hwmon_probe(struct phy_device *phydev)
2560{
2561 return 0;
2562}
2563
2564static int m88e1510_hwmon_probe(struct phy_device *phydev)
2565{
2566 return 0;
2567}
2568
2569static int m88e6390_hwmon_probe(struct phy_device *phydev)
2570{
2571 return 0;
2572}
2573#endif
2574
2575static int marvell_probe(struct phy_device *phydev)
2576{
2577 struct marvell_priv *priv;
2578
2579 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2580 if (!priv)
2581 return -ENOMEM;
2582
2583 phydev->priv = priv;
2584
2585 return 0;
2586}
2587
2588static int m88e1121_probe(struct phy_device *phydev)
2589{
2590 int err;
2591
2592 err = marvell_probe(phydev);
2593 if (err)
2594 return err;
2595
2596 return m88e1121_hwmon_probe(phydev);
2597}
2598
2599static int m88e1510_probe(struct phy_device *phydev)
2600{
2601 int err;
2602
2603 err = marvell_probe(phydev);
2604 if (err)
2605 return err;
2606
2607 return m88e1510_hwmon_probe(phydev);
2608}
2609
2610static int m88e6390_probe(struct phy_device *phydev)
2611{
2612 int err;
2613
2614 err = marvell_probe(phydev);
2615 if (err)
2616 return err;
2617
2618 return m88e6390_hwmon_probe(phydev);
2619}
2620
2621static struct phy_driver marvell_drivers[] = {
2622 {
2623 .phy_id = MARVELL_PHY_ID_88E1101,
2624 .phy_id_mask = MARVELL_PHY_ID_MASK,
2625 .name = "Marvell 88E1101",
2626 /* PHY_GBIT_FEATURES */
2627 .probe = marvell_probe,
2628 .config_init = marvell_config_init,
2629 .config_aneg = m88e1101_config_aneg,
2630 .ack_interrupt = marvell_ack_interrupt,
2631 .config_intr = marvell_config_intr,
2632 .resume = genphy_resume,
2633 .suspend = genphy_suspend,
2634 .read_page = marvell_read_page,
2635 .write_page = marvell_write_page,
2636 .get_sset_count = marvell_get_sset_count,
2637 .get_strings = marvell_get_strings,
2638 .get_stats = marvell_get_stats,
2639 },
2640 {
2641 .phy_id = MARVELL_PHY_ID_88E1112,
2642 .phy_id_mask = MARVELL_PHY_ID_MASK,
2643 .name = "Marvell 88E1112",
2644 /* PHY_GBIT_FEATURES */
2645 .probe = marvell_probe,
2646 .config_init = m88e1111_config_init,
2647 .config_aneg = marvell_config_aneg,
2648 .ack_interrupt = marvell_ack_interrupt,
2649 .config_intr = marvell_config_intr,
2650 .resume = genphy_resume,
2651 .suspend = genphy_suspend,
2652 .read_page = marvell_read_page,
2653 .write_page = marvell_write_page,
2654 .get_sset_count = marvell_get_sset_count,
2655 .get_strings = marvell_get_strings,
2656 .get_stats = marvell_get_stats,
2657 .get_tunable = m88e1011_get_tunable,
2658 .set_tunable = m88e1011_set_tunable,
2659 },
2660 {
2661 .phy_id = MARVELL_PHY_ID_88E1111,
2662 .phy_id_mask = MARVELL_PHY_ID_MASK,
2663 .name = "Marvell 88E1111",
2664 /* PHY_GBIT_FEATURES */
2665 .probe = marvell_probe,
2666 .config_init = m88e1111_config_init,
2667 .config_aneg = marvell_config_aneg,
2668 .read_status = marvell_read_status,
2669 .ack_interrupt = marvell_ack_interrupt,
2670 .config_intr = marvell_config_intr,
2671 .resume = genphy_resume,
2672 .suspend = genphy_suspend,
2673 .read_page = marvell_read_page,
2674 .write_page = marvell_write_page,
2675 .get_sset_count = marvell_get_sset_count,
2676 .get_strings = marvell_get_strings,
2677 .get_stats = marvell_get_stats,
2678 .get_tunable = m88e1111_get_tunable,
2679 .set_tunable = m88e1111_set_tunable,
2680 },
2681 {
2682 .phy_id = MARVELL_PHY_ID_88E1118,
2683 .phy_id_mask = MARVELL_PHY_ID_MASK,
2684 .name = "Marvell 88E1118",
2685 /* PHY_GBIT_FEATURES */
2686 .probe = marvell_probe,
2687 .config_init = m88e1118_config_init,
2688 .config_aneg = m88e1118_config_aneg,
2689 .ack_interrupt = marvell_ack_interrupt,
2690 .config_intr = marvell_config_intr,
2691 .resume = genphy_resume,
2692 .suspend = genphy_suspend,
2693 .read_page = marvell_read_page,
2694 .write_page = marvell_write_page,
2695 .get_sset_count = marvell_get_sset_count,
2696 .get_strings = marvell_get_strings,
2697 .get_stats = marvell_get_stats,
2698 },
2699 {
2700 .phy_id = MARVELL_PHY_ID_88E1121R,
2701 .phy_id_mask = MARVELL_PHY_ID_MASK,
2702 .name = "Marvell 88E1121R",
2703 /* PHY_GBIT_FEATURES */
2704 .probe = m88e1121_probe,
2705 .config_init = marvell_config_init,
2706 .config_aneg = m88e1121_config_aneg,
2707 .read_status = marvell_read_status,
2708 .ack_interrupt = marvell_ack_interrupt,
2709 .config_intr = marvell_config_intr,
2710 .did_interrupt = m88e1121_did_interrupt,
2711 .resume = genphy_resume,
2712 .suspend = genphy_suspend,
2713 .read_page = marvell_read_page,
2714 .write_page = marvell_write_page,
2715 .get_sset_count = marvell_get_sset_count,
2716 .get_strings = marvell_get_strings,
2717 .get_stats = marvell_get_stats,
2718 .get_tunable = m88e1011_get_tunable,
2719 .set_tunable = m88e1011_set_tunable,
2720 },
2721 {
2722 .phy_id = MARVELL_PHY_ID_88E1318S,
2723 .phy_id_mask = MARVELL_PHY_ID_MASK,
2724 .name = "Marvell 88E1318S",
2725 /* PHY_GBIT_FEATURES */
2726 .probe = marvell_probe,
2727 .config_init = m88e1318_config_init,
2728 .config_aneg = m88e1318_config_aneg,
2729 .read_status = marvell_read_status,
2730 .ack_interrupt = marvell_ack_interrupt,
2731 .config_intr = marvell_config_intr,
2732 .did_interrupt = m88e1121_did_interrupt,
2733 .get_wol = m88e1318_get_wol,
2734 .set_wol = m88e1318_set_wol,
2735 .resume = genphy_resume,
2736 .suspend = genphy_suspend,
2737 .read_page = marvell_read_page,
2738 .write_page = marvell_write_page,
2739 .get_sset_count = marvell_get_sset_count,
2740 .get_strings = marvell_get_strings,
2741 .get_stats = marvell_get_stats,
2742 },
2743 {
2744 .phy_id = MARVELL_PHY_ID_88E1145,
2745 .phy_id_mask = MARVELL_PHY_ID_MASK,
2746 .name = "Marvell 88E1145",
2747 /* PHY_GBIT_FEATURES */
2748 .probe = marvell_probe,
2749 .config_init = m88e1145_config_init,
2750 .config_aneg = m88e1101_config_aneg,
2751 .read_status = genphy_read_status,
2752 .ack_interrupt = marvell_ack_interrupt,
2753 .config_intr = marvell_config_intr,
2754 .resume = genphy_resume,
2755 .suspend = genphy_suspend,
2756 .read_page = marvell_read_page,
2757 .write_page = marvell_write_page,
2758 .get_sset_count = marvell_get_sset_count,
2759 .get_strings = marvell_get_strings,
2760 .get_stats = marvell_get_stats,
2761 .get_tunable = m88e1111_get_tunable,
2762 .set_tunable = m88e1111_set_tunable,
2763 },
2764 {
2765 .phy_id = MARVELL_PHY_ID_88E1149R,
2766 .phy_id_mask = MARVELL_PHY_ID_MASK,
2767 .name = "Marvell 88E1149R",
2768 /* PHY_GBIT_FEATURES */
2769 .probe = marvell_probe,
2770 .config_init = m88e1149_config_init,
2771 .config_aneg = m88e1118_config_aneg,
2772 .ack_interrupt = marvell_ack_interrupt,
2773 .config_intr = marvell_config_intr,
2774 .resume = genphy_resume,
2775 .suspend = genphy_suspend,
2776 .read_page = marvell_read_page,
2777 .write_page = marvell_write_page,
2778 .get_sset_count = marvell_get_sset_count,
2779 .get_strings = marvell_get_strings,
2780 .get_stats = marvell_get_stats,
2781 },
2782 {
2783 .phy_id = MARVELL_PHY_ID_88E1240,
2784 .phy_id_mask = MARVELL_PHY_ID_MASK,
2785 .name = "Marvell 88E1240",
2786 /* PHY_GBIT_FEATURES */
2787 .probe = marvell_probe,
2788 .config_init = m88e1111_config_init,
2789 .config_aneg = marvell_config_aneg,
2790 .ack_interrupt = marvell_ack_interrupt,
2791 .config_intr = marvell_config_intr,
2792 .resume = genphy_resume,
2793 .suspend = genphy_suspend,
2794 .read_page = marvell_read_page,
2795 .write_page = marvell_write_page,
2796 .get_sset_count = marvell_get_sset_count,
2797 .get_strings = marvell_get_strings,
2798 .get_stats = marvell_get_stats,
2799 },
2800 {
2801 .phy_id = MARVELL_PHY_ID_88E1116R,
2802 .phy_id_mask = MARVELL_PHY_ID_MASK,
2803 .name = "Marvell 88E1116R",
2804 /* PHY_GBIT_FEATURES */
2805 .probe = marvell_probe,
2806 .config_init = m88e1116r_config_init,
2807 .ack_interrupt = marvell_ack_interrupt,
2808 .config_intr = marvell_config_intr,
2809 .resume = genphy_resume,
2810 .suspend = genphy_suspend,
2811 .read_page = marvell_read_page,
2812 .write_page = marvell_write_page,
2813 .get_sset_count = marvell_get_sset_count,
2814 .get_strings = marvell_get_strings,
2815 .get_stats = marvell_get_stats,
2816 .get_tunable = m88e1011_get_tunable,
2817 .set_tunable = m88e1011_set_tunable,
2818 },
2819 {
2820 .phy_id = MARVELL_PHY_ID_88E1510,
2821 .phy_id_mask = MARVELL_PHY_ID_MASK,
2822 .name = "Marvell 88E1510",
2823 .features = PHY_GBIT_FIBRE_FEATURES,
2824 .flags = PHY_POLL_CABLE_TEST,
2825 .probe = m88e1510_probe,
2826 .config_init = m88e1510_config_init,
2827 .config_aneg = m88e1510_config_aneg,
2828 .read_status = marvell_read_status,
2829 .ack_interrupt = marvell_ack_interrupt,
2830 .config_intr = marvell_config_intr,
2831 .did_interrupt = m88e1121_did_interrupt,
2832 .get_wol = m88e1318_get_wol,
2833 .set_wol = m88e1318_set_wol,
2834 .resume = marvell_resume,
2835 .suspend = marvell_suspend,
2836 .read_page = marvell_read_page,
2837 .write_page = marvell_write_page,
2838 .get_sset_count = marvell_get_sset_count,
2839 .get_strings = marvell_get_strings,
2840 .get_stats = marvell_get_stats,
2841 .set_loopback = genphy_loopback,
2842 .get_tunable = m88e1011_get_tunable,
2843 .set_tunable = m88e1011_set_tunable,
2844 .cable_test_start = marvell_vct7_cable_test_start,
2845 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2846 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2847 },
2848 {
2849 .phy_id = MARVELL_PHY_ID_88E1540,
2850 .phy_id_mask = MARVELL_PHY_ID_MASK,
2851 .name = "Marvell 88E1540",
2852 /* PHY_GBIT_FEATURES */
2853 .flags = PHY_POLL_CABLE_TEST,
2854 .probe = m88e1510_probe,
2855 .config_init = marvell_config_init,
2856 .config_aneg = m88e1510_config_aneg,
2857 .read_status = marvell_read_status,
2858 .ack_interrupt = marvell_ack_interrupt,
2859 .config_intr = marvell_config_intr,
2860 .did_interrupt = m88e1121_did_interrupt,
2861 .resume = genphy_resume,
2862 .suspend = genphy_suspend,
2863 .read_page = marvell_read_page,
2864 .write_page = marvell_write_page,
2865 .get_sset_count = marvell_get_sset_count,
2866 .get_strings = marvell_get_strings,
2867 .get_stats = marvell_get_stats,
2868 .get_tunable = m88e1540_get_tunable,
2869 .set_tunable = m88e1540_set_tunable,
2870 .cable_test_start = marvell_vct7_cable_test_start,
2871 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2872 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2873 },
2874 {
2875 .phy_id = MARVELL_PHY_ID_88E1545,
2876 .phy_id_mask = MARVELL_PHY_ID_MASK,
2877 .name = "Marvell 88E1545",
2878 .probe = m88e1510_probe,
2879 /* PHY_GBIT_FEATURES */
2880 .flags = PHY_POLL_CABLE_TEST,
2881 .config_init = marvell_config_init,
2882 .config_aneg = m88e1510_config_aneg,
2883 .read_status = marvell_read_status,
2884 .ack_interrupt = marvell_ack_interrupt,
2885 .config_intr = marvell_config_intr,
2886 .did_interrupt = m88e1121_did_interrupt,
2887 .resume = genphy_resume,
2888 .suspend = genphy_suspend,
2889 .read_page = marvell_read_page,
2890 .write_page = marvell_write_page,
2891 .get_sset_count = marvell_get_sset_count,
2892 .get_strings = marvell_get_strings,
2893 .get_stats = marvell_get_stats,
2894 .get_tunable = m88e1540_get_tunable,
2895 .set_tunable = m88e1540_set_tunable,
2896 .cable_test_start = marvell_vct7_cable_test_start,
2897 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2898 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2899 },
2900 {
2901 .phy_id = MARVELL_PHY_ID_88E3016,
2902 .phy_id_mask = MARVELL_PHY_ID_MASK,
2903 .name = "Marvell 88E3016",
2904 /* PHY_BASIC_FEATURES */
2905 .probe = marvell_probe,
2906 .config_init = m88e3016_config_init,
2907 .aneg_done = marvell_aneg_done,
2908 .read_status = marvell_read_status,
2909 .ack_interrupt = marvell_ack_interrupt,
2910 .config_intr = marvell_config_intr,
2911 .did_interrupt = m88e1121_did_interrupt,
2912 .resume = genphy_resume,
2913 .suspend = genphy_suspend,
2914 .read_page = marvell_read_page,
2915 .write_page = marvell_write_page,
2916 .get_sset_count = marvell_get_sset_count,
2917 .get_strings = marvell_get_strings,
2918 .get_stats = marvell_get_stats,
2919 },
2920 {
2921 .phy_id = MARVELL_PHY_ID_88E6390,
2922 .phy_id_mask = MARVELL_PHY_ID_MASK,
2923 .name = "Marvell 88E6390",
2924 /* PHY_GBIT_FEATURES */
2925 .flags = PHY_POLL_CABLE_TEST,
2926 .probe = m88e6390_probe,
2927 .config_init = marvell_config_init,
2928 .config_aneg = m88e6390_config_aneg,
2929 .read_status = marvell_read_status,
2930 .ack_interrupt = marvell_ack_interrupt,
2931 .config_intr = marvell_config_intr,
2932 .did_interrupt = m88e1121_did_interrupt,
2933 .resume = genphy_resume,
2934 .suspend = genphy_suspend,
2935 .read_page = marvell_read_page,
2936 .write_page = marvell_write_page,
2937 .get_sset_count = marvell_get_sset_count,
2938 .get_strings = marvell_get_strings,
2939 .get_stats = marvell_get_stats,
2940 .get_tunable = m88e1540_get_tunable,
2941 .set_tunable = m88e1540_set_tunable,
2942 .cable_test_start = marvell_vct7_cable_test_start,
2943 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2944 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2945 },
2946 {
2947 .phy_id = MARVELL_PHY_ID_88E1340S,
2948 .phy_id_mask = MARVELL_PHY_ID_MASK,
2949 .name = "Marvell 88E1340S",
2950 .probe = m88e1510_probe,
2951 /* PHY_GBIT_FEATURES */
2952 .config_init = marvell_config_init,
2953 .config_aneg = m88e1510_config_aneg,
2954 .read_status = marvell_read_status,
2955 .ack_interrupt = marvell_ack_interrupt,
2956 .config_intr = marvell_config_intr,
2957 .did_interrupt = m88e1121_did_interrupt,
2958 .resume = genphy_resume,
2959 .suspend = genphy_suspend,
2960 .read_page = marvell_read_page,
2961 .write_page = marvell_write_page,
2962 .get_sset_count = marvell_get_sset_count,
2963 .get_strings = marvell_get_strings,
2964 .get_stats = marvell_get_stats,
2965 .get_tunable = m88e1540_get_tunable,
2966 .set_tunable = m88e1540_set_tunable,
2967 },
2968 {
2969 .phy_id = MARVELL_PHY_ID_88E1548P,
2970 .phy_id_mask = MARVELL_PHY_ID_MASK,
2971 .name = "Marvell 88E1548P",
2972 .probe = m88e1510_probe,
2973 .features = PHY_GBIT_FIBRE_FEATURES,
2974 .config_init = marvell_config_init,
2975 .config_aneg = m88e1510_config_aneg,
2976 .read_status = marvell_read_status,
2977 .ack_interrupt = marvell_ack_interrupt,
2978 .config_intr = marvell_config_intr,
2979 .did_interrupt = m88e1121_did_interrupt,
2980 .resume = genphy_resume,
2981 .suspend = genphy_suspend,
2982 .read_page = marvell_read_page,
2983 .write_page = marvell_write_page,
2984 .get_sset_count = marvell_get_sset_count,
2985 .get_strings = marvell_get_strings,
2986 .get_stats = marvell_get_stats,
2987 .get_tunable = m88e1540_get_tunable,
2988 .set_tunable = m88e1540_set_tunable,
2989 },
2990};
2991
2992module_phy_driver(marvell_drivers);
2993
2994static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2995 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2996 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2997 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2998 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2999 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3000 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3001 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3002 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3003 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
3004 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
3005 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3006 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
3007 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
3008 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
3009 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
3010 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3011 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
3012 { }
3013};
3014
3015MODULE_DEVICE_TABLE(mdio, marvell_tbl);