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1/* SPDX-License-Identifier: GPL-2.0-only */
2/****************************************************************************
3 * Driver for Solarflare network controllers and boards
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2015 Solarflare Communications Inc.
6 */
7
8#ifndef EFX_TX_H
9#define EFX_TX_H
10
11#include <linux/types.h>
12
13/* Driver internal tx-path related declarations. */
14
15unsigned int efx_tx_limit_len(struct efx_tx_queue *tx_queue,
16 dma_addr_t dma_addr, unsigned int len);
17
18/* What TXQ type will satisfy the checksum offloads required for this skb? */
19static inline unsigned int efx_tx_csum_type_skb(struct sk_buff *skb)
20{
21 if (skb->ip_summed != CHECKSUM_PARTIAL)
22 return 0; /* no checksum offload */
23
24 if (skb->encapsulation &&
25 skb_checksum_start_offset(skb) == skb_inner_transport_offset(skb)) {
26 /* we only advertise features for IPv4 and IPv6 checksums on
27 * encapsulated packets, so if the checksum is for the inner
28 * packet, it must be one of them; no further checking required.
29 */
30
31 /* Do we also need to offload the outer header checksum? */
32 if (skb_shinfo(skb)->gso_segs > 1 &&
33 !(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
34 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
35 return EFX_TXQ_TYPE_OUTER_CSUM | EFX_TXQ_TYPE_INNER_CSUM;
36 return EFX_TXQ_TYPE_INNER_CSUM;
37 }
38
39 /* similarly, we only advertise features for IPv4 and IPv6 checksums,
40 * so it must be one of them. No need for further checks.
41 */
42 return EFX_TXQ_TYPE_OUTER_CSUM;
43}
44#endif /* EFX_TX_H */
1/* SPDX-License-Identifier: GPL-2.0-only */
2/****************************************************************************
3 * Driver for Solarflare network controllers and boards
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2015 Solarflare Communications Inc.
6 */
7
8#ifndef EFX_TX_H
9#define EFX_TX_H
10
11#include <linux/types.h>
12
13/* Driver internal tx-path related declarations. */
14
15unsigned int efx_tx_limit_len(struct efx_tx_queue *tx_queue,
16 dma_addr_t dma_addr, unsigned int len);
17
18u8 *efx_tx_get_copy_buffer_limited(struct efx_tx_queue *tx_queue,
19 struct efx_tx_buffer *buffer, size_t len);
20
21#endif /* EFX_TX_H */