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1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28#include <linux/debugfs.h>
29#include <linux/firmware.h>
30
31#include <drm/display/drm_dp_helper.h>
32#include <drm/display/drm_dsc_helper.h>
33#include <drm/drm_edid.h>
34#include <drm/drm_fixed.h>
35
36#include "soc/intel_rom.h"
37
38#include "i915_drv.h"
39#include "intel_display.h"
40#include "intel_display_types.h"
41#include "intel_gmbus.h"
42
43#define _INTEL_BIOS_PRIVATE
44#include "intel_vbt_defs.h"
45
46/**
47 * DOC: Video BIOS Table (VBT)
48 *
49 * The Video BIOS Table, or VBT, provides platform and board specific
50 * configuration information to the driver that is not discoverable or available
51 * through other means. The configuration is mostly related to display
52 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
53 * the PCI ROM.
54 *
55 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
56 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
57 * contain the actual configuration information. The VBT Header, and thus the
58 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
59 * BDB Header. The data blocks are concatenated after the BDB Header. The data
60 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
61 * data. (Block 53, the MIPI Sequence Block is an exception.)
62 *
63 * The driver parses the VBT during load. The relevant information is stored in
64 * driver private data for ease of use, and the actual VBT is not read after
65 * that.
66 */
67
68/* Wrapper for VBT child device config */
69struct intel_bios_encoder_data {
70 struct intel_display *display;
71
72 struct child_device_config child;
73 struct dsc_compression_parameters_entry *dsc;
74 struct list_head node;
75};
76
77#define TARGET_ADDR1 0x70
78#define TARGET_ADDR2 0x72
79
80/* Get BDB block size given a pointer to Block ID. */
81static u32 _get_blocksize(const u8 *block_base)
82{
83 /* The MIPI Sequence Block v3+ has a separate size field. */
84 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
85 return *((const u32 *)(block_base + 4));
86 else
87 return *((const u16 *)(block_base + 1));
88}
89
90/* Get BDB block size give a pointer to data after Block ID and Block Size. */
91static u32 get_blocksize(const void *block_data)
92{
93 return _get_blocksize(block_data - 3);
94}
95
96static const void *
97find_raw_section(const void *_bdb, enum bdb_block_id section_id)
98{
99 const struct bdb_header *bdb = _bdb;
100 const u8 *base = _bdb;
101 int index = 0;
102 u32 total, current_size;
103 enum bdb_block_id current_id;
104
105 /* skip to first section */
106 index += bdb->header_size;
107 total = bdb->bdb_size;
108
109 /* walk the sections looking for section_id */
110 while (index + 3 < total) {
111 current_id = *(base + index);
112 current_size = _get_blocksize(base + index);
113 index += 3;
114
115 if (index + current_size > total)
116 return NULL;
117
118 if (current_id == section_id)
119 return base + index;
120
121 index += current_size;
122 }
123
124 return NULL;
125}
126
127/*
128 * Offset from the start of BDB to the start of the
129 * block data (just past the block header).
130 */
131static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id)
132{
133 const void *block;
134
135 block = find_raw_section(bdb, section_id);
136 if (!block)
137 return 0;
138
139 return block - bdb;
140}
141
142struct bdb_block_entry {
143 struct list_head node;
144 enum bdb_block_id section_id;
145 u8 data[];
146};
147
148static const void *
149bdb_find_section(struct intel_display *display,
150 enum bdb_block_id section_id)
151{
152 struct bdb_block_entry *entry;
153
154 list_for_each_entry(entry, &display->vbt.bdb_blocks, node) {
155 if (entry->section_id == section_id)
156 return entry->data + 3;
157 }
158
159 return NULL;
160}
161
162static const struct {
163 enum bdb_block_id section_id;
164 size_t min_size;
165} bdb_blocks[] = {
166 { .section_id = BDB_GENERAL_FEATURES,
167 .min_size = sizeof(struct bdb_general_features), },
168 { .section_id = BDB_GENERAL_DEFINITIONS,
169 .min_size = sizeof(struct bdb_general_definitions), },
170 { .section_id = BDB_PSR,
171 .min_size = sizeof(struct bdb_psr), },
172 { .section_id = BDB_DRIVER_FEATURES,
173 .min_size = sizeof(struct bdb_driver_features), },
174 { .section_id = BDB_SDVO_LVDS_OPTIONS,
175 .min_size = sizeof(struct bdb_sdvo_lvds_options), },
176 { .section_id = BDB_SDVO_LVDS_DTD,
177 .min_size = sizeof(struct bdb_sdvo_lvds_dtd), },
178 { .section_id = BDB_EDP,
179 .min_size = sizeof(struct bdb_edp), },
180 { .section_id = BDB_LFP_OPTIONS,
181 .min_size = sizeof(struct bdb_lfp_options), },
182 /*
183 * BDB_LFP_DATA depends on BDB_LFP_DATA_PTRS,
184 * so keep the two ordered.
185 */
186 { .section_id = BDB_LFP_DATA_PTRS,
187 .min_size = sizeof(struct bdb_lfp_data_ptrs), },
188 { .section_id = BDB_LFP_DATA,
189 .min_size = 0, /* special case */ },
190 { .section_id = BDB_LFP_BACKLIGHT,
191 .min_size = sizeof(struct bdb_lfp_backlight), },
192 { .section_id = BDB_LFP_POWER,
193 .min_size = sizeof(struct bdb_lfp_power), },
194 { .section_id = BDB_MIPI_CONFIG,
195 .min_size = sizeof(struct bdb_mipi_config), },
196 { .section_id = BDB_MIPI_SEQUENCE,
197 .min_size = sizeof(struct bdb_mipi_sequence) },
198 { .section_id = BDB_COMPRESSION_PARAMETERS,
199 .min_size = sizeof(struct bdb_compression_parameters), },
200 { .section_id = BDB_GENERIC_DTD,
201 .min_size = sizeof(struct bdb_generic_dtd), },
202};
203
204static size_t lfp_data_min_size(struct intel_display *display)
205{
206 const struct bdb_lfp_data_ptrs *ptrs;
207 size_t size;
208
209 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS);
210 if (!ptrs)
211 return 0;
212
213 size = sizeof(struct bdb_lfp_data);
214 if (ptrs->panel_name.table_size)
215 size = max(size, ptrs->panel_name.offset +
216 sizeof(struct bdb_lfp_data_tail));
217
218 return size;
219}
220
221static bool validate_lfp_data_ptrs(const void *bdb,
222 const struct bdb_lfp_data_ptrs *ptrs)
223{
224 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
225 int data_block_size, lfp_data_size;
226 const void *data_block;
227 int i;
228
229 data_block = find_raw_section(bdb, BDB_LFP_DATA);
230 if (!data_block)
231 return false;
232
233 data_block_size = get_blocksize(data_block);
234 if (data_block_size == 0)
235 return false;
236
237 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
238 if (ptrs->num_entries != 3)
239 return false;
240
241 fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
242 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
243 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
244 panel_name_size = ptrs->panel_name.table_size;
245
246 /* fp_timing has variable size */
247 if (fp_timing_size < 32 ||
248 dvo_timing_size != sizeof(struct bdb_edid_dtd) ||
249 panel_pnp_id_size != sizeof(struct bdb_edid_pnp_id))
250 return false;
251
252 /* panel_name is not present in old VBTs */
253 if (panel_name_size != 0 &&
254 panel_name_size != sizeof(struct bdb_edid_product_name))
255 return false;
256
257 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
258 if (16 * lfp_data_size > data_block_size)
259 return false;
260
261 /* make sure the table entries have uniform size */
262 for (i = 1; i < 16; i++) {
263 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
264 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
265 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
266 return false;
267
268 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
269 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
270 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
271 return false;
272 }
273
274 /*
275 * Except for vlv/chv machines all real VBTs seem to have 6
276 * unaccounted bytes in the fp_timing table. And it doesn't
277 * appear to be a really intentional hole as the fp_timing
278 * 0xffff terminator is always within those 6 missing bytes.
279 */
280 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size)
281 fp_timing_size += 6;
282
283 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
284 return false;
285
286 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset ||
287 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
288 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
289 return false;
290
291 /* make sure the tables fit inside the data block */
292 for (i = 0; i < 16; i++) {
293 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
294 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
295 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
296 return false;
297 }
298
299 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
300 return false;
301
302 /* make sure fp_timing terminators are present at expected locations */
303 for (i = 0; i < 16; i++) {
304 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +
305 fp_timing_size - 2;
306
307 if (*t != 0xffff)
308 return false;
309 }
310
311 return true;
312}
313
314/* make the data table offsets relative to the data block */
315static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
316{
317 struct bdb_lfp_data_ptrs *ptrs = ptrs_block;
318 u32 offset;
319 int i;
320
321 offset = raw_block_offset(bdb, BDB_LFP_DATA);
322
323 for (i = 0; i < 16; i++) {
324 if (ptrs->ptr[i].fp_timing.offset < offset ||
325 ptrs->ptr[i].dvo_timing.offset < offset ||
326 ptrs->ptr[i].panel_pnp_id.offset < offset)
327 return false;
328
329 ptrs->ptr[i].fp_timing.offset -= offset;
330 ptrs->ptr[i].dvo_timing.offset -= offset;
331 ptrs->ptr[i].panel_pnp_id.offset -= offset;
332 }
333
334 if (ptrs->panel_name.table_size) {
335 if (ptrs->panel_name.offset < offset)
336 return false;
337
338 ptrs->panel_name.offset -= offset;
339 }
340
341 return validate_lfp_data_ptrs(bdb, ptrs);
342}
343
344static int make_lfp_data_ptr(struct lfp_data_ptr_table *table,
345 int table_size, int total_size)
346{
347 if (total_size < table_size)
348 return total_size;
349
350 table->table_size = table_size;
351 table->offset = total_size - table_size;
352
353 return total_size - table_size;
354}
355
356static void next_lfp_data_ptr(struct lfp_data_ptr_table *next,
357 const struct lfp_data_ptr_table *prev,
358 int size)
359{
360 next->table_size = prev->table_size;
361 next->offset = prev->offset + size;
362}
363
364static void *generate_lfp_data_ptrs(struct intel_display *display,
365 const void *bdb)
366{
367 int i, size, table_size, block_size, offset, fp_timing_size;
368 struct bdb_lfp_data_ptrs *ptrs;
369 const void *block;
370 void *ptrs_block;
371
372 /*
373 * The hardcoded fp_timing_size is only valid for
374 * modernish VBTs. All older VBTs definitely should
375 * include block 41 and thus we don't need to
376 * generate one.
377 */
378 if (display->vbt.version < 155)
379 return NULL;
380
381 fp_timing_size = 38;
382
383 block = find_raw_section(bdb, BDB_LFP_DATA);
384 if (!block)
385 return NULL;
386
387 drm_dbg_kms(display->drm, "Generating LFP data table pointers\n");
388
389 block_size = get_blocksize(block);
390
391 size = fp_timing_size + sizeof(struct bdb_edid_dtd) +
392 sizeof(struct bdb_edid_pnp_id);
393 if (size * 16 > block_size)
394 return NULL;
395
396 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
397 if (!ptrs_block)
398 return NULL;
399
400 *(u8 *)(ptrs_block + 0) = BDB_LFP_DATA_PTRS;
401 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
402 ptrs = ptrs_block + 3;
403
404 table_size = sizeof(struct bdb_edid_pnp_id);
405 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
406
407 table_size = sizeof(struct bdb_edid_dtd);
408 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
409
410 table_size = fp_timing_size;
411 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
412
413 if (ptrs->ptr[0].fp_timing.table_size)
414 ptrs->num_entries++;
415 if (ptrs->ptr[0].dvo_timing.table_size)
416 ptrs->num_entries++;
417 if (ptrs->ptr[0].panel_pnp_id.table_size)
418 ptrs->num_entries++;
419
420 if (size != 0 || ptrs->num_entries != 3) {
421 kfree(ptrs_block);
422 return NULL;
423 }
424
425 size = fp_timing_size + sizeof(struct bdb_edid_dtd) +
426 sizeof(struct bdb_edid_pnp_id);
427 for (i = 1; i < 16; i++) {
428 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
429 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
430 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
431 }
432
433 table_size = sizeof(struct bdb_edid_product_name);
434
435 if (16 * (size + table_size) <= block_size) {
436 ptrs->panel_name.table_size = table_size;
437 ptrs->panel_name.offset = size * 16;
438 }
439
440 offset = block - bdb;
441
442 for (i = 0; i < 16; i++) {
443 ptrs->ptr[i].fp_timing.offset += offset;
444 ptrs->ptr[i].dvo_timing.offset += offset;
445 ptrs->ptr[i].panel_pnp_id.offset += offset;
446 }
447
448 if (ptrs->panel_name.table_size)
449 ptrs->panel_name.offset += offset;
450
451 return ptrs_block;
452}
453
454static void
455init_bdb_block(struct intel_display *display,
456 const void *bdb, enum bdb_block_id section_id,
457 size_t min_size)
458{
459 struct bdb_block_entry *entry;
460 void *temp_block = NULL;
461 const void *block;
462 size_t block_size;
463
464 block = find_raw_section(bdb, section_id);
465
466 /* Modern VBTs lack the LFP data table pointers block, make one up */
467 if (!block && section_id == BDB_LFP_DATA_PTRS) {
468 temp_block = generate_lfp_data_ptrs(display, bdb);
469 if (temp_block)
470 block = temp_block + 3;
471 }
472 if (!block)
473 return;
474
475 drm_WARN(display->drm, min_size == 0,
476 "Block %d min_size is zero\n", section_id);
477
478 block_size = get_blocksize(block);
479
480 /*
481 * Version number and new block size are considered
482 * part of the header for MIPI sequenece block v3+.
483 */
484 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
485 block_size += 5;
486
487 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
488 GFP_KERNEL);
489 if (!entry) {
490 kfree(temp_block);
491 return;
492 }
493
494 entry->section_id = section_id;
495 memcpy(entry->data, block - 3, block_size + 3);
496
497 kfree(temp_block);
498
499 drm_dbg_kms(display->drm,
500 "Found BDB block %d (size %zu, min size %zu)\n",
501 section_id, block_size, min_size);
502
503 if (section_id == BDB_LFP_DATA_PTRS &&
504 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
505 drm_err(display->drm,
506 "VBT has malformed LFP data table pointers\n");
507 kfree(entry);
508 return;
509 }
510
511 list_add_tail(&entry->node, &display->vbt.bdb_blocks);
512}
513
514static void init_bdb_blocks(struct intel_display *display,
515 const void *bdb)
516{
517 int i;
518
519 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
520 enum bdb_block_id section_id = bdb_blocks[i].section_id;
521 size_t min_size = bdb_blocks[i].min_size;
522
523 if (section_id == BDB_LFP_DATA)
524 min_size = lfp_data_min_size(display);
525
526 init_bdb_block(display, bdb, section_id, min_size);
527 }
528}
529
530static void
531fill_detail_timing_data(struct intel_display *display,
532 struct drm_display_mode *panel_fixed_mode,
533 const struct bdb_edid_dtd *dvo_timing)
534{
535 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
536 dvo_timing->hactive_lo;
537 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
538 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
539 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
540 ((dvo_timing->hsync_pulse_width_hi << 8) |
541 dvo_timing->hsync_pulse_width_lo);
542 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
543 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
544
545 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
546 dvo_timing->vactive_lo;
547 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
548 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
549 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
550 ((dvo_timing->vsync_pulse_width_hi << 4) |
551 dvo_timing->vsync_pulse_width_lo);
552 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
553 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
554 panel_fixed_mode->clock = dvo_timing->clock * 10;
555 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
556
557 if (dvo_timing->hsync_positive)
558 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
559 else
560 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
561
562 if (dvo_timing->vsync_positive)
563 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
564 else
565 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
566
567 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
568 dvo_timing->himage_lo;
569 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
570 dvo_timing->vimage_lo;
571
572 /* Some VBTs have bogus h/vsync_end values */
573 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) {
574 drm_dbg_kms(display->drm, "reducing hsync_end %d->%d\n",
575 panel_fixed_mode->hsync_end, panel_fixed_mode->htotal);
576 panel_fixed_mode->hsync_end = panel_fixed_mode->htotal;
577 }
578 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) {
579 drm_dbg_kms(display->drm, "reducing vsync_end %d->%d\n",
580 panel_fixed_mode->vsync_end, panel_fixed_mode->vtotal);
581 panel_fixed_mode->vsync_end = panel_fixed_mode->vtotal;
582 }
583
584 drm_mode_set_name(panel_fixed_mode);
585}
586
587static const struct bdb_edid_dtd *
588get_lfp_dvo_timing(const struct bdb_lfp_data *data,
589 const struct bdb_lfp_data_ptrs *ptrs,
590 int index)
591{
592 return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
593}
594
595static const struct fp_timing *
596get_lfp_fp_timing(const struct bdb_lfp_data *data,
597 const struct bdb_lfp_data_ptrs *ptrs,
598 int index)
599{
600 return (const void *)data + ptrs->ptr[index].fp_timing.offset;
601}
602
603static const struct drm_edid_product_id *
604get_lfp_pnp_id(const struct bdb_lfp_data *data,
605 const struct bdb_lfp_data_ptrs *ptrs,
606 int index)
607{
608 /* These two are supposed to have the same layout in memory. */
609 BUILD_BUG_ON(sizeof(struct bdb_edid_pnp_id) != sizeof(struct drm_edid_product_id));
610
611 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
612}
613
614static const struct bdb_lfp_data_tail *
615get_lfp_data_tail(const struct bdb_lfp_data *data,
616 const struct bdb_lfp_data_ptrs *ptrs)
617{
618 if (ptrs->panel_name.table_size)
619 return (const void *)data + ptrs->panel_name.offset;
620 else
621 return NULL;
622}
623
624static int opregion_get_panel_type(struct intel_display *display,
625 const struct intel_bios_encoder_data *devdata,
626 const struct drm_edid *drm_edid, bool use_fallback)
627{
628 return intel_opregion_get_panel_type(display);
629}
630
631static int vbt_get_panel_type(struct intel_display *display,
632 const struct intel_bios_encoder_data *devdata,
633 const struct drm_edid *drm_edid, bool use_fallback)
634{
635 const struct bdb_lfp_options *lfp_options;
636
637 lfp_options = bdb_find_section(display, BDB_LFP_OPTIONS);
638 if (!lfp_options)
639 return -1;
640
641 if (lfp_options->panel_type > 0xf &&
642 lfp_options->panel_type != 0xff) {
643 drm_dbg_kms(display->drm, "Invalid VBT panel type 0x%x\n",
644 lfp_options->panel_type);
645 return -1;
646 }
647
648 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
649 return lfp_options->panel_type2;
650
651 drm_WARN_ON(display->drm,
652 devdata && devdata->child.handle != DEVICE_HANDLE_LFP1);
653
654 return lfp_options->panel_type;
655}
656
657static int pnpid_get_panel_type(struct intel_display *display,
658 const struct intel_bios_encoder_data *devdata,
659 const struct drm_edid *drm_edid, bool use_fallback)
660{
661 const struct bdb_lfp_data *data;
662 const struct bdb_lfp_data_ptrs *ptrs;
663 struct drm_edid_product_id product_id, product_id_nodate;
664 struct drm_printer p;
665 int i, best = -1;
666
667 if (!drm_edid)
668 return -1;
669
670 drm_edid_get_product_id(drm_edid, &product_id);
671
672 product_id_nodate = product_id;
673 product_id_nodate.week_of_manufacture = 0;
674 product_id_nodate.year_of_manufacture = 0;
675
676 p = drm_dbg_printer(display->drm, DRM_UT_KMS, "EDID");
677 drm_edid_print_product_id(&p, &product_id, true);
678
679 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS);
680 if (!ptrs)
681 return -1;
682
683 data = bdb_find_section(display, BDB_LFP_DATA);
684 if (!data)
685 return -1;
686
687 for (i = 0; i < 16; i++) {
688 const struct drm_edid_product_id *vbt_id =
689 get_lfp_pnp_id(data, ptrs, i);
690
691 /* full match? */
692 if (!memcmp(vbt_id, &product_id, sizeof(*vbt_id)))
693 return i;
694
695 /*
696 * Accept a match w/o date if no full match is found,
697 * and the VBT entry does not specify a date.
698 */
699 if (best < 0 &&
700 !memcmp(vbt_id, &product_id_nodate, sizeof(*vbt_id)))
701 best = i;
702 }
703
704 return best;
705}
706
707static int fallback_get_panel_type(struct intel_display *display,
708 const struct intel_bios_encoder_data *devdata,
709 const struct drm_edid *drm_edid, bool use_fallback)
710{
711 return use_fallback ? 0 : -1;
712}
713
714enum panel_type {
715 PANEL_TYPE_OPREGION,
716 PANEL_TYPE_VBT,
717 PANEL_TYPE_PNPID,
718 PANEL_TYPE_FALLBACK,
719};
720
721static int get_panel_type(struct intel_display *display,
722 const struct intel_bios_encoder_data *devdata,
723 const struct drm_edid *drm_edid, bool use_fallback)
724{
725 struct {
726 const char *name;
727 int (*get_panel_type)(struct intel_display *display,
728 const struct intel_bios_encoder_data *devdata,
729 const struct drm_edid *drm_edid, bool use_fallback);
730 int panel_type;
731 } panel_types[] = {
732 [PANEL_TYPE_OPREGION] = {
733 .name = "OpRegion",
734 .get_panel_type = opregion_get_panel_type,
735 },
736 [PANEL_TYPE_VBT] = {
737 .name = "VBT",
738 .get_panel_type = vbt_get_panel_type,
739 },
740 [PANEL_TYPE_PNPID] = {
741 .name = "PNPID",
742 .get_panel_type = pnpid_get_panel_type,
743 },
744 [PANEL_TYPE_FALLBACK] = {
745 .name = "fallback",
746 .get_panel_type = fallback_get_panel_type,
747 },
748 };
749 int i;
750
751 for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
752 panel_types[i].panel_type = panel_types[i].get_panel_type(display, devdata,
753 drm_edid, use_fallback);
754
755 drm_WARN_ON(display->drm, panel_types[i].panel_type > 0xf &&
756 panel_types[i].panel_type != 0xff);
757
758 if (panel_types[i].panel_type >= 0)
759 drm_dbg_kms(display->drm, "Panel type (%s): %d\n",
760 panel_types[i].name, panel_types[i].panel_type);
761 }
762
763 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
764 i = PANEL_TYPE_OPREGION;
765 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff &&
766 panel_types[PANEL_TYPE_PNPID].panel_type >= 0)
767 i = PANEL_TYPE_PNPID;
768 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff &&
769 panel_types[PANEL_TYPE_VBT].panel_type >= 0)
770 i = PANEL_TYPE_VBT;
771 else
772 i = PANEL_TYPE_FALLBACK;
773
774 drm_dbg_kms(display->drm, "Selected panel type (%s): %d\n",
775 panel_types[i].name, panel_types[i].panel_type);
776
777 return panel_types[i].panel_type;
778}
779
780static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits)
781{
782 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);
783}
784
785static bool panel_bool(unsigned int value, int panel_type)
786{
787 return panel_bits(value, panel_type, 1);
788}
789
790/* Parse general panel options */
791static void
792parse_panel_options(struct intel_display *display,
793 struct intel_panel *panel)
794{
795 const struct bdb_lfp_options *lfp_options;
796 int panel_type = panel->vbt.panel_type;
797 int drrs_mode;
798
799 lfp_options = bdb_find_section(display, BDB_LFP_OPTIONS);
800 if (!lfp_options)
801 return;
802
803 panel->vbt.lvds_dither = lfp_options->pixel_dither;
804
805 /*
806 * Empirical evidence indicates the block size can be
807 * either 4,14,16,24+ bytes. For older VBTs no clear
808 * relationship between the block size vs. BDB version.
809 */
810 if (get_blocksize(lfp_options) < 16)
811 return;
812
813 drrs_mode = panel_bits(lfp_options->dps_panel_type_bits,
814 panel_type, 2);
815 /*
816 * VBT has static DRRS = 0 and seamless DRRS = 2.
817 * The below piece of code is required to adjust vbt.drrs_type
818 * to match the enum drrs_support_type.
819 */
820 switch (drrs_mode) {
821 case 0:
822 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
823 drm_dbg_kms(display->drm, "DRRS supported mode is static\n");
824 break;
825 case 2:
826 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
827 drm_dbg_kms(display->drm,
828 "DRRS supported mode is seamless\n");
829 break;
830 default:
831 panel->vbt.drrs_type = DRRS_TYPE_NONE;
832 drm_dbg_kms(display->drm,
833 "DRRS not supported (VBT input)\n");
834 break;
835 }
836}
837
838static void
839parse_lfp_panel_dtd(struct intel_display *display,
840 struct intel_panel *panel,
841 const struct bdb_lfp_data *lfp_data,
842 const struct bdb_lfp_data_ptrs *lfp_data_ptrs)
843{
844 const struct bdb_edid_dtd *panel_dvo_timing;
845 const struct fp_timing *fp_timing;
846 struct drm_display_mode *panel_fixed_mode;
847 int panel_type = panel->vbt.panel_type;
848
849 panel_dvo_timing = get_lfp_dvo_timing(lfp_data,
850 lfp_data_ptrs,
851 panel_type);
852
853 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
854 if (!panel_fixed_mode)
855 return;
856
857 fill_detail_timing_data(display, panel_fixed_mode, panel_dvo_timing);
858
859 panel->vbt.lfp_vbt_mode = panel_fixed_mode;
860
861 drm_dbg_kms(display->drm,
862 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
863 DRM_MODE_ARG(panel_fixed_mode));
864
865 fp_timing = get_lfp_fp_timing(lfp_data,
866 lfp_data_ptrs,
867 panel_type);
868
869 /* check the resolution, just to be sure */
870 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
871 fp_timing->y_res == panel_fixed_mode->vdisplay) {
872 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
873 drm_dbg_kms(display->drm,
874 "VBT initial LVDS value %x\n",
875 panel->vbt.bios_lvds_val);
876 }
877}
878
879static void
880parse_lfp_data(struct intel_display *display,
881 struct intel_panel *panel)
882{
883 const struct bdb_lfp_data *data;
884 const struct bdb_lfp_data_tail *tail;
885 const struct bdb_lfp_data_ptrs *ptrs;
886 const struct drm_edid_product_id *pnp_id;
887 struct drm_printer p;
888 int panel_type = panel->vbt.panel_type;
889
890 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS);
891 if (!ptrs)
892 return;
893
894 data = bdb_find_section(display, BDB_LFP_DATA);
895 if (!data)
896 return;
897
898 if (!panel->vbt.lfp_vbt_mode)
899 parse_lfp_panel_dtd(display, panel, data, ptrs);
900
901 pnp_id = get_lfp_pnp_id(data, ptrs, panel_type);
902
903 p = drm_dbg_printer(display->drm, DRM_UT_KMS, "Panel");
904 drm_edid_print_product_id(&p, pnp_id, false);
905
906 tail = get_lfp_data_tail(data, ptrs);
907 if (!tail)
908 return;
909
910 drm_dbg_kms(display->drm, "Panel name: %.*s\n",
911 (int)sizeof(tail->panel_name[0].name),
912 tail->panel_name[panel_type].name);
913
914 if (display->vbt.version >= 188) {
915 panel->vbt.seamless_drrs_min_refresh_rate =
916 tail->seamless_drrs_min_refresh_rate[panel_type];
917 drm_dbg_kms(display->drm,
918 "Seamless DRRS min refresh rate: %d Hz\n",
919 panel->vbt.seamless_drrs_min_refresh_rate);
920 }
921}
922
923static void
924parse_generic_dtd(struct intel_display *display,
925 struct intel_panel *panel)
926{
927 const struct bdb_generic_dtd *generic_dtd;
928 const struct generic_dtd_entry *dtd;
929 struct drm_display_mode *panel_fixed_mode;
930 int num_dtd;
931
932 /*
933 * Older VBTs provided DTD information for internal displays through
934 * the "LFP panel tables" block (42). As of VBT revision 229 the
935 * DTD information should be provided via a newer "generic DTD"
936 * block (58). Just to be safe, we'll try the new generic DTD block
937 * first on VBT >= 229, but still fall back to trying the old LFP
938 * block if that fails.
939 */
940 if (display->vbt.version < 229)
941 return;
942
943 generic_dtd = bdb_find_section(display, BDB_GENERIC_DTD);
944 if (!generic_dtd)
945 return;
946
947 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
948 drm_err(display->drm, "GDTD size %u is too small.\n",
949 generic_dtd->gdtd_size);
950 return;
951 } else if (generic_dtd->gdtd_size !=
952 sizeof(struct generic_dtd_entry)) {
953 drm_err(display->drm, "Unexpected GDTD size %u\n",
954 generic_dtd->gdtd_size);
955 /* DTD has unknown fields, but keep going */
956 }
957
958 num_dtd = (get_blocksize(generic_dtd) -
959 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
960 if (panel->vbt.panel_type >= num_dtd) {
961 drm_err(display->drm,
962 "Panel type %d not found in table of %d DTD's\n",
963 panel->vbt.panel_type, num_dtd);
964 return;
965 }
966
967 dtd = &generic_dtd->dtd[panel->vbt.panel_type];
968
969 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
970 if (!panel_fixed_mode)
971 return;
972
973 panel_fixed_mode->hdisplay = dtd->hactive;
974 panel_fixed_mode->hsync_start =
975 panel_fixed_mode->hdisplay + dtd->hfront_porch;
976 panel_fixed_mode->hsync_end =
977 panel_fixed_mode->hsync_start + dtd->hsync;
978 panel_fixed_mode->htotal =
979 panel_fixed_mode->hdisplay + dtd->hblank;
980
981 panel_fixed_mode->vdisplay = dtd->vactive;
982 panel_fixed_mode->vsync_start =
983 panel_fixed_mode->vdisplay + dtd->vfront_porch;
984 panel_fixed_mode->vsync_end =
985 panel_fixed_mode->vsync_start + dtd->vsync;
986 panel_fixed_mode->vtotal =
987 panel_fixed_mode->vdisplay + dtd->vblank;
988
989 panel_fixed_mode->clock = dtd->pixel_clock;
990 panel_fixed_mode->width_mm = dtd->width_mm;
991 panel_fixed_mode->height_mm = dtd->height_mm;
992
993 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
994 drm_mode_set_name(panel_fixed_mode);
995
996 if (dtd->hsync_positive_polarity)
997 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
998 else
999 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
1000
1001 if (dtd->vsync_positive_polarity)
1002 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
1003 else
1004 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
1005
1006 drm_dbg_kms(display->drm,
1007 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
1008 DRM_MODE_ARG(panel_fixed_mode));
1009
1010 panel->vbt.lfp_vbt_mode = panel_fixed_mode;
1011}
1012
1013static void
1014parse_lfp_backlight(struct intel_display *display,
1015 struct intel_panel *panel)
1016{
1017 const struct bdb_lfp_backlight *backlight_data;
1018 const struct lfp_backlight_data_entry *entry;
1019 int panel_type = panel->vbt.panel_type;
1020 u16 level;
1021
1022 backlight_data = bdb_find_section(display, BDB_LFP_BACKLIGHT);
1023 if (!backlight_data)
1024 return;
1025
1026 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
1027 drm_dbg_kms(display->drm,
1028 "Unsupported backlight data entry size %u\n",
1029 backlight_data->entry_size);
1030 return;
1031 }
1032
1033 entry = &backlight_data->data[panel_type];
1034
1035 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
1036 if (!panel->vbt.backlight.present) {
1037 drm_dbg_kms(display->drm,
1038 "PWM backlight not present in VBT (type %u)\n",
1039 entry->type);
1040 return;
1041 }
1042
1043 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
1044 panel->vbt.backlight.controller = 0;
1045 if (display->vbt.version >= 191) {
1046 const struct lfp_backlight_control_method *method;
1047
1048 method = &backlight_data->backlight_control[panel_type];
1049 panel->vbt.backlight.type = method->type;
1050 panel->vbt.backlight.controller = method->controller;
1051 }
1052
1053 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
1054 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1055
1056 if (display->vbt.version >= 234) {
1057 u16 min_level;
1058 bool scale;
1059
1060 level = backlight_data->brightness_level[panel_type].level;
1061 min_level = backlight_data->brightness_min_level[panel_type].level;
1062
1063 if (display->vbt.version >= 236)
1064 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
1065 else
1066 scale = level > 255;
1067
1068 if (scale)
1069 min_level = min_level / 255;
1070
1071 if (min_level > 255) {
1072 drm_warn(display->drm, "Brightness min level > 255\n");
1073 level = 255;
1074 }
1075 panel->vbt.backlight.min_brightness = min_level;
1076
1077 panel->vbt.backlight.brightness_precision_bits =
1078 backlight_data->brightness_precision_bits[panel_type];
1079 } else {
1080 level = backlight_data->level[panel_type];
1081 panel->vbt.backlight.min_brightness = entry->min_brightness;
1082 }
1083
1084 if (display->vbt.version >= 239)
1085 panel->vbt.backlight.hdr_dpcd_refresh_timeout =
1086 DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100);
1087 else
1088 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30;
1089
1090 drm_dbg_kms(display->drm,
1091 "VBT backlight PWM modulation frequency %u Hz, "
1092 "active %s, min brightness %u, level %u, controller %u\n",
1093 panel->vbt.backlight.pwm_freq_hz,
1094 panel->vbt.backlight.active_low_pwm ? "low" : "high",
1095 panel->vbt.backlight.min_brightness,
1096 level,
1097 panel->vbt.backlight.controller);
1098}
1099
1100static void
1101parse_sdvo_lvds_data(struct intel_display *display,
1102 struct intel_panel *panel)
1103{
1104 const struct bdb_sdvo_lvds_dtd *dtd;
1105 struct drm_display_mode *panel_fixed_mode;
1106 int index;
1107
1108 index = display->params.vbt_sdvo_panel_type;
1109 if (index == -2) {
1110 drm_dbg_kms(display->drm,
1111 "Ignore SDVO LVDS mode from BIOS VBT tables.\n");
1112 return;
1113 }
1114
1115 if (index == -1) {
1116 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
1117
1118 sdvo_lvds_options = bdb_find_section(display, BDB_SDVO_LVDS_OPTIONS);
1119 if (!sdvo_lvds_options)
1120 return;
1121
1122 index = sdvo_lvds_options->panel_type;
1123 }
1124
1125 dtd = bdb_find_section(display, BDB_SDVO_LVDS_DTD);
1126 if (!dtd)
1127 return;
1128
1129 /*
1130 * This should not happen, as long as the panel_type
1131 * enumeration doesn't grow over 4 items. But if it does, it
1132 * could lead to hard-to-detect bugs, so better double-check
1133 * it here to be sure.
1134 */
1135 if (index >= ARRAY_SIZE(dtd->dtd)) {
1136 drm_err(display->drm,
1137 "index %d is larger than dtd->dtd[4] array\n",
1138 index);
1139 return;
1140 }
1141
1142 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
1143 if (!panel_fixed_mode)
1144 return;
1145
1146 fill_detail_timing_data(display, panel_fixed_mode, &dtd->dtd[index]);
1147
1148 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1149
1150 drm_dbg_kms(display->drm,
1151 "Found SDVO LVDS mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1152 DRM_MODE_ARG(panel_fixed_mode));
1153}
1154
1155static int intel_bios_ssc_frequency(struct intel_display *display,
1156 bool alternate)
1157{
1158 switch (DISPLAY_VER(display)) {
1159 case 2:
1160 return alternate ? 66667 : 48000;
1161 case 3:
1162 case 4:
1163 return alternate ? 100000 : 96000;
1164 default:
1165 return alternate ? 100000 : 120000;
1166 }
1167}
1168
1169static void
1170parse_general_features(struct intel_display *display)
1171{
1172 const struct bdb_general_features *general;
1173
1174 general = bdb_find_section(display, BDB_GENERAL_FEATURES);
1175 if (!general)
1176 return;
1177
1178 display->vbt.int_tv_support = general->int_tv_support;
1179 /* int_crt_support can't be trusted on earlier platforms */
1180 if (display->vbt.version >= 155 &&
1181 (HAS_DDI(display) || display->platform.valleyview))
1182 display->vbt.int_crt_support = general->int_crt_support;
1183 display->vbt.lvds_use_ssc = general->enable_ssc;
1184 display->vbt.lvds_ssc_freq =
1185 intel_bios_ssc_frequency(display, general->ssc_freq);
1186 display->vbt.display_clock_mode = general->display_clock_mode;
1187 display->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1188 if (display->vbt.version >= 181) {
1189 display->vbt.orientation = general->rotate_180 ?
1190 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1191 DRM_MODE_PANEL_ORIENTATION_NORMAL;
1192 } else {
1193 display->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1194 }
1195
1196 if (display->vbt.version >= 249 && general->afc_startup_config) {
1197 display->vbt.override_afc_startup = true;
1198 display->vbt.override_afc_startup_val = general->afc_startup_config == 1 ? 0 : 7;
1199 }
1200
1201 drm_dbg_kms(display->drm,
1202 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1203 display->vbt.int_tv_support,
1204 display->vbt.int_crt_support,
1205 display->vbt.lvds_use_ssc,
1206 display->vbt.lvds_ssc_freq,
1207 display->vbt.display_clock_mode,
1208 display->vbt.fdi_rx_polarity_inverted);
1209}
1210
1211static const struct child_device_config *
1212child_device_ptr(const struct bdb_general_definitions *defs, int i)
1213{
1214 return (const void *) &defs->devices[i * defs->child_dev_size];
1215}
1216
1217static void
1218parse_sdvo_device_mapping(struct intel_display *display)
1219{
1220 const struct intel_bios_encoder_data *devdata;
1221 int count = 0;
1222
1223 /*
1224 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1225 * accurate and doesn't have to be, as long as it's not too strict.
1226 */
1227 if (!IS_DISPLAY_VER(display, 3, 7)) {
1228 drm_dbg_kms(display->drm, "Skipping SDVO device mapping\n");
1229 return;
1230 }
1231
1232 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
1233 const struct child_device_config *child = &devdata->child;
1234 struct sdvo_device_mapping *mapping;
1235
1236 if (child->target_addr != TARGET_ADDR1 &&
1237 child->target_addr != TARGET_ADDR2) {
1238 /*
1239 * If the target address is neither 0x70 nor 0x72,
1240 * it is not a SDVO device. Skip it.
1241 */
1242 continue;
1243 }
1244 if (child->dvo_port != DEVICE_PORT_DVOB &&
1245 child->dvo_port != DEVICE_PORT_DVOC) {
1246 /* skip the incorrect SDVO port */
1247 drm_dbg_kms(display->drm,
1248 "Incorrect SDVO port. Skip it\n");
1249 continue;
1250 }
1251 drm_dbg_kms(display->drm,
1252 "the SDVO device with target addr %2x is found on"
1253 " %s port\n",
1254 child->target_addr,
1255 (child->dvo_port == DEVICE_PORT_DVOB) ?
1256 "SDVOB" : "SDVOC");
1257 mapping = &display->vbt.sdvo_mappings[child->dvo_port - 1];
1258 if (!mapping->initialized) {
1259 mapping->dvo_port = child->dvo_port;
1260 mapping->target_addr = child->target_addr;
1261 mapping->dvo_wiring = child->dvo_wiring;
1262 mapping->ddc_pin = child->ddc_pin;
1263 mapping->i2c_pin = child->i2c_pin;
1264 mapping->initialized = 1;
1265 drm_dbg_kms(display->drm,
1266 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1267 mapping->dvo_port, mapping->target_addr,
1268 mapping->dvo_wiring, mapping->ddc_pin,
1269 mapping->i2c_pin);
1270 } else {
1271 drm_dbg_kms(display->drm,
1272 "Maybe one SDVO port is shared by "
1273 "two SDVO device.\n");
1274 }
1275 if (child->target2_addr) {
1276 /* Maybe this is a SDVO device with multiple inputs */
1277 /* And the mapping info is not added */
1278 drm_dbg_kms(display->drm,
1279 "there exists the target2_addr. Maybe this"
1280 " is a SDVO device with multiple inputs.\n");
1281 }
1282 count++;
1283 }
1284
1285 if (!count) {
1286 /* No SDVO device info is found */
1287 drm_dbg_kms(display->drm,
1288 "No SDVO device info is found in VBT\n");
1289 }
1290}
1291
1292static void
1293parse_driver_features(struct intel_display *display)
1294{
1295 const struct bdb_driver_features *driver;
1296
1297 driver = bdb_find_section(display, BDB_DRIVER_FEATURES);
1298 if (!driver)
1299 return;
1300
1301 if (DISPLAY_VER(display) >= 5) {
1302 /*
1303 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1304 * to mean "eDP". The VBT spec doesn't agree with that
1305 * interpretation, but real world VBTs seem to.
1306 */
1307 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1308 display->vbt.int_lvds_support = 0;
1309 } else {
1310 /*
1311 * FIXME it's not clear which BDB version has the LVDS config
1312 * bits defined. Revision history in the VBT spec says:
1313 * "0.92 | Add two definitions for VBT value of LVDS Active
1314 * Config (00b and 11b values defined) | 06/13/2005"
1315 * but does not the specify the BDB version.
1316 *
1317 * So far version 134 (on i945gm) is the oldest VBT observed
1318 * in the wild with the bits correctly populated. Version
1319 * 108 (on i85x) does not have the bits correctly populated.
1320 */
1321 if (display->vbt.version >= 134 &&
1322 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1323 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1324 display->vbt.int_lvds_support = 0;
1325 }
1326}
1327
1328static void
1329parse_panel_driver_features(struct intel_display *display,
1330 struct intel_panel *panel)
1331{
1332 const struct bdb_driver_features *driver;
1333
1334 driver = bdb_find_section(display, BDB_DRIVER_FEATURES);
1335 if (!driver)
1336 return;
1337
1338 if (display->vbt.version < 228) {
1339 drm_dbg_kms(display->drm, "DRRS State Enabled:%d\n",
1340 driver->drrs_enabled);
1341 /*
1342 * If DRRS is not supported, drrs_type has to be set to 0.
1343 * This is because, VBT is configured in such a way that
1344 * static DRRS is 0 and DRRS not supported is represented by
1345 * driver->drrs_enabled=false
1346 */
1347 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1348 /*
1349 * FIXME Should DMRRS perhaps be treated as seamless
1350 * but without the automatic downclocking?
1351 */
1352 if (driver->dmrrs_enabled)
1353 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1354 else
1355 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1356 }
1357
1358 panel->vbt.psr.enable = driver->psr_enabled;
1359 }
1360}
1361
1362static void
1363parse_power_conservation_features(struct intel_display *display,
1364 struct intel_panel *panel)
1365{
1366 const struct bdb_lfp_power *power;
1367 u8 panel_type = panel->vbt.panel_type;
1368
1369 panel->vbt.vrr = true; /* matches Windows behaviour */
1370
1371 if (display->vbt.version < 228)
1372 return;
1373
1374 power = bdb_find_section(display, BDB_LFP_POWER);
1375 if (!power)
1376 return;
1377
1378 panel->vbt.psr.enable = panel_bool(power->psr, panel_type);
1379
1380 /*
1381 * If DRRS is not supported, drrs_type has to be set to 0.
1382 * This is because, VBT is configured in such a way that
1383 * static DRRS is 0 and DRRS not supported is represented by
1384 * power->drrs & BIT(panel_type)=false
1385 */
1386 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1387 /*
1388 * FIXME Should DMRRS perhaps be treated as seamless
1389 * but without the automatic downclocking?
1390 */
1391 if (panel_bool(power->dmrrs, panel_type))
1392 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1393 else
1394 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1395 }
1396
1397 if (display->vbt.version >= 232)
1398 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
1399
1400 if (display->vbt.version >= 233)
1401 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
1402 panel_type);
1403}
1404
1405static void
1406parse_edp(struct intel_display *display,
1407 struct intel_panel *panel)
1408{
1409 const struct bdb_edp *edp;
1410 const struct edp_power_seq *edp_pps;
1411 const struct edp_fast_link_params *edp_link_params;
1412 int panel_type = panel->vbt.panel_type;
1413
1414 edp = bdb_find_section(display, BDB_EDP);
1415 if (!edp)
1416 return;
1417
1418 switch (panel_bits(edp->color_depth, panel_type, 2)) {
1419 case EDP_18BPP:
1420 panel->vbt.edp.bpp = 18;
1421 break;
1422 case EDP_24BPP:
1423 panel->vbt.edp.bpp = 24;
1424 break;
1425 case EDP_30BPP:
1426 panel->vbt.edp.bpp = 30;
1427 break;
1428 }
1429
1430 /* Get the eDP sequencing and link info */
1431 edp_pps = &edp->power_seqs[panel_type];
1432 edp_link_params = &edp->fast_link_params[panel_type];
1433
1434 panel->vbt.edp.pps = *edp_pps;
1435
1436 if (display->vbt.version >= 224) {
1437 panel->vbt.edp.rate =
1438 edp->edp_fast_link_training_rate[panel_type] * 20;
1439 } else {
1440 switch (edp_link_params->rate) {
1441 case EDP_RATE_1_62:
1442 panel->vbt.edp.rate = 162000;
1443 break;
1444 case EDP_RATE_2_7:
1445 panel->vbt.edp.rate = 270000;
1446 break;
1447 case EDP_RATE_5_4:
1448 panel->vbt.edp.rate = 540000;
1449 break;
1450 default:
1451 drm_dbg_kms(display->drm,
1452 "VBT has unknown eDP link rate value %u\n",
1453 edp_link_params->rate);
1454 break;
1455 }
1456 }
1457
1458 switch (edp_link_params->lanes) {
1459 case EDP_LANE_1:
1460 panel->vbt.edp.lanes = 1;
1461 break;
1462 case EDP_LANE_2:
1463 panel->vbt.edp.lanes = 2;
1464 break;
1465 case EDP_LANE_4:
1466 panel->vbt.edp.lanes = 4;
1467 break;
1468 default:
1469 drm_dbg_kms(display->drm,
1470 "VBT has unknown eDP lane count value %u\n",
1471 edp_link_params->lanes);
1472 break;
1473 }
1474
1475 switch (edp_link_params->preemphasis) {
1476 case EDP_PREEMPHASIS_NONE:
1477 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1478 break;
1479 case EDP_PREEMPHASIS_3_5dB:
1480 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1481 break;
1482 case EDP_PREEMPHASIS_6dB:
1483 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1484 break;
1485 case EDP_PREEMPHASIS_9_5dB:
1486 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1487 break;
1488 default:
1489 drm_dbg_kms(display->drm,
1490 "VBT has unknown eDP pre-emphasis value %u\n",
1491 edp_link_params->preemphasis);
1492 break;
1493 }
1494
1495 switch (edp_link_params->vswing) {
1496 case EDP_VSWING_0_4V:
1497 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1498 break;
1499 case EDP_VSWING_0_6V:
1500 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1501 break;
1502 case EDP_VSWING_0_8V:
1503 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1504 break;
1505 case EDP_VSWING_1_2V:
1506 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1507 break;
1508 default:
1509 drm_dbg_kms(display->drm,
1510 "VBT has unknown eDP voltage swing value %u\n",
1511 edp_link_params->vswing);
1512 break;
1513 }
1514
1515 if (display->vbt.version >= 173) {
1516 u8 vswing;
1517
1518 /* Don't read from VBT if module parameter has valid value*/
1519 if (display->params.edp_vswing) {
1520 panel->vbt.edp.low_vswing =
1521 display->params.edp_vswing == 1;
1522 } else {
1523 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1524 panel->vbt.edp.low_vswing = vswing == 0;
1525 }
1526 }
1527
1528 panel->vbt.edp.drrs_msa_timing_delay =
1529 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
1530
1531 if (display->vbt.version >= 244)
1532 panel->vbt.edp.max_link_rate =
1533 edp->edp_max_port_link_rate[panel_type] * 20;
1534
1535 if (display->vbt.version >= 251)
1536 panel->vbt.edp.dsc_disable =
1537 panel_bool(edp->edp_dsc_disable, panel_type);
1538}
1539
1540static void
1541parse_psr(struct intel_display *display,
1542 struct intel_panel *panel)
1543{
1544 const struct bdb_psr *psr;
1545 const struct psr_table *psr_table;
1546 int panel_type = panel->vbt.panel_type;
1547
1548 psr = bdb_find_section(display, BDB_PSR);
1549 if (!psr) {
1550 drm_dbg_kms(display->drm, "No PSR BDB found.\n");
1551 return;
1552 }
1553
1554 psr_table = &psr->psr_table[panel_type];
1555
1556 panel->vbt.psr.full_link = psr_table->full_link;
1557 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1558
1559 /* Allowed VBT values goes from 0 to 15 */
1560 panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1561 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1562
1563 /*
1564 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1565 * Old decimal value is wake up time in multiples of 100 us.
1566 */
1567 if (display->vbt.version >= 205 &&
1568 (DISPLAY_VER(display) >= 9 && !display->platform.broxton)) {
1569 switch (psr_table->tp1_wakeup_time) {
1570 case 0:
1571 panel->vbt.psr.tp1_wakeup_time_us = 500;
1572 break;
1573 case 1:
1574 panel->vbt.psr.tp1_wakeup_time_us = 100;
1575 break;
1576 case 3:
1577 panel->vbt.psr.tp1_wakeup_time_us = 0;
1578 break;
1579 default:
1580 drm_dbg_kms(display->drm,
1581 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1582 psr_table->tp1_wakeup_time);
1583 fallthrough;
1584 case 2:
1585 panel->vbt.psr.tp1_wakeup_time_us = 2500;
1586 break;
1587 }
1588
1589 switch (psr_table->tp2_tp3_wakeup_time) {
1590 case 0:
1591 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1592 break;
1593 case 1:
1594 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1595 break;
1596 case 3:
1597 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1598 break;
1599 default:
1600 drm_dbg_kms(display->drm,
1601 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1602 psr_table->tp2_tp3_wakeup_time);
1603 fallthrough;
1604 case 2:
1605 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1606 break;
1607 }
1608 } else {
1609 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1610 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1611 }
1612
1613 if (display->vbt.version >= 226) {
1614 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1615
1616 wakeup_time = panel_bits(wakeup_time, panel_type, 2);
1617 switch (wakeup_time) {
1618 case 0:
1619 wakeup_time = 500;
1620 break;
1621 case 1:
1622 wakeup_time = 100;
1623 break;
1624 case 3:
1625 wakeup_time = 50;
1626 break;
1627 default:
1628 case 2:
1629 wakeup_time = 2500;
1630 break;
1631 }
1632 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1633 } else {
1634 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1635 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us;
1636 }
1637}
1638
1639static void parse_dsi_backlight_ports(struct intel_display *display,
1640 struct intel_panel *panel,
1641 enum port port)
1642{
1643 enum port port_bc = DISPLAY_VER(display) >= 11 ? PORT_B : PORT_C;
1644
1645 if (!panel->vbt.dsi.config->dual_link || display->vbt.version < 197) {
1646 panel->vbt.dsi.bl_ports = BIT(port);
1647 if (panel->vbt.dsi.config->cabc_supported)
1648 panel->vbt.dsi.cabc_ports = BIT(port);
1649
1650 return;
1651 }
1652
1653 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) {
1654 case DL_DCS_PORT_A:
1655 panel->vbt.dsi.bl_ports = BIT(PORT_A);
1656 break;
1657 case DL_DCS_PORT_C:
1658 panel->vbt.dsi.bl_ports = BIT(port_bc);
1659 break;
1660 default:
1661 case DL_DCS_PORT_A_AND_C:
1662 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc);
1663 break;
1664 }
1665
1666 if (!panel->vbt.dsi.config->cabc_supported)
1667 return;
1668
1669 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) {
1670 case DL_DCS_PORT_A:
1671 panel->vbt.dsi.cabc_ports = BIT(PORT_A);
1672 break;
1673 case DL_DCS_PORT_C:
1674 panel->vbt.dsi.cabc_ports = BIT(port_bc);
1675 break;
1676 default:
1677 case DL_DCS_PORT_A_AND_C:
1678 panel->vbt.dsi.cabc_ports =
1679 BIT(PORT_A) | BIT(port_bc);
1680 break;
1681 }
1682}
1683
1684static void
1685parse_mipi_config(struct intel_display *display,
1686 struct intel_panel *panel)
1687{
1688 const struct bdb_mipi_config *start;
1689 const struct mipi_config *config;
1690 const struct mipi_pps_data *pps;
1691 int panel_type = panel->vbt.panel_type;
1692 enum port port;
1693
1694 /* parse MIPI blocks only if LFP type is MIPI */
1695 if (!intel_bios_is_dsi_present(display, &port))
1696 return;
1697
1698 /* Initialize this to undefined indicating no generic MIPI support */
1699 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1700
1701 start = bdb_find_section(display, BDB_MIPI_CONFIG);
1702 if (!start) {
1703 drm_dbg_kms(display->drm, "No MIPI config BDB found");
1704 return;
1705 }
1706
1707 drm_dbg_kms(display->drm, "Found MIPI Config block, panel index = %d\n",
1708 panel_type);
1709
1710 /*
1711 * get hold of the correct configuration block and pps data as per
1712 * the panel_type as index
1713 */
1714 config = &start->config[panel_type];
1715 pps = &start->pps[panel_type];
1716
1717 /* store as of now full data. Trim when we realise all is not needed */
1718 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1719 if (!panel->vbt.dsi.config)
1720 return;
1721
1722 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1723 if (!panel->vbt.dsi.pps) {
1724 kfree(panel->vbt.dsi.config);
1725 return;
1726 }
1727
1728 parse_dsi_backlight_ports(display, panel, port);
1729
1730 /* FIXME is the 90 vs. 270 correct? */
1731 switch (config->rotation) {
1732 case ENABLE_ROTATION_0:
1733 /*
1734 * Most (all?) VBTs claim 0 degrees despite having
1735 * an upside down panel, thus we do not trust this.
1736 */
1737 panel->vbt.dsi.orientation =
1738 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1739 break;
1740 case ENABLE_ROTATION_90:
1741 panel->vbt.dsi.orientation =
1742 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1743 break;
1744 case ENABLE_ROTATION_180:
1745 panel->vbt.dsi.orientation =
1746 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1747 break;
1748 case ENABLE_ROTATION_270:
1749 panel->vbt.dsi.orientation =
1750 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1751 break;
1752 }
1753
1754 /* We have mandatory mipi config blocks. Initialize as generic panel */
1755 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1756}
1757
1758/* Find the sequence block and size for the given panel. */
1759static const u8 *
1760find_panel_sequence_block(struct intel_display *display,
1761 const struct bdb_mipi_sequence *sequence,
1762 u16 panel_id, u32 *seq_size)
1763{
1764 u32 total = get_blocksize(sequence);
1765 const u8 *data = &sequence->data[0];
1766 u8 current_id;
1767 u32 current_size;
1768 int header_size = sequence->version >= 3 ? 5 : 3;
1769 int index = 0;
1770 int i;
1771
1772 /* skip new block size */
1773 if (sequence->version >= 3)
1774 data += 4;
1775
1776 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1777 if (index + header_size > total) {
1778 drm_err(display->drm,
1779 "Invalid sequence block (header)\n");
1780 return NULL;
1781 }
1782
1783 current_id = *(data + index);
1784 if (sequence->version >= 3)
1785 current_size = *((const u32 *)(data + index + 1));
1786 else
1787 current_size = *((const u16 *)(data + index + 1));
1788
1789 index += header_size;
1790
1791 if (index + current_size > total) {
1792 drm_err(display->drm, "Invalid sequence block\n");
1793 return NULL;
1794 }
1795
1796 if (current_id == panel_id) {
1797 *seq_size = current_size;
1798 return data + index;
1799 }
1800
1801 index += current_size;
1802 }
1803
1804 drm_err(display->drm,
1805 "Sequence block detected but no valid configuration\n");
1806
1807 return NULL;
1808}
1809
1810static int goto_next_sequence(struct intel_display *display,
1811 const u8 *data, int index, int total)
1812{
1813 u16 len;
1814
1815 /* Skip Sequence Byte. */
1816 for (index = index + 1; index < total; index += len) {
1817 u8 operation_byte = *(data + index);
1818 index++;
1819
1820 switch (operation_byte) {
1821 case MIPI_SEQ_ELEM_END:
1822 return index;
1823 case MIPI_SEQ_ELEM_SEND_PKT:
1824 if (index + 4 > total)
1825 return 0;
1826
1827 len = *((const u16 *)(data + index + 2)) + 4;
1828 break;
1829 case MIPI_SEQ_ELEM_DELAY:
1830 len = 4;
1831 break;
1832 case MIPI_SEQ_ELEM_GPIO:
1833 len = 2;
1834 break;
1835 case MIPI_SEQ_ELEM_I2C:
1836 if (index + 7 > total)
1837 return 0;
1838 len = *(data + index + 6) + 7;
1839 break;
1840 default:
1841 drm_err(display->drm, "Unknown operation byte\n");
1842 return 0;
1843 }
1844 }
1845
1846 return 0;
1847}
1848
1849static int goto_next_sequence_v3(struct intel_display *display,
1850 const u8 *data, int index, int total)
1851{
1852 int seq_end;
1853 u16 len;
1854 u32 size_of_sequence;
1855
1856 /*
1857 * Could skip sequence based on Size of Sequence alone, but also do some
1858 * checking on the structure.
1859 */
1860 if (total < 5) {
1861 drm_err(display->drm, "Too small sequence size\n");
1862 return 0;
1863 }
1864
1865 /* Skip Sequence Byte. */
1866 index++;
1867
1868 /*
1869 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1870 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1871 * byte.
1872 */
1873 size_of_sequence = *((const u32 *)(data + index));
1874 index += 4;
1875
1876 seq_end = index + size_of_sequence;
1877 if (seq_end > total) {
1878 drm_err(display->drm, "Invalid sequence size\n");
1879 return 0;
1880 }
1881
1882 for (; index < total; index += len) {
1883 u8 operation_byte = *(data + index);
1884 index++;
1885
1886 if (operation_byte == MIPI_SEQ_ELEM_END) {
1887 if (index != seq_end) {
1888 drm_err(display->drm,
1889 "Invalid element structure\n");
1890 return 0;
1891 }
1892 return index;
1893 }
1894
1895 len = *(data + index);
1896 index++;
1897
1898 /*
1899 * FIXME: Would be nice to check elements like for v1/v2 in
1900 * goto_next_sequence() above.
1901 */
1902 switch (operation_byte) {
1903 case MIPI_SEQ_ELEM_SEND_PKT:
1904 case MIPI_SEQ_ELEM_DELAY:
1905 case MIPI_SEQ_ELEM_GPIO:
1906 case MIPI_SEQ_ELEM_I2C:
1907 case MIPI_SEQ_ELEM_SPI:
1908 case MIPI_SEQ_ELEM_PMIC:
1909 break;
1910 default:
1911 drm_err(display->drm, "Unknown operation byte %u\n",
1912 operation_byte);
1913 break;
1914 }
1915 }
1916
1917 return 0;
1918}
1919
1920/*
1921 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1922 * skip all delay + gpio operands and stop at the first DSI packet op.
1923 */
1924static int get_init_otp_deassert_fragment_len(struct intel_display *display,
1925 struct intel_panel *panel)
1926{
1927 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1928 int index, len;
1929
1930 if (drm_WARN_ON(display->drm,
1931 !data || panel->vbt.dsi.seq_version != 1))
1932 return 0;
1933
1934 /* index = 1 to skip sequence byte */
1935 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1936 switch (data[index]) {
1937 case MIPI_SEQ_ELEM_SEND_PKT:
1938 return index == 1 ? 0 : index;
1939 case MIPI_SEQ_ELEM_DELAY:
1940 len = 5; /* 1 byte for operand + uint32 */
1941 break;
1942 case MIPI_SEQ_ELEM_GPIO:
1943 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1944 break;
1945 default:
1946 return 0;
1947 }
1948 }
1949
1950 return 0;
1951}
1952
1953/*
1954 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1955 * The deassert must be done before calling intel_dsi_device_ready, so for
1956 * these devices we split the init OTP sequence into a deassert sequence and
1957 * the actual init OTP part.
1958 */
1959static void vlv_fixup_mipi_sequences(struct intel_display *display,
1960 struct intel_panel *panel)
1961{
1962 u8 *init_otp;
1963 int len;
1964
1965 /* Limit this to v1 vid-mode sequences */
1966 if (panel->vbt.dsi.config->is_cmd_mode ||
1967 panel->vbt.dsi.seq_version != 1)
1968 return;
1969
1970 /* Only do this if there are otp and assert seqs and no deassert seq */
1971 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1972 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1973 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1974 return;
1975
1976 /* The deassert-sequence ends at the first DSI packet */
1977 len = get_init_otp_deassert_fragment_len(display, panel);
1978 if (!len)
1979 return;
1980
1981 drm_dbg_kms(display->drm,
1982 "Using init OTP fragment to deassert reset\n");
1983
1984 /* Copy the fragment, update seq byte and terminate it */
1985 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1986 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1987 if (!panel->vbt.dsi.deassert_seq)
1988 return;
1989 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1990 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1991 /* Use the copy for deassert */
1992 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1993 panel->vbt.dsi.deassert_seq;
1994 /* Replace the last byte of the fragment with init OTP seq byte */
1995 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1996 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1997 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1998}
1999
2000/*
2001 * Some machines (eg. Lenovo 82TQ) appear to have broken
2002 * VBT sequences:
2003 * - INIT_OTP is not present at all
2004 * - what should be in INIT_OTP is in DISPLAY_ON
2005 * - what should be in DISPLAY_ON is in BACKLIGHT_ON
2006 * (along with the actual backlight stuff)
2007 *
2008 * To make those work we simply swap DISPLAY_ON and INIT_OTP.
2009 *
2010 * TODO: Do we need to limit this to specific machines,
2011 * or examine the contents of the sequences to
2012 * avoid false positives?
2013 */
2014static void icl_fixup_mipi_sequences(struct intel_display *display,
2015 struct intel_panel *panel)
2016{
2017 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] &&
2018 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]) {
2019 drm_dbg_kms(display->drm,
2020 "Broken VBT: Swapping INIT_OTP and DISPLAY_ON sequences\n");
2021
2022 swap(panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP],
2023 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]);
2024 }
2025}
2026
2027static void fixup_mipi_sequences(struct intel_display *display,
2028 struct intel_panel *panel)
2029{
2030 if (DISPLAY_VER(display) >= 11)
2031 icl_fixup_mipi_sequences(display, panel);
2032 else if (display->platform.valleyview)
2033 vlv_fixup_mipi_sequences(display, panel);
2034}
2035
2036static void
2037parse_mipi_sequence(struct intel_display *display,
2038 struct intel_panel *panel)
2039{
2040 int panel_type = panel->vbt.panel_type;
2041 const struct bdb_mipi_sequence *sequence;
2042 const u8 *seq_data;
2043 u32 seq_size;
2044 u8 *data;
2045 int index = 0;
2046
2047 /* Only our generic panel driver uses the sequence block. */
2048 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
2049 return;
2050
2051 sequence = bdb_find_section(display, BDB_MIPI_SEQUENCE);
2052 if (!sequence) {
2053 drm_dbg_kms(display->drm,
2054 "No MIPI Sequence found, parsing complete\n");
2055 return;
2056 }
2057
2058 /* Fail gracefully for forward incompatible sequence block. */
2059 if (sequence->version >= 4) {
2060 drm_err(display->drm,
2061 "Unable to parse MIPI Sequence Block v%u\n",
2062 sequence->version);
2063 return;
2064 }
2065
2066 drm_dbg_kms(display->drm, "Found MIPI sequence block v%u\n",
2067 sequence->version);
2068
2069 seq_data = find_panel_sequence_block(display, sequence, panel_type, &seq_size);
2070 if (!seq_data)
2071 return;
2072
2073 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
2074 if (!data)
2075 return;
2076
2077 /* Parse the sequences, store pointers to each sequence. */
2078 for (;;) {
2079 u8 seq_id = *(data + index);
2080 if (seq_id == MIPI_SEQ_END)
2081 break;
2082
2083 if (seq_id >= MIPI_SEQ_MAX) {
2084 drm_err(display->drm, "Unknown sequence %u\n",
2085 seq_id);
2086 goto err;
2087 }
2088
2089 /* Log about presence of sequences we won't run. */
2090 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
2091 drm_dbg_kms(display->drm,
2092 "Unsupported sequence %u\n", seq_id);
2093
2094 panel->vbt.dsi.sequence[seq_id] = data + index;
2095
2096 if (sequence->version >= 3)
2097 index = goto_next_sequence_v3(display, data, index, seq_size);
2098 else
2099 index = goto_next_sequence(display, data, index, seq_size);
2100 if (!index) {
2101 drm_err(display->drm, "Invalid sequence %u\n",
2102 seq_id);
2103 goto err;
2104 }
2105 }
2106
2107 panel->vbt.dsi.data = data;
2108 panel->vbt.dsi.size = seq_size;
2109 panel->vbt.dsi.seq_version = sequence->version;
2110
2111 fixup_mipi_sequences(display, panel);
2112
2113 drm_dbg_kms(display->drm, "MIPI related VBT parsing complete\n");
2114 return;
2115
2116err:
2117 kfree(data);
2118 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence));
2119}
2120
2121static void
2122parse_compression_parameters(struct intel_display *display)
2123{
2124 const struct bdb_compression_parameters *params;
2125 struct intel_bios_encoder_data *devdata;
2126 u16 block_size;
2127 int index;
2128
2129 if (display->vbt.version < 198)
2130 return;
2131
2132 params = bdb_find_section(display, BDB_COMPRESSION_PARAMETERS);
2133 if (params) {
2134 /* Sanity checks */
2135 if (params->entry_size != sizeof(params->data[0])) {
2136 drm_dbg_kms(display->drm,
2137 "VBT: unsupported compression param entry size\n");
2138 return;
2139 }
2140
2141 block_size = get_blocksize(params);
2142 if (block_size < sizeof(*params)) {
2143 drm_dbg_kms(display->drm,
2144 "VBT: expected 16 compression param entries\n");
2145 return;
2146 }
2147 }
2148
2149 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
2150 const struct child_device_config *child = &devdata->child;
2151
2152 if (!child->compression_enable)
2153 continue;
2154
2155 if (!params) {
2156 drm_dbg_kms(display->drm,
2157 "VBT: compression params not available\n");
2158 continue;
2159 }
2160
2161 if (child->compression_method_cps) {
2162 drm_dbg_kms(display->drm,
2163 "VBT: CPS compression not supported\n");
2164 continue;
2165 }
2166
2167 index = child->compression_structure_index;
2168
2169 devdata->dsc = kmemdup(¶ms->data[index],
2170 sizeof(*devdata->dsc), GFP_KERNEL);
2171 }
2172}
2173
2174static u8 translate_iboost(struct intel_display *display, u8 val)
2175{
2176 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
2177
2178 if (val >= ARRAY_SIZE(mapping)) {
2179 drm_dbg_kms(display->drm,
2180 "Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
2181 return 0;
2182 }
2183 return mapping[val];
2184}
2185
2186static const u8 cnp_ddc_pin_map[] = {
2187 [0] = 0, /* N/A */
2188 [GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B,
2189 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C,
2190 [GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */
2191 [GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */
2192};
2193
2194static const u8 icp_ddc_pin_map[] = {
2195 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2196 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2197 [GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C,
2198 [GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1,
2199 [GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2,
2200 [GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3,
2201 [GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4,
2202 [GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5,
2203 [GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6,
2204};
2205
2206static const u8 rkl_pch_tgp_ddc_pin_map[] = {
2207 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2208 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2209 [GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D,
2210 [GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E,
2211};
2212
2213static const u8 adls_ddc_pin_map[] = {
2214 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2215 [GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1,
2216 [GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2,
2217 [GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3,
2218 [GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4,
2219};
2220
2221static const u8 gen9bc_tgp_ddc_pin_map[] = {
2222 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B,
2223 [GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C,
2224 [GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D,
2225};
2226
2227static const u8 adlp_ddc_pin_map[] = {
2228 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2229 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2230 [GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1,
2231 [GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2,
2232 [GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3,
2233 [GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4,
2234};
2235
2236static u8 map_ddc_pin(struct intel_display *display, u8 vbt_pin)
2237{
2238 struct drm_i915_private *i915 = to_i915(display->drm);
2239 const u8 *ddc_pin_map;
2240 int i, n_entries;
2241
2242 if (INTEL_PCH_TYPE(i915) >= PCH_MTL || display->platform.alderlake_p) {
2243 ddc_pin_map = adlp_ddc_pin_map;
2244 n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2245 } else if (display->platform.alderlake_s) {
2246 ddc_pin_map = adls_ddc_pin_map;
2247 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2248 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
2249 return vbt_pin;
2250 } else if (display->platform.rocketlake && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2251 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2252 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2253 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(display) == 9) {
2254 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2255 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2256 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2257 ddc_pin_map = icp_ddc_pin_map;
2258 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2259 } else if (HAS_PCH_CNP(i915)) {
2260 ddc_pin_map = cnp_ddc_pin_map;
2261 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2262 } else {
2263 /* Assuming direct map */
2264 return vbt_pin;
2265 }
2266
2267 for (i = 0; i < n_entries; i++) {
2268 if (ddc_pin_map[i] == vbt_pin)
2269 return i;
2270 }
2271
2272 drm_dbg_kms(display->drm,
2273 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2274 vbt_pin);
2275 return 0;
2276}
2277
2278static u8 dvo_port_type(u8 dvo_port)
2279{
2280 switch (dvo_port) {
2281 case DVO_PORT_HDMIA:
2282 case DVO_PORT_HDMIB:
2283 case DVO_PORT_HDMIC:
2284 case DVO_PORT_HDMID:
2285 case DVO_PORT_HDMIE:
2286 case DVO_PORT_HDMIF:
2287 case DVO_PORT_HDMIG:
2288 case DVO_PORT_HDMIH:
2289 case DVO_PORT_HDMII:
2290 return DVO_PORT_HDMIA;
2291 case DVO_PORT_DPA:
2292 case DVO_PORT_DPB:
2293 case DVO_PORT_DPC:
2294 case DVO_PORT_DPD:
2295 case DVO_PORT_DPE:
2296 case DVO_PORT_DPF:
2297 case DVO_PORT_DPG:
2298 case DVO_PORT_DPH:
2299 case DVO_PORT_DPI:
2300 return DVO_PORT_DPA;
2301 case DVO_PORT_MIPIA:
2302 case DVO_PORT_MIPIB:
2303 case DVO_PORT_MIPIC:
2304 case DVO_PORT_MIPID:
2305 return DVO_PORT_MIPIA;
2306 default:
2307 return dvo_port;
2308 }
2309}
2310
2311static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2312 const int port_mapping[][3], u8 dvo_port)
2313{
2314 enum port port;
2315 int i;
2316
2317 for (port = PORT_A; port < n_ports; port++) {
2318 for (i = 0; i < n_dvo; i++) {
2319 if (port_mapping[port][i] == -1)
2320 break;
2321
2322 if (dvo_port == port_mapping[port][i])
2323 return port;
2324 }
2325 }
2326
2327 return PORT_NONE;
2328}
2329
2330static enum port dvo_port_to_port(struct intel_display *display,
2331 u8 dvo_port)
2332{
2333 /*
2334 * Each DDI port can have more than one value on the "DVO Port" field,
2335 * so look for all the possible values for each port.
2336 */
2337 static const int port_mapping[][3] = {
2338 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2339 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2340 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2341 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2342 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2343 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2344 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2345 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2346 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2347 };
2348 /*
2349 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2350 * map to DDI A,B,TC1,TC2 respectively.
2351 */
2352 static const int rkl_port_mapping[][3] = {
2353 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2354 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2355 [PORT_C] = { -1 },
2356 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2357 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2358 };
2359 /*
2360 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2361 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2362 */
2363 static const int adls_port_mapping[][3] = {
2364 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2365 [PORT_B] = { -1 },
2366 [PORT_C] = { -1 },
2367 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2368 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2369 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2370 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2371 };
2372 static const int xelpd_port_mapping[][3] = {
2373 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2374 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2375 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2376 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2377 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2378 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2379 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2380 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2381 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2382 };
2383
2384 if (DISPLAY_VER(display) >= 13)
2385 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2386 ARRAY_SIZE(xelpd_port_mapping[0]),
2387 xelpd_port_mapping,
2388 dvo_port);
2389 else if (display->platform.alderlake_s)
2390 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2391 ARRAY_SIZE(adls_port_mapping[0]),
2392 adls_port_mapping,
2393 dvo_port);
2394 else if (display->platform.dg1 || display->platform.rocketlake)
2395 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2396 ARRAY_SIZE(rkl_port_mapping[0]),
2397 rkl_port_mapping,
2398 dvo_port);
2399 else
2400 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2401 ARRAY_SIZE(port_mapping[0]),
2402 port_mapping,
2403 dvo_port);
2404}
2405
2406static enum port
2407dsi_dvo_port_to_port(struct intel_display *display, u8 dvo_port)
2408{
2409 switch (dvo_port) {
2410 case DVO_PORT_MIPIA:
2411 return PORT_A;
2412 case DVO_PORT_MIPIC:
2413 if (DISPLAY_VER(display) >= 11)
2414 return PORT_B;
2415 else
2416 return PORT_C;
2417 default:
2418 return PORT_NONE;
2419 }
2420}
2421
2422enum port intel_bios_encoder_port(const struct intel_bios_encoder_data *devdata)
2423{
2424 struct intel_display *display = devdata->display;
2425 const struct child_device_config *child = &devdata->child;
2426 enum port port;
2427
2428 port = dvo_port_to_port(display, child->dvo_port);
2429 if (port == PORT_NONE && DISPLAY_VER(display) >= 11)
2430 port = dsi_dvo_port_to_port(display, child->dvo_port);
2431
2432 return port;
2433}
2434
2435static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2436{
2437 switch (vbt_max_link_rate) {
2438 default:
2439 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2440 return 0;
2441 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2442 return 2000000;
2443 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2444 return 1350000;
2445 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2446 return 1000000;
2447 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2448 return 810000;
2449 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2450 return 540000;
2451 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2452 return 270000;
2453 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2454 return 162000;
2455 }
2456}
2457
2458static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2459{
2460 switch (vbt_max_link_rate) {
2461 default:
2462 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2463 return 810000;
2464 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2465 return 540000;
2466 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2467 return 270000;
2468 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2469 return 162000;
2470 }
2471}
2472
2473int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2474{
2475 if (!devdata || devdata->display->vbt.version < 216)
2476 return 0;
2477
2478 if (devdata->display->vbt.version >= 230)
2479 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2480 else
2481 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2482}
2483
2484int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
2485{
2486 if (!devdata || devdata->display->vbt.version < 244)
2487 return 0;
2488
2489 return devdata->child.dp_max_lane_count + 1;
2490}
2491
2492static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2493 enum port port)
2494{
2495 struct intel_display *display = devdata->display;
2496 bool is_hdmi;
2497
2498 if (port != PORT_A || DISPLAY_VER(display) >= 12)
2499 return;
2500
2501 if (!intel_bios_encoder_supports_dvi(devdata))
2502 return;
2503
2504 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2505
2506 drm_dbg_kms(display->drm, "VBT claims port A supports DVI%s, ignoring\n",
2507 is_hdmi ? "/HDMI" : "");
2508
2509 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2510 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2511}
2512
2513static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
2514 enum port port)
2515{
2516 struct intel_display *display = devdata->display;
2517
2518 if (!intel_bios_encoder_supports_dvi(devdata))
2519 return;
2520
2521 /*
2522 * Some BDW machines (eg. HP Pavilion 15-ab) shipped
2523 * with a HSW VBT where the level shifter value goes
2524 * up to 11, whereas the BDW max is 9.
2525 */
2526 if (display->platform.broadwell && devdata->child.hdmi_level_shifter_value > 9) {
2527 drm_dbg_kms(display->drm,
2528 "Bogus port %c VBT HDMI level shift %d, adjusting to %d\n",
2529 port_name(port), devdata->child.hdmi_level_shifter_value, 9);
2530
2531 devdata->child.hdmi_level_shifter_value = 9;
2532 }
2533}
2534
2535static bool
2536intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2537{
2538 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2539}
2540
2541bool
2542intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2543{
2544 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2545}
2546
2547bool
2548intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2549{
2550 return intel_bios_encoder_supports_dvi(devdata) &&
2551 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2552}
2553
2554bool
2555intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2556{
2557 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2558}
2559
2560bool
2561intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2562{
2563 return intel_bios_encoder_supports_dp(devdata) &&
2564 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2565}
2566
2567bool
2568intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata)
2569{
2570 return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT;
2571}
2572
2573bool
2574intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata)
2575{
2576 return devdata && HAS_LSPCON(devdata->display) && devdata->child.lspcon;
2577}
2578
2579/* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
2580int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2581{
2582 if (!devdata || devdata->display->vbt.version < 158 ||
2583 DISPLAY_VER(devdata->display) >= 14)
2584 return -1;
2585
2586 return devdata->child.hdmi_level_shifter_value;
2587}
2588
2589int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2590{
2591 if (!devdata || devdata->display->vbt.version < 204)
2592 return 0;
2593
2594 switch (devdata->child.hdmi_max_data_rate) {
2595 default:
2596 MISSING_CASE(devdata->child.hdmi_max_data_rate);
2597 fallthrough;
2598 case HDMI_MAX_DATA_RATE_PLATFORM:
2599 return 0;
2600 case HDMI_MAX_DATA_RATE_594:
2601 return 594000;
2602 case HDMI_MAX_DATA_RATE_340:
2603 return 340000;
2604 case HDMI_MAX_DATA_RATE_300:
2605 return 300000;
2606 case HDMI_MAX_DATA_RATE_297:
2607 return 297000;
2608 case HDMI_MAX_DATA_RATE_165:
2609 return 165000;
2610 }
2611}
2612
2613static bool is_port_valid(struct intel_display *display, enum port port)
2614{
2615 /*
2616 * On some ICL SKUs port F is not present, but broken VBTs mark
2617 * the port as present. Only try to initialize port F for the
2618 * SKUs that may actually have it.
2619 */
2620 if (port == PORT_F && display->platform.icelake)
2621 return display->platform.icelake_port_f;
2622
2623 return true;
2624}
2625
2626static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
2627{
2628 struct intel_display *display = devdata->display;
2629 const struct child_device_config *child = &devdata->child;
2630 bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt;
2631 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2632 enum port port;
2633
2634 port = intel_bios_encoder_port(devdata);
2635 if (port == PORT_NONE)
2636 return;
2637
2638 is_dvi = intel_bios_encoder_supports_dvi(devdata);
2639 is_dp = intel_bios_encoder_supports_dp(devdata);
2640 is_crt = intel_bios_encoder_supports_crt(devdata);
2641 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2642 is_edp = intel_bios_encoder_supports_edp(devdata);
2643 is_dsi = intel_bios_encoder_supports_dsi(devdata);
2644
2645 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2646 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2647
2648 drm_dbg_kms(display->drm,
2649 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2650 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi,
2651 intel_bios_encoder_supports_dp_dual_mode(devdata),
2652 intel_bios_encoder_is_lspcon(devdata),
2653 supports_typec_usb, supports_tbt,
2654 devdata->dsc != NULL);
2655
2656 hdmi_level_shift = intel_bios_hdmi_level_shift(devdata);
2657 if (hdmi_level_shift >= 0) {
2658 drm_dbg_kms(display->drm,
2659 "Port %c VBT HDMI level shift: %d\n",
2660 port_name(port), hdmi_level_shift);
2661 }
2662
2663 max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata);
2664 if (max_tmds_clock)
2665 drm_dbg_kms(display->drm,
2666 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2667 port_name(port), max_tmds_clock);
2668
2669 /* I_boost config for SKL and above */
2670 dp_boost_level = intel_bios_dp_boost_level(devdata);
2671 if (dp_boost_level)
2672 drm_dbg_kms(display->drm,
2673 "Port %c VBT (e)DP boost level: %d\n",
2674 port_name(port), dp_boost_level);
2675
2676 hdmi_boost_level = intel_bios_hdmi_boost_level(devdata);
2677 if (hdmi_boost_level)
2678 drm_dbg_kms(display->drm,
2679 "Port %c VBT HDMI boost level: %d\n",
2680 port_name(port), hdmi_boost_level);
2681
2682 dp_max_link_rate = intel_bios_dp_max_link_rate(devdata);
2683 if (dp_max_link_rate)
2684 drm_dbg_kms(display->drm,
2685 "Port %c VBT DP max link rate: %d\n",
2686 port_name(port), dp_max_link_rate);
2687
2688 /*
2689 * FIXME need to implement support for VBT
2690 * vswing/preemph tables should this ever trigger.
2691 */
2692 drm_WARN(display->drm, child->use_vbt_vswing,
2693 "Port %c asks to use VBT vswing/preemph tables\n",
2694 port_name(port));
2695}
2696
2697static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
2698{
2699 struct intel_display *display = devdata->display;
2700 enum port port;
2701
2702 port = intel_bios_encoder_port(devdata);
2703 if (port == PORT_NONE)
2704 return;
2705
2706 if (!is_port_valid(display, port)) {
2707 drm_dbg_kms(display->drm,
2708 "VBT reports port %c as supported, but that can't be true: skipping\n",
2709 port_name(port));
2710 return;
2711 }
2712
2713 sanitize_device_type(devdata, port);
2714 sanitize_hdmi_level_shift(devdata, port);
2715}
2716
2717static bool has_ddi_port_info(struct intel_display *display)
2718{
2719 return DISPLAY_VER(display) >= 5 || display->platform.g4x;
2720}
2721
2722static void parse_ddi_ports(struct intel_display *display)
2723{
2724 struct intel_bios_encoder_data *devdata;
2725
2726 if (!has_ddi_port_info(display))
2727 return;
2728
2729 list_for_each_entry(devdata, &display->vbt.display_devices, node)
2730 parse_ddi_port(devdata);
2731
2732 list_for_each_entry(devdata, &display->vbt.display_devices, node)
2733 print_ddi_port(devdata);
2734}
2735
2736static int child_device_expected_size(u16 version)
2737{
2738 BUILD_BUG_ON(sizeof(struct child_device_config) < 40);
2739
2740 if (version > 256)
2741 return -ENOENT;
2742 else if (version >= 256)
2743 return 40;
2744 else if (version >= 216)
2745 return 39;
2746 else if (version >= 196)
2747 return 38;
2748 else if (version >= 195)
2749 return 37;
2750 else if (version >= 111)
2751 return LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2752 else if (version >= 106)
2753 return 27;
2754 else
2755 return 22;
2756}
2757
2758static bool child_device_size_valid(struct intel_display *display, int size)
2759{
2760 int expected_size;
2761
2762 expected_size = child_device_expected_size(display->vbt.version);
2763 if (expected_size < 0) {
2764 expected_size = sizeof(struct child_device_config);
2765 drm_dbg_kms(display->drm,
2766 "Expected child device config size for VBT version %u not known; assuming %d\n",
2767 display->vbt.version, expected_size);
2768 }
2769
2770 /* Flag an error for unexpected size, but continue anyway. */
2771 if (size != expected_size)
2772 drm_err(display->drm,
2773 "Unexpected child device config size %d (expected %d for VBT version %u)\n",
2774 size, expected_size, display->vbt.version);
2775
2776 /* The legacy sized child device config is the minimum we need. */
2777 if (size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2778 drm_dbg_kms(display->drm,
2779 "Child device config size %d is too small.\n",
2780 size);
2781 return false;
2782 }
2783
2784 return true;
2785}
2786
2787static void
2788parse_general_definitions(struct intel_display *display)
2789{
2790 const struct bdb_general_definitions *defs;
2791 struct intel_bios_encoder_data *devdata;
2792 const struct child_device_config *child;
2793 int i, child_device_num;
2794 u16 block_size;
2795 int bus_pin;
2796
2797 defs = bdb_find_section(display, BDB_GENERAL_DEFINITIONS);
2798 if (!defs) {
2799 drm_dbg_kms(display->drm,
2800 "No general definition block is found, no devices defined.\n");
2801 return;
2802 }
2803
2804 block_size = get_blocksize(defs);
2805 if (block_size < sizeof(*defs)) {
2806 drm_dbg_kms(display->drm,
2807 "General definitions block too small (%u)\n",
2808 block_size);
2809 return;
2810 }
2811
2812 bus_pin = defs->crt_ddc_gmbus_pin;
2813 drm_dbg_kms(display->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2814 if (intel_gmbus_is_valid_pin(display, bus_pin))
2815 display->vbt.crt_ddc_pin = bus_pin;
2816
2817 if (!child_device_size_valid(display, defs->child_dev_size))
2818 return;
2819
2820 /* get the number of child device */
2821 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2822
2823 for (i = 0; i < child_device_num; i++) {
2824 child = child_device_ptr(defs, i);
2825 if (!child->device_type)
2826 continue;
2827
2828 drm_dbg_kms(display->drm,
2829 "Found VBT child device with type 0x%x\n",
2830 child->device_type);
2831
2832 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2833 if (!devdata)
2834 break;
2835
2836 devdata->display = display;
2837
2838 /*
2839 * Copy as much as we know (sizeof) and is available
2840 * (child_dev_size) of the child device config. Accessing the
2841 * data must depend on VBT version.
2842 */
2843 memcpy(&devdata->child, child,
2844 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2845
2846 list_add_tail(&devdata->node, &display->vbt.display_devices);
2847 }
2848
2849 if (list_empty(&display->vbt.display_devices))
2850 drm_dbg_kms(display->drm,
2851 "no child dev is parsed from VBT\n");
2852}
2853
2854/* Common defaults which may be overridden by VBT. */
2855static void
2856init_vbt_defaults(struct intel_display *display)
2857{
2858 struct drm_i915_private *i915 = to_i915(display->drm);
2859
2860 display->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2861
2862 /* general features */
2863 display->vbt.int_tv_support = 1;
2864 display->vbt.int_crt_support = 1;
2865
2866 /* driver features */
2867 display->vbt.int_lvds_support = 1;
2868
2869 /* Default to using SSC */
2870 display->vbt.lvds_use_ssc = 1;
2871 /*
2872 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2873 * clock for LVDS.
2874 */
2875 display->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(display,
2876 !HAS_PCH_SPLIT(i915));
2877 drm_dbg_kms(display->drm, "Set default to SSC at %d kHz\n",
2878 display->vbt.lvds_ssc_freq);
2879}
2880
2881/* Common defaults which may be overridden by VBT. */
2882static void
2883init_vbt_panel_defaults(struct intel_panel *panel)
2884{
2885 /* Default to having backlight */
2886 panel->vbt.backlight.present = true;
2887
2888 /* LFP panel data */
2889 panel->vbt.lvds_dither = true;
2890}
2891
2892/* Defaults to initialize only if there is no VBT. */
2893static void
2894init_vbt_missing_defaults(struct intel_display *display)
2895{
2896 struct drm_i915_private *i915 = to_i915(display->drm);
2897 unsigned int ports = DISPLAY_RUNTIME_INFO(display)->port_mask;
2898 enum port port;
2899
2900 if (!HAS_DDI(display) && !display->platform.cherryview)
2901 return;
2902
2903 for_each_port_masked(port, ports) {
2904 struct intel_bios_encoder_data *devdata;
2905 struct child_device_config *child;
2906 enum phy phy = intel_port_to_phy(i915, port);
2907
2908 /*
2909 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2910 * to detect it.
2911 */
2912 if (intel_phy_is_tc(i915, phy))
2913 continue;
2914
2915 /* Create fake child device config */
2916 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2917 if (!devdata)
2918 break;
2919
2920 devdata->display = display;
2921 child = &devdata->child;
2922
2923 if (port == PORT_F)
2924 child->dvo_port = DVO_PORT_HDMIF;
2925 else if (port == PORT_E)
2926 child->dvo_port = DVO_PORT_HDMIE;
2927 else
2928 child->dvo_port = DVO_PORT_HDMIA + port;
2929
2930 if (port != PORT_A && port != PORT_E)
2931 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2932
2933 if (port != PORT_E)
2934 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2935
2936 if (port == PORT_A)
2937 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2938
2939 list_add_tail(&devdata->node, &display->vbt.display_devices);
2940
2941 drm_dbg_kms(display->drm,
2942 "Generating default VBT child device with type 0x%04x on port %c\n",
2943 child->device_type, port_name(port));
2944 }
2945
2946 /* Bypass some minimum baseline VBT version checks */
2947 display->vbt.version = 155;
2948}
2949
2950static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2951{
2952 const void *_vbt = vbt;
2953
2954 return _vbt + vbt->bdb_offset;
2955}
2956
2957static const char vbt_signature[] = "$VBT";
2958static const int vbt_signature_len = 4;
2959
2960/**
2961 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2962 * @display: display device
2963 * @buf: pointer to a buffer to validate
2964 * @size: size of the buffer
2965 *
2966 * Returns true on valid VBT.
2967 */
2968bool intel_bios_is_valid_vbt(struct intel_display *display,
2969 const void *buf, size_t size)
2970{
2971 const struct vbt_header *vbt = buf;
2972 const struct bdb_header *bdb;
2973
2974 if (!vbt)
2975 return false;
2976
2977 if (sizeof(struct vbt_header) > size) {
2978 drm_dbg_kms(display->drm, "VBT header incomplete\n");
2979 return false;
2980 }
2981
2982 if (memcmp(vbt->signature, vbt_signature, vbt_signature_len)) {
2983 drm_dbg_kms(display->drm, "VBT invalid signature\n");
2984 return false;
2985 }
2986
2987 if (vbt->vbt_size > size) {
2988 drm_dbg_kms(display->drm,
2989 "VBT incomplete (vbt_size overflows)\n");
2990 return false;
2991 }
2992
2993 size = vbt->vbt_size;
2994
2995 if (range_overflows_t(size_t,
2996 vbt->bdb_offset,
2997 sizeof(struct bdb_header),
2998 size)) {
2999 drm_dbg_kms(display->drm, "BDB header incomplete\n");
3000 return false;
3001 }
3002
3003 bdb = get_bdb_header(vbt);
3004 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
3005 drm_dbg_kms(display->drm, "BDB incomplete\n");
3006 return false;
3007 }
3008
3009 return vbt;
3010}
3011
3012static struct vbt_header *firmware_get_vbt(struct intel_display *display,
3013 size_t *size)
3014{
3015 struct vbt_header *vbt = NULL;
3016 const struct firmware *fw = NULL;
3017 const char *name = display->params.vbt_firmware;
3018 int ret;
3019
3020 if (!name || !*name)
3021 return NULL;
3022
3023 ret = request_firmware(&fw, name, display->drm->dev);
3024 if (ret) {
3025 drm_err(display->drm,
3026 "Requesting VBT firmware \"%s\" failed (%d)\n",
3027 name, ret);
3028 return NULL;
3029 }
3030
3031 if (intel_bios_is_valid_vbt(display, fw->data, fw->size)) {
3032 vbt = kmemdup(fw->data, fw->size, GFP_KERNEL);
3033 if (vbt) {
3034 drm_dbg_kms(display->drm,
3035 "Found valid VBT firmware \"%s\"\n", name);
3036 if (size)
3037 *size = fw->size;
3038 }
3039 } else {
3040 drm_dbg_kms(display->drm, "Invalid VBT firmware \"%s\"\n",
3041 name);
3042 }
3043
3044 release_firmware(fw);
3045
3046 return vbt;
3047}
3048
3049static struct vbt_header *oprom_get_vbt(struct intel_display *display,
3050 struct intel_rom *rom,
3051 size_t *size, const char *type)
3052{
3053 struct vbt_header *vbt;
3054 size_t vbt_size;
3055 loff_t offset;
3056
3057 if (!rom)
3058 return NULL;
3059
3060 BUILD_BUG_ON(vbt_signature_len != sizeof(vbt_signature) - 1);
3061 BUILD_BUG_ON(vbt_signature_len != sizeof(u32));
3062
3063 offset = intel_rom_find(rom, *(const u32 *)vbt_signature);
3064 if (offset < 0)
3065 goto err_free_rom;
3066
3067 if (sizeof(struct vbt_header) > intel_rom_size(rom) - offset) {
3068 drm_dbg_kms(display->drm, "VBT header incomplete\n");
3069 goto err_free_rom;
3070 }
3071
3072 BUILD_BUG_ON(sizeof(vbt->vbt_size) != sizeof(u16));
3073
3074 vbt_size = intel_rom_read16(rom, offset + offsetof(struct vbt_header, vbt_size));
3075 if (vbt_size > intel_rom_size(rom) - offset) {
3076 drm_dbg_kms(display->drm, "VBT incomplete (vbt_size overflows)\n");
3077 goto err_free_rom;
3078 }
3079
3080 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
3081 if (!vbt)
3082 goto err_free_rom;
3083
3084 intel_rom_read_block(rom, vbt, offset, vbt_size);
3085
3086 if (!intel_bios_is_valid_vbt(display, vbt, vbt_size))
3087 goto err_free_vbt;
3088
3089 drm_dbg_kms(display->drm, "Found valid VBT in %s\n", type);
3090
3091 if (size)
3092 *size = vbt_size;
3093
3094 intel_rom_free(rom);
3095
3096 return vbt;
3097
3098err_free_vbt:
3099 kfree(vbt);
3100err_free_rom:
3101 intel_rom_free(rom);
3102 return NULL;
3103}
3104
3105static const struct vbt_header *intel_bios_get_vbt(struct intel_display *display,
3106 size_t *sizep)
3107{
3108 struct drm_i915_private *i915 = to_i915(display->drm);
3109 const struct vbt_header *vbt = NULL;
3110 intel_wakeref_t wakeref;
3111
3112 vbt = firmware_get_vbt(display, sizep);
3113
3114 if (!vbt)
3115 vbt = intel_opregion_get_vbt(display, sizep);
3116
3117 /*
3118 * If the OpRegion does not have VBT, look in SPI flash
3119 * through MMIO or PCI mapping
3120 */
3121 if (!vbt && IS_DGFX(i915))
3122 with_intel_runtime_pm(&i915->runtime_pm, wakeref)
3123 vbt = oprom_get_vbt(display, intel_rom_spi(i915), sizep, "SPI flash");
3124
3125 if (!vbt)
3126 with_intel_runtime_pm(&i915->runtime_pm, wakeref)
3127 vbt = oprom_get_vbt(display, intel_rom_pci(i915), sizep, "PCI ROM");
3128
3129 return vbt;
3130}
3131
3132/**
3133 * intel_bios_init - find VBT and initialize settings from the BIOS
3134 * @display: display device instance
3135 *
3136 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
3137 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
3138 * initialize some defaults if the VBT is not present at all.
3139 */
3140void intel_bios_init(struct intel_display *display)
3141{
3142 const struct vbt_header *vbt;
3143 const struct bdb_header *bdb;
3144
3145 INIT_LIST_HEAD(&display->vbt.display_devices);
3146 INIT_LIST_HEAD(&display->vbt.bdb_blocks);
3147
3148 if (!HAS_DISPLAY(display)) {
3149 drm_dbg_kms(display->drm,
3150 "Skipping VBT init due to disabled display.\n");
3151 return;
3152 }
3153
3154 init_vbt_defaults(display);
3155
3156 vbt = intel_bios_get_vbt(display, NULL);
3157
3158 if (!vbt)
3159 goto out;
3160
3161 bdb = get_bdb_header(vbt);
3162 display->vbt.version = bdb->version;
3163
3164 drm_dbg_kms(display->drm,
3165 "VBT signature \"%.*s\", BDB version %d\n",
3166 (int)sizeof(vbt->signature), vbt->signature,
3167 display->vbt.version);
3168
3169 init_bdb_blocks(display, bdb);
3170
3171 /* Grab useful general definitions */
3172 parse_general_features(display);
3173 parse_general_definitions(display);
3174 parse_driver_features(display);
3175
3176 /* Depends on child device list */
3177 parse_compression_parameters(display);
3178
3179out:
3180 if (!vbt) {
3181 drm_info(display->drm,
3182 "Failed to find VBIOS tables (VBT)\n");
3183 init_vbt_missing_defaults(display);
3184 }
3185
3186 /* Further processing on pre-parsed or generated child device data */
3187 parse_sdvo_device_mapping(display);
3188 parse_ddi_ports(display);
3189
3190 kfree(vbt);
3191}
3192
3193static void intel_bios_init_panel(struct intel_display *display,
3194 struct intel_panel *panel,
3195 const struct intel_bios_encoder_data *devdata,
3196 const struct drm_edid *drm_edid,
3197 bool use_fallback)
3198{
3199 /* already have it? */
3200 if (panel->vbt.panel_type >= 0) {
3201 drm_WARN_ON(display->drm, !use_fallback);
3202 return;
3203 }
3204
3205 panel->vbt.panel_type = get_panel_type(display, devdata,
3206 drm_edid, use_fallback);
3207 if (panel->vbt.panel_type < 0) {
3208 drm_WARN_ON(display->drm, use_fallback);
3209 return;
3210 }
3211
3212 init_vbt_panel_defaults(panel);
3213
3214 parse_panel_options(display, panel);
3215 parse_generic_dtd(display, panel);
3216 parse_lfp_data(display, panel);
3217 parse_lfp_backlight(display, panel);
3218 parse_sdvo_lvds_data(display, panel);
3219 parse_panel_driver_features(display, panel);
3220 parse_power_conservation_features(display, panel);
3221 parse_edp(display, panel);
3222 parse_psr(display, panel);
3223 parse_mipi_config(display, panel);
3224 parse_mipi_sequence(display, panel);
3225}
3226
3227void intel_bios_init_panel_early(struct intel_display *display,
3228 struct intel_panel *panel,
3229 const struct intel_bios_encoder_data *devdata)
3230{
3231 intel_bios_init_panel(display, panel, devdata, NULL, false);
3232}
3233
3234void intel_bios_init_panel_late(struct intel_display *display,
3235 struct intel_panel *panel,
3236 const struct intel_bios_encoder_data *devdata,
3237 const struct drm_edid *drm_edid)
3238{
3239 intel_bios_init_panel(display, panel, devdata, drm_edid, true);
3240}
3241
3242/**
3243 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
3244 * @display: display device instance
3245 */
3246void intel_bios_driver_remove(struct intel_display *display)
3247{
3248 struct intel_bios_encoder_data *devdata, *nd;
3249 struct bdb_block_entry *entry, *ne;
3250
3251 list_for_each_entry_safe(devdata, nd, &display->vbt.display_devices,
3252 node) {
3253 list_del(&devdata->node);
3254 kfree(devdata->dsc);
3255 kfree(devdata);
3256 }
3257
3258 list_for_each_entry_safe(entry, ne, &display->vbt.bdb_blocks, node) {
3259 list_del(&entry->node);
3260 kfree(entry);
3261 }
3262}
3263
3264void intel_bios_fini_panel(struct intel_panel *panel)
3265{
3266 kfree(panel->vbt.sdvo_lvds_vbt_mode);
3267 panel->vbt.sdvo_lvds_vbt_mode = NULL;
3268 kfree(panel->vbt.lfp_vbt_mode);
3269 panel->vbt.lfp_vbt_mode = NULL;
3270 kfree(panel->vbt.dsi.data);
3271 panel->vbt.dsi.data = NULL;
3272 kfree(panel->vbt.dsi.pps);
3273 panel->vbt.dsi.pps = NULL;
3274 kfree(panel->vbt.dsi.config);
3275 panel->vbt.dsi.config = NULL;
3276 kfree(panel->vbt.dsi.deassert_seq);
3277 panel->vbt.dsi.deassert_seq = NULL;
3278}
3279
3280/**
3281 * intel_bios_is_tv_present - is integrated TV present in VBT
3282 * @display: display device instance
3283 *
3284 * Return true if TV is present. If no child devices were parsed from VBT,
3285 * assume TV is present.
3286 */
3287bool intel_bios_is_tv_present(struct intel_display *display)
3288{
3289 const struct intel_bios_encoder_data *devdata;
3290
3291 if (!display->vbt.int_tv_support)
3292 return false;
3293
3294 if (list_empty(&display->vbt.display_devices))
3295 return true;
3296
3297 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3298 const struct child_device_config *child = &devdata->child;
3299
3300 /*
3301 * If the device type is not TV, continue.
3302 */
3303 switch (child->device_type) {
3304 case DEVICE_TYPE_INT_TV:
3305 case DEVICE_TYPE_TV:
3306 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3307 break;
3308 default:
3309 continue;
3310 }
3311 /* Only when the addin_offset is non-zero, it is regarded
3312 * as present.
3313 */
3314 if (child->addin_offset)
3315 return true;
3316 }
3317
3318 return false;
3319}
3320
3321/**
3322 * intel_bios_is_lvds_present - is LVDS present in VBT
3323 * @display: display device instance
3324 * @i2c_pin: i2c pin for LVDS if present
3325 *
3326 * Return true if LVDS is present. If no child devices were parsed from VBT,
3327 * assume LVDS is present.
3328 */
3329bool intel_bios_is_lvds_present(struct intel_display *display, u8 *i2c_pin)
3330{
3331 const struct intel_bios_encoder_data *devdata;
3332
3333 if (list_empty(&display->vbt.display_devices))
3334 return true;
3335
3336 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3337 const struct child_device_config *child = &devdata->child;
3338
3339 /* If the device type is not LFP, continue.
3340 * We have to check both the new identifiers as well as the
3341 * old for compatibility with some BIOSes.
3342 */
3343 if (child->device_type != DEVICE_TYPE_INT_LFP &&
3344 child->device_type != DEVICE_TYPE_LFP)
3345 continue;
3346
3347 if (intel_gmbus_is_valid_pin(display, child->i2c_pin))
3348 *i2c_pin = child->i2c_pin;
3349
3350 /* However, we cannot trust the BIOS writers to populate
3351 * the VBT correctly. Since LVDS requires additional
3352 * information from AIM blocks, a non-zero addin offset is
3353 * a good indicator that the LVDS is actually present.
3354 */
3355 if (child->addin_offset)
3356 return true;
3357
3358 /* But even then some BIOS writers perform some black magic
3359 * and instantiate the device without reference to any
3360 * additional data. Trust that if the VBT was written into
3361 * the OpRegion then they have validated the LVDS's existence.
3362 */
3363 return intel_opregion_vbt_present(display);
3364 }
3365
3366 return false;
3367}
3368
3369/**
3370 * intel_bios_is_port_present - is the specified digital port present
3371 * @display: display device instance
3372 * @port: port to check
3373 *
3374 * Return true if the device in %port is present.
3375 */
3376bool intel_bios_is_port_present(struct intel_display *display, enum port port)
3377{
3378 const struct intel_bios_encoder_data *devdata;
3379
3380 if (WARN_ON(!has_ddi_port_info(display)))
3381 return true;
3382
3383 if (!is_port_valid(display, port))
3384 return false;
3385
3386 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3387 const struct child_device_config *child = &devdata->child;
3388
3389 if (dvo_port_to_port(display, child->dvo_port) == port)
3390 return true;
3391 }
3392
3393 return false;
3394}
3395
3396bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3397{
3398 const struct child_device_config *child = &devdata->child;
3399
3400 if (!devdata)
3401 return false;
3402
3403 if (!intel_bios_encoder_supports_dp(devdata) ||
3404 !intel_bios_encoder_supports_hdmi(devdata))
3405 return false;
3406
3407 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3408 return true;
3409
3410 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3411 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3412 child->aux_channel != 0)
3413 return true;
3414
3415 return false;
3416}
3417
3418/**
3419 * intel_bios_is_dsi_present - is DSI present in VBT
3420 * @display: display device instance
3421 * @port: port for DSI if present
3422 *
3423 * Return true if DSI is present, and return the port in %port.
3424 */
3425bool intel_bios_is_dsi_present(struct intel_display *display,
3426 enum port *port)
3427{
3428 const struct intel_bios_encoder_data *devdata;
3429
3430 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3431 const struct child_device_config *child = &devdata->child;
3432 u8 dvo_port = child->dvo_port;
3433
3434 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3435 continue;
3436
3437 if (dsi_dvo_port_to_port(display, dvo_port) == PORT_NONE) {
3438 drm_dbg_kms(display->drm,
3439 "VBT has unsupported DSI port %c\n",
3440 port_name(dvo_port - DVO_PORT_MIPIA));
3441 continue;
3442 }
3443
3444 if (port)
3445 *port = dsi_dvo_port_to_port(display, dvo_port);
3446 return true;
3447 }
3448
3449 return false;
3450}
3451
3452static void fill_dsc(struct intel_crtc_state *crtc_state,
3453 struct dsc_compression_parameters_entry *dsc,
3454 int dsc_max_bpc)
3455{
3456 struct intel_display *display = to_intel_display(crtc_state);
3457 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3458 int bpc = 8;
3459
3460 vdsc_cfg->dsc_version_major = dsc->version_major;
3461 vdsc_cfg->dsc_version_minor = dsc->version_minor;
3462
3463 if (dsc->support_12bpc && dsc_max_bpc >= 12)
3464 bpc = 12;
3465 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3466 bpc = 10;
3467 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3468 bpc = 8;
3469 else
3470 drm_dbg_kms(display->drm, "VBT: Unsupported BPC %d for DCS\n",
3471 dsc_max_bpc);
3472
3473 crtc_state->pipe_bpp = bpc * 3;
3474
3475 crtc_state->dsc.compressed_bpp_x16 = fxp_q4_from_int(min(crtc_state->pipe_bpp,
3476 VBT_DSC_MAX_BPP(dsc->max_bpp)));
3477
3478 /*
3479 * FIXME: This is ugly, and slice count should take DSC engine
3480 * throughput etc. into account.
3481 *
3482 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3483 */
3484 if (dsc->slices_per_line & BIT(2)) {
3485 crtc_state->dsc.slice_count = 4;
3486 } else if (dsc->slices_per_line & BIT(1)) {
3487 crtc_state->dsc.slice_count = 2;
3488 } else {
3489 /* FIXME */
3490 if (!(dsc->slices_per_line & BIT(0)))
3491 drm_dbg_kms(display->drm,
3492 "VBT: Unsupported DSC slice count for DSI\n");
3493
3494 crtc_state->dsc.slice_count = 1;
3495 }
3496
3497 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3498 crtc_state->dsc.slice_count != 0)
3499 drm_dbg_kms(display->drm,
3500 "VBT: DSC hdisplay %d not divisible by slice count %d\n",
3501 crtc_state->hw.adjusted_mode.crtc_hdisplay,
3502 crtc_state->dsc.slice_count);
3503
3504 /*
3505 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3506 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3507 */
3508 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3509 dsc->rc_buffer_size);
3510
3511 /* FIXME: DSI spec says bpc + 1 for this one */
3512 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3513
3514 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3515
3516 vdsc_cfg->slice_height = dsc->slice_height;
3517}
3518
3519/* FIXME: initially DSI specific */
3520bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3521 struct intel_crtc_state *crtc_state,
3522 int dsc_max_bpc)
3523{
3524 struct intel_display *display = to_intel_display(encoder);
3525 const struct intel_bios_encoder_data *devdata;
3526
3527 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3528 const struct child_device_config *child = &devdata->child;
3529
3530 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3531 continue;
3532
3533 if (dsi_dvo_port_to_port(display, child->dvo_port) == encoder->port) {
3534 if (!devdata->dsc)
3535 return false;
3536
3537 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3538
3539 return true;
3540 }
3541 }
3542
3543 return false;
3544}
3545
3546static const u8 adlp_aux_ch_map[] = {
3547 [AUX_CH_A] = DP_AUX_A,
3548 [AUX_CH_B] = DP_AUX_B,
3549 [AUX_CH_C] = DP_AUX_C,
3550 [AUX_CH_D_XELPD] = DP_AUX_D,
3551 [AUX_CH_E_XELPD] = DP_AUX_E,
3552 [AUX_CH_USBC1] = DP_AUX_F,
3553 [AUX_CH_USBC2] = DP_AUX_G,
3554 [AUX_CH_USBC3] = DP_AUX_H,
3555 [AUX_CH_USBC4] = DP_AUX_I,
3556};
3557
3558/*
3559 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3560 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3561 */
3562static const u8 adls_aux_ch_map[] = {
3563 [AUX_CH_A] = DP_AUX_A,
3564 [AUX_CH_USBC1] = DP_AUX_B,
3565 [AUX_CH_USBC2] = DP_AUX_C,
3566 [AUX_CH_USBC3] = DP_AUX_D,
3567 [AUX_CH_USBC4] = DP_AUX_E,
3568};
3569
3570/*
3571 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3572 * map to DDI A,B,TC1,TC2 respectively.
3573 */
3574static const u8 rkl_aux_ch_map[] = {
3575 [AUX_CH_A] = DP_AUX_A,
3576 [AUX_CH_B] = DP_AUX_B,
3577 [AUX_CH_USBC1] = DP_AUX_C,
3578 [AUX_CH_USBC2] = DP_AUX_D,
3579};
3580
3581static const u8 direct_aux_ch_map[] = {
3582 [AUX_CH_A] = DP_AUX_A,
3583 [AUX_CH_B] = DP_AUX_B,
3584 [AUX_CH_C] = DP_AUX_C,
3585 [AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */
3586 [AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */
3587 [AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */
3588 [AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */
3589 [AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */
3590 [AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */
3591};
3592
3593static enum aux_ch map_aux_ch(struct intel_display *display, u8 aux_channel)
3594{
3595 const u8 *aux_ch_map;
3596 int i, n_entries;
3597
3598 if (DISPLAY_VER(display) >= 13) {
3599 aux_ch_map = adlp_aux_ch_map;
3600 n_entries = ARRAY_SIZE(adlp_aux_ch_map);
3601 } else if (display->platform.alderlake_s) {
3602 aux_ch_map = adls_aux_ch_map;
3603 n_entries = ARRAY_SIZE(adls_aux_ch_map);
3604 } else if (display->platform.dg1 || display->platform.rocketlake) {
3605 aux_ch_map = rkl_aux_ch_map;
3606 n_entries = ARRAY_SIZE(rkl_aux_ch_map);
3607 } else {
3608 aux_ch_map = direct_aux_ch_map;
3609 n_entries = ARRAY_SIZE(direct_aux_ch_map);
3610 }
3611
3612 for (i = 0; i < n_entries; i++) {
3613 if (aux_ch_map[i] == aux_channel)
3614 return i;
3615 }
3616
3617 drm_dbg_kms(display->drm,
3618 "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n",
3619 aux_channel);
3620
3621 return AUX_CH_NONE;
3622}
3623
3624enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata)
3625{
3626 if (!devdata || !devdata->child.aux_channel)
3627 return AUX_CH_NONE;
3628
3629 return map_aux_ch(devdata->display, devdata->child.aux_channel);
3630}
3631
3632bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata)
3633{
3634 struct intel_display *display;
3635 u8 aux_channel;
3636 int count = 0;
3637
3638 if (!devdata || !devdata->child.aux_channel)
3639 return false;
3640
3641 display = devdata->display;
3642 aux_channel = devdata->child.aux_channel;
3643
3644 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3645 if (intel_bios_encoder_supports_dp(devdata) &&
3646 aux_channel == devdata->child.aux_channel)
3647 count++;
3648 }
3649
3650 return count > 1;
3651}
3652
3653int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3654{
3655 if (!devdata || devdata->display->vbt.version < 196 || !devdata->child.iboost)
3656 return 0;
3657
3658 return translate_iboost(devdata->display, devdata->child.dp_iboost_level);
3659}
3660
3661int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3662{
3663 if (!devdata || devdata->display->vbt.version < 196 || !devdata->child.iboost)
3664 return 0;
3665
3666 return translate_iboost(devdata->display, devdata->child.hdmi_iboost_level);
3667}
3668
3669int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata)
3670{
3671 if (!devdata || !devdata->child.ddc_pin)
3672 return 0;
3673
3674 return map_ddc_pin(devdata->display, devdata->child.ddc_pin);
3675}
3676
3677bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3678{
3679 return devdata->display->vbt.version >= 195 && devdata->child.dp_usb_type_c;
3680}
3681
3682bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3683{
3684 return devdata->display->vbt.version >= 209 && devdata->child.tbt;
3685}
3686
3687bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata)
3688{
3689 return devdata && devdata->child.lane_reversal;
3690}
3691
3692bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata)
3693{
3694 return devdata && devdata->child.hpd_invert;
3695}
3696
3697const struct intel_bios_encoder_data *
3698intel_bios_encoder_data_lookup(struct intel_display *display, enum port port)
3699{
3700 struct intel_bios_encoder_data *devdata;
3701
3702 list_for_each_entry(devdata, &display->vbt.display_devices, node) {
3703 if (intel_bios_encoder_port(devdata) == port)
3704 return devdata;
3705 }
3706
3707 return NULL;
3708}
3709
3710void intel_bios_for_each_encoder(struct intel_display *display,
3711 void (*func)(struct intel_display *display,
3712 const struct intel_bios_encoder_data *devdata))
3713{
3714 struct intel_bios_encoder_data *devdata;
3715
3716 list_for_each_entry(devdata, &display->vbt.display_devices, node)
3717 func(display, devdata);
3718}
3719
3720static int intel_bios_vbt_show(struct seq_file *m, void *unused)
3721{
3722 struct intel_display *display = m->private;
3723 const void *vbt;
3724 size_t vbt_size;
3725
3726 vbt = intel_bios_get_vbt(display, &vbt_size);
3727
3728 if (vbt) {
3729 seq_write(m, vbt, vbt_size);
3730 kfree(vbt);
3731 }
3732
3733 return 0;
3734}
3735
3736DEFINE_SHOW_ATTRIBUTE(intel_bios_vbt);
3737
3738void intel_bios_debugfs_register(struct intel_display *display)
3739{
3740 struct drm_minor *minor = display->drm->primary;
3741
3742 debugfs_create_file("i915_vbt", 0444, minor->debugfs_root,
3743 display, &intel_bios_vbt_fops);
3744}
1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28#include <drm/drm_dp_helper.h>
29
30#include "display/intel_display.h"
31#include "display/intel_display_types.h"
32#include "display/intel_gmbus.h"
33
34#include "i915_drv.h"
35
36#define _INTEL_BIOS_PRIVATE
37#include "intel_vbt_defs.h"
38
39/**
40 * DOC: Video BIOS Table (VBT)
41 *
42 * The Video BIOS Table, or VBT, provides platform and board specific
43 * configuration information to the driver that is not discoverable or available
44 * through other means. The configuration is mostly related to display
45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
46 * the PCI ROM.
47 *
48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
50 * contain the actual configuration information. The VBT Header, and thus the
51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
52 * BDB Header. The data blocks are concatenated after the BDB Header. The data
53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
54 * data. (Block 53, the MIPI Sequence Block is an exception.)
55 *
56 * The driver parses the VBT during load. The relevant information is stored in
57 * driver private data for ease of use, and the actual VBT is not read after
58 * that.
59 */
60
61/* Wrapper for VBT child device config */
62struct display_device_data {
63 struct child_device_config child;
64 struct dsc_compression_parameters_entry *dsc;
65 struct list_head node;
66};
67
68#define SLAVE_ADDR1 0x70
69#define SLAVE_ADDR2 0x72
70
71/* Get BDB block size given a pointer to Block ID. */
72static u32 _get_blocksize(const u8 *block_base)
73{
74 /* The MIPI Sequence Block v3+ has a separate size field. */
75 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
76 return *((const u32 *)(block_base + 4));
77 else
78 return *((const u16 *)(block_base + 1));
79}
80
81/* Get BDB block size give a pointer to data after Block ID and Block Size. */
82static u32 get_blocksize(const void *block_data)
83{
84 return _get_blocksize(block_data - 3);
85}
86
87static const void *
88find_section(const void *_bdb, enum bdb_block_id section_id)
89{
90 const struct bdb_header *bdb = _bdb;
91 const u8 *base = _bdb;
92 int index = 0;
93 u32 total, current_size;
94 enum bdb_block_id current_id;
95
96 /* skip to first section */
97 index += bdb->header_size;
98 total = bdb->bdb_size;
99
100 /* walk the sections looking for section_id */
101 while (index + 3 < total) {
102 current_id = *(base + index);
103 current_size = _get_blocksize(base + index);
104 index += 3;
105
106 if (index + current_size > total)
107 return NULL;
108
109 if (current_id == section_id)
110 return base + index;
111
112 index += current_size;
113 }
114
115 return NULL;
116}
117
118static void
119fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
120 const struct lvds_dvo_timing *dvo_timing)
121{
122 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
123 dvo_timing->hactive_lo;
124 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
125 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
126 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
127 ((dvo_timing->hsync_pulse_width_hi << 8) |
128 dvo_timing->hsync_pulse_width_lo);
129 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
130 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
131
132 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
133 dvo_timing->vactive_lo;
134 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
135 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
136 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
137 ((dvo_timing->vsync_pulse_width_hi << 4) |
138 dvo_timing->vsync_pulse_width_lo);
139 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
140 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
141 panel_fixed_mode->clock = dvo_timing->clock * 10;
142 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
143
144 if (dvo_timing->hsync_positive)
145 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
146 else
147 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
148
149 if (dvo_timing->vsync_positive)
150 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
151 else
152 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
153
154 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
155 dvo_timing->himage_lo;
156 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
157 dvo_timing->vimage_lo;
158
159 /* Some VBTs have bogus h/vtotal values */
160 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
161 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
162 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
163 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
164
165 drm_mode_set_name(panel_fixed_mode);
166}
167
168static const struct lvds_dvo_timing *
169get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
170 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
171 int index)
172{
173 /*
174 * the size of fp_timing varies on the different platform.
175 * So calculate the DVO timing relative offset in LVDS data
176 * entry to get the DVO timing entry
177 */
178
179 int lfp_data_size =
180 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
181 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
182 int dvo_timing_offset =
183 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
184 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
185 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
186
187 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
188}
189
190/* get lvds_fp_timing entry
191 * this function may return NULL if the corresponding entry is invalid
192 */
193static const struct lvds_fp_timing *
194get_lvds_fp_timing(const struct bdb_header *bdb,
195 const struct bdb_lvds_lfp_data *data,
196 const struct bdb_lvds_lfp_data_ptrs *ptrs,
197 int index)
198{
199 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
200 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
201 size_t ofs;
202
203 if (index >= ARRAY_SIZE(ptrs->ptr))
204 return NULL;
205 ofs = ptrs->ptr[index].fp_timing_offset;
206 if (ofs < data_ofs ||
207 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
208 return NULL;
209 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
210}
211
212/* Parse general panel options */
213static void
214parse_panel_options(struct drm_i915_private *dev_priv,
215 const struct bdb_header *bdb)
216{
217 const struct bdb_lvds_options *lvds_options;
218 int panel_type;
219 int drrs_mode;
220 int ret;
221
222 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
223 if (!lvds_options)
224 return;
225
226 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
227
228 ret = intel_opregion_get_panel_type(dev_priv);
229 if (ret >= 0) {
230 drm_WARN_ON(&dev_priv->drm, ret > 0xf);
231 panel_type = ret;
232 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (OpRegion)\n",
233 panel_type);
234 } else {
235 if (lvds_options->panel_type > 0xf) {
236 drm_dbg_kms(&dev_priv->drm,
237 "Invalid VBT panel type 0x%x\n",
238 lvds_options->panel_type);
239 return;
240 }
241 panel_type = lvds_options->panel_type;
242 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (VBT)\n",
243 panel_type);
244 }
245
246 dev_priv->vbt.panel_type = panel_type;
247
248 drrs_mode = (lvds_options->dps_panel_type_bits
249 >> (panel_type * 2)) & MODE_MASK;
250 /*
251 * VBT has static DRRS = 0 and seamless DRRS = 2.
252 * The below piece of code is required to adjust vbt.drrs_type
253 * to match the enum drrs_support_type.
254 */
255 switch (drrs_mode) {
256 case 0:
257 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
258 drm_dbg_kms(&dev_priv->drm, "DRRS supported mode is static\n");
259 break;
260 case 2:
261 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
262 drm_dbg_kms(&dev_priv->drm,
263 "DRRS supported mode is seamless\n");
264 break;
265 default:
266 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
267 drm_dbg_kms(&dev_priv->drm,
268 "DRRS not supported (VBT input)\n");
269 break;
270 }
271}
272
273/* Try to find integrated panel timing data */
274static void
275parse_lfp_panel_dtd(struct drm_i915_private *dev_priv,
276 const struct bdb_header *bdb)
277{
278 const struct bdb_lvds_lfp_data *lvds_lfp_data;
279 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
280 const struct lvds_dvo_timing *panel_dvo_timing;
281 const struct lvds_fp_timing *fp_timing;
282 struct drm_display_mode *panel_fixed_mode;
283 int panel_type = dev_priv->vbt.panel_type;
284
285 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
286 if (!lvds_lfp_data)
287 return;
288
289 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
290 if (!lvds_lfp_data_ptrs)
291 return;
292
293 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
294 lvds_lfp_data_ptrs,
295 panel_type);
296
297 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
298 if (!panel_fixed_mode)
299 return;
300
301 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
302
303 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
304
305 drm_dbg_kms(&dev_priv->drm,
306 "Found panel mode in BIOS VBT legacy lfp table:\n");
307 drm_mode_debug_printmodeline(panel_fixed_mode);
308
309 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
310 lvds_lfp_data_ptrs,
311 panel_type);
312 if (fp_timing) {
313 /* check the resolution, just to be sure */
314 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
315 fp_timing->y_res == panel_fixed_mode->vdisplay) {
316 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
317 drm_dbg_kms(&dev_priv->drm,
318 "VBT initial LVDS value %x\n",
319 dev_priv->vbt.bios_lvds_val);
320 }
321 }
322}
323
324static void
325parse_generic_dtd(struct drm_i915_private *dev_priv,
326 const struct bdb_header *bdb)
327{
328 const struct bdb_generic_dtd *generic_dtd;
329 const struct generic_dtd_entry *dtd;
330 struct drm_display_mode *panel_fixed_mode;
331 int num_dtd;
332
333 generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
334 if (!generic_dtd)
335 return;
336
337 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
338 drm_err(&dev_priv->drm, "GDTD size %u is too small.\n",
339 generic_dtd->gdtd_size);
340 return;
341 } else if (generic_dtd->gdtd_size !=
342 sizeof(struct generic_dtd_entry)) {
343 drm_err(&dev_priv->drm, "Unexpected GDTD size %u\n",
344 generic_dtd->gdtd_size);
345 /* DTD has unknown fields, but keep going */
346 }
347
348 num_dtd = (get_blocksize(generic_dtd) -
349 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
350 if (dev_priv->vbt.panel_type >= num_dtd) {
351 drm_err(&dev_priv->drm,
352 "Panel type %d not found in table of %d DTD's\n",
353 dev_priv->vbt.panel_type, num_dtd);
354 return;
355 }
356
357 dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type];
358
359 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
360 if (!panel_fixed_mode)
361 return;
362
363 panel_fixed_mode->hdisplay = dtd->hactive;
364 panel_fixed_mode->hsync_start =
365 panel_fixed_mode->hdisplay + dtd->hfront_porch;
366 panel_fixed_mode->hsync_end =
367 panel_fixed_mode->hsync_start + dtd->hsync;
368 panel_fixed_mode->htotal =
369 panel_fixed_mode->hdisplay + dtd->hblank;
370
371 panel_fixed_mode->vdisplay = dtd->vactive;
372 panel_fixed_mode->vsync_start =
373 panel_fixed_mode->vdisplay + dtd->vfront_porch;
374 panel_fixed_mode->vsync_end =
375 panel_fixed_mode->vsync_start + dtd->vsync;
376 panel_fixed_mode->vtotal =
377 panel_fixed_mode->vdisplay + dtd->vblank;
378
379 panel_fixed_mode->clock = dtd->pixel_clock;
380 panel_fixed_mode->width_mm = dtd->width_mm;
381 panel_fixed_mode->height_mm = dtd->height_mm;
382
383 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
384 drm_mode_set_name(panel_fixed_mode);
385
386 if (dtd->hsync_positive_polarity)
387 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
388 else
389 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
390
391 if (dtd->vsync_positive_polarity)
392 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
393 else
394 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
395
396 drm_dbg_kms(&dev_priv->drm,
397 "Found panel mode in BIOS VBT generic dtd table:\n");
398 drm_mode_debug_printmodeline(panel_fixed_mode);
399
400 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
401}
402
403static void
404parse_panel_dtd(struct drm_i915_private *dev_priv,
405 const struct bdb_header *bdb)
406{
407 /*
408 * Older VBTs provided provided DTD information for internal displays
409 * through the "LFP panel DTD" block (42). As of VBT revision 229,
410 * that block is now deprecated and DTD information should be provided
411 * via a newer "generic DTD" block (58). Just to be safe, we'll
412 * try the new generic DTD block first on VBT >= 229, but still fall
413 * back to trying the old LFP block if that fails.
414 */
415 if (bdb->version >= 229)
416 parse_generic_dtd(dev_priv, bdb);
417 if (!dev_priv->vbt.lfp_lvds_vbt_mode)
418 parse_lfp_panel_dtd(dev_priv, bdb);
419}
420
421static void
422parse_lfp_backlight(struct drm_i915_private *dev_priv,
423 const struct bdb_header *bdb)
424{
425 const struct bdb_lfp_backlight_data *backlight_data;
426 const struct lfp_backlight_data_entry *entry;
427 int panel_type = dev_priv->vbt.panel_type;
428
429 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
430 if (!backlight_data)
431 return;
432
433 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
434 drm_dbg_kms(&dev_priv->drm,
435 "Unsupported backlight data entry size %u\n",
436 backlight_data->entry_size);
437 return;
438 }
439
440 entry = &backlight_data->data[panel_type];
441
442 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
443 if (!dev_priv->vbt.backlight.present) {
444 drm_dbg_kms(&dev_priv->drm,
445 "PWM backlight not present in VBT (type %u)\n",
446 entry->type);
447 return;
448 }
449
450 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
451 if (bdb->version >= 191 &&
452 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
453 const struct lfp_backlight_control_method *method;
454
455 method = &backlight_data->backlight_control[panel_type];
456 dev_priv->vbt.backlight.type = method->type;
457 dev_priv->vbt.backlight.controller = method->controller;
458 }
459
460 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
461 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
462 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
463 drm_dbg_kms(&dev_priv->drm,
464 "VBT backlight PWM modulation frequency %u Hz, "
465 "active %s, min brightness %u, level %u, controller %u\n",
466 dev_priv->vbt.backlight.pwm_freq_hz,
467 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
468 dev_priv->vbt.backlight.min_brightness,
469 backlight_data->level[panel_type],
470 dev_priv->vbt.backlight.controller);
471}
472
473/* Try to find sdvo panel data */
474static void
475parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
476 const struct bdb_header *bdb)
477{
478 const struct bdb_sdvo_panel_dtds *dtds;
479 struct drm_display_mode *panel_fixed_mode;
480 int index;
481
482 index = dev_priv->params.vbt_sdvo_panel_type;
483 if (index == -2) {
484 drm_dbg_kms(&dev_priv->drm,
485 "Ignore SDVO panel mode from BIOS VBT tables.\n");
486 return;
487 }
488
489 if (index == -1) {
490 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
491
492 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
493 if (!sdvo_lvds_options)
494 return;
495
496 index = sdvo_lvds_options->panel_type;
497 }
498
499 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
500 if (!dtds)
501 return;
502
503 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
504 if (!panel_fixed_mode)
505 return;
506
507 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
508
509 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
510
511 drm_dbg_kms(&dev_priv->drm,
512 "Found SDVO panel mode in BIOS VBT tables:\n");
513 drm_mode_debug_printmodeline(panel_fixed_mode);
514}
515
516static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
517 bool alternate)
518{
519 switch (INTEL_GEN(dev_priv)) {
520 case 2:
521 return alternate ? 66667 : 48000;
522 case 3:
523 case 4:
524 return alternate ? 100000 : 96000;
525 default:
526 return alternate ? 100000 : 120000;
527 }
528}
529
530static void
531parse_general_features(struct drm_i915_private *dev_priv,
532 const struct bdb_header *bdb)
533{
534 const struct bdb_general_features *general;
535
536 general = find_section(bdb, BDB_GENERAL_FEATURES);
537 if (!general)
538 return;
539
540 dev_priv->vbt.int_tv_support = general->int_tv_support;
541 /* int_crt_support can't be trusted on earlier platforms */
542 if (bdb->version >= 155 &&
543 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
544 dev_priv->vbt.int_crt_support = general->int_crt_support;
545 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
546 dev_priv->vbt.lvds_ssc_freq =
547 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
548 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
549 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
550 if (bdb->version >= 181) {
551 dev_priv->vbt.orientation = general->rotate_180 ?
552 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
553 DRM_MODE_PANEL_ORIENTATION_NORMAL;
554 } else {
555 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
556 }
557 drm_dbg_kms(&dev_priv->drm,
558 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
559 dev_priv->vbt.int_tv_support,
560 dev_priv->vbt.int_crt_support,
561 dev_priv->vbt.lvds_use_ssc,
562 dev_priv->vbt.lvds_ssc_freq,
563 dev_priv->vbt.display_clock_mode,
564 dev_priv->vbt.fdi_rx_polarity_inverted);
565}
566
567static const struct child_device_config *
568child_device_ptr(const struct bdb_general_definitions *defs, int i)
569{
570 return (const void *) &defs->devices[i * defs->child_dev_size];
571}
572
573static void
574parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
575{
576 struct sdvo_device_mapping *mapping;
577 const struct display_device_data *devdata;
578 const struct child_device_config *child;
579 int count = 0;
580
581 /*
582 * Only parse SDVO mappings on gens that could have SDVO. This isn't
583 * accurate and doesn't have to be, as long as it's not too strict.
584 */
585 if (!IS_GEN_RANGE(dev_priv, 3, 7)) {
586 drm_dbg_kms(&dev_priv->drm, "Skipping SDVO device mapping\n");
587 return;
588 }
589
590 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
591 child = &devdata->child;
592
593 if (child->slave_addr != SLAVE_ADDR1 &&
594 child->slave_addr != SLAVE_ADDR2) {
595 /*
596 * If the slave address is neither 0x70 nor 0x72,
597 * it is not a SDVO device. Skip it.
598 */
599 continue;
600 }
601 if (child->dvo_port != DEVICE_PORT_DVOB &&
602 child->dvo_port != DEVICE_PORT_DVOC) {
603 /* skip the incorrect SDVO port */
604 drm_dbg_kms(&dev_priv->drm,
605 "Incorrect SDVO port. Skip it\n");
606 continue;
607 }
608 drm_dbg_kms(&dev_priv->drm,
609 "the SDVO device with slave addr %2x is found on"
610 " %s port\n",
611 child->slave_addr,
612 (child->dvo_port == DEVICE_PORT_DVOB) ?
613 "SDVOB" : "SDVOC");
614 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
615 if (!mapping->initialized) {
616 mapping->dvo_port = child->dvo_port;
617 mapping->slave_addr = child->slave_addr;
618 mapping->dvo_wiring = child->dvo_wiring;
619 mapping->ddc_pin = child->ddc_pin;
620 mapping->i2c_pin = child->i2c_pin;
621 mapping->initialized = 1;
622 drm_dbg_kms(&dev_priv->drm,
623 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
624 mapping->dvo_port, mapping->slave_addr,
625 mapping->dvo_wiring, mapping->ddc_pin,
626 mapping->i2c_pin);
627 } else {
628 drm_dbg_kms(&dev_priv->drm,
629 "Maybe one SDVO port is shared by "
630 "two SDVO device.\n");
631 }
632 if (child->slave2_addr) {
633 /* Maybe this is a SDVO device with multiple inputs */
634 /* And the mapping info is not added */
635 drm_dbg_kms(&dev_priv->drm,
636 "there exists the slave2_addr. Maybe this"
637 " is a SDVO device with multiple inputs.\n");
638 }
639 count++;
640 }
641
642 if (!count) {
643 /* No SDVO device info is found */
644 drm_dbg_kms(&dev_priv->drm,
645 "No SDVO device info is found in VBT\n");
646 }
647}
648
649static void
650parse_driver_features(struct drm_i915_private *dev_priv,
651 const struct bdb_header *bdb)
652{
653 const struct bdb_driver_features *driver;
654
655 driver = find_section(bdb, BDB_DRIVER_FEATURES);
656 if (!driver)
657 return;
658
659 if (INTEL_GEN(dev_priv) >= 5) {
660 /*
661 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
662 * to mean "eDP". The VBT spec doesn't agree with that
663 * interpretation, but real world VBTs seem to.
664 */
665 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
666 dev_priv->vbt.int_lvds_support = 0;
667 } else {
668 /*
669 * FIXME it's not clear which BDB version has the LVDS config
670 * bits defined. Revision history in the VBT spec says:
671 * "0.92 | Add two definitions for VBT value of LVDS Active
672 * Config (00b and 11b values defined) | 06/13/2005"
673 * but does not the specify the BDB version.
674 *
675 * So far version 134 (on i945gm) is the oldest VBT observed
676 * in the wild with the bits correctly populated. Version
677 * 108 (on i85x) does not have the bits correctly populated.
678 */
679 if (bdb->version >= 134 &&
680 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
681 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
682 dev_priv->vbt.int_lvds_support = 0;
683 }
684
685 if (bdb->version < 228) {
686 drm_dbg_kms(&dev_priv->drm, "DRRS State Enabled:%d\n",
687 driver->drrs_enabled);
688 /*
689 * If DRRS is not supported, drrs_type has to be set to 0.
690 * This is because, VBT is configured in such a way that
691 * static DRRS is 0 and DRRS not supported is represented by
692 * driver->drrs_enabled=false
693 */
694 if (!driver->drrs_enabled)
695 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
696
697 dev_priv->vbt.psr.enable = driver->psr_enabled;
698 }
699}
700
701static void
702parse_power_conservation_features(struct drm_i915_private *dev_priv,
703 const struct bdb_header *bdb)
704{
705 const struct bdb_lfp_power *power;
706 u8 panel_type = dev_priv->vbt.panel_type;
707
708 if (bdb->version < 228)
709 return;
710
711 power = find_section(bdb, BDB_LFP_POWER);
712 if (!power)
713 return;
714
715 dev_priv->vbt.psr.enable = power->psr & BIT(panel_type);
716
717 /*
718 * If DRRS is not supported, drrs_type has to be set to 0.
719 * This is because, VBT is configured in such a way that
720 * static DRRS is 0 and DRRS not supported is represented by
721 * power->drrs & BIT(panel_type)=false
722 */
723 if (!(power->drrs & BIT(panel_type)))
724 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
725
726 if (bdb->version >= 232)
727 dev_priv->vbt.edp.hobl = power->hobl & BIT(panel_type);
728}
729
730static void
731parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
732{
733 const struct bdb_edp *edp;
734 const struct edp_power_seq *edp_pps;
735 const struct edp_fast_link_params *edp_link_params;
736 int panel_type = dev_priv->vbt.panel_type;
737
738 edp = find_section(bdb, BDB_EDP);
739 if (!edp)
740 return;
741
742 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
743 case EDP_18BPP:
744 dev_priv->vbt.edp.bpp = 18;
745 break;
746 case EDP_24BPP:
747 dev_priv->vbt.edp.bpp = 24;
748 break;
749 case EDP_30BPP:
750 dev_priv->vbt.edp.bpp = 30;
751 break;
752 }
753
754 /* Get the eDP sequencing and link info */
755 edp_pps = &edp->power_seqs[panel_type];
756 edp_link_params = &edp->fast_link_params[panel_type];
757
758 dev_priv->vbt.edp.pps = *edp_pps;
759
760 switch (edp_link_params->rate) {
761 case EDP_RATE_1_62:
762 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
763 break;
764 case EDP_RATE_2_7:
765 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
766 break;
767 default:
768 drm_dbg_kms(&dev_priv->drm,
769 "VBT has unknown eDP link rate value %u\n",
770 edp_link_params->rate);
771 break;
772 }
773
774 switch (edp_link_params->lanes) {
775 case EDP_LANE_1:
776 dev_priv->vbt.edp.lanes = 1;
777 break;
778 case EDP_LANE_2:
779 dev_priv->vbt.edp.lanes = 2;
780 break;
781 case EDP_LANE_4:
782 dev_priv->vbt.edp.lanes = 4;
783 break;
784 default:
785 drm_dbg_kms(&dev_priv->drm,
786 "VBT has unknown eDP lane count value %u\n",
787 edp_link_params->lanes);
788 break;
789 }
790
791 switch (edp_link_params->preemphasis) {
792 case EDP_PREEMPHASIS_NONE:
793 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
794 break;
795 case EDP_PREEMPHASIS_3_5dB:
796 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
797 break;
798 case EDP_PREEMPHASIS_6dB:
799 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
800 break;
801 case EDP_PREEMPHASIS_9_5dB:
802 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
803 break;
804 default:
805 drm_dbg_kms(&dev_priv->drm,
806 "VBT has unknown eDP pre-emphasis value %u\n",
807 edp_link_params->preemphasis);
808 break;
809 }
810
811 switch (edp_link_params->vswing) {
812 case EDP_VSWING_0_4V:
813 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
814 break;
815 case EDP_VSWING_0_6V:
816 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
817 break;
818 case EDP_VSWING_0_8V:
819 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
820 break;
821 case EDP_VSWING_1_2V:
822 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
823 break;
824 default:
825 drm_dbg_kms(&dev_priv->drm,
826 "VBT has unknown eDP voltage swing value %u\n",
827 edp_link_params->vswing);
828 break;
829 }
830
831 if (bdb->version >= 173) {
832 u8 vswing;
833
834 /* Don't read from VBT if module parameter has valid value*/
835 if (dev_priv->params.edp_vswing) {
836 dev_priv->vbt.edp.low_vswing =
837 dev_priv->params.edp_vswing == 1;
838 } else {
839 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
840 dev_priv->vbt.edp.low_vswing = vswing == 0;
841 }
842 }
843}
844
845static void
846parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
847{
848 const struct bdb_psr *psr;
849 const struct psr_table *psr_table;
850 int panel_type = dev_priv->vbt.panel_type;
851
852 psr = find_section(bdb, BDB_PSR);
853 if (!psr) {
854 drm_dbg_kms(&dev_priv->drm, "No PSR BDB found.\n");
855 return;
856 }
857
858 psr_table = &psr->psr_table[panel_type];
859
860 dev_priv->vbt.psr.full_link = psr_table->full_link;
861 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
862
863 /* Allowed VBT values goes from 0 to 15 */
864 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
865 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
866
867 switch (psr_table->lines_to_wait) {
868 case 0:
869 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
870 break;
871 case 1:
872 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
873 break;
874 case 2:
875 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
876 break;
877 case 3:
878 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
879 break;
880 default:
881 drm_dbg_kms(&dev_priv->drm,
882 "VBT has unknown PSR lines to wait %u\n",
883 psr_table->lines_to_wait);
884 break;
885 }
886
887 /*
888 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
889 * Old decimal value is wake up time in multiples of 100 us.
890 */
891 if (bdb->version >= 205 &&
892 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) ||
893 INTEL_GEN(dev_priv) >= 10)) {
894 switch (psr_table->tp1_wakeup_time) {
895 case 0:
896 dev_priv->vbt.psr.tp1_wakeup_time_us = 500;
897 break;
898 case 1:
899 dev_priv->vbt.psr.tp1_wakeup_time_us = 100;
900 break;
901 case 3:
902 dev_priv->vbt.psr.tp1_wakeup_time_us = 0;
903 break;
904 default:
905 drm_dbg_kms(&dev_priv->drm,
906 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
907 psr_table->tp1_wakeup_time);
908 fallthrough;
909 case 2:
910 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;
911 break;
912 }
913
914 switch (psr_table->tp2_tp3_wakeup_time) {
915 case 0:
916 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500;
917 break;
918 case 1:
919 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100;
920 break;
921 case 3:
922 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0;
923 break;
924 default:
925 drm_dbg_kms(&dev_priv->drm,
926 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
927 psr_table->tp2_tp3_wakeup_time);
928 fallthrough;
929 case 2:
930 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
931 break;
932 }
933 } else {
934 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
935 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
936 }
937
938 if (bdb->version >= 226) {
939 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
940
941 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
942 switch (wakeup_time) {
943 case 0:
944 wakeup_time = 500;
945 break;
946 case 1:
947 wakeup_time = 100;
948 break;
949 case 3:
950 wakeup_time = 50;
951 break;
952 default:
953 case 2:
954 wakeup_time = 2500;
955 break;
956 }
957 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
958 } else {
959 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
960 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us;
961 }
962}
963
964static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,
965 u16 version, enum port port)
966{
967 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) {
968 dev_priv->vbt.dsi.bl_ports = BIT(port);
969 if (dev_priv->vbt.dsi.config->cabc_supported)
970 dev_priv->vbt.dsi.cabc_ports = BIT(port);
971
972 return;
973 }
974
975 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {
976 case DL_DCS_PORT_A:
977 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);
978 break;
979 case DL_DCS_PORT_C:
980 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C);
981 break;
982 default:
983 case DL_DCS_PORT_A_AND_C:
984 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
985 break;
986 }
987
988 if (!dev_priv->vbt.dsi.config->cabc_supported)
989 return;
990
991 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {
992 case DL_DCS_PORT_A:
993 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);
994 break;
995 case DL_DCS_PORT_C:
996 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C);
997 break;
998 default:
999 case DL_DCS_PORT_A_AND_C:
1000 dev_priv->vbt.dsi.cabc_ports =
1001 BIT(PORT_A) | BIT(PORT_C);
1002 break;
1003 }
1004}
1005
1006static void
1007parse_mipi_config(struct drm_i915_private *dev_priv,
1008 const struct bdb_header *bdb)
1009{
1010 const struct bdb_mipi_config *start;
1011 const struct mipi_config *config;
1012 const struct mipi_pps_data *pps;
1013 int panel_type = dev_priv->vbt.panel_type;
1014 enum port port;
1015
1016 /* parse MIPI blocks only if LFP type is MIPI */
1017 if (!intel_bios_is_dsi_present(dev_priv, &port))
1018 return;
1019
1020 /* Initialize this to undefined indicating no generic MIPI support */
1021 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1022
1023 /* Block #40 is already parsed and panel_fixed_mode is
1024 * stored in dev_priv->lfp_lvds_vbt_mode
1025 * resuse this when needed
1026 */
1027
1028 /* Parse #52 for panel index used from panel_type already
1029 * parsed
1030 */
1031 start = find_section(bdb, BDB_MIPI_CONFIG);
1032 if (!start) {
1033 drm_dbg_kms(&dev_priv->drm, "No MIPI config BDB found");
1034 return;
1035 }
1036
1037 drm_dbg(&dev_priv->drm, "Found MIPI Config block, panel index = %d\n",
1038 panel_type);
1039
1040 /*
1041 * get hold of the correct configuration block and pps data as per
1042 * the panel_type as index
1043 */
1044 config = &start->config[panel_type];
1045 pps = &start->pps[panel_type];
1046
1047 /* store as of now full data. Trim when we realise all is not needed */
1048 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1049 if (!dev_priv->vbt.dsi.config)
1050 return;
1051
1052 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1053 if (!dev_priv->vbt.dsi.pps) {
1054 kfree(dev_priv->vbt.dsi.config);
1055 return;
1056 }
1057
1058 parse_dsi_backlight_ports(dev_priv, bdb->version, port);
1059
1060 /* FIXME is the 90 vs. 270 correct? */
1061 switch (config->rotation) {
1062 case ENABLE_ROTATION_0:
1063 /*
1064 * Most (all?) VBTs claim 0 degrees despite having
1065 * an upside down panel, thus we do not trust this.
1066 */
1067 dev_priv->vbt.dsi.orientation =
1068 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1069 break;
1070 case ENABLE_ROTATION_90:
1071 dev_priv->vbt.dsi.orientation =
1072 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1073 break;
1074 case ENABLE_ROTATION_180:
1075 dev_priv->vbt.dsi.orientation =
1076 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1077 break;
1078 case ENABLE_ROTATION_270:
1079 dev_priv->vbt.dsi.orientation =
1080 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1081 break;
1082 }
1083
1084 /* We have mandatory mipi config blocks. Initialize as generic panel */
1085 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1086}
1087
1088/* Find the sequence block and size for the given panel. */
1089static const u8 *
1090find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1091 u16 panel_id, u32 *seq_size)
1092{
1093 u32 total = get_blocksize(sequence);
1094 const u8 *data = &sequence->data[0];
1095 u8 current_id;
1096 u32 current_size;
1097 int header_size = sequence->version >= 3 ? 5 : 3;
1098 int index = 0;
1099 int i;
1100
1101 /* skip new block size */
1102 if (sequence->version >= 3)
1103 data += 4;
1104
1105 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1106 if (index + header_size > total) {
1107 DRM_ERROR("Invalid sequence block (header)\n");
1108 return NULL;
1109 }
1110
1111 current_id = *(data + index);
1112 if (sequence->version >= 3)
1113 current_size = *((const u32 *)(data + index + 1));
1114 else
1115 current_size = *((const u16 *)(data + index + 1));
1116
1117 index += header_size;
1118
1119 if (index + current_size > total) {
1120 DRM_ERROR("Invalid sequence block\n");
1121 return NULL;
1122 }
1123
1124 if (current_id == panel_id) {
1125 *seq_size = current_size;
1126 return data + index;
1127 }
1128
1129 index += current_size;
1130 }
1131
1132 DRM_ERROR("Sequence block detected but no valid configuration\n");
1133
1134 return NULL;
1135}
1136
1137static int goto_next_sequence(const u8 *data, int index, int total)
1138{
1139 u16 len;
1140
1141 /* Skip Sequence Byte. */
1142 for (index = index + 1; index < total; index += len) {
1143 u8 operation_byte = *(data + index);
1144 index++;
1145
1146 switch (operation_byte) {
1147 case MIPI_SEQ_ELEM_END:
1148 return index;
1149 case MIPI_SEQ_ELEM_SEND_PKT:
1150 if (index + 4 > total)
1151 return 0;
1152
1153 len = *((const u16 *)(data + index + 2)) + 4;
1154 break;
1155 case MIPI_SEQ_ELEM_DELAY:
1156 len = 4;
1157 break;
1158 case MIPI_SEQ_ELEM_GPIO:
1159 len = 2;
1160 break;
1161 case MIPI_SEQ_ELEM_I2C:
1162 if (index + 7 > total)
1163 return 0;
1164 len = *(data + index + 6) + 7;
1165 break;
1166 default:
1167 DRM_ERROR("Unknown operation byte\n");
1168 return 0;
1169 }
1170 }
1171
1172 return 0;
1173}
1174
1175static int goto_next_sequence_v3(const u8 *data, int index, int total)
1176{
1177 int seq_end;
1178 u16 len;
1179 u32 size_of_sequence;
1180
1181 /*
1182 * Could skip sequence based on Size of Sequence alone, but also do some
1183 * checking on the structure.
1184 */
1185 if (total < 5) {
1186 DRM_ERROR("Too small sequence size\n");
1187 return 0;
1188 }
1189
1190 /* Skip Sequence Byte. */
1191 index++;
1192
1193 /*
1194 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1195 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1196 * byte.
1197 */
1198 size_of_sequence = *((const u32 *)(data + index));
1199 index += 4;
1200
1201 seq_end = index + size_of_sequence;
1202 if (seq_end > total) {
1203 DRM_ERROR("Invalid sequence size\n");
1204 return 0;
1205 }
1206
1207 for (; index < total; index += len) {
1208 u8 operation_byte = *(data + index);
1209 index++;
1210
1211 if (operation_byte == MIPI_SEQ_ELEM_END) {
1212 if (index != seq_end) {
1213 DRM_ERROR("Invalid element structure\n");
1214 return 0;
1215 }
1216 return index;
1217 }
1218
1219 len = *(data + index);
1220 index++;
1221
1222 /*
1223 * FIXME: Would be nice to check elements like for v1/v2 in
1224 * goto_next_sequence() above.
1225 */
1226 switch (operation_byte) {
1227 case MIPI_SEQ_ELEM_SEND_PKT:
1228 case MIPI_SEQ_ELEM_DELAY:
1229 case MIPI_SEQ_ELEM_GPIO:
1230 case MIPI_SEQ_ELEM_I2C:
1231 case MIPI_SEQ_ELEM_SPI:
1232 case MIPI_SEQ_ELEM_PMIC:
1233 break;
1234 default:
1235 DRM_ERROR("Unknown operation byte %u\n",
1236 operation_byte);
1237 break;
1238 }
1239 }
1240
1241 return 0;
1242}
1243
1244/*
1245 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1246 * skip all delay + gpio operands and stop at the first DSI packet op.
1247 */
1248static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv)
1249{
1250 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1251 int index, len;
1252
1253 if (drm_WARN_ON(&dev_priv->drm,
1254 !data || dev_priv->vbt.dsi.seq_version != 1))
1255 return 0;
1256
1257 /* index = 1 to skip sequence byte */
1258 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1259 switch (data[index]) {
1260 case MIPI_SEQ_ELEM_SEND_PKT:
1261 return index == 1 ? 0 : index;
1262 case MIPI_SEQ_ELEM_DELAY:
1263 len = 5; /* 1 byte for operand + uint32 */
1264 break;
1265 case MIPI_SEQ_ELEM_GPIO:
1266 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1267 break;
1268 default:
1269 return 0;
1270 }
1271 }
1272
1273 return 0;
1274}
1275
1276/*
1277 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1278 * The deassert must be done before calling intel_dsi_device_ready, so for
1279 * these devices we split the init OTP sequence into a deassert sequence and
1280 * the actual init OTP part.
1281 */
1282static void fixup_mipi_sequences(struct drm_i915_private *dev_priv)
1283{
1284 u8 *init_otp;
1285 int len;
1286
1287 /* Limit this to VLV for now. */
1288 if (!IS_VALLEYVIEW(dev_priv))
1289 return;
1290
1291 /* Limit this to v1 vid-mode sequences */
1292 if (dev_priv->vbt.dsi.config->is_cmd_mode ||
1293 dev_priv->vbt.dsi.seq_version != 1)
1294 return;
1295
1296 /* Only do this if there are otp and assert seqs and no deassert seq */
1297 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1298 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1299 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1300 return;
1301
1302 /* The deassert-sequence ends at the first DSI packet */
1303 len = get_init_otp_deassert_fragment_len(dev_priv);
1304 if (!len)
1305 return;
1306
1307 drm_dbg_kms(&dev_priv->drm,
1308 "Using init OTP fragment to deassert reset\n");
1309
1310 /* Copy the fragment, update seq byte and terminate it */
1311 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1312 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1313 if (!dev_priv->vbt.dsi.deassert_seq)
1314 return;
1315 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1316 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1317 /* Use the copy for deassert */
1318 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1319 dev_priv->vbt.dsi.deassert_seq;
1320 /* Replace the last byte of the fragment with init OTP seq byte */
1321 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1322 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1323 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1324}
1325
1326static void
1327parse_mipi_sequence(struct drm_i915_private *dev_priv,
1328 const struct bdb_header *bdb)
1329{
1330 int panel_type = dev_priv->vbt.panel_type;
1331 const struct bdb_mipi_sequence *sequence;
1332 const u8 *seq_data;
1333 u32 seq_size;
1334 u8 *data;
1335 int index = 0;
1336
1337 /* Only our generic panel driver uses the sequence block. */
1338 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1339 return;
1340
1341 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1342 if (!sequence) {
1343 drm_dbg_kms(&dev_priv->drm,
1344 "No MIPI Sequence found, parsing complete\n");
1345 return;
1346 }
1347
1348 /* Fail gracefully for forward incompatible sequence block. */
1349 if (sequence->version >= 4) {
1350 drm_err(&dev_priv->drm,
1351 "Unable to parse MIPI Sequence Block v%u\n",
1352 sequence->version);
1353 return;
1354 }
1355
1356 drm_dbg(&dev_priv->drm, "Found MIPI sequence block v%u\n",
1357 sequence->version);
1358
1359 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1360 if (!seq_data)
1361 return;
1362
1363 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1364 if (!data)
1365 return;
1366
1367 /* Parse the sequences, store pointers to each sequence. */
1368 for (;;) {
1369 u8 seq_id = *(data + index);
1370 if (seq_id == MIPI_SEQ_END)
1371 break;
1372
1373 if (seq_id >= MIPI_SEQ_MAX) {
1374 drm_err(&dev_priv->drm, "Unknown sequence %u\n",
1375 seq_id);
1376 goto err;
1377 }
1378
1379 /* Log about presence of sequences we won't run. */
1380 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1381 drm_dbg_kms(&dev_priv->drm,
1382 "Unsupported sequence %u\n", seq_id);
1383
1384 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
1385
1386 if (sequence->version >= 3)
1387 index = goto_next_sequence_v3(data, index, seq_size);
1388 else
1389 index = goto_next_sequence(data, index, seq_size);
1390 if (!index) {
1391 drm_err(&dev_priv->drm, "Invalid sequence %u\n",
1392 seq_id);
1393 goto err;
1394 }
1395 }
1396
1397 dev_priv->vbt.dsi.data = data;
1398 dev_priv->vbt.dsi.size = seq_size;
1399 dev_priv->vbt.dsi.seq_version = sequence->version;
1400
1401 fixup_mipi_sequences(dev_priv);
1402
1403 drm_dbg(&dev_priv->drm, "MIPI related VBT parsing complete\n");
1404 return;
1405
1406err:
1407 kfree(data);
1408 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
1409}
1410
1411static void
1412parse_compression_parameters(struct drm_i915_private *i915,
1413 const struct bdb_header *bdb)
1414{
1415 const struct bdb_compression_parameters *params;
1416 struct display_device_data *devdata;
1417 const struct child_device_config *child;
1418 u16 block_size;
1419 int index;
1420
1421 if (bdb->version < 198)
1422 return;
1423
1424 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1425 if (params) {
1426 /* Sanity checks */
1427 if (params->entry_size != sizeof(params->data[0])) {
1428 drm_dbg_kms(&i915->drm,
1429 "VBT: unsupported compression param entry size\n");
1430 return;
1431 }
1432
1433 block_size = get_blocksize(params);
1434 if (block_size < sizeof(*params)) {
1435 drm_dbg_kms(&i915->drm,
1436 "VBT: expected 16 compression param entries\n");
1437 return;
1438 }
1439 }
1440
1441 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1442 child = &devdata->child;
1443
1444 if (!child->compression_enable)
1445 continue;
1446
1447 if (!params) {
1448 drm_dbg_kms(&i915->drm,
1449 "VBT: compression params not available\n");
1450 continue;
1451 }
1452
1453 if (child->compression_method_cps) {
1454 drm_dbg_kms(&i915->drm,
1455 "VBT: CPS compression not supported\n");
1456 continue;
1457 }
1458
1459 index = child->compression_structure_index;
1460
1461 devdata->dsc = kmemdup(¶ms->data[index],
1462 sizeof(*devdata->dsc), GFP_KERNEL);
1463 }
1464}
1465
1466static u8 translate_iboost(u8 val)
1467{
1468 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1469
1470 if (val >= ARRAY_SIZE(mapping)) {
1471 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1472 return 0;
1473 }
1474 return mapping[val];
1475}
1476
1477static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1478{
1479 const struct ddi_vbt_port_info *info;
1480 enum port port;
1481
1482 for_each_port(port) {
1483 info = &i915->vbt.ddi_port_info[port];
1484
1485 if (info->child && ddc_pin == info->alternate_ddc_pin)
1486 return port;
1487 }
1488
1489 return PORT_NONE;
1490}
1491
1492static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1493 enum port port)
1494{
1495 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1496 enum port p;
1497
1498 if (!info->alternate_ddc_pin)
1499 return;
1500
1501 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin);
1502 if (p != PORT_NONE) {
1503 drm_dbg_kms(&dev_priv->drm,
1504 "port %c trying to use the same DDC pin (0x%x) as port %c, "
1505 "disabling port %c DVI/HDMI support\n",
1506 port_name(port), info->alternate_ddc_pin,
1507 port_name(p), port_name(p));
1508
1509 /*
1510 * If we have multiple ports supposedly sharing the
1511 * pin, then dvi/hdmi couldn't exist on the shared
1512 * port. Otherwise they share the same ddc bin and
1513 * system couldn't communicate with them separately.
1514 *
1515 * Give inverse child device order the priority,
1516 * last one wins. Yes, there are real machines
1517 * (eg. Asrock B250M-HDV) where VBT has both
1518 * port A and port E with the same AUX ch and
1519 * we must pick port E :(
1520 */
1521 info = &dev_priv->vbt.ddi_port_info[p];
1522
1523 info->supports_dvi = false;
1524 info->supports_hdmi = false;
1525 info->alternate_ddc_pin = 0;
1526 }
1527}
1528
1529static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1530{
1531 const struct ddi_vbt_port_info *info;
1532 enum port port;
1533
1534 for_each_port(port) {
1535 info = &i915->vbt.ddi_port_info[port];
1536
1537 if (info->child && aux_ch == info->alternate_aux_channel)
1538 return port;
1539 }
1540
1541 return PORT_NONE;
1542}
1543
1544static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1545 enum port port)
1546{
1547 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1548 enum port p;
1549
1550 if (!info->alternate_aux_channel)
1551 return;
1552
1553 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel);
1554 if (p != PORT_NONE) {
1555 drm_dbg_kms(&dev_priv->drm,
1556 "port %c trying to use the same AUX CH (0x%x) as port %c, "
1557 "disabling port %c DP support\n",
1558 port_name(port), info->alternate_aux_channel,
1559 port_name(p), port_name(p));
1560
1561 /*
1562 * If we have multiple ports supposedlt sharing the
1563 * aux channel, then DP couldn't exist on the shared
1564 * port. Otherwise they share the same aux channel
1565 * and system couldn't communicate with them separately.
1566 *
1567 * Give inverse child device order the priority,
1568 * last one wins. Yes, there are real machines
1569 * (eg. Asrock B250M-HDV) where VBT has both
1570 * port A and port E with the same AUX ch and
1571 * we must pick port E :(
1572 */
1573 info = &dev_priv->vbt.ddi_port_info[p];
1574
1575 info->supports_dp = false;
1576 info->alternate_aux_channel = 0;
1577 }
1578}
1579
1580static const u8 cnp_ddc_pin_map[] = {
1581 [0] = 0, /* N/A */
1582 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1583 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1584 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1585 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1586};
1587
1588static const u8 icp_ddc_pin_map[] = {
1589 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1590 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1591 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1592 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1593 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1594 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1595 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1596 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1597 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1598};
1599
1600static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
1601{
1602 const u8 *ddc_pin_map;
1603 int n_entries;
1604
1605 if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) {
1606 ddc_pin_map = icp_ddc_pin_map;
1607 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1608 } else if (HAS_PCH_CNP(dev_priv)) {
1609 ddc_pin_map = cnp_ddc_pin_map;
1610 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1611 } else {
1612 /* Assuming direct map */
1613 return vbt_pin;
1614 }
1615
1616 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1617 return ddc_pin_map[vbt_pin];
1618
1619 drm_dbg_kms(&dev_priv->drm,
1620 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1621 vbt_pin);
1622 return 0;
1623}
1624
1625static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1626 const int port_mapping[][3], u8 dvo_port)
1627{
1628 enum port port;
1629 int i;
1630
1631 for (port = PORT_A; port < n_ports; port++) {
1632 for (i = 0; i < n_dvo; i++) {
1633 if (port_mapping[port][i] == -1)
1634 break;
1635
1636 if (dvo_port == port_mapping[port][i])
1637 return port;
1638 }
1639 }
1640
1641 return PORT_NONE;
1642}
1643
1644static enum port dvo_port_to_port(struct drm_i915_private *dev_priv,
1645 u8 dvo_port)
1646{
1647 /*
1648 * Each DDI port can have more than one value on the "DVO Port" field,
1649 * so look for all the possible values for each port.
1650 */
1651 static const int port_mapping[][3] = {
1652 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1653 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1654 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1655 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1656 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1657 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1658 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1659 };
1660 /*
1661 * Bspec lists the ports as A, B, C, D - however internally in our
1662 * driver we keep them as PORT_A, PORT_B, PORT_D and PORT_E so the
1663 * registers in Display Engine match the right offsets. Apply the
1664 * mapping here to translate from VBT to internal convention.
1665 */
1666 static const int rkl_port_mapping[][3] = {
1667 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1668 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1669 [PORT_C] = { -1 },
1670 [PORT_D] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1671 [PORT_E] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1672 };
1673
1674 if (IS_ROCKETLAKE(dev_priv))
1675 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1676 ARRAY_SIZE(rkl_port_mapping[0]),
1677 rkl_port_mapping,
1678 dvo_port);
1679 else
1680 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1681 ARRAY_SIZE(port_mapping[0]),
1682 port_mapping,
1683 dvo_port);
1684}
1685
1686static void parse_ddi_port(struct drm_i915_private *dev_priv,
1687 struct display_device_data *devdata,
1688 u8 bdb_version)
1689{
1690 const struct child_device_config *child = &devdata->child;
1691 struct ddi_vbt_port_info *info;
1692 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1693 enum port port;
1694
1695 port = dvo_port_to_port(dev_priv, child->dvo_port);
1696 if (port == PORT_NONE)
1697 return;
1698
1699 info = &dev_priv->vbt.ddi_port_info[port];
1700
1701 if (info->child) {
1702 drm_dbg_kms(&dev_priv->drm,
1703 "More than one child device for port %c in VBT, using the first.\n",
1704 port_name(port));
1705 return;
1706 }
1707
1708 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1709 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1710 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1711 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1712 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1713
1714 if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) {
1715 drm_dbg_kms(&dev_priv->drm,
1716 "VBT claims port A supports DVI%s, ignoring\n",
1717 is_hdmi ? "/HDMI" : "");
1718 is_dvi = false;
1719 is_hdmi = false;
1720 }
1721
1722 info->supports_dvi = is_dvi;
1723 info->supports_hdmi = is_hdmi;
1724 info->supports_dp = is_dp;
1725 info->supports_edp = is_edp;
1726
1727 if (bdb_version >= 195)
1728 info->supports_typec_usb = child->dp_usb_type_c;
1729
1730 if (bdb_version >= 209)
1731 info->supports_tbt = child->tbt;
1732
1733 drm_dbg_kms(&dev_priv->drm,
1734 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1735 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1736 HAS_LSPCON(dev_priv) && child->lspcon,
1737 info->supports_typec_usb, info->supports_tbt,
1738 devdata->dsc != NULL);
1739
1740 if (is_dvi) {
1741 u8 ddc_pin;
1742
1743 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin);
1744 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) {
1745 info->alternate_ddc_pin = ddc_pin;
1746 sanitize_ddc_pin(dev_priv, port);
1747 } else {
1748 drm_dbg_kms(&dev_priv->drm,
1749 "Port %c has invalid DDC pin %d, "
1750 "sticking to defaults\n",
1751 port_name(port), ddc_pin);
1752 }
1753 }
1754
1755 if (is_dp) {
1756 info->alternate_aux_channel = child->aux_channel;
1757
1758 sanitize_aux_ch(dev_priv, port);
1759 }
1760
1761 if (bdb_version >= 158) {
1762 /* The VBT HDMI level shift values match the table we have. */
1763 u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1764 drm_dbg_kms(&dev_priv->drm,
1765 "VBT HDMI level shift for port %c: %d\n",
1766 port_name(port),
1767 hdmi_level_shift);
1768 info->hdmi_level_shift = hdmi_level_shift;
1769 info->hdmi_level_shift_set = true;
1770 }
1771
1772 if (bdb_version >= 204) {
1773 int max_tmds_clock;
1774
1775 switch (child->hdmi_max_data_rate) {
1776 default:
1777 MISSING_CASE(child->hdmi_max_data_rate);
1778 fallthrough;
1779 case HDMI_MAX_DATA_RATE_PLATFORM:
1780 max_tmds_clock = 0;
1781 break;
1782 case HDMI_MAX_DATA_RATE_297:
1783 max_tmds_clock = 297000;
1784 break;
1785 case HDMI_MAX_DATA_RATE_165:
1786 max_tmds_clock = 165000;
1787 break;
1788 }
1789
1790 if (max_tmds_clock)
1791 drm_dbg_kms(&dev_priv->drm,
1792 "VBT HDMI max TMDS clock for port %c: %d kHz\n",
1793 port_name(port), max_tmds_clock);
1794 info->max_tmds_clock = max_tmds_clock;
1795 }
1796
1797 /* Parse the I_boost config for SKL and above */
1798 if (bdb_version >= 196 && child->iboost) {
1799 info->dp_boost_level = translate_iboost(child->dp_iboost_level);
1800 drm_dbg_kms(&dev_priv->drm,
1801 "VBT (e)DP boost level for port %c: %d\n",
1802 port_name(port), info->dp_boost_level);
1803 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
1804 drm_dbg_kms(&dev_priv->drm,
1805 "VBT HDMI boost level for port %c: %d\n",
1806 port_name(port), info->hdmi_boost_level);
1807 }
1808
1809 /* DP max link rate for CNL+ */
1810 if (bdb_version >= 216) {
1811 switch (child->dp_max_link_rate) {
1812 default:
1813 case VBT_DP_MAX_LINK_RATE_HBR3:
1814 info->dp_max_link_rate = 810000;
1815 break;
1816 case VBT_DP_MAX_LINK_RATE_HBR2:
1817 info->dp_max_link_rate = 540000;
1818 break;
1819 case VBT_DP_MAX_LINK_RATE_HBR:
1820 info->dp_max_link_rate = 270000;
1821 break;
1822 case VBT_DP_MAX_LINK_RATE_LBR:
1823 info->dp_max_link_rate = 162000;
1824 break;
1825 }
1826 drm_dbg_kms(&dev_priv->drm,
1827 "VBT DP max link rate for port %c: %d\n",
1828 port_name(port), info->dp_max_link_rate);
1829 }
1830
1831 info->child = child;
1832}
1833
1834static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
1835{
1836 struct display_device_data *devdata;
1837
1838 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
1839 return;
1840
1841 if (bdb_version < 155)
1842 return;
1843
1844 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
1845 parse_ddi_port(dev_priv, devdata, bdb_version);
1846}
1847
1848static void
1849parse_general_definitions(struct drm_i915_private *dev_priv,
1850 const struct bdb_header *bdb)
1851{
1852 const struct bdb_general_definitions *defs;
1853 struct display_device_data *devdata;
1854 const struct child_device_config *child;
1855 int i, child_device_num;
1856 u8 expected_size;
1857 u16 block_size;
1858 int bus_pin;
1859
1860 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1861 if (!defs) {
1862 drm_dbg_kms(&dev_priv->drm,
1863 "No general definition block is found, no devices defined.\n");
1864 return;
1865 }
1866
1867 block_size = get_blocksize(defs);
1868 if (block_size < sizeof(*defs)) {
1869 drm_dbg_kms(&dev_priv->drm,
1870 "General definitions block too small (%u)\n",
1871 block_size);
1872 return;
1873 }
1874
1875 bus_pin = defs->crt_ddc_gmbus_pin;
1876 drm_dbg_kms(&dev_priv->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
1877 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
1878 dev_priv->vbt.crt_ddc_pin = bus_pin;
1879
1880 if (bdb->version < 106) {
1881 expected_size = 22;
1882 } else if (bdb->version < 111) {
1883 expected_size = 27;
1884 } else if (bdb->version < 195) {
1885 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
1886 } else if (bdb->version == 195) {
1887 expected_size = 37;
1888 } else if (bdb->version <= 215) {
1889 expected_size = 38;
1890 } else if (bdb->version <= 229) {
1891 expected_size = 39;
1892 } else {
1893 expected_size = sizeof(*child);
1894 BUILD_BUG_ON(sizeof(*child) < 39);
1895 drm_dbg(&dev_priv->drm,
1896 "Expected child device config size for VBT version %u not known; assuming %u\n",
1897 bdb->version, expected_size);
1898 }
1899
1900 /* Flag an error for unexpected size, but continue anyway. */
1901 if (defs->child_dev_size != expected_size)
1902 drm_err(&dev_priv->drm,
1903 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
1904 defs->child_dev_size, expected_size, bdb->version);
1905
1906 /* The legacy sized child device config is the minimum we need. */
1907 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
1908 drm_dbg_kms(&dev_priv->drm,
1909 "Child device config size %u is too small.\n",
1910 defs->child_dev_size);
1911 return;
1912 }
1913
1914 /* get the number of child device */
1915 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
1916
1917 for (i = 0; i < child_device_num; i++) {
1918 child = child_device_ptr(defs, i);
1919 if (!child->device_type)
1920 continue;
1921
1922 drm_dbg_kms(&dev_priv->drm,
1923 "Found VBT child device with type 0x%x\n",
1924 child->device_type);
1925
1926 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
1927 if (!devdata)
1928 break;
1929
1930 /*
1931 * Copy as much as we know (sizeof) and is available
1932 * (child_dev_size) of the child device config. Accessing the
1933 * data must depend on VBT version.
1934 */
1935 memcpy(&devdata->child, child,
1936 min_t(size_t, defs->child_dev_size, sizeof(*child)));
1937
1938 list_add_tail(&devdata->node, &dev_priv->vbt.display_devices);
1939 }
1940
1941 if (list_empty(&dev_priv->vbt.display_devices))
1942 drm_dbg_kms(&dev_priv->drm,
1943 "no child dev is parsed from VBT\n");
1944}
1945
1946/* Common defaults which may be overridden by VBT. */
1947static void
1948init_vbt_defaults(struct drm_i915_private *dev_priv)
1949{
1950 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1951
1952 /* Default to having backlight */
1953 dev_priv->vbt.backlight.present = true;
1954
1955 /* LFP panel data */
1956 dev_priv->vbt.lvds_dither = 1;
1957
1958 /* SDVO panel data */
1959 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1960
1961 /* general features */
1962 dev_priv->vbt.int_tv_support = 1;
1963 dev_priv->vbt.int_crt_support = 1;
1964
1965 /* driver features */
1966 dev_priv->vbt.int_lvds_support = 1;
1967
1968 /* Default to using SSC */
1969 dev_priv->vbt.lvds_use_ssc = 1;
1970 /*
1971 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1972 * clock for LVDS.
1973 */
1974 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1975 !HAS_PCH_SPLIT(dev_priv));
1976 drm_dbg_kms(&dev_priv->drm, "Set default to SSC at %d kHz\n",
1977 dev_priv->vbt.lvds_ssc_freq);
1978}
1979
1980/* Defaults to initialize only if there is no VBT. */
1981static void
1982init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
1983{
1984 enum port port;
1985
1986 for_each_port(port) {
1987 struct ddi_vbt_port_info *info =
1988 &dev_priv->vbt.ddi_port_info[port];
1989 enum phy phy = intel_port_to_phy(dev_priv, port);
1990
1991 /*
1992 * VBT has the TypeC mode (native,TBT/USB) and we don't want
1993 * to detect it.
1994 */
1995 if (intel_phy_is_tc(dev_priv, phy))
1996 continue;
1997
1998 info->supports_dvi = (port != PORT_A && port != PORT_E);
1999 info->supports_hdmi = info->supports_dvi;
2000 info->supports_dp = (port != PORT_E);
2001 info->supports_edp = (port == PORT_A);
2002 }
2003}
2004
2005static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2006{
2007 const void *_vbt = vbt;
2008
2009 return _vbt + vbt->bdb_offset;
2010}
2011
2012/**
2013 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2014 * @buf: pointer to a buffer to validate
2015 * @size: size of the buffer
2016 *
2017 * Returns true on valid VBT.
2018 */
2019bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2020{
2021 const struct vbt_header *vbt = buf;
2022 const struct bdb_header *bdb;
2023
2024 if (!vbt)
2025 return false;
2026
2027 if (sizeof(struct vbt_header) > size) {
2028 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2029 return false;
2030 }
2031
2032 if (memcmp(vbt->signature, "$VBT", 4)) {
2033 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2034 return false;
2035 }
2036
2037 if (vbt->vbt_size > size) {
2038 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2039 return false;
2040 }
2041
2042 size = vbt->vbt_size;
2043
2044 if (range_overflows_t(size_t,
2045 vbt->bdb_offset,
2046 sizeof(struct bdb_header),
2047 size)) {
2048 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2049 return false;
2050 }
2051
2052 bdb = get_bdb_header(vbt);
2053 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2054 DRM_DEBUG_DRIVER("BDB incomplete\n");
2055 return false;
2056 }
2057
2058 return vbt;
2059}
2060
2061static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv)
2062{
2063 struct pci_dev *pdev = dev_priv->drm.pdev;
2064 void __iomem *p = NULL, *oprom;
2065 struct vbt_header *vbt;
2066 u16 vbt_size;
2067 size_t i, size;
2068
2069 oprom = pci_map_rom(pdev, &size);
2070 if (!oprom)
2071 return NULL;
2072
2073 /* Scour memory looking for the VBT signature. */
2074 for (i = 0; i + 4 < size; i += 4) {
2075 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2076 continue;
2077
2078 p = oprom + i;
2079 size -= i;
2080 break;
2081 }
2082
2083 if (!p)
2084 goto err_unmap_oprom;
2085
2086 if (sizeof(struct vbt_header) > size) {
2087 drm_dbg(&dev_priv->drm, "VBT header incomplete\n");
2088 goto err_unmap_oprom;
2089 }
2090
2091 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2092 if (vbt_size > size) {
2093 drm_dbg(&dev_priv->drm,
2094 "VBT incomplete (vbt_size overflows)\n");
2095 goto err_unmap_oprom;
2096 }
2097
2098 /* The rest will be validated by intel_bios_is_valid_vbt() */
2099 vbt = kmalloc(vbt_size, GFP_KERNEL);
2100 if (!vbt)
2101 goto err_unmap_oprom;
2102
2103 memcpy_fromio(vbt, p, vbt_size);
2104
2105 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2106 goto err_free_vbt;
2107
2108 pci_unmap_rom(pdev, oprom);
2109
2110 return vbt;
2111
2112err_free_vbt:
2113 kfree(vbt);
2114err_unmap_oprom:
2115 pci_unmap_rom(pdev, oprom);
2116
2117 return NULL;
2118}
2119
2120/**
2121 * intel_bios_init - find VBT and initialize settings from the BIOS
2122 * @dev_priv: i915 device instance
2123 *
2124 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2125 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2126 * initialize some defaults if the VBT is not present at all.
2127 */
2128void intel_bios_init(struct drm_i915_private *dev_priv)
2129{
2130 const struct vbt_header *vbt = dev_priv->opregion.vbt;
2131 struct vbt_header *oprom_vbt = NULL;
2132 const struct bdb_header *bdb;
2133
2134 INIT_LIST_HEAD(&dev_priv->vbt.display_devices);
2135
2136 if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) {
2137 drm_dbg_kms(&dev_priv->drm,
2138 "Skipping VBT init due to disabled display.\n");
2139 return;
2140 }
2141
2142 init_vbt_defaults(dev_priv);
2143
2144 /* If the OpRegion does not have VBT, look in PCI ROM. */
2145 if (!vbt) {
2146 oprom_vbt = oprom_get_vbt(dev_priv);
2147 if (!oprom_vbt)
2148 goto out;
2149
2150 vbt = oprom_vbt;
2151
2152 drm_dbg_kms(&dev_priv->drm, "Found valid VBT in PCI ROM\n");
2153 }
2154
2155 bdb = get_bdb_header(vbt);
2156
2157 drm_dbg_kms(&dev_priv->drm,
2158 "VBT signature \"%.*s\", BDB version %d\n",
2159 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2160
2161 /* Grab useful general definitions */
2162 parse_general_features(dev_priv, bdb);
2163 parse_general_definitions(dev_priv, bdb);
2164 parse_panel_options(dev_priv, bdb);
2165 parse_panel_dtd(dev_priv, bdb);
2166 parse_lfp_backlight(dev_priv, bdb);
2167 parse_sdvo_panel_data(dev_priv, bdb);
2168 parse_driver_features(dev_priv, bdb);
2169 parse_power_conservation_features(dev_priv, bdb);
2170 parse_edp(dev_priv, bdb);
2171 parse_psr(dev_priv, bdb);
2172 parse_mipi_config(dev_priv, bdb);
2173 parse_mipi_sequence(dev_priv, bdb);
2174
2175 /* Depends on child device list */
2176 parse_compression_parameters(dev_priv, bdb);
2177
2178 /* Further processing on pre-parsed data */
2179 parse_sdvo_device_mapping(dev_priv, bdb->version);
2180 parse_ddi_ports(dev_priv, bdb->version);
2181
2182out:
2183 if (!vbt) {
2184 drm_info(&dev_priv->drm,
2185 "Failed to find VBIOS tables (VBT)\n");
2186 init_vbt_missing_defaults(dev_priv);
2187 }
2188
2189 kfree(oprom_vbt);
2190}
2191
2192/**
2193 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2194 * @dev_priv: i915 device instance
2195 */
2196void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
2197{
2198 struct display_device_data *devdata, *n;
2199
2200 list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
2201 list_del(&devdata->node);
2202 kfree(devdata->dsc);
2203 kfree(devdata);
2204 }
2205
2206 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
2207 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
2208 kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
2209 dev_priv->vbt.lfp_lvds_vbt_mode = NULL;
2210 kfree(dev_priv->vbt.dsi.data);
2211 dev_priv->vbt.dsi.data = NULL;
2212 kfree(dev_priv->vbt.dsi.pps);
2213 dev_priv->vbt.dsi.pps = NULL;
2214 kfree(dev_priv->vbt.dsi.config);
2215 dev_priv->vbt.dsi.config = NULL;
2216 kfree(dev_priv->vbt.dsi.deassert_seq);
2217 dev_priv->vbt.dsi.deassert_seq = NULL;
2218}
2219
2220/**
2221 * intel_bios_is_tv_present - is integrated TV present in VBT
2222 * @dev_priv: i915 device instance
2223 *
2224 * Return true if TV is present. If no child devices were parsed from VBT,
2225 * assume TV is present.
2226 */
2227bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
2228{
2229 const struct display_device_data *devdata;
2230 const struct child_device_config *child;
2231
2232 if (!dev_priv->vbt.int_tv_support)
2233 return false;
2234
2235 if (list_empty(&dev_priv->vbt.display_devices))
2236 return true;
2237
2238 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2239 child = &devdata->child;
2240
2241 /*
2242 * If the device type is not TV, continue.
2243 */
2244 switch (child->device_type) {
2245 case DEVICE_TYPE_INT_TV:
2246 case DEVICE_TYPE_TV:
2247 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2248 break;
2249 default:
2250 continue;
2251 }
2252 /* Only when the addin_offset is non-zero, it is regarded
2253 * as present.
2254 */
2255 if (child->addin_offset)
2256 return true;
2257 }
2258
2259 return false;
2260}
2261
2262/**
2263 * intel_bios_is_lvds_present - is LVDS present in VBT
2264 * @dev_priv: i915 device instance
2265 * @i2c_pin: i2c pin for LVDS if present
2266 *
2267 * Return true if LVDS is present. If no child devices were parsed from VBT,
2268 * assume LVDS is present.
2269 */
2270bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
2271{
2272 const struct display_device_data *devdata;
2273 const struct child_device_config *child;
2274
2275 if (list_empty(&dev_priv->vbt.display_devices))
2276 return true;
2277
2278 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2279 child = &devdata->child;
2280
2281 /* If the device type is not LFP, continue.
2282 * We have to check both the new identifiers as well as the
2283 * old for compatibility with some BIOSes.
2284 */
2285 if (child->device_type != DEVICE_TYPE_INT_LFP &&
2286 child->device_type != DEVICE_TYPE_LFP)
2287 continue;
2288
2289 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
2290 *i2c_pin = child->i2c_pin;
2291
2292 /* However, we cannot trust the BIOS writers to populate
2293 * the VBT correctly. Since LVDS requires additional
2294 * information from AIM blocks, a non-zero addin offset is
2295 * a good indicator that the LVDS is actually present.
2296 */
2297 if (child->addin_offset)
2298 return true;
2299
2300 /* But even then some BIOS writers perform some black magic
2301 * and instantiate the device without reference to any
2302 * additional data. Trust that if the VBT was written into
2303 * the OpRegion then they have validated the LVDS's existence.
2304 */
2305 if (dev_priv->opregion.vbt)
2306 return true;
2307 }
2308
2309 return false;
2310}
2311
2312/**
2313 * intel_bios_is_port_present - is the specified digital port present
2314 * @dev_priv: i915 device instance
2315 * @port: port to check
2316 *
2317 * Return true if the device in %port is present.
2318 */
2319bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
2320{
2321 const struct display_device_data *devdata;
2322 const struct child_device_config *child;
2323 static const struct {
2324 u16 dp, hdmi;
2325 } port_mapping[] = {
2326 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2327 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2328 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2329 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2330 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2331 };
2332
2333 if (HAS_DDI(dev_priv)) {
2334 const struct ddi_vbt_port_info *port_info =
2335 &dev_priv->vbt.ddi_port_info[port];
2336
2337 return port_info->child;
2338 }
2339
2340 /* FIXME maybe deal with port A as well? */
2341 if (drm_WARN_ON(&dev_priv->drm,
2342 port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2343 return false;
2344
2345 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2346 child = &devdata->child;
2347
2348 if ((child->dvo_port == port_mapping[port].dp ||
2349 child->dvo_port == port_mapping[port].hdmi) &&
2350 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2351 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2352 return true;
2353 }
2354
2355 return false;
2356}
2357
2358/**
2359 * intel_bios_is_port_edp - is the device in given port eDP
2360 * @dev_priv: i915 device instance
2361 * @port: port to check
2362 *
2363 * Return true if the device in %port is eDP.
2364 */
2365bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
2366{
2367 const struct display_device_data *devdata;
2368 const struct child_device_config *child;
2369 static const short port_mapping[] = {
2370 [PORT_B] = DVO_PORT_DPB,
2371 [PORT_C] = DVO_PORT_DPC,
2372 [PORT_D] = DVO_PORT_DPD,
2373 [PORT_E] = DVO_PORT_DPE,
2374 [PORT_F] = DVO_PORT_DPF,
2375 };
2376
2377 if (HAS_DDI(dev_priv))
2378 return dev_priv->vbt.ddi_port_info[port].supports_edp;
2379
2380 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2381 child = &devdata->child;
2382
2383 if (child->dvo_port == port_mapping[port] &&
2384 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2385 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2386 return true;
2387 }
2388
2389 return false;
2390}
2391
2392static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2393 enum port port)
2394{
2395 static const struct {
2396 u16 dp, hdmi;
2397 } port_mapping[] = {
2398 /*
2399 * Buggy VBTs may declare DP ports as having
2400 * HDMI type dvo_port :( So let's check both.
2401 */
2402 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2403 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2404 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2405 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2406 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2407 };
2408
2409 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2410 return false;
2411
2412 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2413 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2414 return false;
2415
2416 if (child->dvo_port == port_mapping[port].dp)
2417 return true;
2418
2419 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2420 if (child->dvo_port == port_mapping[port].hdmi &&
2421 child->aux_channel != 0)
2422 return true;
2423
2424 return false;
2425}
2426
2427bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
2428 enum port port)
2429{
2430 const struct display_device_data *devdata;
2431
2432 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2433 if (child_dev_is_dp_dual_mode(&devdata->child, port))
2434 return true;
2435 }
2436
2437 return false;
2438}
2439
2440/**
2441 * intel_bios_is_dsi_present - is DSI present in VBT
2442 * @dev_priv: i915 device instance
2443 * @port: port for DSI if present
2444 *
2445 * Return true if DSI is present, and return the port in %port.
2446 */
2447bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
2448 enum port *port)
2449{
2450 const struct display_device_data *devdata;
2451 const struct child_device_config *child;
2452 u8 dvo_port;
2453
2454 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2455 child = &devdata->child;
2456
2457 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2458 continue;
2459
2460 dvo_port = child->dvo_port;
2461
2462 if (dvo_port == DVO_PORT_MIPIA ||
2463 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) ||
2464 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) {
2465 if (port)
2466 *port = dvo_port - DVO_PORT_MIPIA;
2467 return true;
2468 } else if (dvo_port == DVO_PORT_MIPIB ||
2469 dvo_port == DVO_PORT_MIPIC ||
2470 dvo_port == DVO_PORT_MIPID) {
2471 drm_dbg_kms(&dev_priv->drm,
2472 "VBT has unsupported DSI port %c\n",
2473 port_name(dvo_port - DVO_PORT_MIPIA));
2474 }
2475 }
2476
2477 return false;
2478}
2479
2480static void fill_dsc(struct intel_crtc_state *crtc_state,
2481 struct dsc_compression_parameters_entry *dsc,
2482 int dsc_max_bpc)
2483{
2484 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2485 int bpc = 8;
2486
2487 vdsc_cfg->dsc_version_major = dsc->version_major;
2488 vdsc_cfg->dsc_version_minor = dsc->version_minor;
2489
2490 if (dsc->support_12bpc && dsc_max_bpc >= 12)
2491 bpc = 12;
2492 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2493 bpc = 10;
2494 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2495 bpc = 8;
2496 else
2497 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2498 dsc_max_bpc);
2499
2500 crtc_state->pipe_bpp = bpc * 3;
2501
2502 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2503 VBT_DSC_MAX_BPP(dsc->max_bpp));
2504
2505 /*
2506 * FIXME: This is ugly, and slice count should take DSC engine
2507 * throughput etc. into account.
2508 *
2509 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2510 */
2511 if (dsc->slices_per_line & BIT(2)) {
2512 crtc_state->dsc.slice_count = 4;
2513 } else if (dsc->slices_per_line & BIT(1)) {
2514 crtc_state->dsc.slice_count = 2;
2515 } else {
2516 /* FIXME */
2517 if (!(dsc->slices_per_line & BIT(0)))
2518 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2519
2520 crtc_state->dsc.slice_count = 1;
2521 }
2522
2523 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2524 crtc_state->dsc.slice_count != 0)
2525 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2526 crtc_state->hw.adjusted_mode.crtc_hdisplay,
2527 crtc_state->dsc.slice_count);
2528
2529 /*
2530 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the
2531 * implementation specific physical rate buffer size. Currently we use
2532 * the required rate buffer model size calculated in
2533 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E.
2534 *
2535 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2536 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC
2537 * implementation should also use the DPCD (or perhaps VBT for eDP)
2538 * provided value for the buffer size.
2539 */
2540
2541 /* FIXME: DSI spec says bpc + 1 for this one */
2542 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2543
2544 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2545
2546 vdsc_cfg->slice_height = dsc->slice_height;
2547}
2548
2549/* FIXME: initially DSI specific */
2550bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2551 struct intel_crtc_state *crtc_state,
2552 int dsc_max_bpc)
2553{
2554 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2555 const struct display_device_data *devdata;
2556 const struct child_device_config *child;
2557
2558 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2559 child = &devdata->child;
2560
2561 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2562 continue;
2563
2564 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2565 if (!devdata->dsc)
2566 return false;
2567
2568 if (crtc_state)
2569 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2570
2571 return true;
2572 }
2573 }
2574
2575 return false;
2576}
2577
2578/**
2579 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2580 * @i915: i915 device instance
2581 * @port: port to check
2582 *
2583 * Return true if HPD should be inverted for %port.
2584 */
2585bool
2586intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2587 enum port port)
2588{
2589 const struct child_device_config *child =
2590 i915->vbt.ddi_port_info[port].child;
2591
2592 if (drm_WARN_ON_ONCE(&i915->drm, !IS_GEN9_LP(i915)))
2593 return false;
2594
2595 return child && child->hpd_invert;
2596}
2597
2598/**
2599 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2600 * @i915: i915 device instance
2601 * @port: port to check
2602 *
2603 * Return true if LSPCON is present on this port
2604 */
2605bool
2606intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2607 enum port port)
2608{
2609 const struct child_device_config *child =
2610 i915->vbt.ddi_port_info[port].child;
2611
2612 return HAS_LSPCON(i915) && child && child->lspcon;
2613}
2614
2615enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
2616 enum port port)
2617{
2618 const struct ddi_vbt_port_info *info =
2619 &dev_priv->vbt.ddi_port_info[port];
2620 enum aux_ch aux_ch;
2621
2622 if (!info->alternate_aux_channel) {
2623 aux_ch = (enum aux_ch)port;
2624
2625 drm_dbg_kms(&dev_priv->drm,
2626 "using AUX %c for port %c (platform default)\n",
2627 aux_ch_name(aux_ch), port_name(port));
2628 return aux_ch;
2629 }
2630
2631 switch (info->alternate_aux_channel) {
2632 case DP_AUX_A:
2633 aux_ch = AUX_CH_A;
2634 break;
2635 case DP_AUX_B:
2636 aux_ch = AUX_CH_B;
2637 break;
2638 case DP_AUX_C:
2639 aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_D : AUX_CH_C;
2640 break;
2641 case DP_AUX_D:
2642 aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_E : AUX_CH_D;
2643 break;
2644 case DP_AUX_E:
2645 aux_ch = AUX_CH_E;
2646 break;
2647 case DP_AUX_F:
2648 aux_ch = AUX_CH_F;
2649 break;
2650 case DP_AUX_G:
2651 aux_ch = AUX_CH_G;
2652 break;
2653 default:
2654 MISSING_CASE(info->alternate_aux_channel);
2655 aux_ch = AUX_CH_A;
2656 break;
2657 }
2658
2659 drm_dbg_kms(&dev_priv->drm, "using AUX %c for port %c (VBT)\n",
2660 aux_ch_name(aux_ch), port_name(port));
2661
2662 return aux_ch;
2663}
2664
2665int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
2666{
2667 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2668
2669 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
2670}
2671
2672int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
2673{
2674 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2675 const struct ddi_vbt_port_info *info =
2676 &i915->vbt.ddi_port_info[encoder->port];
2677
2678 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
2679}
2680
2681int intel_bios_dp_boost_level(struct intel_encoder *encoder)
2682{
2683 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2684
2685 return i915->vbt.ddi_port_info[encoder->port].dp_boost_level;
2686}
2687
2688int intel_bios_hdmi_boost_level(struct intel_encoder *encoder)
2689{
2690 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2691
2692 return i915->vbt.ddi_port_info[encoder->port].hdmi_boost_level;
2693}
2694
2695int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
2696{
2697 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2698
2699 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
2700}
2701
2702int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
2703{
2704 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2705
2706 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
2707}
2708
2709bool intel_bios_port_supports_dvi(struct drm_i915_private *i915, enum port port)
2710{
2711 return i915->vbt.ddi_port_info[port].supports_dvi;
2712}
2713
2714bool intel_bios_port_supports_hdmi(struct drm_i915_private *i915, enum port port)
2715{
2716 return i915->vbt.ddi_port_info[port].supports_hdmi;
2717}
2718
2719bool intel_bios_port_supports_dp(struct drm_i915_private *i915, enum port port)
2720{
2721 return i915->vbt.ddi_port_info[port].supports_dp;
2722}
2723
2724bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915,
2725 enum port port)
2726{
2727 return i915->vbt.ddi_port_info[port].supports_typec_usb;
2728}
2729
2730bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port)
2731{
2732 return i915->vbt.ddi_port_info[port].supports_tbt;
2733}