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1# SPDX-License-Identifier: GPL-2.0
2#
3# Makefile for the drm device driver. This driver provides support for the
4# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
5
6# Enable W=1 warnings not enabled in drm subsystem Makefile
7subdir-ccflags-y += $(call cc-option, -Wformat-truncation)
8
9# Enable -Werror in CI and development
10subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
11
12# Support compiling the display code separately for both i915 and xe
13# drivers. Define I915 when building i915.
14subdir-ccflags-y += -DI915
15
16subdir-ccflags-y += -I$(src)
17
18# Please keep these build lists sorted!
19
20# core driver code
21i915-y += \
22 i915_config.o \
23 i915_driver.o \
24 i915_drm_client.o \
25 i915_getparam.o \
26 i915_ioctl.o \
27 i915_irq.o \
28 i915_mitigations.o \
29 i915_module.o \
30 i915_params.o \
31 i915_pci.o \
32 i915_scatterlist.o \
33 i915_suspend.o \
34 i915_switcheroo.o \
35 i915_sysfs.o \
36 i915_utils.o \
37 intel_clock_gating.o \
38 intel_device_info.o \
39 intel_memory_region.o \
40 intel_pcode.o \
41 intel_region_ttm.o \
42 intel_runtime_pm.o \
43 intel_sbi.o \
44 intel_step.o \
45 intel_uncore.o \
46 intel_wakeref.o \
47 vlv_sideband.o \
48 vlv_suspend.o
49
50# core peripheral code
51i915-y += \
52 soc/intel_dram.o \
53 soc/intel_gmch.o \
54 soc/intel_pch.o \
55 soc/intel_rom.o
56
57# core library code
58i915-y += \
59 i915_memcpy.o \
60 i915_mm.o \
61 i915_sw_fence.o \
62 i915_sw_fence_work.o \
63 i915_syncmap.o \
64 i915_user_extensions.o
65
66i915-$(CONFIG_COMPAT) += \
67 i915_ioc32.o
68i915-$(CONFIG_DEBUG_FS) += \
69 i915_debugfs.o \
70 i915_debugfs_params.o
71i915-$(CONFIG_PERF_EVENTS) += \
72 i915_pmu.o
73
74# "Graphics Technology" (aka we talk to the gpu)
75gt-y += \
76 gt/gen2_engine_cs.o \
77 gt/gen6_engine_cs.o \
78 gt/gen6_ppgtt.o \
79 gt/gen7_renderclear.o \
80 gt/gen8_engine_cs.o \
81 gt/gen8_ppgtt.o \
82 gt/intel_breadcrumbs.o \
83 gt/intel_context.o \
84 gt/intel_context_sseu.o \
85 gt/intel_engine_cs.o \
86 gt/intel_engine_heartbeat.o \
87 gt/intel_engine_pm.o \
88 gt/intel_engine_user.o \
89 gt/intel_execlists_submission.o \
90 gt/intel_ggtt.o \
91 gt/intel_ggtt_fencing.o \
92 gt/intel_gt.o \
93 gt/intel_gt_buffer_pool.o \
94 gt/intel_gt_ccs_mode.o \
95 gt/intel_gt_clock_utils.o \
96 gt/intel_gt_debugfs.o \
97 gt/intel_gt_engines_debugfs.o \
98 gt/intel_gt_irq.o \
99 gt/intel_gt_mcr.o \
100 gt/intel_gt_pm.o \
101 gt/intel_gt_pm_debugfs.o \
102 gt/intel_gt_pm_irq.o \
103 gt/intel_gt_requests.o \
104 gt/intel_gt_sysfs.o \
105 gt/intel_gt_sysfs_pm.o \
106 gt/intel_gtt.o \
107 gt/intel_llc.o \
108 gt/intel_lrc.o \
109 gt/intel_migrate.o \
110 gt/intel_mocs.o \
111 gt/intel_ppgtt.o \
112 gt/intel_rc6.o \
113 gt/intel_region_lmem.o \
114 gt/intel_renderstate.o \
115 gt/intel_reset.o \
116 gt/intel_ring.o \
117 gt/intel_ring_submission.o \
118 gt/intel_rps.o \
119 gt/intel_sa_media.o \
120 gt/intel_sseu.o \
121 gt/intel_sseu_debugfs.o \
122 gt/intel_timeline.o \
123 gt/intel_tlb.o \
124 gt/intel_wopcm.o \
125 gt/intel_workarounds.o \
126 gt/shmem_utils.o \
127 gt/sysfs_engines.o
128
129# x86 intel-gtt module support
130gt-$(CONFIG_X86) += \
131 gt/intel_ggtt_gmch.o
132# autogenerated null render state
133gt-y += \
134 gt/gen6_renderstate.o \
135 gt/gen7_renderstate.o \
136 gt/gen8_renderstate.o \
137 gt/gen9_renderstate.o
138i915-y += $(gt-y)
139
140# GEM (Graphics Execution Management) code
141gem-y += \
142 gem/i915_gem_busy.o \
143 gem/i915_gem_clflush.o \
144 gem/i915_gem_context.o \
145 gem/i915_gem_create.o \
146 gem/i915_gem_dmabuf.o \
147 gem/i915_gem_domain.o \
148 gem/i915_gem_execbuffer.o \
149 gem/i915_gem_internal.o \
150 gem/i915_gem_lmem.o \
151 gem/i915_gem_mman.o \
152 gem/i915_gem_object.o \
153 gem/i915_gem_pages.o \
154 gem/i915_gem_phys.o \
155 gem/i915_gem_pm.o \
156 gem/i915_gem_region.o \
157 gem/i915_gem_shmem.o \
158 gem/i915_gem_shrinker.o \
159 gem/i915_gem_stolen.o \
160 gem/i915_gem_throttle.o \
161 gem/i915_gem_tiling.o \
162 gem/i915_gem_ttm.o \
163 gem/i915_gem_ttm_move.o \
164 gem/i915_gem_ttm_pm.o \
165 gem/i915_gem_userptr.o \
166 gem/i915_gem_wait.o \
167 gem/i915_gemfs.o
168i915-y += \
169 $(gem-y) \
170 i915_active.o \
171 i915_cmd_parser.o \
172 i915_deps.o \
173 i915_gem.o \
174 i915_gem_evict.o \
175 i915_gem_gtt.o \
176 i915_gem_ww.o \
177 i915_query.o \
178 i915_request.o \
179 i915_scheduler.o \
180 i915_trace_points.o \
181 i915_ttm_buddy_manager.o \
182 i915_vma.o \
183 i915_vma_resource.o
184
185# general-purpose microcontroller (GuC) support
186i915-y += \
187 gt/uc/intel_gsc_fw.o \
188 gt/uc/intel_gsc_proxy.o \
189 gt/uc/intel_gsc_uc.o \
190 gt/uc/intel_gsc_uc_debugfs.o \
191 gt/uc/intel_gsc_uc_heci_cmd_submit.o\
192 gt/uc/intel_guc.o \
193 gt/uc/intel_guc_ads.o \
194 gt/uc/intel_guc_capture.o \
195 gt/uc/intel_guc_ct.o \
196 gt/uc/intel_guc_debugfs.o \
197 gt/uc/intel_guc_fw.o \
198 gt/uc/intel_guc_hwconfig.o \
199 gt/uc/intel_guc_log.o \
200 gt/uc/intel_guc_log_debugfs.o \
201 gt/uc/intel_guc_rc.o \
202 gt/uc/intel_guc_slpc.o \
203 gt/uc/intel_guc_submission.o \
204 gt/uc/intel_huc.o \
205 gt/uc/intel_huc_debugfs.o \
206 gt/uc/intel_huc_fw.o \
207 gt/uc/intel_uc.o \
208 gt/uc/intel_uc_debugfs.o \
209 gt/uc/intel_uc_fw.o
210
211# graphics system controller (GSC) support
212i915-y += \
213 gt/intel_gsc.o
214
215# graphics hardware monitoring (HWMON) support
216i915-$(CONFIG_HWMON) += \
217 i915_hwmon.o
218
219# modesetting core code
220i915-y += \
221 display/hsw_ips.o \
222 display/i9xx_plane.o \
223 display/i9xx_wm.o \
224 display/intel_alpm.o \
225 display/intel_atomic.o \
226 display/intel_atomic_plane.o \
227 display/intel_audio.o \
228 display/intel_bios.o \
229 display/intel_bo.o \
230 display/intel_bw.o \
231 display/intel_cdclk.o \
232 display/intel_color.o \
233 display/intel_combo_phy.o \
234 display/intel_connector.o \
235 display/intel_crtc.o \
236 display/intel_crtc_state_dump.o \
237 display/intel_cursor.o \
238 display/intel_display.o \
239 display/intel_display_driver.o \
240 display/intel_display_irq.o \
241 display/intel_display_params.o \
242 display/intel_display_power.o \
243 display/intel_display_power_map.o \
244 display/intel_display_power_well.o \
245 display/intel_display_reset.o \
246 display/intel_display_rps.o \
247 display/intel_display_snapshot.o \
248 display/intel_display_wa.o \
249 display/intel_dmc.o \
250 display/intel_dmc_wl.o \
251 display/intel_dpio_phy.o \
252 display/intel_dpll.o \
253 display/intel_dpll_mgr.o \
254 display/intel_dpt.o \
255 display/intel_dpt_common.o \
256 display/intel_drrs.o \
257 display/intel_dsb.o \
258 display/intel_dsb_buffer.o \
259 display/intel_fb.o \
260 display/intel_fb_bo.o \
261 display/intel_fb_pin.o \
262 display/intel_fbc.o \
263 display/intel_fdi.o \
264 display/intel_fifo_underrun.o \
265 display/intel_frontbuffer.o \
266 display/intel_global_state.o \
267 display/intel_hdcp.o \
268 display/intel_hdcp_gsc.o \
269 display/intel_hdcp_gsc_message.o \
270 display/intel_hotplug.o \
271 display/intel_hotplug_irq.o \
272 display/intel_hti.o \
273 display/intel_link_bw.o \
274 display/intel_load_detect.o \
275 display/intel_lpe_audio.o \
276 display/intel_modeset_lock.o \
277 display/intel_modeset_setup.o \
278 display/intel_modeset_verify.o \
279 display/intel_overlay.o \
280 display/intel_pch_display.o \
281 display/intel_pch_refclk.o \
282 display/intel_plane_initial.o \
283 display/intel_pmdemand.o \
284 display/intel_psr.o \
285 display/intel_quirks.o \
286 display/intel_sprite.o \
287 display/intel_sprite_uapi.o \
288 display/intel_tc.o \
289 display/intel_vblank.o \
290 display/intel_vga.o \
291 display/intel_wm.o \
292 display/skl_scaler.o \
293 display/skl_universal_plane.o \
294 display/skl_watermark.o
295i915-$(CONFIG_ACPI) += \
296 display/intel_acpi.o \
297 display/intel_opregion.o
298i915-$(CONFIG_DRM_FBDEV_EMULATION) += \
299 display/intel_fbdev.o \
300 display/intel_fbdev_fb.o
301i915-$(CONFIG_DEBUG_FS) += \
302 display/intel_display_debugfs.o \
303 display/intel_display_debugfs_params.o \
304 display/intel_pipe_crc.o
305
306# modesetting output/encoder code
307i915-y += \
308 display/dvo_ch7017.o \
309 display/dvo_ch7xxx.o \
310 display/dvo_ivch.o \
311 display/dvo_ns2501.o \
312 display/dvo_sil164.o \
313 display/dvo_tfp410.o \
314 display/g4x_dp.o \
315 display/g4x_hdmi.o \
316 display/icl_dsi.o \
317 display/intel_backlight.o \
318 display/intel_crt.o \
319 display/intel_cx0_phy.o \
320 display/intel_ddi.o \
321 display/intel_ddi_buf_trans.o \
322 display/intel_display_device.o \
323 display/intel_display_trace.o \
324 display/intel_dkl_phy.o \
325 display/intel_dp.o \
326 display/intel_dp_aux.o \
327 display/intel_dp_aux_backlight.o \
328 display/intel_dp_hdcp.o \
329 display/intel_dp_link_training.o \
330 display/intel_dp_mst.o \
331 display/intel_dp_test.o \
332 display/intel_dsi.o \
333 display/intel_dsi_dcs_backlight.o \
334 display/intel_dsi_vbt.o \
335 display/intel_dvo.o \
336 display/intel_encoder.o \
337 display/intel_gmbus.o \
338 display/intel_hdmi.o \
339 display/intel_lspcon.o \
340 display/intel_lvds.o \
341 display/intel_panel.o \
342 display/intel_pfit.o \
343 display/intel_pps.o \
344 display/intel_qp_tables.o \
345 display/intel_sdvo.o \
346 display/intel_snps_phy.o \
347 display/intel_tv.o \
348 display/intel_vdsc.o \
349 display/intel_vrr.o \
350 display/vlv_dsi.o \
351 display/vlv_dsi_pll.o
352
353i915-$(CONFIG_DRM_I915_DP_TUNNEL) += \
354 display/intel_dp_tunnel.o
355
356i915-y += \
357 i915_perf.o
358
359# Protected execution platform (PXP) support. Base support is required for HuC
360i915-y += \
361 pxp/intel_pxp.o \
362 pxp/intel_pxp_huc.o \
363 pxp/intel_pxp_tee.o
364
365i915-$(CONFIG_DRM_I915_PXP) += \
366 pxp/intel_pxp_cmd.o \
367 pxp/intel_pxp_debugfs.o \
368 pxp/intel_pxp_gsccs.o \
369 pxp/intel_pxp_irq.o \
370 pxp/intel_pxp_pm.o \
371 pxp/intel_pxp_session.o
372
373# Post-mortem debug and GPU hang state capture
374i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += \
375 i915_gpu_error.o
376i915-$(CONFIG_DRM_I915_SELFTEST) += \
377 gem/selftests/i915_gem_client_blt.o \
378 gem/selftests/igt_gem_utils.o \
379 selftests/i915_random.o \
380 selftests/i915_selftest.o \
381 selftests/igt_atomic.o \
382 selftests/igt_flush_test.o \
383 selftests/igt_live_test.o \
384 selftests/igt_mmap.o \
385 selftests/igt_reset.o \
386 selftests/igt_spinner.o \
387 selftests/intel_scheduler_helpers.o \
388 selftests/librapl.o
389
390# virtual gpu code
391i915-y += \
392 i915_vgpu.o
393
394i915-$(CONFIG_DRM_I915_GVT) += \
395 intel_gvt.o \
396 intel_gvt_mmio_table.o
397include $(src)/gvt/Makefile
398
399obj-$(CONFIG_DRM_I915) += i915.o
400obj-$(CONFIG_DRM_I915_GVT_KVMGT) += kvmgt.o
401
402# kernel-doc test
403#
404# Enable locally for CONFIG_DRM_I915_WERROR=y. See also scripts/Makefile.build
405ifdef CONFIG_DRM_I915_WERROR
406 cmd_checkdoc = $(srctree)/scripts/kernel-doc -none -Werror $<
407endif
408
409# header test
410
411# exclude some broken headers from the test coverage
412no-header-test := \
413 display/intel_vbt_defs.h
414
415always-$(CONFIG_DRM_I915_WERROR) += \
416 $(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \
417 $(shell cd $(src) && find * -name '*.h')))
418
419quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@)
420 cmd_hdrtest = $(CC) $(filter-out $(CFLAGS_GCOV), $(c_flags)) -S -o /dev/null -x c /dev/null -include $<; \
421 $(srctree)/scripts/kernel-doc -none -Werror $<; touch $@
422
423$(obj)/%.hdrtest: $(src)/%.h FORCE
424 $(call if_changed_dep,hdrtest)
1# SPDX-License-Identifier: GPL-2.0
2#
3# Makefile for the drm device driver. This driver provides support for the
4# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
5
6# Add a set of useful warning flags and enable -Werror for CI to prevent
7# trivial mistakes from creeping in. We have to do this piecemeal as we reject
8# any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we
9# need to filter out dubious warnings. Still it is our interest
10# to keep running locally with W=1 C=1 until we are completely clean.
11#
12# Note the danger in using -Wall -Wextra is that when CI updates gcc we
13# will most likely get a sudden build breakage... Hopefully we will fix
14# new warnings before CI updates!
15subdir-ccflags-y := -Wall -Wextra
16subdir-ccflags-y += $(call cc-disable-warning, unused-parameter)
17subdir-ccflags-y += $(call cc-disable-warning, type-limits)
18subdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers)
19subdir-ccflags-y += $(call cc-disable-warning, unused-but-set-variable)
20# clang warnings
21subdir-ccflags-y += $(call cc-disable-warning, sign-compare)
22subdir-ccflags-y += $(call cc-disable-warning, sometimes-uninitialized)
23subdir-ccflags-y += $(call cc-disable-warning, initializer-overrides)
24subdir-ccflags-y += $(call cc-disable-warning, uninitialized)
25subdir-ccflags-y += $(call cc-disable-warning, frame-address)
26subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
27
28# Fine grained warnings disable
29CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init)
30CFLAGS_display/intel_fbdev.o = $(call cc-disable-warning, override-init)
31
32subdir-ccflags-y += -I$(srctree)/$(src)
33
34# Please keep these build lists sorted!
35
36# core driver code
37i915-y += i915_drv.o \
38 i915_config.o \
39 i915_irq.o \
40 i915_getparam.o \
41 i915_params.o \
42 i915_pci.o \
43 i915_scatterlist.o \
44 i915_suspend.o \
45 i915_switcheroo.o \
46 i915_sysfs.o \
47 i915_utils.o \
48 intel_device_info.o \
49 intel_dram.o \
50 intel_memory_region.o \
51 intel_pch.o \
52 intel_pm.o \
53 intel_runtime_pm.o \
54 intel_sideband.o \
55 intel_uncore.o \
56 intel_wakeref.o \
57 vlv_suspend.o
58
59# core library code
60i915-y += \
61 i915_memcpy.o \
62 i915_mm.o \
63 i915_sw_fence.o \
64 i915_sw_fence_work.o \
65 i915_syncmap.o \
66 i915_user_extensions.o
67
68i915-$(CONFIG_COMPAT) += i915_ioc32.o
69i915-$(CONFIG_DEBUG_FS) += \
70 i915_debugfs.o \
71 i915_debugfs_params.o \
72 display/intel_display_debugfs.o \
73 display/intel_pipe_crc.o
74i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
75
76# "Graphics Technology" (aka we talk to the gpu)
77gt-y += \
78 gt/debugfs_engines.o \
79 gt/debugfs_gt.o \
80 gt/debugfs_gt_pm.o \
81 gt/gen2_engine_cs.o \
82 gt/gen6_engine_cs.o \
83 gt/gen6_ppgtt.o \
84 gt/gen7_renderclear.o \
85 gt/gen8_ppgtt.o \
86 gt/intel_breadcrumbs.o \
87 gt/intel_context.o \
88 gt/intel_context_param.o \
89 gt/intel_context_sseu.o \
90 gt/intel_engine_cs.o \
91 gt/intel_engine_heartbeat.o \
92 gt/intel_engine_pm.o \
93 gt/intel_engine_user.o \
94 gt/intel_ggtt.o \
95 gt/intel_ggtt_fencing.o \
96 gt/intel_gt.o \
97 gt/intel_gt_buffer_pool.o \
98 gt/intel_gt_clock_utils.o \
99 gt/intel_gt_irq.o \
100 gt/intel_gt_pm.o \
101 gt/intel_gt_pm_irq.o \
102 gt/intel_gt_requests.o \
103 gt/intel_gtt.o \
104 gt/intel_llc.o \
105 gt/intel_lrc.o \
106 gt/intel_mocs.o \
107 gt/intel_ppgtt.o \
108 gt/intel_rc6.o \
109 gt/intel_renderstate.o \
110 gt/intel_reset.o \
111 gt/intel_ring.o \
112 gt/intel_ring_submission.o \
113 gt/intel_rps.o \
114 gt/intel_sseu.o \
115 gt/intel_sseu_debugfs.o \
116 gt/intel_timeline.o \
117 gt/intel_workarounds.o \
118 gt/shmem_utils.o \
119 gt/sysfs_engines.o
120# autogenerated null render state
121gt-y += \
122 gt/gen6_renderstate.o \
123 gt/gen7_renderstate.o \
124 gt/gen8_renderstate.o \
125 gt/gen9_renderstate.o
126i915-y += $(gt-y)
127
128# GEM (Graphics Execution Management) code
129gem-y += \
130 gem/i915_gem_busy.o \
131 gem/i915_gem_clflush.o \
132 gem/i915_gem_client_blt.o \
133 gem/i915_gem_context.o \
134 gem/i915_gem_dmabuf.o \
135 gem/i915_gem_domain.o \
136 gem/i915_gem_execbuffer.o \
137 gem/i915_gem_fence.o \
138 gem/i915_gem_internal.o \
139 gem/i915_gem_object.o \
140 gem/i915_gem_object_blt.o \
141 gem/i915_gem_lmem.o \
142 gem/i915_gem_mman.o \
143 gem/i915_gem_pages.o \
144 gem/i915_gem_phys.o \
145 gem/i915_gem_pm.o \
146 gem/i915_gem_region.o \
147 gem/i915_gem_shmem.o \
148 gem/i915_gem_shrinker.o \
149 gem/i915_gem_stolen.o \
150 gem/i915_gem_throttle.o \
151 gem/i915_gem_tiling.o \
152 gem/i915_gem_userptr.o \
153 gem/i915_gem_wait.o \
154 gem/i915_gemfs.o
155i915-y += \
156 $(gem-y) \
157 i915_active.o \
158 i915_buddy.o \
159 i915_cmd_parser.o \
160 i915_gem_evict.o \
161 i915_gem_gtt.o \
162 i915_gem.o \
163 i915_globals.o \
164 i915_query.o \
165 i915_request.o \
166 i915_scheduler.o \
167 i915_trace_points.o \
168 i915_vma.o \
169 intel_region_lmem.o \
170 intel_wopcm.o
171
172# general-purpose microcontroller (GuC) support
173i915-y += gt/uc/intel_uc.o \
174 gt/uc/intel_uc_debugfs.o \
175 gt/uc/intel_uc_fw.o \
176 gt/uc/intel_guc.o \
177 gt/uc/intel_guc_ads.o \
178 gt/uc/intel_guc_ct.o \
179 gt/uc/intel_guc_debugfs.o \
180 gt/uc/intel_guc_fw.o \
181 gt/uc/intel_guc_log.o \
182 gt/uc/intel_guc_log_debugfs.o \
183 gt/uc/intel_guc_submission.o \
184 gt/uc/intel_huc.o \
185 gt/uc/intel_huc_debugfs.o \
186 gt/uc/intel_huc_fw.o
187
188# modesetting core code
189i915-y += \
190 display/intel_atomic.o \
191 display/intel_atomic_plane.o \
192 display/intel_audio.o \
193 display/intel_bios.o \
194 display/intel_bw.o \
195 display/intel_cdclk.o \
196 display/intel_color.o \
197 display/intel_combo_phy.o \
198 display/intel_connector.o \
199 display/intel_csr.o \
200 display/intel_display.o \
201 display/intel_display_power.o \
202 display/intel_dpio_phy.o \
203 display/intel_dpll_mgr.o \
204 display/intel_dsb.o \
205 display/intel_fbc.o \
206 display/intel_fifo_underrun.o \
207 display/intel_frontbuffer.o \
208 display/intel_global_state.o \
209 display/intel_hdcp.o \
210 display/intel_hotplug.o \
211 display/intel_lpe_audio.o \
212 display/intel_overlay.o \
213 display/intel_psr.o \
214 display/intel_quirks.o \
215 display/intel_sprite.o \
216 display/intel_tc.o \
217 display/intel_vga.o
218i915-$(CONFIG_ACPI) += \
219 display/intel_acpi.o \
220 display/intel_opregion.o
221i915-$(CONFIG_DRM_FBDEV_EMULATION) += \
222 display/intel_fbdev.o
223
224# modesetting output/encoder code
225i915-y += \
226 display/dvo_ch7017.o \
227 display/dvo_ch7xxx.o \
228 display/dvo_ivch.o \
229 display/dvo_ns2501.o \
230 display/dvo_sil164.o \
231 display/dvo_tfp410.o \
232 display/icl_dsi.o \
233 display/intel_crt.o \
234 display/intel_ddi.o \
235 display/intel_dp.o \
236 display/intel_dp_aux_backlight.o \
237 display/intel_dp_link_training.o \
238 display/intel_dp_mst.o \
239 display/intel_dsi.o \
240 display/intel_dsi_dcs_backlight.o \
241 display/intel_dsi_vbt.o \
242 display/intel_dvo.o \
243 display/intel_gmbus.o \
244 display/intel_hdmi.o \
245 display/intel_lspcon.o \
246 display/intel_lvds.o \
247 display/intel_panel.o \
248 display/intel_sdvo.o \
249 display/intel_tv.o \
250 display/intel_vdsc.o \
251 display/vlv_dsi.o \
252 display/vlv_dsi_pll.o
253
254i915-y += i915_perf.o
255
256# Post-mortem debug and GPU hang state capture
257i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
258i915-$(CONFIG_DRM_I915_SELFTEST) += \
259 gem/selftests/igt_gem_utils.o \
260 selftests/i915_random.o \
261 selftests/i915_selftest.o \
262 selftests/igt_atomic.o \
263 selftests/igt_flush_test.o \
264 selftests/igt_live_test.o \
265 selftests/igt_mmap.o \
266 selftests/igt_reset.o \
267 selftests/igt_spinner.o \
268 selftests/librapl.o
269
270# virtual gpu code
271i915-y += i915_vgpu.o
272
273ifeq ($(CONFIG_DRM_I915_GVT),y)
274i915-y += intel_gvt.o
275include $(src)/gvt/Makefile
276endif
277
278obj-$(CONFIG_DRM_I915) += i915.o
279obj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o
280
281# header test
282
283# exclude some broken headers from the test coverage
284no-header-test := \
285 display/intel_vbt_defs.h \
286 gvt/execlist.h \
287 gvt/fb_decoder.h \
288 gvt/gtt.h \
289 gvt/gvt.h \
290 gvt/interrupt.h \
291 gvt/mmio_context.h \
292 gvt/mpt.h \
293 gvt/scheduler.h
294
295extra-$(CONFIG_DRM_I915_WERROR) += \
296 $(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \
297 $(shell cd $(srctree)/$(src) && find * -name '*.h')))
298
299quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@)
300 cmd_hdrtest = $(CC) $(filter-out $(CFLAGS_GCOV), $(c_flags)) -S -o /dev/null -x c /dev/null -include $<; touch $@
301
302$(obj)/%.hdrtest: $(src)/%.h FORCE
303 $(call if_changed_dep,hdrtest)