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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2018 Renesas Electronics
4 *
5 * Copyright (C) 2016 Atmel
6 * Bo Shen <voice.shen@atmel.com>
7 *
8 * Authors: Bo Shen <voice.shen@atmel.com>
9 * Boris Brezillon <boris.brezillon@free-electrons.com>
10 * Wu, Songjun <Songjun.Wu@atmel.com>
11 *
12 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
13 */
14
15#include <linux/gpio/consumer.h>
16#include <linux/i2c-mux.h>
17#include <linux/i2c.h>
18#include <linux/media-bus-format.h>
19#include <linux/module.h>
20#include <linux/regmap.h>
21#include <linux/regulator/consumer.h>
22#include <linux/clk.h>
23
24#include <drm/drm_atomic_helper.h>
25#include <drm/drm_bridge.h>
26#include <drm/drm_drv.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_print.h>
29#include <drm/drm_probe_helper.h>
30
31#include <sound/hdmi-codec.h>
32
33#define SII902X_TPI_VIDEO_DATA 0x0
34
35#define SII902X_TPI_PIXEL_REPETITION 0x8
36#define SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT BIT(5)
37#define SII902X_TPI_AVI_PIXEL_REP_RISING_EDGE BIT(4)
38#define SII902X_TPI_AVI_PIXEL_REP_4X 3
39#define SII902X_TPI_AVI_PIXEL_REP_2X 1
40#define SII902X_TPI_AVI_PIXEL_REP_NONE 0
41#define SII902X_TPI_CLK_RATIO_HALF (0 << 6)
42#define SII902X_TPI_CLK_RATIO_1X (1 << 6)
43#define SII902X_TPI_CLK_RATIO_2X (2 << 6)
44#define SII902X_TPI_CLK_RATIO_4X (3 << 6)
45
46#define SII902X_TPI_AVI_IN_FORMAT 0x9
47#define SII902X_TPI_AVI_INPUT_BITMODE_12BIT BIT(7)
48#define SII902X_TPI_AVI_INPUT_DITHER BIT(6)
49#define SII902X_TPI_AVI_INPUT_RANGE_LIMITED (2 << 2)
50#define SII902X_TPI_AVI_INPUT_RANGE_FULL (1 << 2)
51#define SII902X_TPI_AVI_INPUT_RANGE_AUTO (0 << 2)
52#define SII902X_TPI_AVI_INPUT_COLORSPACE_BLACK (3 << 0)
53#define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV422 (2 << 0)
54#define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV444 (1 << 0)
55#define SII902X_TPI_AVI_INPUT_COLORSPACE_RGB (0 << 0)
56
57#define SII902X_TPI_AVI_INFOFRAME 0x0c
58
59#define SII902X_SYS_CTRL_DATA 0x1a
60#define SII902X_SYS_CTRL_PWR_DWN BIT(4)
61#define SII902X_SYS_CTRL_AV_MUTE BIT(3)
62#define SII902X_SYS_CTRL_DDC_BUS_REQ BIT(2)
63#define SII902X_SYS_CTRL_DDC_BUS_GRTD BIT(1)
64#define SII902X_SYS_CTRL_OUTPUT_MODE BIT(0)
65#define SII902X_SYS_CTRL_OUTPUT_HDMI 1
66#define SII902X_SYS_CTRL_OUTPUT_DVI 0
67
68#define SII902X_REG_CHIPID(n) (0x1b + (n))
69
70#define SII902X_PWR_STATE_CTRL 0x1e
71#define SII902X_AVI_POWER_STATE_MSK GENMASK(1, 0)
72#define SII902X_AVI_POWER_STATE_D(l) ((l) & SII902X_AVI_POWER_STATE_MSK)
73
74/* Audio */
75#define SII902X_TPI_I2S_ENABLE_MAPPING_REG 0x1f
76#define SII902X_TPI_I2S_CONFIG_FIFO0 (0 << 0)
77#define SII902X_TPI_I2S_CONFIG_FIFO1 (1 << 0)
78#define SII902X_TPI_I2S_CONFIG_FIFO2 (2 << 0)
79#define SII902X_TPI_I2S_CONFIG_FIFO3 (3 << 0)
80#define SII902X_TPI_I2S_LEFT_RIGHT_SWAP (1 << 2)
81#define SII902X_TPI_I2S_AUTO_DOWNSAMPLE (1 << 3)
82#define SII902X_TPI_I2S_SELECT_SD0 (0 << 4)
83#define SII902X_TPI_I2S_SELECT_SD1 (1 << 4)
84#define SII902X_TPI_I2S_SELECT_SD2 (2 << 4)
85#define SII902X_TPI_I2S_SELECT_SD3 (3 << 4)
86#define SII902X_TPI_I2S_FIFO_ENABLE (1 << 7)
87
88#define SII902X_TPI_I2S_INPUT_CONFIG_REG 0x20
89#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES (0 << 0)
90#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO (1 << 0)
91#define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST (0 << 1)
92#define SII902X_TPI_I2S_SD_DIRECTION_LSB_FIRST (1 << 1)
93#define SII902X_TPI_I2S_SD_JUSTIFY_LEFT (0 << 2)
94#define SII902X_TPI_I2S_SD_JUSTIFY_RIGHT (1 << 2)
95#define SII902X_TPI_I2S_WS_POLARITY_LOW (0 << 3)
96#define SII902X_TPI_I2S_WS_POLARITY_HIGH (1 << 3)
97#define SII902X_TPI_I2S_MCLK_MULTIPLIER_128 (0 << 4)
98#define SII902X_TPI_I2S_MCLK_MULTIPLIER_256 (1 << 4)
99#define SII902X_TPI_I2S_MCLK_MULTIPLIER_384 (2 << 4)
100#define SII902X_TPI_I2S_MCLK_MULTIPLIER_512 (3 << 4)
101#define SII902X_TPI_I2S_MCLK_MULTIPLIER_768 (4 << 4)
102#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1024 (5 << 4)
103#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1152 (6 << 4)
104#define SII902X_TPI_I2S_MCLK_MULTIPLIER_192 (7 << 4)
105#define SII902X_TPI_I2S_SCK_EDGE_FALLING (0 << 7)
106#define SII902X_TPI_I2S_SCK_EDGE_RISING (1 << 7)
107
108#define SII902X_TPI_I2S_STRM_HDR_BASE 0x21
109#define SII902X_TPI_I2S_STRM_HDR_SIZE 5
110
111#define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG 0x26
112#define SII902X_TPI_AUDIO_CODING_STREAM_HEADER (0 << 0)
113#define SII902X_TPI_AUDIO_CODING_PCM (1 << 0)
114#define SII902X_TPI_AUDIO_CODING_AC3 (2 << 0)
115#define SII902X_TPI_AUDIO_CODING_MPEG1 (3 << 0)
116#define SII902X_TPI_AUDIO_CODING_MP3 (4 << 0)
117#define SII902X_TPI_AUDIO_CODING_MPEG2 (5 << 0)
118#define SII902X_TPI_AUDIO_CODING_AAC (6 << 0)
119#define SII902X_TPI_AUDIO_CODING_DTS (7 << 0)
120#define SII902X_TPI_AUDIO_CODING_ATRAC (8 << 0)
121#define SII902X_TPI_AUDIO_MUTE_DISABLE (0 << 4)
122#define SII902X_TPI_AUDIO_MUTE_ENABLE (1 << 4)
123#define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS (0 << 5)
124#define SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS (1 << 5)
125#define SII902X_TPI_AUDIO_INTERFACE_DISABLE (0 << 6)
126#define SII902X_TPI_AUDIO_INTERFACE_SPDIF (1 << 6)
127#define SII902X_TPI_AUDIO_INTERFACE_I2S (2 << 6)
128
129#define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG 0x27
130#define SII902X_TPI_AUDIO_FREQ_STREAM (0 << 3)
131#define SII902X_TPI_AUDIO_FREQ_32KHZ (1 << 3)
132#define SII902X_TPI_AUDIO_FREQ_44KHZ (2 << 3)
133#define SII902X_TPI_AUDIO_FREQ_48KHZ (3 << 3)
134#define SII902X_TPI_AUDIO_FREQ_88KHZ (4 << 3)
135#define SII902X_TPI_AUDIO_FREQ_96KHZ (5 << 3)
136#define SII902X_TPI_AUDIO_FREQ_176KHZ (6 << 3)
137#define SII902X_TPI_AUDIO_FREQ_192KHZ (7 << 3)
138#define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM (0 << 6)
139#define SII902X_TPI_AUDIO_SAMPLE_SIZE_16 (1 << 6)
140#define SII902X_TPI_AUDIO_SAMPLE_SIZE_20 (2 << 6)
141#define SII902X_TPI_AUDIO_SAMPLE_SIZE_24 (3 << 6)
142
143#define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG 0x28
144
145#define SII902X_INT_ENABLE 0x3c
146#define SII902X_INT_STATUS 0x3d
147#define SII902X_HOTPLUG_EVENT BIT(0)
148#define SII902X_PLUGGED_STATUS BIT(2)
149
150#define SII902X_REG_TPI_RQB 0xc7
151
152/* Indirect internal register access */
153#define SII902X_IND_SET_PAGE 0xbc
154#define SII902X_IND_OFFSET 0xbd
155#define SII902X_IND_VALUE 0xbe
156
157#define SII902X_TPI_MISC_INFOFRAME_BASE 0xbf
158#define SII902X_TPI_MISC_INFOFRAME_END 0xde
159#define SII902X_TPI_MISC_INFOFRAME_SIZE \
160 (SII902X_TPI_MISC_INFOFRAME_END - SII902X_TPI_MISC_INFOFRAME_BASE)
161
162#define SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS 500
163
164#define SII902X_AUDIO_PORT_INDEX 3
165
166/*
167 * The maximum resolution supported by the HDMI bridge is 1080p@60Hz
168 * and 1920x1200 requiring a pixel clock of 165MHz and the minimum
169 * resolution supported is 480p@60Hz requiring a pixel clock of 25MHz
170 */
171#define SII902X_MIN_PIXEL_CLOCK_KHZ 25000
172#define SII902X_MAX_PIXEL_CLOCK_KHZ 165000
173
174struct sii902x {
175 struct i2c_client *i2c;
176 struct regmap *regmap;
177 struct drm_bridge bridge;
178 struct drm_bridge *next_bridge;
179 struct drm_connector connector;
180 struct gpio_desc *reset_gpio;
181 struct i2c_mux_core *i2cmux;
182 bool sink_is_hdmi;
183 u32 bus_width;
184
185 /*
186 * Mutex protects audio and video functions from interfering
187 * each other, by keeping their i2c command sequences atomic.
188 */
189 struct mutex mutex;
190 struct sii902x_audio {
191 struct platform_device *pdev;
192 struct clk *mclk;
193 u32 i2s_fifo_sequence[4];
194 } audio;
195};
196
197static int sii902x_read_unlocked(struct i2c_client *i2c, u8 reg, u8 *val)
198{
199 union i2c_smbus_data data;
200 int ret;
201
202 ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
203 I2C_SMBUS_READ, reg, I2C_SMBUS_BYTE_DATA, &data);
204
205 if (ret < 0)
206 return ret;
207
208 *val = data.byte;
209 return 0;
210}
211
212static int sii902x_write_unlocked(struct i2c_client *i2c, u8 reg, u8 val)
213{
214 union i2c_smbus_data data;
215
216 data.byte = val;
217
218 return __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
219 I2C_SMBUS_WRITE, reg, I2C_SMBUS_BYTE_DATA,
220 &data);
221}
222
223static int sii902x_update_bits_unlocked(struct i2c_client *i2c, u8 reg, u8 mask,
224 u8 val)
225{
226 int ret;
227 u8 status;
228
229 ret = sii902x_read_unlocked(i2c, reg, &status);
230 if (ret)
231 return ret;
232 status &= ~mask;
233 status |= val & mask;
234 return sii902x_write_unlocked(i2c, reg, status);
235}
236
237static inline struct sii902x *bridge_to_sii902x(struct drm_bridge *bridge)
238{
239 return container_of(bridge, struct sii902x, bridge);
240}
241
242static inline struct sii902x *connector_to_sii902x(struct drm_connector *con)
243{
244 return container_of(con, struct sii902x, connector);
245}
246
247static void sii902x_reset(struct sii902x *sii902x)
248{
249 if (!sii902x->reset_gpio)
250 return;
251
252 gpiod_set_value_cansleep(sii902x->reset_gpio, 1);
253
254 /* The datasheet says treset-min = 100us. Make it 150us to be sure. */
255 usleep_range(150, 200);
256
257 gpiod_set_value_cansleep(sii902x->reset_gpio, 0);
258}
259
260static enum drm_connector_status sii902x_detect(struct sii902x *sii902x)
261{
262 unsigned int status;
263
264 mutex_lock(&sii902x->mutex);
265
266 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
267
268 mutex_unlock(&sii902x->mutex);
269
270 return (status & SII902X_PLUGGED_STATUS) ?
271 connector_status_connected : connector_status_disconnected;
272}
273
274static enum drm_connector_status
275sii902x_connector_detect(struct drm_connector *connector, bool force)
276{
277 struct sii902x *sii902x = connector_to_sii902x(connector);
278
279 return sii902x_detect(sii902x);
280}
281
282static const struct drm_connector_funcs sii902x_connector_funcs = {
283 .detect = sii902x_connector_detect,
284 .fill_modes = drm_helper_probe_single_connector_modes,
285 .destroy = drm_connector_cleanup,
286 .reset = drm_atomic_helper_connector_reset,
287 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
288 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
289};
290
291static const struct drm_edid *sii902x_edid_read(struct sii902x *sii902x,
292 struct drm_connector *connector)
293{
294 const struct drm_edid *drm_edid;
295
296 mutex_lock(&sii902x->mutex);
297
298 drm_edid = drm_edid_read_ddc(connector, sii902x->i2cmux->adapter[0]);
299
300 mutex_unlock(&sii902x->mutex);
301
302 return drm_edid;
303}
304
305static int sii902x_get_modes(struct drm_connector *connector)
306{
307 struct sii902x *sii902x = connector_to_sii902x(connector);
308 const struct drm_edid *drm_edid;
309 int num = 0;
310
311 drm_edid = sii902x_edid_read(sii902x, connector);
312 drm_edid_connector_update(connector, drm_edid);
313 if (drm_edid) {
314 num = drm_edid_connector_add_modes(connector);
315 drm_edid_free(drm_edid);
316 }
317
318 sii902x->sink_is_hdmi = connector->display_info.is_hdmi;
319
320 return num;
321}
322
323static const struct drm_connector_helper_funcs sii902x_connector_helper_funcs = {
324 .get_modes = sii902x_get_modes,
325};
326
327static void sii902x_bridge_atomic_disable(struct drm_bridge *bridge,
328 struct drm_bridge_state *old_bridge_state)
329{
330 struct sii902x *sii902x = bridge_to_sii902x(bridge);
331
332 mutex_lock(&sii902x->mutex);
333
334 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
335 SII902X_SYS_CTRL_PWR_DWN,
336 SII902X_SYS_CTRL_PWR_DWN);
337
338 mutex_unlock(&sii902x->mutex);
339}
340
341static void sii902x_bridge_atomic_enable(struct drm_bridge *bridge,
342 struct drm_bridge_state *old_bridge_state)
343{
344 struct sii902x *sii902x = bridge_to_sii902x(bridge);
345
346 mutex_lock(&sii902x->mutex);
347
348 regmap_update_bits(sii902x->regmap, SII902X_PWR_STATE_CTRL,
349 SII902X_AVI_POWER_STATE_MSK,
350 SII902X_AVI_POWER_STATE_D(0));
351 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
352 SII902X_SYS_CTRL_PWR_DWN, 0);
353
354 mutex_unlock(&sii902x->mutex);
355}
356
357static void sii902x_bridge_mode_set(struct drm_bridge *bridge,
358 const struct drm_display_mode *mode,
359 const struct drm_display_mode *adj)
360{
361 struct sii902x *sii902x = bridge_to_sii902x(bridge);
362 u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI;
363 struct regmap *regmap = sii902x->regmap;
364 u8 buf[HDMI_INFOFRAME_SIZE(AVI)];
365 struct hdmi_avi_infoframe frame;
366 u16 pixel_clock_10kHz = adj->clock / 10;
367 int ret;
368
369 if (sii902x->sink_is_hdmi)
370 output_mode = SII902X_SYS_CTRL_OUTPUT_HDMI;
371
372 buf[0] = pixel_clock_10kHz & 0xff;
373 buf[1] = pixel_clock_10kHz >> 8;
374 buf[2] = drm_mode_vrefresh(adj);
375 buf[3] = 0x00;
376 buf[4] = adj->hdisplay;
377 buf[5] = adj->hdisplay >> 8;
378 buf[6] = adj->vdisplay;
379 buf[7] = adj->vdisplay >> 8;
380 buf[8] = SII902X_TPI_CLK_RATIO_1X | SII902X_TPI_AVI_PIXEL_REP_NONE |
381 SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT;
382 buf[9] = SII902X_TPI_AVI_INPUT_RANGE_AUTO |
383 SII902X_TPI_AVI_INPUT_COLORSPACE_RGB;
384
385 mutex_lock(&sii902x->mutex);
386
387 ret = regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
388 SII902X_SYS_CTRL_OUTPUT_MODE, output_mode);
389 if (ret)
390 goto out;
391
392 ret = regmap_bulk_write(regmap, SII902X_TPI_VIDEO_DATA, buf, 10);
393 if (ret)
394 goto out;
395
396 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame,
397 &sii902x->connector, adj);
398 if (ret < 0) {
399 DRM_ERROR("couldn't fill AVI infoframe\n");
400 goto out;
401 }
402
403 ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf));
404 if (ret < 0) {
405 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
406 goto out;
407 }
408
409 /* Do not send the infoframe header, but keep the CRC field. */
410 regmap_bulk_write(regmap, SII902X_TPI_AVI_INFOFRAME,
411 buf + HDMI_INFOFRAME_HEADER_SIZE - 1,
412 HDMI_AVI_INFOFRAME_SIZE + 1);
413
414out:
415 mutex_unlock(&sii902x->mutex);
416}
417
418static int sii902x_bridge_attach(struct drm_bridge *bridge,
419 enum drm_bridge_attach_flags flags)
420{
421 struct sii902x *sii902x = bridge_to_sii902x(bridge);
422 u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
423 struct drm_device *drm = bridge->dev;
424 int ret;
425
426 if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)
427 return drm_bridge_attach(bridge->encoder, sii902x->next_bridge,
428 bridge, flags);
429
430 drm_connector_helper_add(&sii902x->connector,
431 &sii902x_connector_helper_funcs);
432
433 if (!drm_core_check_feature(drm, DRIVER_ATOMIC)) {
434 dev_err(&sii902x->i2c->dev,
435 "sii902x driver is only compatible with DRM devices supporting atomic updates\n");
436 return -ENOTSUPP;
437 }
438
439 ret = drm_connector_init(drm, &sii902x->connector,
440 &sii902x_connector_funcs,
441 DRM_MODE_CONNECTOR_HDMIA);
442 if (ret)
443 return ret;
444
445 if (sii902x->i2c->irq > 0)
446 sii902x->connector.polled = DRM_CONNECTOR_POLL_HPD;
447 else
448 sii902x->connector.polled = DRM_CONNECTOR_POLL_CONNECT;
449
450 ret = drm_display_info_set_bus_formats(&sii902x->connector.display_info,
451 &bus_format, 1);
452 if (ret)
453 return ret;
454
455 drm_connector_attach_encoder(&sii902x->connector, bridge->encoder);
456
457 return 0;
458}
459
460static enum drm_connector_status sii902x_bridge_detect(struct drm_bridge *bridge)
461{
462 struct sii902x *sii902x = bridge_to_sii902x(bridge);
463
464 return sii902x_detect(sii902x);
465}
466
467static const struct drm_edid *sii902x_bridge_edid_read(struct drm_bridge *bridge,
468 struct drm_connector *connector)
469{
470 struct sii902x *sii902x = bridge_to_sii902x(bridge);
471
472 return sii902x_edid_read(sii902x, connector);
473}
474
475static u32 *sii902x_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
476 struct drm_bridge_state *bridge_state,
477 struct drm_crtc_state *crtc_state,
478 struct drm_connector_state *conn_state,
479 u32 output_fmt,
480 unsigned int *num_input_fmts)
481{
482
483 struct sii902x *sii902x = bridge_to_sii902x(bridge);
484 u32 *input_fmts;
485
486 *num_input_fmts = 0;
487
488 input_fmts = kcalloc(1, sizeof(*input_fmts), GFP_KERNEL);
489 if (!input_fmts)
490 return NULL;
491
492 switch (sii902x->bus_width) {
493 case 16:
494 input_fmts[0] = MEDIA_BUS_FMT_RGB565_1X16;
495 break;
496 case 18:
497 input_fmts[0] = MEDIA_BUS_FMT_RGB666_1X18;
498 break;
499 case 24:
500 input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
501 break;
502 default:
503 return NULL;
504 }
505
506 *num_input_fmts = 1;
507
508 return input_fmts;
509}
510
511static int sii902x_bridge_atomic_check(struct drm_bridge *bridge,
512 struct drm_bridge_state *bridge_state,
513 struct drm_crtc_state *crtc_state,
514 struct drm_connector_state *conn_state)
515{
516 if (crtc_state->mode.clock < SII902X_MIN_PIXEL_CLOCK_KHZ ||
517 crtc_state->mode.clock > SII902X_MAX_PIXEL_CLOCK_KHZ)
518 return -EINVAL;
519
520 /*
521 * There might be flags negotiation supported in future but
522 * set the bus flags in atomic_check statically for now.
523 */
524 bridge_state->input_bus_cfg.flags = bridge->timings->input_bus_flags;
525
526 return 0;
527}
528
529static enum drm_mode_status
530sii902x_bridge_mode_valid(struct drm_bridge *bridge,
531 const struct drm_display_info *info,
532 const struct drm_display_mode *mode)
533{
534 if (mode->clock < SII902X_MIN_PIXEL_CLOCK_KHZ)
535 return MODE_CLOCK_LOW;
536
537 if (mode->clock > SII902X_MAX_PIXEL_CLOCK_KHZ)
538 return MODE_CLOCK_HIGH;
539
540 return MODE_OK;
541}
542
543static const struct drm_bridge_funcs sii902x_bridge_funcs = {
544 .attach = sii902x_bridge_attach,
545 .mode_set = sii902x_bridge_mode_set,
546 .atomic_disable = sii902x_bridge_atomic_disable,
547 .atomic_enable = sii902x_bridge_atomic_enable,
548 .detect = sii902x_bridge_detect,
549 .edid_read = sii902x_bridge_edid_read,
550 .atomic_reset = drm_atomic_helper_bridge_reset,
551 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
552 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
553 .atomic_get_input_bus_fmts = sii902x_bridge_atomic_get_input_bus_fmts,
554 .atomic_check = sii902x_bridge_atomic_check,
555 .mode_valid = sii902x_bridge_mode_valid,
556};
557
558static int sii902x_mute(struct sii902x *sii902x, bool mute)
559{
560 struct device *dev = &sii902x->i2c->dev;
561 unsigned int val = mute ? SII902X_TPI_AUDIO_MUTE_ENABLE :
562 SII902X_TPI_AUDIO_MUTE_DISABLE;
563
564 dev_dbg(dev, "%s: %s\n", __func__, mute ? "Muted" : "Unmuted");
565
566 return regmap_update_bits(sii902x->regmap,
567 SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
568 SII902X_TPI_AUDIO_MUTE_ENABLE, val);
569}
570
571static const int sii902x_mclk_div_table[] = {
572 128, 256, 384, 512, 768, 1024, 1152, 192 };
573
574static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate,
575 unsigned int mclk)
576{
577 int div = mclk / rate;
578 int distance = 100000;
579 u8 i, nearest = 0;
580
581 for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) {
582 unsigned int d = abs(div - sii902x_mclk_div_table[i]);
583
584 if (d >= distance)
585 continue;
586
587 nearest = i;
588 distance = d;
589 if (d == 0)
590 break;
591 }
592
593 *i2s_config_reg |= nearest << 4;
594
595 return sii902x_mclk_div_table[nearest];
596}
597
598static const struct sii902x_sample_freq {
599 u32 freq;
600 u8 val;
601} sii902x_sample_freq[] = {
602 { .freq = 32000, .val = SII902X_TPI_AUDIO_FREQ_32KHZ },
603 { .freq = 44000, .val = SII902X_TPI_AUDIO_FREQ_44KHZ },
604 { .freq = 48000, .val = SII902X_TPI_AUDIO_FREQ_48KHZ },
605 { .freq = 88000, .val = SII902X_TPI_AUDIO_FREQ_88KHZ },
606 { .freq = 96000, .val = SII902X_TPI_AUDIO_FREQ_96KHZ },
607 { .freq = 176000, .val = SII902X_TPI_AUDIO_FREQ_176KHZ },
608 { .freq = 192000, .val = SII902X_TPI_AUDIO_FREQ_192KHZ },
609};
610
611static int sii902x_audio_hw_params(struct device *dev, void *data,
612 struct hdmi_codec_daifmt *daifmt,
613 struct hdmi_codec_params *params)
614{
615 struct sii902x *sii902x = dev_get_drvdata(dev);
616 u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST;
617 u8 config_byte2_reg = (SII902X_TPI_AUDIO_INTERFACE_I2S |
618 SII902X_TPI_AUDIO_MUTE_ENABLE |
619 SII902X_TPI_AUDIO_CODING_PCM);
620 u8 config_byte3_reg = 0;
621 u8 infoframe_buf[HDMI_INFOFRAME_SIZE(AUDIO)];
622 unsigned long mclk_rate;
623 int i, ret;
624
625 if (daifmt->bit_clk_provider || daifmt->frame_clk_provider) {
626 dev_dbg(dev, "%s: I2S clock provider mode not supported\n",
627 __func__);
628 return -EINVAL;
629 }
630
631 switch (daifmt->fmt) {
632 case HDMI_I2S:
633 i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES |
634 SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
635 break;
636 case HDMI_RIGHT_J:
637 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT;
638 break;
639 case HDMI_LEFT_J:
640 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
641 break;
642 default:
643 dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__,
644 daifmt->fmt);
645 return -EINVAL;
646 }
647
648 if (daifmt->bit_clk_inv)
649 i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING;
650 else
651 i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING;
652
653 if (daifmt->frame_clk_inv)
654 i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW;
655 else
656 i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH;
657
658 if (params->channels > 2)
659 config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS;
660 else
661 config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS;
662
663 switch (params->sample_width) {
664 case 16:
665 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_16;
666 break;
667 case 20:
668 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_20;
669 break;
670 case 24:
671 case 32:
672 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_24;
673 break;
674 default:
675 dev_err(dev, "%s: Unsupported sample width %u\n", __func__,
676 params->sample_width);
677 return -EINVAL;
678 }
679
680 for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) {
681 if (params->sample_rate == sii902x_sample_freq[i].freq) {
682 config_byte3_reg |= sii902x_sample_freq[i].val;
683 break;
684 }
685 }
686
687 ret = clk_prepare_enable(sii902x->audio.mclk);
688 if (ret) {
689 dev_err(dev, "Enabling mclk failed: %d\n", ret);
690 return ret;
691 }
692
693 if (sii902x->audio.mclk) {
694 mclk_rate = clk_get_rate(sii902x->audio.mclk);
695 ret = sii902x_select_mclk_div(&i2s_config_reg,
696 params->sample_rate, mclk_rate);
697 if (mclk_rate != ret * params->sample_rate)
698 dev_dbg(dev, "Inaccurate reference clock (%ld/%d != %u)\n",
699 mclk_rate, ret, params->sample_rate);
700 }
701
702 mutex_lock(&sii902x->mutex);
703
704 ret = regmap_write(sii902x->regmap,
705 SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
706 config_byte2_reg);
707 if (ret < 0)
708 goto out;
709
710 ret = regmap_write(sii902x->regmap, SII902X_TPI_I2S_INPUT_CONFIG_REG,
711 i2s_config_reg);
712 if (ret)
713 goto out;
714
715 for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_sequence) &&
716 sii902x->audio.i2s_fifo_sequence[i]; i++)
717 regmap_write(sii902x->regmap,
718 SII902X_TPI_I2S_ENABLE_MAPPING_REG,
719 sii902x->audio.i2s_fifo_sequence[i]);
720
721 ret = regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE3_REG,
722 config_byte3_reg);
723 if (ret)
724 goto out;
725
726 ret = regmap_bulk_write(sii902x->regmap, SII902X_TPI_I2S_STRM_HDR_BASE,
727 params->iec.status,
728 min((size_t) SII902X_TPI_I2S_STRM_HDR_SIZE,
729 sizeof(params->iec.status)));
730 if (ret)
731 goto out;
732
733 ret = hdmi_audio_infoframe_pack(¶ms->cea, infoframe_buf,
734 sizeof(infoframe_buf));
735 if (ret < 0) {
736 dev_err(dev, "%s: Failed to pack audio infoframe: %d\n",
737 __func__, ret);
738 goto out;
739 }
740
741 ret = regmap_bulk_write(sii902x->regmap,
742 SII902X_TPI_MISC_INFOFRAME_BASE,
743 infoframe_buf,
744 min(ret, SII902X_TPI_MISC_INFOFRAME_SIZE));
745 if (ret)
746 goto out;
747
748 /* Decode Level 0 Packets */
749 ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02);
750 if (ret)
751 goto out;
752
753 ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24);
754 if (ret)
755 goto out;
756
757 ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02);
758 if (ret)
759 goto out;
760
761 dev_dbg(dev, "%s: hdmi audio enabled\n", __func__);
762out:
763 mutex_unlock(&sii902x->mutex);
764
765 if (ret) {
766 clk_disable_unprepare(sii902x->audio.mclk);
767 dev_err(dev, "%s: hdmi audio enable failed: %d\n", __func__,
768 ret);
769 }
770
771 return ret;
772}
773
774static void sii902x_audio_shutdown(struct device *dev, void *data)
775{
776 struct sii902x *sii902x = dev_get_drvdata(dev);
777
778 mutex_lock(&sii902x->mutex);
779
780 regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
781 SII902X_TPI_AUDIO_INTERFACE_DISABLE);
782
783 mutex_unlock(&sii902x->mutex);
784
785 clk_disable_unprepare(sii902x->audio.mclk);
786}
787
788static int sii902x_audio_mute(struct device *dev, void *data,
789 bool enable, int direction)
790{
791 struct sii902x *sii902x = dev_get_drvdata(dev);
792
793 mutex_lock(&sii902x->mutex);
794
795 sii902x_mute(sii902x, enable);
796
797 mutex_unlock(&sii902x->mutex);
798
799 return 0;
800}
801
802static int sii902x_audio_get_eld(struct device *dev, void *data,
803 uint8_t *buf, size_t len)
804{
805 struct sii902x *sii902x = dev_get_drvdata(dev);
806
807 mutex_lock(&sii902x->mutex);
808
809 memcpy(buf, sii902x->connector.eld,
810 min(sizeof(sii902x->connector.eld), len));
811
812 mutex_unlock(&sii902x->mutex);
813
814 return 0;
815}
816
817static int sii902x_audio_get_dai_id(struct snd_soc_component *component,
818 struct device_node *endpoint)
819{
820 struct of_endpoint of_ep;
821 int ret;
822
823 ret = of_graph_parse_endpoint(endpoint, &of_ep);
824 if (ret < 0)
825 return ret;
826
827 /*
828 * HDMI sound should be located at reg = <3>
829 * Return expected DAI index 0.
830 */
831 if (of_ep.port == SII902X_AUDIO_PORT_INDEX)
832 return 0;
833
834 return -EINVAL;
835}
836
837static const struct hdmi_codec_ops sii902x_audio_codec_ops = {
838 .hw_params = sii902x_audio_hw_params,
839 .audio_shutdown = sii902x_audio_shutdown,
840 .mute_stream = sii902x_audio_mute,
841 .get_eld = sii902x_audio_get_eld,
842 .get_dai_id = sii902x_audio_get_dai_id,
843 .no_capture_mute = 1,
844};
845
846static int sii902x_audio_codec_init(struct sii902x *sii902x,
847 struct device *dev)
848{
849 static const u8 audio_fifo_id[] = {
850 SII902X_TPI_I2S_CONFIG_FIFO0,
851 SII902X_TPI_I2S_CONFIG_FIFO1,
852 SII902X_TPI_I2S_CONFIG_FIFO2,
853 SII902X_TPI_I2S_CONFIG_FIFO3,
854 };
855 static const u8 i2s_lane_id[] = {
856 SII902X_TPI_I2S_SELECT_SD0,
857 SII902X_TPI_I2S_SELECT_SD1,
858 SII902X_TPI_I2S_SELECT_SD2,
859 SII902X_TPI_I2S_SELECT_SD3,
860 };
861 struct hdmi_codec_pdata codec_data = {
862 .ops = &sii902x_audio_codec_ops,
863 .i2s = 1, /* Only i2s support for now. */
864 .spdif = 0,
865 .max_i2s_channels = 0,
866 };
867 u8 lanes[4];
868 int num_lanes, i;
869
870 if (!of_property_read_bool(dev->of_node, "#sound-dai-cells")) {
871 dev_dbg(dev, "%s: No \"#sound-dai-cells\", no audio\n",
872 __func__);
873 return 0;
874 }
875
876 num_lanes = of_property_read_variable_u8_array(dev->of_node,
877 "sil,i2s-data-lanes",
878 lanes, 1,
879 ARRAY_SIZE(lanes));
880
881 if (num_lanes == -EINVAL) {
882 dev_dbg(dev,
883 "%s: No \"sil,i2s-data-lanes\", use default <0>\n",
884 __func__);
885 num_lanes = 1;
886 lanes[0] = 0;
887 } else if (num_lanes < 0) {
888 dev_err(dev,
889 "%s: Error gettin \"sil,i2s-data-lanes\": %d\n",
890 __func__, num_lanes);
891 return num_lanes;
892 }
893 codec_data.max_i2s_channels = 2 * num_lanes;
894
895 for (i = 0; i < num_lanes; i++)
896 sii902x->audio.i2s_fifo_sequence[i] |= audio_fifo_id[i] |
897 i2s_lane_id[lanes[i]] | SII902X_TPI_I2S_FIFO_ENABLE;
898
899 sii902x->audio.mclk = devm_clk_get_optional(dev, "mclk");
900 if (IS_ERR(sii902x->audio.mclk)) {
901 dev_err(dev, "%s: No clock (audio mclk) found: %ld\n",
902 __func__, PTR_ERR(sii902x->audio.mclk));
903 return PTR_ERR(sii902x->audio.mclk);
904 }
905
906 sii902x->audio.pdev = platform_device_register_data(
907 dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
908 &codec_data, sizeof(codec_data));
909
910 return PTR_ERR_OR_ZERO(sii902x->audio.pdev);
911}
912
913static const struct regmap_range sii902x_volatile_ranges[] = {
914 { .range_min = 0, .range_max = 0xff },
915};
916
917static const struct regmap_access_table sii902x_volatile_table = {
918 .yes_ranges = sii902x_volatile_ranges,
919 .n_yes_ranges = ARRAY_SIZE(sii902x_volatile_ranges),
920};
921
922static const struct regmap_config sii902x_regmap_config = {
923 .reg_bits = 8,
924 .val_bits = 8,
925 .disable_locking = true, /* struct sii902x mutex should be enough */
926 .max_register = SII902X_TPI_MISC_INFOFRAME_END,
927 .volatile_table = &sii902x_volatile_table,
928 .cache_type = REGCACHE_NONE,
929};
930
931static irqreturn_t sii902x_interrupt(int irq, void *data)
932{
933 struct sii902x *sii902x = data;
934 unsigned int status = 0;
935
936 mutex_lock(&sii902x->mutex);
937
938 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
939 regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
940
941 mutex_unlock(&sii902x->mutex);
942
943 if ((status & SII902X_HOTPLUG_EVENT) && sii902x->bridge.dev) {
944 drm_helper_hpd_irq_event(sii902x->bridge.dev);
945 drm_bridge_hpd_notify(&sii902x->bridge, (status & SII902X_PLUGGED_STATUS)
946 ? connector_status_connected
947 : connector_status_disconnected);
948 }
949
950 return IRQ_HANDLED;
951}
952
953/*
954 * The purpose of sii902x_i2c_bypass_select is to enable the pass through
955 * mode of the HDMI transmitter. Do not use regmap from within this function,
956 * only use sii902x_*_unlocked functions to read/modify/write registers.
957 * We are holding the parent adapter lock here, keep this in mind before
958 * adding more i2c transactions.
959 *
960 * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
961 * in this driver, we need to make sure that we only touch 0x1A[2:1] from
962 * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
963 * we leave the remaining bits as we have found them.
964 */
965static int sii902x_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id)
966{
967 struct sii902x *sii902x = i2c_mux_priv(mux);
968 struct device *dev = &sii902x->i2c->dev;
969 unsigned long timeout;
970 u8 status;
971 int ret;
972
973 ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
974 SII902X_SYS_CTRL_DDC_BUS_REQ,
975 SII902X_SYS_CTRL_DDC_BUS_REQ);
976 if (ret)
977 return ret;
978
979 timeout = jiffies +
980 msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
981 do {
982 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
983 &status);
984 if (ret)
985 return ret;
986 } while (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
987 time_before(jiffies, timeout));
988
989 if (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
990 dev_err(dev, "Failed to acquire the i2c bus\n");
991 return -ETIMEDOUT;
992 }
993
994 return sii902x_write_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
995 status);
996}
997
998/*
999 * The purpose of sii902x_i2c_bypass_deselect is to disable the pass through
1000 * mode of the HDMI transmitter. Do not use regmap from within this function,
1001 * only use sii902x_*_unlocked functions to read/modify/write registers.
1002 * We are holding the parent adapter lock here, keep this in mind before
1003 * adding more i2c transactions.
1004 *
1005 * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
1006 * in this driver, we need to make sure that we only touch 0x1A[2:1] from
1007 * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
1008 * we leave the remaining bits as we have found them.
1009 */
1010static int sii902x_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id)
1011{
1012 struct sii902x *sii902x = i2c_mux_priv(mux);
1013 struct device *dev = &sii902x->i2c->dev;
1014 unsigned long timeout;
1015 unsigned int retries;
1016 u8 status;
1017 int ret;
1018
1019 /*
1020 * When the HDMI transmitter is in pass through mode, we need an
1021 * (undocumented) additional delay between STOP and START conditions
1022 * to guarantee the bus won't get stuck.
1023 */
1024 udelay(30);
1025
1026 /*
1027 * Sometimes the I2C bus can stall after failure to use the
1028 * EDID channel. Retry a few times to see if things clear
1029 * up, else continue anyway.
1030 */
1031 retries = 5;
1032 do {
1033 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
1034 &status);
1035 retries--;
1036 } while (ret && retries);
1037 if (ret) {
1038 dev_err(dev, "failed to read status (%d)\n", ret);
1039 return ret;
1040 }
1041
1042 ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
1043 SII902X_SYS_CTRL_DDC_BUS_REQ |
1044 SII902X_SYS_CTRL_DDC_BUS_GRTD, 0);
1045 if (ret)
1046 return ret;
1047
1048 timeout = jiffies +
1049 msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
1050 do {
1051 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
1052 &status);
1053 if (ret)
1054 return ret;
1055 } while (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
1056 SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
1057 time_before(jiffies, timeout));
1058
1059 if (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
1060 SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
1061 dev_err(dev, "failed to release the i2c bus\n");
1062 return -ETIMEDOUT;
1063 }
1064
1065 return 0;
1066}
1067
1068static const struct drm_bridge_timings default_sii902x_timings = {
1069 .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE
1070 | DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE
1071 | DRM_BUS_FLAG_DE_HIGH,
1072};
1073
1074static int sii902x_init(struct sii902x *sii902x)
1075{
1076 struct device *dev = &sii902x->i2c->dev;
1077 unsigned int status = 0;
1078 u8 chipid[4];
1079 int ret;
1080
1081 sii902x_reset(sii902x);
1082
1083 ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0);
1084 if (ret)
1085 return ret;
1086
1087 ret = regmap_bulk_read(sii902x->regmap, SII902X_REG_CHIPID(0),
1088 &chipid, 4);
1089 if (ret) {
1090 dev_err(dev, "regmap_read failed %d\n", ret);
1091 return ret;
1092 }
1093
1094 if (chipid[0] != 0xb0) {
1095 dev_err(dev, "Invalid chipid: %02x (expecting 0xb0)\n",
1096 chipid[0]);
1097 return -EINVAL;
1098 }
1099
1100 /* Clear all pending interrupts */
1101 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
1102 regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
1103
1104 if (sii902x->i2c->irq > 0) {
1105 regmap_write(sii902x->regmap, SII902X_INT_ENABLE,
1106 SII902X_HOTPLUG_EVENT);
1107
1108 ret = devm_request_threaded_irq(dev, sii902x->i2c->irq, NULL,
1109 sii902x_interrupt,
1110 IRQF_ONESHOT, dev_name(dev),
1111 sii902x);
1112 if (ret)
1113 return ret;
1114 }
1115
1116 ret = sii902x_audio_codec_init(sii902x, dev);
1117 if (ret)
1118 return ret;
1119
1120 i2c_set_clientdata(sii902x->i2c, sii902x);
1121
1122 sii902x->i2cmux = i2c_mux_alloc(sii902x->i2c->adapter, dev,
1123 1, 0, I2C_MUX_GATE,
1124 sii902x_i2c_bypass_select,
1125 sii902x_i2c_bypass_deselect);
1126 if (!sii902x->i2cmux) {
1127 ret = -ENOMEM;
1128 goto err_unreg_audio;
1129 }
1130
1131 sii902x->i2cmux->priv = sii902x;
1132 ret = i2c_mux_add_adapter(sii902x->i2cmux, 0, 0);
1133 if (ret)
1134 goto err_unreg_audio;
1135
1136 sii902x->bridge.funcs = &sii902x_bridge_funcs;
1137 sii902x->bridge.of_node = dev->of_node;
1138 sii902x->bridge.timings = &default_sii902x_timings;
1139 sii902x->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;
1140
1141 if (sii902x->i2c->irq > 0)
1142 sii902x->bridge.ops |= DRM_BRIDGE_OP_HPD;
1143
1144 drm_bridge_add(&sii902x->bridge);
1145
1146 return 0;
1147
1148err_unreg_audio:
1149 if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev))
1150 platform_device_unregister(sii902x->audio.pdev);
1151
1152 return ret;
1153}
1154
1155static int sii902x_probe(struct i2c_client *client)
1156{
1157 struct device *dev = &client->dev;
1158 struct device_node *endpoint;
1159 struct sii902x *sii902x;
1160 static const char * const supplies[] = {"iovcc", "cvcc12"};
1161 int ret;
1162
1163 ret = i2c_check_functionality(client->adapter,
1164 I2C_FUNC_SMBUS_BYTE_DATA);
1165 if (!ret) {
1166 dev_err(dev, "I2C adapter not suitable\n");
1167 return -EIO;
1168 }
1169
1170 sii902x = devm_kzalloc(dev, sizeof(*sii902x), GFP_KERNEL);
1171 if (!sii902x)
1172 return -ENOMEM;
1173
1174 sii902x->i2c = client;
1175 sii902x->regmap = devm_regmap_init_i2c(client, &sii902x_regmap_config);
1176 if (IS_ERR(sii902x->regmap))
1177 return PTR_ERR(sii902x->regmap);
1178
1179 sii902x->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1180 GPIOD_OUT_LOW);
1181 if (IS_ERR(sii902x->reset_gpio)) {
1182 dev_err(dev, "Failed to retrieve/request reset gpio: %ld\n",
1183 PTR_ERR(sii902x->reset_gpio));
1184 return PTR_ERR(sii902x->reset_gpio);
1185 }
1186
1187 sii902x->bus_width = 24;
1188 endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 0, -1);
1189 if (endpoint)
1190 of_property_read_u32(endpoint, "bus-width", &sii902x->bus_width);
1191
1192 endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 1, -1);
1193 if (endpoint) {
1194 struct device_node *remote = of_graph_get_remote_port_parent(endpoint);
1195
1196 of_node_put(endpoint);
1197 if (!remote) {
1198 dev_err(dev, "Endpoint in port@1 unconnected\n");
1199 return -ENODEV;
1200 }
1201
1202 if (!of_device_is_available(remote)) {
1203 dev_err(dev, "port@1 remote device is disabled\n");
1204 of_node_put(remote);
1205 return -ENODEV;
1206 }
1207
1208 sii902x->next_bridge = of_drm_find_bridge(remote);
1209 of_node_put(remote);
1210 if (!sii902x->next_bridge)
1211 return dev_err_probe(dev, -EPROBE_DEFER,
1212 "Failed to find remote bridge\n");
1213 }
1214
1215 mutex_init(&sii902x->mutex);
1216
1217 ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(supplies), supplies);
1218 if (ret < 0)
1219 return dev_err_probe(dev, ret, "Failed to enable supplies");
1220
1221 return sii902x_init(sii902x);
1222}
1223
1224static void sii902x_remove(struct i2c_client *client)
1225{
1226 struct sii902x *sii902x = i2c_get_clientdata(client);
1227
1228 drm_bridge_remove(&sii902x->bridge);
1229 i2c_mux_del_adapters(sii902x->i2cmux);
1230
1231 if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev))
1232 platform_device_unregister(sii902x->audio.pdev);
1233}
1234
1235static const struct of_device_id sii902x_dt_ids[] = {
1236 { .compatible = "sil,sii9022", },
1237 { }
1238};
1239MODULE_DEVICE_TABLE(of, sii902x_dt_ids);
1240
1241static const struct i2c_device_id sii902x_i2c_ids[] = {
1242 { "sii9022", 0 },
1243 { },
1244};
1245MODULE_DEVICE_TABLE(i2c, sii902x_i2c_ids);
1246
1247static struct i2c_driver sii902x_driver = {
1248 .probe = sii902x_probe,
1249 .remove = sii902x_remove,
1250 .driver = {
1251 .name = "sii902x",
1252 .of_match_table = sii902x_dt_ids,
1253 },
1254 .id_table = sii902x_i2c_ids,
1255};
1256module_i2c_driver(sii902x_driver);
1257
1258MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
1259MODULE_DESCRIPTION("SII902x RGB -> HDMI bridges");
1260MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2018 Renesas Electronics
4 *
5 * Copyright (C) 2016 Atmel
6 * Bo Shen <voice.shen@atmel.com>
7 *
8 * Authors: Bo Shen <voice.shen@atmel.com>
9 * Boris Brezillon <boris.brezillon@free-electrons.com>
10 * Wu, Songjun <Songjun.Wu@atmel.com>
11 *
12 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
13 */
14
15#include <linux/gpio/consumer.h>
16#include <linux/i2c-mux.h>
17#include <linux/i2c.h>
18#include <linux/module.h>
19#include <linux/regmap.h>
20#include <linux/clk.h>
21
22#include <drm/drm_atomic_helper.h>
23#include <drm/drm_bridge.h>
24#include <drm/drm_drv.h>
25#include <drm/drm_edid.h>
26#include <drm/drm_print.h>
27#include <drm/drm_probe_helper.h>
28
29#include <sound/hdmi-codec.h>
30
31#define SII902X_TPI_VIDEO_DATA 0x0
32
33#define SII902X_TPI_PIXEL_REPETITION 0x8
34#define SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT BIT(5)
35#define SII902X_TPI_AVI_PIXEL_REP_RISING_EDGE BIT(4)
36#define SII902X_TPI_AVI_PIXEL_REP_4X 3
37#define SII902X_TPI_AVI_PIXEL_REP_2X 1
38#define SII902X_TPI_AVI_PIXEL_REP_NONE 0
39#define SII902X_TPI_CLK_RATIO_HALF (0 << 6)
40#define SII902X_TPI_CLK_RATIO_1X (1 << 6)
41#define SII902X_TPI_CLK_RATIO_2X (2 << 6)
42#define SII902X_TPI_CLK_RATIO_4X (3 << 6)
43
44#define SII902X_TPI_AVI_IN_FORMAT 0x9
45#define SII902X_TPI_AVI_INPUT_BITMODE_12BIT BIT(7)
46#define SII902X_TPI_AVI_INPUT_DITHER BIT(6)
47#define SII902X_TPI_AVI_INPUT_RANGE_LIMITED (2 << 2)
48#define SII902X_TPI_AVI_INPUT_RANGE_FULL (1 << 2)
49#define SII902X_TPI_AVI_INPUT_RANGE_AUTO (0 << 2)
50#define SII902X_TPI_AVI_INPUT_COLORSPACE_BLACK (3 << 0)
51#define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV422 (2 << 0)
52#define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV444 (1 << 0)
53#define SII902X_TPI_AVI_INPUT_COLORSPACE_RGB (0 << 0)
54
55#define SII902X_TPI_AVI_INFOFRAME 0x0c
56
57#define SII902X_SYS_CTRL_DATA 0x1a
58#define SII902X_SYS_CTRL_PWR_DWN BIT(4)
59#define SII902X_SYS_CTRL_AV_MUTE BIT(3)
60#define SII902X_SYS_CTRL_DDC_BUS_REQ BIT(2)
61#define SII902X_SYS_CTRL_DDC_BUS_GRTD BIT(1)
62#define SII902X_SYS_CTRL_OUTPUT_MODE BIT(0)
63#define SII902X_SYS_CTRL_OUTPUT_HDMI 1
64#define SII902X_SYS_CTRL_OUTPUT_DVI 0
65
66#define SII902X_REG_CHIPID(n) (0x1b + (n))
67
68#define SII902X_PWR_STATE_CTRL 0x1e
69#define SII902X_AVI_POWER_STATE_MSK GENMASK(1, 0)
70#define SII902X_AVI_POWER_STATE_D(l) ((l) & SII902X_AVI_POWER_STATE_MSK)
71
72/* Audio */
73#define SII902X_TPI_I2S_ENABLE_MAPPING_REG 0x1f
74#define SII902X_TPI_I2S_CONFIG_FIFO0 (0 << 0)
75#define SII902X_TPI_I2S_CONFIG_FIFO1 (1 << 0)
76#define SII902X_TPI_I2S_CONFIG_FIFO2 (2 << 0)
77#define SII902X_TPI_I2S_CONFIG_FIFO3 (3 << 0)
78#define SII902X_TPI_I2S_LEFT_RIGHT_SWAP (1 << 2)
79#define SII902X_TPI_I2S_AUTO_DOWNSAMPLE (1 << 3)
80#define SII902X_TPI_I2S_SELECT_SD0 (0 << 4)
81#define SII902X_TPI_I2S_SELECT_SD1 (1 << 4)
82#define SII902X_TPI_I2S_SELECT_SD2 (2 << 4)
83#define SII902X_TPI_I2S_SELECT_SD3 (3 << 4)
84#define SII902X_TPI_I2S_FIFO_ENABLE (1 << 7)
85
86#define SII902X_TPI_I2S_INPUT_CONFIG_REG 0x20
87#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES (0 << 0)
88#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO (1 << 0)
89#define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST (0 << 1)
90#define SII902X_TPI_I2S_SD_DIRECTION_LSB_FIRST (1 << 1)
91#define SII902X_TPI_I2S_SD_JUSTIFY_LEFT (0 << 2)
92#define SII902X_TPI_I2S_SD_JUSTIFY_RIGHT (1 << 2)
93#define SII902X_TPI_I2S_WS_POLARITY_LOW (0 << 3)
94#define SII902X_TPI_I2S_WS_POLARITY_HIGH (1 << 3)
95#define SII902X_TPI_I2S_MCLK_MULTIPLIER_128 (0 << 4)
96#define SII902X_TPI_I2S_MCLK_MULTIPLIER_256 (1 << 4)
97#define SII902X_TPI_I2S_MCLK_MULTIPLIER_384 (2 << 4)
98#define SII902X_TPI_I2S_MCLK_MULTIPLIER_512 (3 << 4)
99#define SII902X_TPI_I2S_MCLK_MULTIPLIER_768 (4 << 4)
100#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1024 (5 << 4)
101#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1152 (6 << 4)
102#define SII902X_TPI_I2S_MCLK_MULTIPLIER_192 (7 << 4)
103#define SII902X_TPI_I2S_SCK_EDGE_FALLING (0 << 7)
104#define SII902X_TPI_I2S_SCK_EDGE_RISING (1 << 7)
105
106#define SII902X_TPI_I2S_STRM_HDR_BASE 0x21
107#define SII902X_TPI_I2S_STRM_HDR_SIZE 5
108
109#define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG 0x26
110#define SII902X_TPI_AUDIO_CODING_STREAM_HEADER (0 << 0)
111#define SII902X_TPI_AUDIO_CODING_PCM (1 << 0)
112#define SII902X_TPI_AUDIO_CODING_AC3 (2 << 0)
113#define SII902X_TPI_AUDIO_CODING_MPEG1 (3 << 0)
114#define SII902X_TPI_AUDIO_CODING_MP3 (4 << 0)
115#define SII902X_TPI_AUDIO_CODING_MPEG2 (5 << 0)
116#define SII902X_TPI_AUDIO_CODING_AAC (6 << 0)
117#define SII902X_TPI_AUDIO_CODING_DTS (7 << 0)
118#define SII902X_TPI_AUDIO_CODING_ATRAC (8 << 0)
119#define SII902X_TPI_AUDIO_MUTE_DISABLE (0 << 4)
120#define SII902X_TPI_AUDIO_MUTE_ENABLE (1 << 4)
121#define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS (0 << 5)
122#define SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS (1 << 5)
123#define SII902X_TPI_AUDIO_INTERFACE_DISABLE (0 << 6)
124#define SII902X_TPI_AUDIO_INTERFACE_SPDIF (1 << 6)
125#define SII902X_TPI_AUDIO_INTERFACE_I2S (2 << 6)
126
127#define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG 0x27
128#define SII902X_TPI_AUDIO_FREQ_STREAM (0 << 3)
129#define SII902X_TPI_AUDIO_FREQ_32KHZ (1 << 3)
130#define SII902X_TPI_AUDIO_FREQ_44KHZ (2 << 3)
131#define SII902X_TPI_AUDIO_FREQ_48KHZ (3 << 3)
132#define SII902X_TPI_AUDIO_FREQ_88KHZ (4 << 3)
133#define SII902X_TPI_AUDIO_FREQ_96KHZ (5 << 3)
134#define SII902X_TPI_AUDIO_FREQ_176KHZ (6 << 3)
135#define SII902X_TPI_AUDIO_FREQ_192KHZ (7 << 3)
136#define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM (0 << 6)
137#define SII902X_TPI_AUDIO_SAMPLE_SIZE_16 (1 << 6)
138#define SII902X_TPI_AUDIO_SAMPLE_SIZE_20 (2 << 6)
139#define SII902X_TPI_AUDIO_SAMPLE_SIZE_24 (3 << 6)
140
141#define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG 0x28
142
143#define SII902X_INT_ENABLE 0x3c
144#define SII902X_INT_STATUS 0x3d
145#define SII902X_HOTPLUG_EVENT BIT(0)
146#define SII902X_PLUGGED_STATUS BIT(2)
147
148#define SII902X_REG_TPI_RQB 0xc7
149
150/* Indirect internal register access */
151#define SII902X_IND_SET_PAGE 0xbc
152#define SII902X_IND_OFFSET 0xbd
153#define SII902X_IND_VALUE 0xbe
154
155#define SII902X_TPI_MISC_INFOFRAME_BASE 0xbf
156#define SII902X_TPI_MISC_INFOFRAME_END 0xde
157#define SII902X_TPI_MISC_INFOFRAME_SIZE \
158 (SII902X_TPI_MISC_INFOFRAME_END - SII902X_TPI_MISC_INFOFRAME_BASE)
159
160#define SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS 500
161
162#define SII902X_AUDIO_PORT_INDEX 3
163
164struct sii902x {
165 struct i2c_client *i2c;
166 struct regmap *regmap;
167 struct drm_bridge bridge;
168 struct drm_connector connector;
169 struct gpio_desc *reset_gpio;
170 struct i2c_mux_core *i2cmux;
171 /*
172 * Mutex protects audio and video functions from interfering
173 * each other, by keeping their i2c command sequences atomic.
174 */
175 struct mutex mutex;
176 struct sii902x_audio {
177 struct platform_device *pdev;
178 struct clk *mclk;
179 u32 i2s_fifo_sequence[4];
180 } audio;
181};
182
183static int sii902x_read_unlocked(struct i2c_client *i2c, u8 reg, u8 *val)
184{
185 union i2c_smbus_data data;
186 int ret;
187
188 ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
189 I2C_SMBUS_READ, reg, I2C_SMBUS_BYTE_DATA, &data);
190
191 if (ret < 0)
192 return ret;
193
194 *val = data.byte;
195 return 0;
196}
197
198static int sii902x_write_unlocked(struct i2c_client *i2c, u8 reg, u8 val)
199{
200 union i2c_smbus_data data;
201
202 data.byte = val;
203
204 return __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
205 I2C_SMBUS_WRITE, reg, I2C_SMBUS_BYTE_DATA,
206 &data);
207}
208
209static int sii902x_update_bits_unlocked(struct i2c_client *i2c, u8 reg, u8 mask,
210 u8 val)
211{
212 int ret;
213 u8 status;
214
215 ret = sii902x_read_unlocked(i2c, reg, &status);
216 if (ret)
217 return ret;
218 status &= ~mask;
219 status |= val & mask;
220 return sii902x_write_unlocked(i2c, reg, status);
221}
222
223static inline struct sii902x *bridge_to_sii902x(struct drm_bridge *bridge)
224{
225 return container_of(bridge, struct sii902x, bridge);
226}
227
228static inline struct sii902x *connector_to_sii902x(struct drm_connector *con)
229{
230 return container_of(con, struct sii902x, connector);
231}
232
233static void sii902x_reset(struct sii902x *sii902x)
234{
235 if (!sii902x->reset_gpio)
236 return;
237
238 gpiod_set_value(sii902x->reset_gpio, 1);
239
240 /* The datasheet says treset-min = 100us. Make it 150us to be sure. */
241 usleep_range(150, 200);
242
243 gpiod_set_value(sii902x->reset_gpio, 0);
244}
245
246static enum drm_connector_status
247sii902x_connector_detect(struct drm_connector *connector, bool force)
248{
249 struct sii902x *sii902x = connector_to_sii902x(connector);
250 unsigned int status;
251
252 mutex_lock(&sii902x->mutex);
253
254 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
255
256 mutex_unlock(&sii902x->mutex);
257
258 return (status & SII902X_PLUGGED_STATUS) ?
259 connector_status_connected : connector_status_disconnected;
260}
261
262static const struct drm_connector_funcs sii902x_connector_funcs = {
263 .detect = sii902x_connector_detect,
264 .fill_modes = drm_helper_probe_single_connector_modes,
265 .destroy = drm_connector_cleanup,
266 .reset = drm_atomic_helper_connector_reset,
267 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
268 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
269};
270
271static int sii902x_get_modes(struct drm_connector *connector)
272{
273 struct sii902x *sii902x = connector_to_sii902x(connector);
274 u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
275 u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI;
276 struct edid *edid;
277 int num = 0, ret;
278
279 mutex_lock(&sii902x->mutex);
280
281 edid = drm_get_edid(connector, sii902x->i2cmux->adapter[0]);
282 drm_connector_update_edid_property(connector, edid);
283 if (edid) {
284 if (drm_detect_hdmi_monitor(edid))
285 output_mode = SII902X_SYS_CTRL_OUTPUT_HDMI;
286
287 num = drm_add_edid_modes(connector, edid);
288 kfree(edid);
289 }
290
291 ret = drm_display_info_set_bus_formats(&connector->display_info,
292 &bus_format, 1);
293 if (ret)
294 goto error_out;
295
296 ret = regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
297 SII902X_SYS_CTRL_OUTPUT_MODE, output_mode);
298 if (ret)
299 goto error_out;
300
301 ret = num;
302
303error_out:
304 mutex_unlock(&sii902x->mutex);
305
306 return ret;
307}
308
309static enum drm_mode_status sii902x_mode_valid(struct drm_connector *connector,
310 struct drm_display_mode *mode)
311{
312 /* TODO: check mode */
313
314 return MODE_OK;
315}
316
317static const struct drm_connector_helper_funcs sii902x_connector_helper_funcs = {
318 .get_modes = sii902x_get_modes,
319 .mode_valid = sii902x_mode_valid,
320};
321
322static void sii902x_bridge_disable(struct drm_bridge *bridge)
323{
324 struct sii902x *sii902x = bridge_to_sii902x(bridge);
325
326 mutex_lock(&sii902x->mutex);
327
328 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
329 SII902X_SYS_CTRL_PWR_DWN,
330 SII902X_SYS_CTRL_PWR_DWN);
331
332 mutex_unlock(&sii902x->mutex);
333}
334
335static void sii902x_bridge_enable(struct drm_bridge *bridge)
336{
337 struct sii902x *sii902x = bridge_to_sii902x(bridge);
338
339 mutex_lock(&sii902x->mutex);
340
341 regmap_update_bits(sii902x->regmap, SII902X_PWR_STATE_CTRL,
342 SII902X_AVI_POWER_STATE_MSK,
343 SII902X_AVI_POWER_STATE_D(0));
344 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
345 SII902X_SYS_CTRL_PWR_DWN, 0);
346
347 mutex_unlock(&sii902x->mutex);
348}
349
350static void sii902x_bridge_mode_set(struct drm_bridge *bridge,
351 const struct drm_display_mode *mode,
352 const struct drm_display_mode *adj)
353{
354 struct sii902x *sii902x = bridge_to_sii902x(bridge);
355 struct regmap *regmap = sii902x->regmap;
356 u8 buf[HDMI_INFOFRAME_SIZE(AVI)];
357 struct hdmi_avi_infoframe frame;
358 u16 pixel_clock_10kHz = adj->clock / 10;
359 int ret;
360
361 buf[0] = pixel_clock_10kHz & 0xff;
362 buf[1] = pixel_clock_10kHz >> 8;
363 buf[2] = drm_mode_vrefresh(adj);
364 buf[3] = 0x00;
365 buf[4] = adj->hdisplay;
366 buf[5] = adj->hdisplay >> 8;
367 buf[6] = adj->vdisplay;
368 buf[7] = adj->vdisplay >> 8;
369 buf[8] = SII902X_TPI_CLK_RATIO_1X | SII902X_TPI_AVI_PIXEL_REP_NONE |
370 SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT;
371 buf[9] = SII902X_TPI_AVI_INPUT_RANGE_AUTO |
372 SII902X_TPI_AVI_INPUT_COLORSPACE_RGB;
373
374 mutex_lock(&sii902x->mutex);
375
376 ret = regmap_bulk_write(regmap, SII902X_TPI_VIDEO_DATA, buf, 10);
377 if (ret)
378 goto out;
379
380 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame,
381 &sii902x->connector, adj);
382 if (ret < 0) {
383 DRM_ERROR("couldn't fill AVI infoframe\n");
384 goto out;
385 }
386
387 ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf));
388 if (ret < 0) {
389 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
390 goto out;
391 }
392
393 /* Do not send the infoframe header, but keep the CRC field. */
394 regmap_bulk_write(regmap, SII902X_TPI_AVI_INFOFRAME,
395 buf + HDMI_INFOFRAME_HEADER_SIZE - 1,
396 HDMI_AVI_INFOFRAME_SIZE + 1);
397
398out:
399 mutex_unlock(&sii902x->mutex);
400}
401
402static int sii902x_bridge_attach(struct drm_bridge *bridge,
403 enum drm_bridge_attach_flags flags)
404{
405 struct sii902x *sii902x = bridge_to_sii902x(bridge);
406 struct drm_device *drm = bridge->dev;
407 int ret;
408
409 if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) {
410 DRM_ERROR("Fix bridge driver to make connector optional!");
411 return -EINVAL;
412 }
413
414 drm_connector_helper_add(&sii902x->connector,
415 &sii902x_connector_helper_funcs);
416
417 if (!drm_core_check_feature(drm, DRIVER_ATOMIC)) {
418 dev_err(&sii902x->i2c->dev,
419 "sii902x driver is only compatible with DRM devices supporting atomic updates\n");
420 return -ENOTSUPP;
421 }
422
423 ret = drm_connector_init(drm, &sii902x->connector,
424 &sii902x_connector_funcs,
425 DRM_MODE_CONNECTOR_HDMIA);
426 if (ret)
427 return ret;
428
429 if (sii902x->i2c->irq > 0)
430 sii902x->connector.polled = DRM_CONNECTOR_POLL_HPD;
431 else
432 sii902x->connector.polled = DRM_CONNECTOR_POLL_CONNECT;
433
434 drm_connector_attach_encoder(&sii902x->connector, bridge->encoder);
435
436 return 0;
437}
438
439static const struct drm_bridge_funcs sii902x_bridge_funcs = {
440 .attach = sii902x_bridge_attach,
441 .mode_set = sii902x_bridge_mode_set,
442 .disable = sii902x_bridge_disable,
443 .enable = sii902x_bridge_enable,
444};
445
446static int sii902x_mute(struct sii902x *sii902x, bool mute)
447{
448 struct device *dev = &sii902x->i2c->dev;
449 unsigned int val = mute ? SII902X_TPI_AUDIO_MUTE_ENABLE :
450 SII902X_TPI_AUDIO_MUTE_DISABLE;
451
452 dev_dbg(dev, "%s: %s\n", __func__, mute ? "Muted" : "Unmuted");
453
454 return regmap_update_bits(sii902x->regmap,
455 SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
456 SII902X_TPI_AUDIO_MUTE_ENABLE, val);
457}
458
459static const int sii902x_mclk_div_table[] = {
460 128, 256, 384, 512, 768, 1024, 1152, 192 };
461
462static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate,
463 unsigned int mclk)
464{
465 int div = mclk / rate;
466 int distance = 100000;
467 u8 i, nearest = 0;
468
469 for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) {
470 unsigned int d = abs(div - sii902x_mclk_div_table[i]);
471
472 if (d >= distance)
473 continue;
474
475 nearest = i;
476 distance = d;
477 if (d == 0)
478 break;
479 }
480
481 *i2s_config_reg |= nearest << 4;
482
483 return sii902x_mclk_div_table[nearest];
484}
485
486static const struct sii902x_sample_freq {
487 u32 freq;
488 u8 val;
489} sii902x_sample_freq[] = {
490 { .freq = 32000, .val = SII902X_TPI_AUDIO_FREQ_32KHZ },
491 { .freq = 44000, .val = SII902X_TPI_AUDIO_FREQ_44KHZ },
492 { .freq = 48000, .val = SII902X_TPI_AUDIO_FREQ_48KHZ },
493 { .freq = 88000, .val = SII902X_TPI_AUDIO_FREQ_88KHZ },
494 { .freq = 96000, .val = SII902X_TPI_AUDIO_FREQ_96KHZ },
495 { .freq = 176000, .val = SII902X_TPI_AUDIO_FREQ_176KHZ },
496 { .freq = 192000, .val = SII902X_TPI_AUDIO_FREQ_192KHZ },
497};
498
499static int sii902x_audio_hw_params(struct device *dev, void *data,
500 struct hdmi_codec_daifmt *daifmt,
501 struct hdmi_codec_params *params)
502{
503 struct sii902x *sii902x = dev_get_drvdata(dev);
504 u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST;
505 u8 config_byte2_reg = (SII902X_TPI_AUDIO_INTERFACE_I2S |
506 SII902X_TPI_AUDIO_MUTE_ENABLE |
507 SII902X_TPI_AUDIO_CODING_PCM);
508 u8 config_byte3_reg = 0;
509 u8 infoframe_buf[HDMI_INFOFRAME_SIZE(AUDIO)];
510 unsigned long mclk_rate;
511 int i, ret;
512
513 if (daifmt->bit_clk_master || daifmt->frame_clk_master) {
514 dev_dbg(dev, "%s: I2S master mode not supported\n", __func__);
515 return -EINVAL;
516 }
517
518 switch (daifmt->fmt) {
519 case HDMI_I2S:
520 i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES |
521 SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
522 break;
523 case HDMI_RIGHT_J:
524 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT;
525 break;
526 case HDMI_LEFT_J:
527 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
528 break;
529 default:
530 dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__,
531 daifmt->fmt);
532 return -EINVAL;
533 }
534
535 if (daifmt->bit_clk_inv)
536 i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING;
537 else
538 i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING;
539
540 if (daifmt->frame_clk_inv)
541 i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW;
542 else
543 i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH;
544
545 if (params->channels > 2)
546 config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS;
547 else
548 config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS;
549
550 switch (params->sample_width) {
551 case 16:
552 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_16;
553 break;
554 case 20:
555 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_20;
556 break;
557 case 24:
558 case 32:
559 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_24;
560 break;
561 default:
562 dev_err(dev, "%s: Unsupported sample width %u\n", __func__,
563 params->sample_width);
564 return -EINVAL;
565 }
566
567 for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) {
568 if (params->sample_rate == sii902x_sample_freq[i].freq) {
569 config_byte3_reg |= sii902x_sample_freq[i].val;
570 break;
571 }
572 }
573
574 ret = clk_prepare_enable(sii902x->audio.mclk);
575 if (ret) {
576 dev_err(dev, "Enabling mclk failed: %d\n", ret);
577 return ret;
578 }
579
580 if (sii902x->audio.mclk) {
581 mclk_rate = clk_get_rate(sii902x->audio.mclk);
582 ret = sii902x_select_mclk_div(&i2s_config_reg,
583 params->sample_rate, mclk_rate);
584 if (mclk_rate != ret * params->sample_rate)
585 dev_dbg(dev, "Inaccurate reference clock (%ld/%d != %u)\n",
586 mclk_rate, ret, params->sample_rate);
587 }
588
589 mutex_lock(&sii902x->mutex);
590
591 ret = regmap_write(sii902x->regmap,
592 SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
593 config_byte2_reg);
594 if (ret < 0)
595 goto out;
596
597 ret = regmap_write(sii902x->regmap, SII902X_TPI_I2S_INPUT_CONFIG_REG,
598 i2s_config_reg);
599 if (ret)
600 goto out;
601
602 for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_sequence) &&
603 sii902x->audio.i2s_fifo_sequence[i]; i++)
604 regmap_write(sii902x->regmap,
605 SII902X_TPI_I2S_ENABLE_MAPPING_REG,
606 sii902x->audio.i2s_fifo_sequence[i]);
607
608 ret = regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE3_REG,
609 config_byte3_reg);
610 if (ret)
611 goto out;
612
613 ret = regmap_bulk_write(sii902x->regmap, SII902X_TPI_I2S_STRM_HDR_BASE,
614 params->iec.status,
615 min((size_t) SII902X_TPI_I2S_STRM_HDR_SIZE,
616 sizeof(params->iec.status)));
617 if (ret)
618 goto out;
619
620 ret = hdmi_audio_infoframe_pack(¶ms->cea, infoframe_buf,
621 sizeof(infoframe_buf));
622 if (ret < 0) {
623 dev_err(dev, "%s: Failed to pack audio infoframe: %d\n",
624 __func__, ret);
625 goto out;
626 }
627
628 ret = regmap_bulk_write(sii902x->regmap,
629 SII902X_TPI_MISC_INFOFRAME_BASE,
630 infoframe_buf,
631 min(ret, SII902X_TPI_MISC_INFOFRAME_SIZE));
632 if (ret)
633 goto out;
634
635 /* Decode Level 0 Packets */
636 ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02);
637 if (ret)
638 goto out;
639
640 ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24);
641 if (ret)
642 goto out;
643
644 ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02);
645 if (ret)
646 goto out;
647
648 dev_dbg(dev, "%s: hdmi audio enabled\n", __func__);
649out:
650 mutex_unlock(&sii902x->mutex);
651
652 if (ret) {
653 clk_disable_unprepare(sii902x->audio.mclk);
654 dev_err(dev, "%s: hdmi audio enable failed: %d\n", __func__,
655 ret);
656 }
657
658 return ret;
659}
660
661static void sii902x_audio_shutdown(struct device *dev, void *data)
662{
663 struct sii902x *sii902x = dev_get_drvdata(dev);
664
665 mutex_lock(&sii902x->mutex);
666
667 regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
668 SII902X_TPI_AUDIO_INTERFACE_DISABLE);
669
670 mutex_unlock(&sii902x->mutex);
671
672 clk_disable_unprepare(sii902x->audio.mclk);
673}
674
675static int sii902x_audio_mute(struct device *dev, void *data,
676 bool enable, int direction)
677{
678 struct sii902x *sii902x = dev_get_drvdata(dev);
679
680 mutex_lock(&sii902x->mutex);
681
682 sii902x_mute(sii902x, enable);
683
684 mutex_unlock(&sii902x->mutex);
685
686 return 0;
687}
688
689static int sii902x_audio_get_eld(struct device *dev, void *data,
690 uint8_t *buf, size_t len)
691{
692 struct sii902x *sii902x = dev_get_drvdata(dev);
693
694 mutex_lock(&sii902x->mutex);
695
696 memcpy(buf, sii902x->connector.eld,
697 min(sizeof(sii902x->connector.eld), len));
698
699 mutex_unlock(&sii902x->mutex);
700
701 return 0;
702}
703
704static int sii902x_audio_get_dai_id(struct snd_soc_component *component,
705 struct device_node *endpoint)
706{
707 struct of_endpoint of_ep;
708 int ret;
709
710 ret = of_graph_parse_endpoint(endpoint, &of_ep);
711 if (ret < 0)
712 return ret;
713
714 /*
715 * HDMI sound should be located at reg = <3>
716 * Return expected DAI index 0.
717 */
718 if (of_ep.port == SII902X_AUDIO_PORT_INDEX)
719 return 0;
720
721 return -EINVAL;
722}
723
724static const struct hdmi_codec_ops sii902x_audio_codec_ops = {
725 .hw_params = sii902x_audio_hw_params,
726 .audio_shutdown = sii902x_audio_shutdown,
727 .mute_stream = sii902x_audio_mute,
728 .get_eld = sii902x_audio_get_eld,
729 .get_dai_id = sii902x_audio_get_dai_id,
730 .no_capture_mute = 1,
731};
732
733static int sii902x_audio_codec_init(struct sii902x *sii902x,
734 struct device *dev)
735{
736 static const u8 audio_fifo_id[] = {
737 SII902X_TPI_I2S_CONFIG_FIFO0,
738 SII902X_TPI_I2S_CONFIG_FIFO1,
739 SII902X_TPI_I2S_CONFIG_FIFO2,
740 SII902X_TPI_I2S_CONFIG_FIFO3,
741 };
742 static const u8 i2s_lane_id[] = {
743 SII902X_TPI_I2S_SELECT_SD0,
744 SII902X_TPI_I2S_SELECT_SD1,
745 SII902X_TPI_I2S_SELECT_SD2,
746 SII902X_TPI_I2S_SELECT_SD3,
747 };
748 struct hdmi_codec_pdata codec_data = {
749 .ops = &sii902x_audio_codec_ops,
750 .i2s = 1, /* Only i2s support for now. */
751 .spdif = 0,
752 .max_i2s_channels = 0,
753 };
754 u8 lanes[4];
755 int num_lanes, i;
756
757 if (!of_property_read_bool(dev->of_node, "#sound-dai-cells")) {
758 dev_dbg(dev, "%s: No \"#sound-dai-cells\", no audio\n",
759 __func__);
760 return 0;
761 }
762
763 num_lanes = of_property_read_variable_u8_array(dev->of_node,
764 "sil,i2s-data-lanes",
765 lanes, 1,
766 ARRAY_SIZE(lanes));
767
768 if (num_lanes == -EINVAL) {
769 dev_dbg(dev,
770 "%s: No \"sil,i2s-data-lanes\", use default <0>\n",
771 __func__);
772 num_lanes = 1;
773 lanes[0] = 0;
774 } else if (num_lanes < 0) {
775 dev_err(dev,
776 "%s: Error gettin \"sil,i2s-data-lanes\": %d\n",
777 __func__, num_lanes);
778 return num_lanes;
779 }
780 codec_data.max_i2s_channels = 2 * num_lanes;
781
782 for (i = 0; i < num_lanes; i++)
783 sii902x->audio.i2s_fifo_sequence[i] |= audio_fifo_id[i] |
784 i2s_lane_id[lanes[i]] | SII902X_TPI_I2S_FIFO_ENABLE;
785
786 sii902x->audio.mclk = devm_clk_get_optional(dev, "mclk");
787 if (IS_ERR(sii902x->audio.mclk)) {
788 dev_err(dev, "%s: No clock (audio mclk) found: %ld\n",
789 __func__, PTR_ERR(sii902x->audio.mclk));
790 return PTR_ERR(sii902x->audio.mclk);
791 }
792
793 sii902x->audio.pdev = platform_device_register_data(
794 dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
795 &codec_data, sizeof(codec_data));
796
797 return PTR_ERR_OR_ZERO(sii902x->audio.pdev);
798}
799
800static const struct regmap_range sii902x_volatile_ranges[] = {
801 { .range_min = 0, .range_max = 0xff },
802};
803
804static const struct regmap_access_table sii902x_volatile_table = {
805 .yes_ranges = sii902x_volatile_ranges,
806 .n_yes_ranges = ARRAY_SIZE(sii902x_volatile_ranges),
807};
808
809static const struct regmap_config sii902x_regmap_config = {
810 .reg_bits = 8,
811 .val_bits = 8,
812 .disable_locking = true, /* struct sii902x mutex should be enough */
813 .max_register = SII902X_TPI_MISC_INFOFRAME_END,
814 .volatile_table = &sii902x_volatile_table,
815 .cache_type = REGCACHE_NONE,
816};
817
818static irqreturn_t sii902x_interrupt(int irq, void *data)
819{
820 struct sii902x *sii902x = data;
821 unsigned int status = 0;
822
823 mutex_lock(&sii902x->mutex);
824
825 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
826 regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
827
828 mutex_unlock(&sii902x->mutex);
829
830 if ((status & SII902X_HOTPLUG_EVENT) && sii902x->bridge.dev)
831 drm_helper_hpd_irq_event(sii902x->bridge.dev);
832
833 return IRQ_HANDLED;
834}
835
836/*
837 * The purpose of sii902x_i2c_bypass_select is to enable the pass through
838 * mode of the HDMI transmitter. Do not use regmap from within this function,
839 * only use sii902x_*_unlocked functions to read/modify/write registers.
840 * We are holding the parent adapter lock here, keep this in mind before
841 * adding more i2c transactions.
842 *
843 * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
844 * in this driver, we need to make sure that we only touch 0x1A[2:1] from
845 * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
846 * we leave the remaining bits as we have found them.
847 */
848static int sii902x_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id)
849{
850 struct sii902x *sii902x = i2c_mux_priv(mux);
851 struct device *dev = &sii902x->i2c->dev;
852 unsigned long timeout;
853 u8 status;
854 int ret;
855
856 ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
857 SII902X_SYS_CTRL_DDC_BUS_REQ,
858 SII902X_SYS_CTRL_DDC_BUS_REQ);
859 if (ret)
860 return ret;
861
862 timeout = jiffies +
863 msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
864 do {
865 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
866 &status);
867 if (ret)
868 return ret;
869 } while (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
870 time_before(jiffies, timeout));
871
872 if (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
873 dev_err(dev, "Failed to acquire the i2c bus\n");
874 return -ETIMEDOUT;
875 }
876
877 return sii902x_write_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
878 status);
879}
880
881/*
882 * The purpose of sii902x_i2c_bypass_deselect is to disable the pass through
883 * mode of the HDMI transmitter. Do not use regmap from within this function,
884 * only use sii902x_*_unlocked functions to read/modify/write registers.
885 * We are holding the parent adapter lock here, keep this in mind before
886 * adding more i2c transactions.
887 *
888 * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
889 * in this driver, we need to make sure that we only touch 0x1A[2:1] from
890 * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
891 * we leave the remaining bits as we have found them.
892 */
893static int sii902x_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id)
894{
895 struct sii902x *sii902x = i2c_mux_priv(mux);
896 struct device *dev = &sii902x->i2c->dev;
897 unsigned long timeout;
898 unsigned int retries;
899 u8 status;
900 int ret;
901
902 /*
903 * When the HDMI transmitter is in pass through mode, we need an
904 * (undocumented) additional delay between STOP and START conditions
905 * to guarantee the bus won't get stuck.
906 */
907 udelay(30);
908
909 /*
910 * Sometimes the I2C bus can stall after failure to use the
911 * EDID channel. Retry a few times to see if things clear
912 * up, else continue anyway.
913 */
914 retries = 5;
915 do {
916 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
917 &status);
918 retries--;
919 } while (ret && retries);
920 if (ret) {
921 dev_err(dev, "failed to read status (%d)\n", ret);
922 return ret;
923 }
924
925 ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
926 SII902X_SYS_CTRL_DDC_BUS_REQ |
927 SII902X_SYS_CTRL_DDC_BUS_GRTD, 0);
928 if (ret)
929 return ret;
930
931 timeout = jiffies +
932 msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
933 do {
934 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
935 &status);
936 if (ret)
937 return ret;
938 } while (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
939 SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
940 time_before(jiffies, timeout));
941
942 if (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
943 SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
944 dev_err(dev, "failed to release the i2c bus\n");
945 return -ETIMEDOUT;
946 }
947
948 return 0;
949}
950
951static const struct drm_bridge_timings default_sii902x_timings = {
952 .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE
953 | DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE
954 | DRM_BUS_FLAG_DE_HIGH,
955};
956
957static int sii902x_probe(struct i2c_client *client,
958 const struct i2c_device_id *id)
959{
960 struct device *dev = &client->dev;
961 unsigned int status = 0;
962 struct sii902x *sii902x;
963 u8 chipid[4];
964 int ret;
965
966 ret = i2c_check_functionality(client->adapter,
967 I2C_FUNC_SMBUS_BYTE_DATA);
968 if (!ret) {
969 dev_err(dev, "I2C adapter not suitable\n");
970 return -EIO;
971 }
972
973 sii902x = devm_kzalloc(dev, sizeof(*sii902x), GFP_KERNEL);
974 if (!sii902x)
975 return -ENOMEM;
976
977 sii902x->i2c = client;
978 sii902x->regmap = devm_regmap_init_i2c(client, &sii902x_regmap_config);
979 if (IS_ERR(sii902x->regmap))
980 return PTR_ERR(sii902x->regmap);
981
982 sii902x->reset_gpio = devm_gpiod_get_optional(dev, "reset",
983 GPIOD_OUT_LOW);
984 if (IS_ERR(sii902x->reset_gpio)) {
985 dev_err(dev, "Failed to retrieve/request reset gpio: %ld\n",
986 PTR_ERR(sii902x->reset_gpio));
987 return PTR_ERR(sii902x->reset_gpio);
988 }
989
990 mutex_init(&sii902x->mutex);
991
992 sii902x_reset(sii902x);
993
994 ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0);
995 if (ret)
996 return ret;
997
998 ret = regmap_bulk_read(sii902x->regmap, SII902X_REG_CHIPID(0),
999 &chipid, 4);
1000 if (ret) {
1001 dev_err(dev, "regmap_read failed %d\n", ret);
1002 return ret;
1003 }
1004
1005 if (chipid[0] != 0xb0) {
1006 dev_err(dev, "Invalid chipid: %02x (expecting 0xb0)\n",
1007 chipid[0]);
1008 return -EINVAL;
1009 }
1010
1011 /* Clear all pending interrupts */
1012 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
1013 regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
1014
1015 if (client->irq > 0) {
1016 regmap_write(sii902x->regmap, SII902X_INT_ENABLE,
1017 SII902X_HOTPLUG_EVENT);
1018
1019 ret = devm_request_threaded_irq(dev, client->irq, NULL,
1020 sii902x_interrupt,
1021 IRQF_ONESHOT, dev_name(dev),
1022 sii902x);
1023 if (ret)
1024 return ret;
1025 }
1026
1027 sii902x->bridge.funcs = &sii902x_bridge_funcs;
1028 sii902x->bridge.of_node = dev->of_node;
1029 sii902x->bridge.timings = &default_sii902x_timings;
1030 drm_bridge_add(&sii902x->bridge);
1031
1032 sii902x_audio_codec_init(sii902x, dev);
1033
1034 i2c_set_clientdata(client, sii902x);
1035
1036 sii902x->i2cmux = i2c_mux_alloc(client->adapter, dev,
1037 1, 0, I2C_MUX_GATE,
1038 sii902x_i2c_bypass_select,
1039 sii902x_i2c_bypass_deselect);
1040 if (!sii902x->i2cmux)
1041 return -ENOMEM;
1042
1043 sii902x->i2cmux->priv = sii902x;
1044 return i2c_mux_add_adapter(sii902x->i2cmux, 0, 0, 0);
1045}
1046
1047static int sii902x_remove(struct i2c_client *client)
1048
1049{
1050 struct sii902x *sii902x = i2c_get_clientdata(client);
1051
1052 i2c_mux_del_adapters(sii902x->i2cmux);
1053 drm_bridge_remove(&sii902x->bridge);
1054
1055 return 0;
1056}
1057
1058static const struct of_device_id sii902x_dt_ids[] = {
1059 { .compatible = "sil,sii9022", },
1060 { }
1061};
1062MODULE_DEVICE_TABLE(of, sii902x_dt_ids);
1063
1064static const struct i2c_device_id sii902x_i2c_ids[] = {
1065 { "sii9022", 0 },
1066 { },
1067};
1068MODULE_DEVICE_TABLE(i2c, sii902x_i2c_ids);
1069
1070static struct i2c_driver sii902x_driver = {
1071 .probe = sii902x_probe,
1072 .remove = sii902x_remove,
1073 .driver = {
1074 .name = "sii902x",
1075 .of_match_table = sii902x_dt_ids,
1076 },
1077 .id_table = sii902x_i2c_ids,
1078};
1079module_i2c_driver(sii902x_driver);
1080
1081MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
1082MODULE_DESCRIPTION("SII902x RGB -> HDMI bridges");
1083MODULE_LICENSE("GPL");