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v6.13.7
  1// SPDX-License-Identifier: GPL-2.0+
  2// Copyright 2018 IBM Corporation
  3
  4#include <linux/clk.h>
  5#include <linux/dma-mapping.h>
  6#include <linux/irq.h>
  7#include <linux/mfd/syscon.h>
  8#include <linux/module.h>
  9#include <linux/mod_devicetable.h>
 10#include <linux/of_reserved_mem.h>
 11#include <linux/platform_device.h>
 12#include <linux/property.h>
 13#include <linux/regmap.h>
 14#include <linux/reset.h>
 15
 16#include <drm/drm_atomic_helper.h>
 17#include <drm/drm_client_setup.h>
 18#include <drm/drm_device.h>
 19#include <drm/drm_fbdev_dma.h>
 20#include <drm/drm_gem_dma_helper.h>
 
 21#include <drm/drm_gem_framebuffer_helper.h>
 22#include <drm/drm_module.h>
 23#include <drm/drm_probe_helper.h>
 24#include <drm/drm_simple_kms_helper.h>
 25#include <drm/drm_vblank.h>
 26#include <drm/drm_drv.h>
 27
 28#include "aspeed_gfx.h"
 29
 30/**
 31 * DOC: ASPEED GFX Driver
 32 *
 33 * This driver is for the ASPEED BMC SoC's 'GFX' display hardware, also called
 34 * the 'SOC Display Controller' in the datasheet. This driver runs on the ARM
 35 * based BMC systems, unlike the ast driver which runs on a host CPU and is for
 36 * a PCIe graphics device.
 37 *
 38 * The AST2500 supports a total of 3 output paths:
 39 *
 40 *   1. VGA output, the output target can choose either or both to the DAC
 41 *   or DVO interface.
 42 *
 43 *   2. Graphics CRT output, the output target can choose either or both to
 44 *   the DAC or DVO interface.
 45 *
 46 *   3. Video input from DVO, the video input can be used for video engine
 47 *   capture or DAC display output.
 48 *
 49 * Output options are selected in SCU2C.
 50 *
 51 * The "VGA mode" device is the PCI attached controller. The "Graphics CRT"
 52 * is the ARM's internal display controller.
 53 *
 54 * The driver only supports a simple configuration consisting of a 40MHz
 55 * pixel clock, fixed by hardware limitations, and the VGA output path.
 56 *
 57 * The driver was written with the 'AST2500 Software Programming Guide' v17,
 58 * which is available under NDA from ASPEED.
 59 */
 60
 61struct aspeed_gfx_config {
 62	u32 dac_reg;		/* DAC register in SCU */
 63	u32 int_clear_reg;	/* Interrupt clear register */
 64	u32 vga_scratch_reg;	/* VGA scratch register in SCU */
 65	u32 throd_val;		/* Default Threshold Seting */
 66	u32 scan_line_max;	/* Max memory size of one scan line */
 67};
 68
 69static const struct aspeed_gfx_config ast2400_config = {
 70	.dac_reg = 0x2c,
 71	.int_clear_reg = 0x60,
 72	.vga_scratch_reg = 0x50,
 73	.throd_val = CRT_THROD_LOW(0x1e) | CRT_THROD_HIGH(0x12),
 74	.scan_line_max = 64,
 75};
 76
 77static const struct aspeed_gfx_config ast2500_config = {
 78	.dac_reg = 0x2c,
 79	.int_clear_reg = 0x60,
 80	.vga_scratch_reg = 0x50,
 81	.throd_val = CRT_THROD_LOW(0x24) | CRT_THROD_HIGH(0x3c),
 82	.scan_line_max = 128,
 83};
 84
 85static const struct aspeed_gfx_config ast2600_config = {
 86	.dac_reg = 0xc0,
 87	.int_clear_reg = 0x68,
 88	.vga_scratch_reg = 0x50,
 89	.throd_val = CRT_THROD_LOW(0x50) | CRT_THROD_HIGH(0x70),
 90	.scan_line_max = 128,
 91};
 92
 93static const struct of_device_id aspeed_gfx_match[] = {
 94	{ .compatible = "aspeed,ast2400-gfx", .data = &ast2400_config },
 95	{ .compatible = "aspeed,ast2500-gfx", .data = &ast2500_config },
 96	{ .compatible = "aspeed,ast2600-gfx", .data = &ast2600_config },
 97	{ },
 98};
 99MODULE_DEVICE_TABLE(of, aspeed_gfx_match);
100
101static const struct drm_mode_config_funcs aspeed_gfx_mode_config_funcs = {
102	.fb_create		= drm_gem_fb_create,
103	.atomic_check		= drm_atomic_helper_check,
104	.atomic_commit		= drm_atomic_helper_commit,
105};
106
107static int aspeed_gfx_setup_mode_config(struct drm_device *drm)
108{
109	int ret;
110
111	ret = drmm_mode_config_init(drm);
112	if (ret)
113		return ret;
114
115	drm->mode_config.min_width = 0;
116	drm->mode_config.min_height = 0;
117	drm->mode_config.max_width = 800;
118	drm->mode_config.max_height = 600;
119	drm->mode_config.funcs = &aspeed_gfx_mode_config_funcs;
120
121	return ret;
122}
123
124static irqreturn_t aspeed_gfx_irq_handler(int irq, void *data)
125{
126	struct drm_device *drm = data;
127	struct aspeed_gfx *priv = to_aspeed_gfx(drm);
128	u32 reg;
129
130	reg = readl(priv->base + CRT_CTRL1);
131
132	if (reg & CRT_CTRL_VERTICAL_INTR_STS) {
133		drm_crtc_handle_vblank(&priv->pipe.crtc);
134		writel(reg, priv->base + priv->int_clr_reg);
135		return IRQ_HANDLED;
136	}
137
138	return IRQ_NONE;
139}
140
 
 
141static int aspeed_gfx_load(struct drm_device *drm)
142{
143	struct platform_device *pdev = to_platform_device(drm->dev);
144	struct aspeed_gfx *priv = to_aspeed_gfx(drm);
145	struct device_node *np = pdev->dev.of_node;
146	const struct aspeed_gfx_config *config;
147	struct resource *res;
148	int ret;
149
150	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
151	priv->base = devm_ioremap_resource(drm->dev, res);
152	if (IS_ERR(priv->base))
153		return PTR_ERR(priv->base);
154
155	config = device_get_match_data(&pdev->dev);
156	if (!config)
157		return -EINVAL;
158
159	priv->dac_reg = config->dac_reg;
160	priv->int_clr_reg = config->int_clear_reg;
161	priv->vga_scratch_reg = config->vga_scratch_reg;
162	priv->throd_val = config->throd_val;
163	priv->scan_line_max = config->scan_line_max;
164
165	priv->scu = syscon_regmap_lookup_by_phandle(np, "syscon");
166	if (IS_ERR(priv->scu)) {
167		priv->scu = syscon_regmap_lookup_by_compatible("aspeed,ast2500-scu");
168		if (IS_ERR(priv->scu)) {
169			dev_err(&pdev->dev, "failed to find SCU regmap\n");
170			return PTR_ERR(priv->scu);
171		}
172	}
173
174	ret = of_reserved_mem_device_init(drm->dev);
175	if (ret) {
176		dev_err(&pdev->dev,
177			"failed to initialize reserved mem: %d\n", ret);
178		return ret;
179	}
180
181	ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32));
182	if (ret) {
183		dev_err(&pdev->dev, "failed to set DMA mask: %d\n", ret);
184		return ret;
185	}
186
187	priv->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
188	if (IS_ERR(priv->rst)) {
189		dev_err(&pdev->dev,
190			"missing or invalid reset controller device tree entry");
191		return PTR_ERR(priv->rst);
192	}
193	reset_control_deassert(priv->rst);
194
195	priv->clk = devm_clk_get(drm->dev, NULL);
196	if (IS_ERR(priv->clk)) {
197		dev_err(&pdev->dev,
198			"missing or invalid clk device tree entry");
199		return PTR_ERR(priv->clk);
200	}
201	clk_prepare_enable(priv->clk);
202
203	/* Sanitize control registers */
204	writel(0, priv->base + CRT_CTRL1);
205	writel(0, priv->base + CRT_CTRL2);
206
207	ret = aspeed_gfx_setup_mode_config(drm);
208	if (ret < 0)
209		return ret;
210
211	ret = drm_vblank_init(drm, 1);
212	if (ret < 0) {
213		dev_err(drm->dev, "Failed to initialise vblank\n");
214		return ret;
215	}
216
217	ret = aspeed_gfx_create_output(drm);
218	if (ret < 0) {
219		dev_err(drm->dev, "Failed to create outputs\n");
220		return ret;
221	}
222
223	ret = aspeed_gfx_create_pipe(drm);
224	if (ret < 0) {
225		dev_err(drm->dev, "Cannot setup simple display pipe\n");
226		return ret;
227	}
228
229	ret = devm_request_irq(drm->dev, platform_get_irq(pdev, 0),
230			       aspeed_gfx_irq_handler, 0, "aspeed gfx", drm);
231	if (ret < 0) {
232		dev_err(drm->dev, "Failed to install IRQ handler\n");
233		return ret;
234	}
235
236	drm_mode_config_reset(drm);
237
238	return 0;
239}
240
241static void aspeed_gfx_unload(struct drm_device *drm)
242{
243	drm_kms_helper_poll_fini(drm);
 
244}
245
246DEFINE_DRM_GEM_DMA_FOPS(fops);
247
248static const struct drm_driver aspeed_gfx_driver = {
249	.driver_features        = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
250	DRM_GEM_DMA_DRIVER_OPS,
251	DRM_FBDEV_DMA_DRIVER_OPS,
 
 
 
 
252	.fops = &fops,
253	.name = "aspeed-gfx-drm",
254	.desc = "ASPEED GFX DRM",
255	.date = "20180319",
256	.major = 1,
257	.minor = 0,
258};
259
260static ssize_t dac_mux_store(struct device *dev, struct device_attribute *attr,
261			     const char *buf, size_t count)
262{
263	struct aspeed_gfx *priv = dev_get_drvdata(dev);
264	u32 val;
265	int rc;
266
267	rc = kstrtou32(buf, 0, &val);
268	if (rc)
269		return rc;
270
271	if (val > 3)
272		return -EINVAL;
273
274	rc = regmap_update_bits(priv->scu, priv->dac_reg, 0x30000, val << 16);
275	if (rc < 0)
276		return 0;
277
278	return count;
279}
280
281static ssize_t dac_mux_show(struct device *dev, struct device_attribute *attr, char *buf)
282{
283	struct aspeed_gfx *priv = dev_get_drvdata(dev);
284	u32 reg;
285	int rc;
286
287	rc = regmap_read(priv->scu, priv->dac_reg, &reg);
288	if (rc)
289		return rc;
290
291	return sprintf(buf, "%u\n", (reg >> 16) & 0x3);
292}
293static DEVICE_ATTR_RW(dac_mux);
294
295static ssize_t
296vga_pw_show(struct device *dev, struct device_attribute *attr, char *buf)
297{
298	struct aspeed_gfx *priv = dev_get_drvdata(dev);
299	u32 reg;
300	int rc;
301
302	rc = regmap_read(priv->scu, priv->vga_scratch_reg, &reg);
303	if (rc)
304		return rc;
305
306	return sprintf(buf, "%u\n", reg);
307}
308static DEVICE_ATTR_RO(vga_pw);
309
310static struct attribute *aspeed_sysfs_entries[] = {
311	&dev_attr_vga_pw.attr,
312	&dev_attr_dac_mux.attr,
313	NULL,
314};
315
316static struct attribute_group aspeed_sysfs_attr_group = {
317	.attrs = aspeed_sysfs_entries,
318};
319
320static int aspeed_gfx_probe(struct platform_device *pdev)
321{
322	struct aspeed_gfx *priv;
323	int ret;
324
325	priv = devm_drm_dev_alloc(&pdev->dev, &aspeed_gfx_driver,
326				  struct aspeed_gfx, drm);
327	if (IS_ERR(priv))
328		return PTR_ERR(priv);
329
330	ret = aspeed_gfx_load(&priv->drm);
331	if (ret)
332		return ret;
333
334	platform_set_drvdata(pdev, priv);
335
336	ret = sysfs_create_group(&pdev->dev.kobj, &aspeed_sysfs_attr_group);
337	if (ret)
338		return ret;
339
340	ret = drm_dev_register(&priv->drm, 0);
341	if (ret)
342		goto err_unload;
343
344	drm_client_setup(&priv->drm, NULL);
345	return 0;
346
347err_unload:
348	sysfs_remove_group(&pdev->dev.kobj, &aspeed_sysfs_attr_group);
349	aspeed_gfx_unload(&priv->drm);
350
351	return ret;
352}
353
354static void aspeed_gfx_remove(struct platform_device *pdev)
355{
356	struct drm_device *drm = platform_get_drvdata(pdev);
357
358	sysfs_remove_group(&pdev->dev.kobj, &aspeed_sysfs_attr_group);
359	drm_dev_unregister(drm);
360	aspeed_gfx_unload(drm);
361	drm_atomic_helper_shutdown(drm);
362}
363
364static void aspeed_gfx_shutdown(struct platform_device *pdev)
365{
366	drm_atomic_helper_shutdown(platform_get_drvdata(pdev));
367}
368
369static struct platform_driver aspeed_gfx_platform_driver = {
370	.probe		= aspeed_gfx_probe,
371	.remove		= aspeed_gfx_remove,
372	.shutdown	= aspeed_gfx_shutdown,
373	.driver = {
374		.name = "aspeed_gfx",
375		.of_match_table = aspeed_gfx_match,
376	},
377};
378
379drm_module_platform_driver(aspeed_gfx_platform_driver);
380
381MODULE_AUTHOR("Joel Stanley <joel@jms.id.au>");
382MODULE_DESCRIPTION("ASPEED BMC DRM/KMS driver");
383MODULE_LICENSE("GPL");
v5.9
  1// SPDX-License-Identifier: GPL-2.0+
  2// Copyright 2018 IBM Corporation
  3
  4#include <linux/clk.h>
  5#include <linux/dma-mapping.h>
  6#include <linux/irq.h>
  7#include <linux/mfd/syscon.h>
  8#include <linux/module.h>
  9#include <linux/of.h>
 10#include <linux/of_reserved_mem.h>
 11#include <linux/platform_device.h>
 
 12#include <linux/regmap.h>
 13#include <linux/reset.h>
 14
 15#include <drm/drm_atomic_helper.h>
 16#include <drm/drm_crtc_helper.h>
 17#include <drm/drm_device.h>
 18#include <drm/drm_fb_cma_helper.h>
 19#include <drm/drm_fb_helper.h>
 20#include <drm/drm_gem_cma_helper.h>
 21#include <drm/drm_gem_framebuffer_helper.h>
 
 22#include <drm/drm_probe_helper.h>
 23#include <drm/drm_simple_kms_helper.h>
 24#include <drm/drm_vblank.h>
 25#include <drm/drm_drv.h>
 26
 27#include "aspeed_gfx.h"
 28
 29/**
 30 * DOC: ASPEED GFX Driver
 31 *
 32 * This driver is for the ASPEED BMC SoC's 'GFX' display hardware, also called
 33 * the 'SOC Display Controller' in the datasheet. This driver runs on the ARM
 34 * based BMC systems, unlike the ast driver which runs on a host CPU and is for
 35 * a PCIe graphics device.
 36 *
 37 * The AST2500 supports a total of 3 output paths:
 38 *
 39 *   1. VGA output, the output target can choose either or both to the DAC
 40 *   or DVO interface.
 41 *
 42 *   2. Graphics CRT output, the output target can choose either or both to
 43 *   the DAC or DVO interface.
 44 *
 45 *   3. Video input from DVO, the video input can be used for video engine
 46 *   capture or DAC display output.
 47 *
 48 * Output options are selected in SCU2C.
 49 *
 50 * The "VGA mode" device is the PCI attached controller. The "Graphics CRT"
 51 * is the ARM's internal display controller.
 52 *
 53 * The driver only supports a simple configuration consisting of a 40MHz
 54 * pixel clock, fixed by hardware limitations, and the VGA output path.
 55 *
 56 * The driver was written with the 'AST2500 Software Programming Guide' v17,
 57 * which is available under NDA from ASPEED.
 58 */
 59
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 60static const struct drm_mode_config_funcs aspeed_gfx_mode_config_funcs = {
 61	.fb_create		= drm_gem_fb_create,
 62	.atomic_check		= drm_atomic_helper_check,
 63	.atomic_commit		= drm_atomic_helper_commit,
 64};
 65
 66static void aspeed_gfx_setup_mode_config(struct drm_device *drm)
 67{
 68	drm_mode_config_init(drm);
 
 
 
 
 69
 70	drm->mode_config.min_width = 0;
 71	drm->mode_config.min_height = 0;
 72	drm->mode_config.max_width = 800;
 73	drm->mode_config.max_height = 600;
 74	drm->mode_config.funcs = &aspeed_gfx_mode_config_funcs;
 
 
 75}
 76
 77static irqreturn_t aspeed_gfx_irq_handler(int irq, void *data)
 78{
 79	struct drm_device *drm = data;
 80	struct aspeed_gfx *priv = to_aspeed_gfx(drm);
 81	u32 reg;
 82
 83	reg = readl(priv->base + CRT_CTRL1);
 84
 85	if (reg & CRT_CTRL_VERTICAL_INTR_STS) {
 86		drm_crtc_handle_vblank(&priv->pipe.crtc);
 87		writel(reg, priv->base + CRT_CTRL1);
 88		return IRQ_HANDLED;
 89	}
 90
 91	return IRQ_NONE;
 92}
 93
 94
 95
 96static int aspeed_gfx_load(struct drm_device *drm)
 97{
 98	struct platform_device *pdev = to_platform_device(drm->dev);
 99	struct aspeed_gfx *priv = to_aspeed_gfx(drm);
 
 
100	struct resource *res;
101	int ret;
102
103	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
104	priv->base = devm_ioremap_resource(drm->dev, res);
105	if (IS_ERR(priv->base))
106		return PTR_ERR(priv->base);
107
108	priv->scu = syscon_regmap_lookup_by_compatible("aspeed,ast2500-scu");
 
 
 
 
 
 
 
 
 
 
109	if (IS_ERR(priv->scu)) {
110		dev_err(&pdev->dev, "failed to find SCU regmap\n");
111		return PTR_ERR(priv->scu);
 
 
 
112	}
113
114	ret = of_reserved_mem_device_init(drm->dev);
115	if (ret) {
116		dev_err(&pdev->dev,
117			"failed to initialize reserved mem: %d\n", ret);
118		return ret;
119	}
120
121	ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32));
122	if (ret) {
123		dev_err(&pdev->dev, "failed to set DMA mask: %d\n", ret);
124		return ret;
125	}
126
127	priv->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
128	if (IS_ERR(priv->rst)) {
129		dev_err(&pdev->dev,
130			"missing or invalid reset controller device tree entry");
131		return PTR_ERR(priv->rst);
132	}
133	reset_control_deassert(priv->rst);
134
135	priv->clk = devm_clk_get(drm->dev, NULL);
136	if (IS_ERR(priv->clk)) {
137		dev_err(&pdev->dev,
138			"missing or invalid clk device tree entry");
139		return PTR_ERR(priv->clk);
140	}
141	clk_prepare_enable(priv->clk);
142
143	/* Sanitize control registers */
144	writel(0, priv->base + CRT_CTRL1);
145	writel(0, priv->base + CRT_CTRL2);
146
147	aspeed_gfx_setup_mode_config(drm);
 
 
148
149	ret = drm_vblank_init(drm, 1);
150	if (ret < 0) {
151		dev_err(drm->dev, "Failed to initialise vblank\n");
152		return ret;
153	}
154
155	ret = aspeed_gfx_create_output(drm);
156	if (ret < 0) {
157		dev_err(drm->dev, "Failed to create outputs\n");
158		return ret;
159	}
160
161	ret = aspeed_gfx_create_pipe(drm);
162	if (ret < 0) {
163		dev_err(drm->dev, "Cannot setup simple display pipe\n");
164		return ret;
165	}
166
167	ret = devm_request_irq(drm->dev, platform_get_irq(pdev, 0),
168			       aspeed_gfx_irq_handler, 0, "aspeed gfx", drm);
169	if (ret < 0) {
170		dev_err(drm->dev, "Failed to install IRQ handler\n");
171		return ret;
172	}
173
174	drm_mode_config_reset(drm);
175
176	return 0;
177}
178
179static void aspeed_gfx_unload(struct drm_device *drm)
180{
181	drm_kms_helper_poll_fini(drm);
182	drm_mode_config_cleanup(drm);
183}
184
185DEFINE_DRM_GEM_CMA_FOPS(fops);
186
187static struct drm_driver aspeed_gfx_driver = {
188	.driver_features        = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
189	.gem_create_object	= drm_gem_cma_create_object_default_funcs,
190	.dumb_create		= drm_gem_cma_dumb_create,
191	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,
192	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
193	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
194	.gem_prime_mmap		= drm_gem_prime_mmap,
195	.fops = &fops,
196	.name = "aspeed-gfx-drm",
197	.desc = "ASPEED GFX DRM",
198	.date = "20180319",
199	.major = 1,
200	.minor = 0,
201};
202
203static const struct of_device_id aspeed_gfx_match[] = {
204	{ .compatible = "aspeed,ast2500-gfx" },
205	{ }
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
206};
207
208static int aspeed_gfx_probe(struct platform_device *pdev)
209{
210	struct aspeed_gfx *priv;
211	int ret;
212
213	priv = devm_drm_dev_alloc(&pdev->dev, &aspeed_gfx_driver,
214				  struct aspeed_gfx, drm);
215	if (IS_ERR(priv))
216		return PTR_ERR(priv);
217
218	ret = aspeed_gfx_load(&priv->drm);
219	if (ret)
220		return ret;
221
 
 
 
 
 
 
222	ret = drm_dev_register(&priv->drm, 0);
223	if (ret)
224		goto err_unload;
225
226	drm_fbdev_generic_setup(&priv->drm, 32);
227	return 0;
228
229err_unload:
 
230	aspeed_gfx_unload(&priv->drm);
231
232	return ret;
233}
234
235static int aspeed_gfx_remove(struct platform_device *pdev)
236{
237	struct drm_device *drm = platform_get_drvdata(pdev);
238
 
239	drm_dev_unregister(drm);
240	aspeed_gfx_unload(drm);
 
 
241
242	return 0;
 
 
243}
244
245static struct platform_driver aspeed_gfx_platform_driver = {
246	.probe		= aspeed_gfx_probe,
247	.remove		= aspeed_gfx_remove,
 
248	.driver = {
249		.name = "aspeed_gfx",
250		.of_match_table = aspeed_gfx_match,
251	},
252};
253
254module_platform_driver(aspeed_gfx_platform_driver);
255
256MODULE_AUTHOR("Joel Stanley <joel@jms.id.au>");
257MODULE_DESCRIPTION("ASPEED BMC DRM/KMS driver");
258MODULE_LICENSE("GPL");