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v6.13.7
 1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * Minimalist driver for a generic PCI-to-EISA bridge.
 4 *
 5 * (C) 2003 Marc Zyngier <maz@wild-wind.fr.eu.org>
 6 *
 7 * Ivan Kokshaysky <ink@jurassic.park.msu.ru> :
 8 * Generalisation from i82375 to PCI_CLASS_BRIDGE_EISA.
 9 */
10
11#include <linux/kernel.h>
12#include <linux/device.h>
13#include <linux/eisa.h>
14#include <linux/pci.h>
15#include <linux/module.h>
16#include <linux/init.h>
17
18/* There is only *one* pci_eisa device per machine, right ? */
19static struct eisa_root_device pci_eisa_root;
20
21static int __init pci_eisa_init(struct pci_dev *pdev)
22{
 
23	struct resource *res, *bus_res = NULL;
24	int rc;
25
26	if ((rc = pci_enable_device (pdev))) {
27		dev_err(&pdev->dev, "Could not enable device\n");
28		return rc;
29	}
30
31	/*
32	 * The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI
33	 * device, so the resources available on EISA are the same as those
34	 * available on the 82375 bus.  This works the same as a PCI-PCI
35	 * bridge in subtractive-decode mode (see pci_read_bridge_bases()).
36	 * We assume other PCI-EISA bridges are similar.
37	 *
38	 * eisa_root_register() can only deal with a single io port resource,
39	*  so we use the first valid io port resource.
40	 */
41	pci_bus_for_each_resource(pdev->bus, res)
42		if (res && (res->flags & IORESOURCE_IO)) {
43			bus_res = res;
44			break;
45		}
46
47	if (!bus_res) {
48		dev_err(&pdev->dev, "No resources available\n");
49		return -1;
50	}
51
52	pci_eisa_root.dev		= &pdev->dev;
53	pci_eisa_root.res		= bus_res;
54	pci_eisa_root.bus_base_addr	= bus_res->start;
55	pci_eisa_root.slots		= EISA_MAX_SLOTS;
56	pci_eisa_root.dma_mask		= pdev->dma_mask;
57	dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root);
58
59	if (eisa_root_register (&pci_eisa_root)) {
60		dev_err(&pdev->dev, "Could not register EISA root\n");
61		return -1;
62	}
63
64	return 0;
65}
66
67/*
68 * We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init().
69 *   Otherwise pnp resource will get enabled early and could prevent eisa
70 *   to be initialized.
71 * Also need to make sure pci_eisa_init_early() is called after
72 * x86/pci_subsys_init().
73 * So need to use subsys_initcall_sync with it.
74 */
75static int __init pci_eisa_init_early(void)
76{
77	struct pci_dev *dev = NULL;
78	int ret;
79
80	for_each_pci_dev(dev)
81		if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) {
82			ret = pci_eisa_init(dev);
83			if (ret)
84				return ret;
85		}
86
87	return 0;
88}
89subsys_initcall_sync(pci_eisa_init_early);
v5.9
 1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * Minimalist driver for a generic PCI-to-EISA bridge.
 4 *
 5 * (C) 2003 Marc Zyngier <maz@wild-wind.fr.eu.org>
 6 *
 7 * Ivan Kokshaysky <ink@jurassic.park.msu.ru> :
 8 * Generalisation from i82375 to PCI_CLASS_BRIDGE_EISA.
 9 */
10
11#include <linux/kernel.h>
12#include <linux/device.h>
13#include <linux/eisa.h>
14#include <linux/pci.h>
15#include <linux/module.h>
16#include <linux/init.h>
17
18/* There is only *one* pci_eisa device per machine, right ? */
19static struct eisa_root_device pci_eisa_root;
20
21static int __init pci_eisa_init(struct pci_dev *pdev)
22{
23	int rc, i;
24	struct resource *res, *bus_res = NULL;
 
25
26	if ((rc = pci_enable_device (pdev))) {
27		dev_err(&pdev->dev, "Could not enable device\n");
28		return rc;
29	}
30
31	/*
32	 * The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI
33	 * device, so the resources available on EISA are the same as those
34	 * available on the 82375 bus.  This works the same as a PCI-PCI
35	 * bridge in subtractive-decode mode (see pci_read_bridge_bases()).
36	 * We assume other PCI-EISA bridges are similar.
37	 *
38	 * eisa_root_register() can only deal with a single io port resource,
39	*  so we use the first valid io port resource.
40	 */
41	pci_bus_for_each_resource(pdev->bus, res, i)
42		if (res && (res->flags & IORESOURCE_IO)) {
43			bus_res = res;
44			break;
45		}
46
47	if (!bus_res) {
48		dev_err(&pdev->dev, "No resources available\n");
49		return -1;
50	}
51
52	pci_eisa_root.dev		= &pdev->dev;
53	pci_eisa_root.res		= bus_res;
54	pci_eisa_root.bus_base_addr	= bus_res->start;
55	pci_eisa_root.slots		= EISA_MAX_SLOTS;
56	pci_eisa_root.dma_mask		= pdev->dma_mask;
57	dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root);
58
59	if (eisa_root_register (&pci_eisa_root)) {
60		dev_err(&pdev->dev, "Could not register EISA root\n");
61		return -1;
62	}
63
64	return 0;
65}
66
67/*
68 * We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init().
69 *   Otherwise pnp resource will get enabled early and could prevent eisa
70 *   to be initialized.
71 * Also need to make sure pci_eisa_init_early() is called after
72 * x86/pci_subsys_init().
73 * So need to use subsys_initcall_sync with it.
74 */
75static int __init pci_eisa_init_early(void)
76{
77	struct pci_dev *dev = NULL;
78	int ret;
79
80	for_each_pci_dev(dev)
81		if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) {
82			ret = pci_eisa_init(dev);
83			if (ret)
84				return ret;
85		}
86
87	return 0;
88}
89subsys_initcall_sync(pci_eisa_init_early);