1# SPDX-License-Identifier: GPL-2.0
 2#
 3# Hisilicon Clock specific Makefile
 4#
 5
 6obj-y	+= clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o
 7
 8obj-$(CONFIG_ARCH_HI3xxx)	+= clk-hi3620.o
 9obj-$(CONFIG_ARCH_HIP04)	+= clk-hip04.o
10obj-$(CONFIG_ARCH_HIX5HD2)	+= clk-hix5hd2.o
11obj-$(CONFIG_COMMON_CLK_HI3516CV300)	+= crg-hi3516cv300.o
12obj-$(CONFIG_COMMON_CLK_HI3519)	+= clk-hi3519.o
13obj-$(CONFIG_COMMON_CLK_HI3559A)	+= clk-hi3559a.o
14obj-$(CONFIG_COMMON_CLK_HI3660) += clk-hi3660.o
15obj-$(CONFIG_COMMON_CLK_HI3670) += clk-hi3670.o
16obj-$(CONFIG_COMMON_CLK_HI3798CV200)	+= crg-hi3798cv200.o
17obj-$(CONFIG_COMMON_CLK_HI6220)	+= clk-hi6220.o
18obj-$(CONFIG_RESET_HISI)	+= reset.o
19obj-$(CONFIG_STUB_CLK_HI6220)	+= clk-hi6220-stub.o
20obj-$(CONFIG_STUB_CLK_HI3660)	+= clk-hi3660-stub.o

 1# SPDX-License-Identifier: GPL-2.0
 2#
 3# Hisilicon Clock specific Makefile
 4#
 5
 6obj-y	+= clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o
 7
 8obj-$(CONFIG_ARCH_HI3xxx)	+= clk-hi3620.o
 9obj-$(CONFIG_ARCH_HIP04)	+= clk-hip04.o
10obj-$(CONFIG_ARCH_HIX5HD2)	+= clk-hix5hd2.o
11obj-$(CONFIG_COMMON_CLK_HI3516CV300)	+= crg-hi3516cv300.o
12obj-$(CONFIG_COMMON_CLK_HI3519)	+= clk-hi3519.o
 
13obj-$(CONFIG_COMMON_CLK_HI3660) += clk-hi3660.o
14obj-$(CONFIG_COMMON_CLK_HI3670) += clk-hi3670.o
15obj-$(CONFIG_COMMON_CLK_HI3798CV200)	+= crg-hi3798cv200.o
16obj-$(CONFIG_COMMON_CLK_HI6220)	+= clk-hi6220.o
17obj-$(CONFIG_RESET_HISI)	+= reset.o
18obj-$(CONFIG_STUB_CLK_HI6220)	+= clk-hi6220-stub.o
19obj-$(CONFIG_STUB_CLK_HI3660)	+= clk-hi3660-stub.o