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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Jailhouse paravirt_ops implementation
4 *
5 * Copyright (c) Siemens AG, 2015-2017
6 *
7 * Authors:
8 * Jan Kiszka <jan.kiszka@siemens.com>
9 */
10
11#include <linux/acpi_pmtmr.h>
12#include <linux/kernel.h>
13#include <linux/reboot.h>
14#include <linux/serial_8250.h>
15#include <linux/acpi.h>
16#include <asm/apic.h>
17#include <asm/io_apic.h>
18#include <asm/acpi.h>
19#include <asm/cpu.h>
20#include <asm/hypervisor.h>
21#include <asm/i8259.h>
22#include <asm/irqdomain.h>
23#include <asm/pci_x86.h>
24#include <asm/reboot.h>
25#include <asm/setup.h>
26#include <asm/jailhouse_para.h>
27
28static struct jailhouse_setup_data setup_data;
29#define SETUP_DATA_V1_LEN (sizeof(setup_data.hdr) + sizeof(setup_data.v1))
30#define SETUP_DATA_V2_LEN (SETUP_DATA_V1_LEN + sizeof(setup_data.v2))
31
32static unsigned int precalibrated_tsc_khz;
33
34static void jailhouse_setup_irq(unsigned int irq)
35{
36 struct mpc_intsrc mp_irq = {
37 .type = MP_INTSRC,
38 .irqtype = mp_INT,
39 .irqflag = MP_IRQPOL_ACTIVE_HIGH | MP_IRQTRIG_EDGE,
40 .srcbusirq = irq,
41 .dstirq = irq,
42 };
43 mp_save_irq(&mp_irq);
44}
45
46static uint32_t jailhouse_cpuid_base(void)
47{
48 if (boot_cpu_data.cpuid_level < 0 ||
49 !boot_cpu_has(X86_FEATURE_HYPERVISOR))
50 return 0;
51
52 return hypervisor_cpuid_base("Jailhouse\0\0\0", 0);
53}
54
55static uint32_t __init jailhouse_detect(void)
56{
57 return jailhouse_cpuid_base();
58}
59
60static void jailhouse_get_wallclock(struct timespec64 *now)
61{
62 memset(now, 0, sizeof(*now));
63}
64
65static void __init jailhouse_timer_init(void)
66{
67 lapic_timer_period = setup_data.v1.apic_khz * (1000 / HZ);
68}
69
70static unsigned long jailhouse_get_tsc(void)
71{
72 return precalibrated_tsc_khz;
73}
74
75static void __init jailhouse_x2apic_init(void)
76{
77#ifdef CONFIG_X86_X2APIC
78 if (!x2apic_enabled())
79 return;
80 /*
81 * We do not have access to IR inside Jailhouse non-root cells. So
82 * we have to run in physical mode.
83 */
84 x2apic_phys = 1;
85 /*
86 * This will trigger the switch to apic_x2apic_phys. Empty OEM IDs
87 * ensure that only this APIC driver picks up the call.
88 */
89 default_acpi_madt_oem_check("", "");
90#endif
91}
92
93static void __init jailhouse_parse_smp_config(void)
94{
95 struct ioapic_domain_cfg ioapic_cfg = {
96 .type = IOAPIC_DOMAIN_STRICT,
97 .ops = &mp_ioapic_irqdomain_ops,
98 };
99 unsigned int cpu;
100
101 jailhouse_x2apic_init();
102
103 register_lapic_address(0xfee00000);
104
105 for (cpu = 0; cpu < setup_data.v1.num_cpus; cpu++)
106 topology_register_apic(setup_data.v1.cpu_ids[cpu], CPU_ACPIID_INVALID, true);
107
108 smp_found_config = 1;
109
110 if (setup_data.v1.standard_ioapic) {
111 mp_register_ioapic(0, 0xfec00000, gsi_top, &ioapic_cfg);
112
113 if (IS_ENABLED(CONFIG_SERIAL_8250) &&
114 setup_data.hdr.version < 2) {
115 /* Register 1:1 mapping for legacy UART IRQs 3 and 4 */
116 jailhouse_setup_irq(3);
117 jailhouse_setup_irq(4);
118 }
119 }
120}
121
122static void jailhouse_no_restart(void)
123{
124 pr_notice("Jailhouse: Restart not supported, halting\n");
125 machine_halt();
126}
127
128static int __init jailhouse_pci_arch_init(void)
129{
130 pci_direct_init(1);
131
132 /*
133 * There are no bridges on the virtual PCI root bus under Jailhouse,
134 * thus no other way to discover all devices than a full scan.
135 * Respect any overrides via the command line, though.
136 */
137 if (pcibios_last_bus < 0)
138 pcibios_last_bus = 0xff;
139
140#ifdef CONFIG_PCI_MMCONFIG
141 if (setup_data.v1.pci_mmconfig_base) {
142 pci_mmconfig_add(0, 0, pcibios_last_bus,
143 setup_data.v1.pci_mmconfig_base);
144 pci_mmcfg_arch_init();
145 }
146#endif
147
148 return 0;
149}
150
151#ifdef CONFIG_SERIAL_8250
152static inline bool jailhouse_uart_enabled(unsigned int uart_nr)
153{
154 return setup_data.v2.flags & BIT(uart_nr);
155}
156
157static void jailhouse_serial_fixup(int port, struct uart_port *up,
158 u32 *capabilities)
159{
160 static const u16 pcuart_base[] = {0x3f8, 0x2f8, 0x3e8, 0x2e8};
161 unsigned int n;
162
163 for (n = 0; n < ARRAY_SIZE(pcuart_base); n++) {
164 if (pcuart_base[n] != up->iobase)
165 continue;
166
167 if (jailhouse_uart_enabled(n)) {
168 pr_info("Enabling UART%u (port 0x%lx)\n", n,
169 up->iobase);
170 jailhouse_setup_irq(up->irq);
171 } else {
172 /* Deactivate UART if access isn't allowed */
173 up->iobase = 0;
174 }
175 break;
176 }
177}
178
179static void __init jailhouse_serial_workaround(void)
180{
181 /*
182 * There are flags inside setup_data that indicate availability of
183 * platform UARTs since setup data version 2.
184 *
185 * In case of version 1, we don't know which UARTs belong Linux. In
186 * this case, unconditionally register 1:1 mapping for legacy UART IRQs
187 * 3 and 4.
188 */
189 if (setup_data.hdr.version > 1)
190 serial8250_set_isa_configurator(jailhouse_serial_fixup);
191}
192#else /* !CONFIG_SERIAL_8250 */
193static inline void jailhouse_serial_workaround(void)
194{
195}
196#endif /* CONFIG_SERIAL_8250 */
197
198static void __init jailhouse_init_platform(void)
199{
200 u64 pa_data = boot_params.hdr.setup_data;
201 unsigned long setup_data_len;
202 struct setup_data header;
203 void *mapping;
204
205 x86_init.irqs.pre_vector_init = x86_init_noop;
206 x86_init.timers.timer_init = jailhouse_timer_init;
207 x86_init.mpparse.find_mptable = x86_init_noop;
208 x86_init.mpparse.early_parse_smp_cfg = x86_init_noop;
209 x86_init.mpparse.parse_smp_cfg = jailhouse_parse_smp_config;
210 x86_init.pci.arch_init = jailhouse_pci_arch_init;
211
212 x86_platform.calibrate_cpu = jailhouse_get_tsc;
213 x86_platform.calibrate_tsc = jailhouse_get_tsc;
214 x86_platform.get_wallclock = jailhouse_get_wallclock;
215 x86_platform.legacy.rtc = 0;
216 x86_platform.legacy.warm_reset = 0;
217 x86_platform.legacy.i8042 = X86_LEGACY_I8042_PLATFORM_ABSENT;
218
219 legacy_pic = &null_legacy_pic;
220
221 machine_ops.emergency_restart = jailhouse_no_restart;
222
223 while (pa_data) {
224 mapping = early_memremap(pa_data, sizeof(header));
225 memcpy(&header, mapping, sizeof(header));
226 early_memunmap(mapping, sizeof(header));
227
228 if (header.type == SETUP_JAILHOUSE)
229 break;
230
231 pa_data = header.next;
232 }
233
234 if (!pa_data)
235 panic("Jailhouse: No valid setup data found");
236
237 /* setup data must at least contain the header */
238 if (header.len < sizeof(setup_data.hdr))
239 goto unsupported;
240
241 pa_data += offsetof(struct setup_data, data);
242 setup_data_len = min_t(unsigned long, sizeof(setup_data),
243 (unsigned long)header.len);
244 mapping = early_memremap(pa_data, setup_data_len);
245 memcpy(&setup_data, mapping, setup_data_len);
246 early_memunmap(mapping, setup_data_len);
247
248 if (setup_data.hdr.version == 0 ||
249 setup_data.hdr.compatible_version !=
250 JAILHOUSE_SETUP_REQUIRED_VERSION ||
251 (setup_data.hdr.version == 1 && header.len < SETUP_DATA_V1_LEN) ||
252 (setup_data.hdr.version >= 2 && header.len < SETUP_DATA_V2_LEN))
253 goto unsupported;
254
255 pmtmr_ioport = setup_data.v1.pm_timer_address;
256 pr_debug("Jailhouse: PM-Timer IO Port: %#x\n", pmtmr_ioport);
257
258 precalibrated_tsc_khz = setup_data.v1.tsc_khz;
259 setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
260
261 pci_probe = 0;
262
263 /*
264 * Avoid that the kernel complains about missing ACPI tables - there
265 * are none in a non-root cell.
266 */
267 disable_acpi();
268
269 jailhouse_serial_workaround();
270 return;
271
272unsupported:
273 panic("Jailhouse: Unsupported setup data structure");
274}
275
276bool jailhouse_paravirt(void)
277{
278 return jailhouse_cpuid_base() != 0;
279}
280
281static bool __init jailhouse_x2apic_available(void)
282{
283 /*
284 * The x2APIC is only available if the root cell enabled it. Jailhouse
285 * does not support switching between xAPIC and x2APIC.
286 */
287 return x2apic_enabled();
288}
289
290const struct hypervisor_x86 x86_hyper_jailhouse __refconst = {
291 .name = "Jailhouse",
292 .detect = jailhouse_detect,
293 .init.init_platform = jailhouse_init_platform,
294 .init.x2apic_available = jailhouse_x2apic_available,
295 .ignore_nopv = true,
296};
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Jailhouse paravirt_ops implementation
4 *
5 * Copyright (c) Siemens AG, 2015-2017
6 *
7 * Authors:
8 * Jan Kiszka <jan.kiszka@siemens.com>
9 */
10
11#include <linux/acpi_pmtmr.h>
12#include <linux/kernel.h>
13#include <linux/reboot.h>
14#include <linux/serial_8250.h>
15#include <asm/apic.h>
16#include <asm/io_apic.h>
17#include <asm/acpi.h>
18#include <asm/cpu.h>
19#include <asm/hypervisor.h>
20#include <asm/i8259.h>
21#include <asm/irqdomain.h>
22#include <asm/pci_x86.h>
23#include <asm/reboot.h>
24#include <asm/setup.h>
25#include <asm/jailhouse_para.h>
26
27static struct jailhouse_setup_data setup_data;
28#define SETUP_DATA_V1_LEN (sizeof(setup_data.hdr) + sizeof(setup_data.v1))
29#define SETUP_DATA_V2_LEN (SETUP_DATA_V1_LEN + sizeof(setup_data.v2))
30
31static unsigned int precalibrated_tsc_khz;
32
33static void jailhouse_setup_irq(unsigned int irq)
34{
35 struct mpc_intsrc mp_irq = {
36 .type = MP_INTSRC,
37 .irqtype = mp_INT,
38 .irqflag = MP_IRQPOL_ACTIVE_HIGH | MP_IRQTRIG_EDGE,
39 .srcbusirq = irq,
40 .dstirq = irq,
41 };
42 mp_save_irq(&mp_irq);
43}
44
45static uint32_t jailhouse_cpuid_base(void)
46{
47 if (boot_cpu_data.cpuid_level < 0 ||
48 !boot_cpu_has(X86_FEATURE_HYPERVISOR))
49 return 0;
50
51 return hypervisor_cpuid_base("Jailhouse\0\0\0", 0);
52}
53
54static uint32_t __init jailhouse_detect(void)
55{
56 return jailhouse_cpuid_base();
57}
58
59static void jailhouse_get_wallclock(struct timespec64 *now)
60{
61 memset(now, 0, sizeof(*now));
62}
63
64static void __init jailhouse_timer_init(void)
65{
66 lapic_timer_period = setup_data.v1.apic_khz * (1000 / HZ);
67}
68
69static unsigned long jailhouse_get_tsc(void)
70{
71 return precalibrated_tsc_khz;
72}
73
74static void __init jailhouse_x2apic_init(void)
75{
76#ifdef CONFIG_X86_X2APIC
77 if (!x2apic_enabled())
78 return;
79 /*
80 * We do not have access to IR inside Jailhouse non-root cells. So
81 * we have to run in physical mode.
82 */
83 x2apic_phys = 1;
84 /*
85 * This will trigger the switch to apic_x2apic_phys. Empty OEM IDs
86 * ensure that only this APIC driver picks up the call.
87 */
88 default_acpi_madt_oem_check("", "");
89#endif
90}
91
92static void __init jailhouse_get_smp_config(unsigned int early)
93{
94 struct ioapic_domain_cfg ioapic_cfg = {
95 .type = IOAPIC_DOMAIN_STRICT,
96 .ops = &mp_ioapic_irqdomain_ops,
97 };
98 unsigned int cpu;
99
100 jailhouse_x2apic_init();
101
102 register_lapic_address(0xfee00000);
103
104 for (cpu = 0; cpu < setup_data.v1.num_cpus; cpu++) {
105 generic_processor_info(setup_data.v1.cpu_ids[cpu],
106 boot_cpu_apic_version);
107 }
108
109 smp_found_config = 1;
110
111 if (setup_data.v1.standard_ioapic) {
112 mp_register_ioapic(0, 0xfec00000, gsi_top, &ioapic_cfg);
113
114 if (IS_ENABLED(CONFIG_SERIAL_8250) &&
115 setup_data.hdr.version < 2) {
116 /* Register 1:1 mapping for legacy UART IRQs 3 and 4 */
117 jailhouse_setup_irq(3);
118 jailhouse_setup_irq(4);
119 }
120 }
121}
122
123static void jailhouse_no_restart(void)
124{
125 pr_notice("Jailhouse: Restart not supported, halting\n");
126 machine_halt();
127}
128
129static int __init jailhouse_pci_arch_init(void)
130{
131 pci_direct_init(1);
132
133 /*
134 * There are no bridges on the virtual PCI root bus under Jailhouse,
135 * thus no other way to discover all devices than a full scan.
136 * Respect any overrides via the command line, though.
137 */
138 if (pcibios_last_bus < 0)
139 pcibios_last_bus = 0xff;
140
141#ifdef CONFIG_PCI_MMCONFIG
142 if (setup_data.v1.pci_mmconfig_base) {
143 pci_mmconfig_add(0, 0, pcibios_last_bus,
144 setup_data.v1.pci_mmconfig_base);
145 pci_mmcfg_arch_init();
146 }
147#endif
148
149 return 0;
150}
151
152#ifdef CONFIG_SERIAL_8250
153static inline bool jailhouse_uart_enabled(unsigned int uart_nr)
154{
155 return setup_data.v2.flags & BIT(uart_nr);
156}
157
158static void jailhouse_serial_fixup(int port, struct uart_port *up,
159 u32 *capabilities)
160{
161 static const u16 pcuart_base[] = {0x3f8, 0x2f8, 0x3e8, 0x2e8};
162 unsigned int n;
163
164 for (n = 0; n < ARRAY_SIZE(pcuart_base); n++) {
165 if (pcuart_base[n] != up->iobase)
166 continue;
167
168 if (jailhouse_uart_enabled(n)) {
169 pr_info("Enabling UART%u (port 0x%lx)\n", n,
170 up->iobase);
171 jailhouse_setup_irq(up->irq);
172 } else {
173 /* Deactivate UART if access isn't allowed */
174 up->iobase = 0;
175 }
176 break;
177 }
178}
179
180static void __init jailhouse_serial_workaround(void)
181{
182 /*
183 * There are flags inside setup_data that indicate availability of
184 * platform UARTs since setup data version 2.
185 *
186 * In case of version 1, we don't know which UARTs belong Linux. In
187 * this case, unconditionally register 1:1 mapping for legacy UART IRQs
188 * 3 and 4.
189 */
190 if (setup_data.hdr.version > 1)
191 serial8250_set_isa_configurator(jailhouse_serial_fixup);
192}
193#else /* !CONFIG_SERIAL_8250 */
194static inline void jailhouse_serial_workaround(void)
195{
196}
197#endif /* CONFIG_SERIAL_8250 */
198
199static void __init jailhouse_init_platform(void)
200{
201 u64 pa_data = boot_params.hdr.setup_data;
202 unsigned long setup_data_len;
203 struct setup_data header;
204 void *mapping;
205
206 x86_init.irqs.pre_vector_init = x86_init_noop;
207 x86_init.timers.timer_init = jailhouse_timer_init;
208 x86_init.mpparse.get_smp_config = jailhouse_get_smp_config;
209 x86_init.pci.arch_init = jailhouse_pci_arch_init;
210
211 x86_platform.calibrate_cpu = jailhouse_get_tsc;
212 x86_platform.calibrate_tsc = jailhouse_get_tsc;
213 x86_platform.get_wallclock = jailhouse_get_wallclock;
214 x86_platform.legacy.rtc = 0;
215 x86_platform.legacy.warm_reset = 0;
216 x86_platform.legacy.i8042 = X86_LEGACY_I8042_PLATFORM_ABSENT;
217
218 legacy_pic = &null_legacy_pic;
219
220 machine_ops.emergency_restart = jailhouse_no_restart;
221
222 while (pa_data) {
223 mapping = early_memremap(pa_data, sizeof(header));
224 memcpy(&header, mapping, sizeof(header));
225 early_memunmap(mapping, sizeof(header));
226
227 if (header.type == SETUP_JAILHOUSE)
228 break;
229
230 pa_data = header.next;
231 }
232
233 if (!pa_data)
234 panic("Jailhouse: No valid setup data found");
235
236 /* setup data must at least contain the header */
237 if (header.len < sizeof(setup_data.hdr))
238 goto unsupported;
239
240 pa_data += offsetof(struct setup_data, data);
241 setup_data_len = min_t(unsigned long, sizeof(setup_data),
242 (unsigned long)header.len);
243 mapping = early_memremap(pa_data, setup_data_len);
244 memcpy(&setup_data, mapping, setup_data_len);
245 early_memunmap(mapping, setup_data_len);
246
247 if (setup_data.hdr.version == 0 ||
248 setup_data.hdr.compatible_version !=
249 JAILHOUSE_SETUP_REQUIRED_VERSION ||
250 (setup_data.hdr.version == 1 && header.len < SETUP_DATA_V1_LEN) ||
251 (setup_data.hdr.version >= 2 && header.len < SETUP_DATA_V2_LEN))
252 goto unsupported;
253
254 pmtmr_ioport = setup_data.v1.pm_timer_address;
255 pr_debug("Jailhouse: PM-Timer IO Port: %#x\n", pmtmr_ioport);
256
257 precalibrated_tsc_khz = setup_data.v1.tsc_khz;
258 setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
259
260 pci_probe = 0;
261
262 /*
263 * Avoid that the kernel complains about missing ACPI tables - there
264 * are none in a non-root cell.
265 */
266 disable_acpi();
267
268 jailhouse_serial_workaround();
269 return;
270
271unsupported:
272 panic("Jailhouse: Unsupported setup data structure");
273}
274
275bool jailhouse_paravirt(void)
276{
277 return jailhouse_cpuid_base() != 0;
278}
279
280static bool __init jailhouse_x2apic_available(void)
281{
282 /*
283 * The x2APIC is only available if the root cell enabled it. Jailhouse
284 * does not support switching between xAPIC and x2APIC.
285 */
286 return x2apic_enabled();
287}
288
289const struct hypervisor_x86 x86_hyper_jailhouse __refconst = {
290 .name = "Jailhouse",
291 .detect = jailhouse_detect,
292 .init.init_platform = jailhouse_init_platform,
293 .init.x2apic_available = jailhouse_x2apic_available,
294 .ignore_nopv = true,
295};