1// SPDX-License-Identifier: GPL-2.0
   2/dts-v1/;
   3
   4#include <dt-bindings/input/linux-event-codes.h>
   5#include <dt-bindings/input/gpio-keys.h>
   6
   7#include "tegra186-p3310.dtsi"
   8
   9/ {
  10	model = "NVIDIA Jetson TX2 Developer Kit";
  11	compatible = "nvidia,p2771-0000", "nvidia,tegra186";
  12
  13	aconnect@2900000 {
  14		status = "okay";
  15
  16		ahub@2900800 {
  17			status = "okay";
  18
  19			i2s@2901000 {
  20				status = "okay";
  21
  22				ports {
  23					#address-cells = <1>;
  24					#size-cells = <0>;
  25
  26					port@0 {
  27						reg = <0>;
  28
  29						i2s1_cif_ep: endpoint {
  30							remote-endpoint = <&xbar_i2s1_ep>;
  31						};
  32					};
  33
  34					i2s1_port: port@1 {
  35						reg = <1>;
  36
  37						i2s1_dap_ep: endpoint {
  38							dai-format = "i2s";
  39							/* Placeholder for external Codec */
  40						};
  41					};
  42				};
  43			};
  44
  45			i2s@2901100 {
  46				status = "okay";
  47
  48				ports {
  49					#address-cells = <1>;
  50					#size-cells = <0>;
  51
  52					port@0 {
  53						reg = <0>;
  54
  55						i2s2_cif_ep: endpoint {
  56							remote-endpoint = <&xbar_i2s2_ep>;
  57						};
  58					};
  59
  60					i2s2_port: port@1 {
  61						reg = <1>;
  62
  63						i2s2_dap_ep: endpoint {
  64							dai-format = "i2s";
  65							/* Placeholder for external Codec */
  66						};
  67					};
  68				};
  69			};
  70
  71			i2s@2901200 {
  72				status = "okay";
  73
  74				ports {
  75					#address-cells = <1>;
  76					#size-cells = <0>;
  77
  78					port@0 {
  79						reg = <0>;
  80
  81						i2s3_cif_ep: endpoint {
  82							remote-endpoint = <&xbar_i2s3_ep>;
  83						};
  84					};
  85
  86					i2s3_port: port@1 {
  87						reg = <1>;
  88
  89						i2s3_dap_ep: endpoint {
  90							dai-format = "i2s";
  91							/* Placeholder for external Codec */
  92						};
  93					};
  94				};
  95			};
  96
  97			i2s@2901300 {
  98				status = "okay";
  99
 100				ports {
 101					#address-cells = <1>;
 102					#size-cells = <0>;
 103
 104					port@0 {
 105						reg = <0>;
 106
 107						i2s4_cif_ep: endpoint {
 108							remote-endpoint = <&xbar_i2s4_ep>;
 109						};
 110					};
 111
 112					i2s4_port: port@1 {
 113						reg = <1>;
 114
 115						i2s4_dap_ep: endpoint {
 116							dai-format = "i2s";
 117							/* Placeholder for external Codec */
 118						};
 119					};
 120				};
 121			};
 122
 123			i2s@2901400 {
 124				status = "okay";
 125
 126				ports {
 127					#address-cells = <1>;
 128					#size-cells = <0>;
 129
 130					port@0 {
 131						reg = <0>;
 132
 133						i2s5_cif_ep: endpoint {
 134							remote-endpoint = <&xbar_i2s5_ep>;
 135						};
 136					};
 137
 138					i2s5_port: port@1 {
 139						reg = <1>;
 140
 141						i2s5_dap_ep: endpoint {
 142							dai-format = "i2s";
 143							/* Placeholder for external Codec */
 144						};
 145					};
 146				};
 147			};
 148
 149			i2s@2901500 {
 150				status = "okay";
 151
 152				ports {
 153					#address-cells = <1>;
 154					#size-cells = <0>;
 155
 156					port@0 {
 157						reg = <0>;
 158
 159						i2s6_cif_ep: endpoint {
 160							remote-endpoint = <&xbar_i2s6_ep>;
 161						};
 162					};
 163
 164					i2s6_port: port@1 {
 165						reg = <1>;
 166
 167						i2s6_dap_ep: endpoint {
 168							dai-format = "i2s";
 169							/* Placeholder for external Codec */
 170						};
 171					};
 172				};
 173			};
 174
 175			sfc@2902000 {
 176				status = "okay";
 177
 178				ports {
 179					#address-cells = <1>;
 180					#size-cells = <0>;
 181
 182					port@0 {
 183						reg = <0>;
 184
 185						sfc1_cif_in_ep: endpoint {
 186							remote-endpoint = <&xbar_sfc1_in_ep>;
 187							convert-rate = <44100>;
 188						};
 189					};
 190
 191					sfc1_out_port: port@1 {
 192						reg = <1>;
 193
 194						sfc1_cif_out_ep: endpoint {
 195							remote-endpoint = <&xbar_sfc1_out_ep>;
 196							convert-rate = <48000>;
 197						};
 198					};
 199				};
 200			};
 201
 202			sfc@2902200 {
 203				status = "okay";
 204
 205				ports {
 206					#address-cells = <1>;
 207					#size-cells = <0>;
 208
 209					port@0 {
 210						reg = <0>;
 211
 212						sfc2_cif_in_ep: endpoint {
 213							remote-endpoint = <&xbar_sfc2_in_ep>;
 214						};
 215					};
 216
 217					sfc2_out_port: port@1 {
 218						reg = <1>;
 219
 220						sfc2_cif_out_ep: endpoint {
 221							remote-endpoint = <&xbar_sfc2_out_ep>;
 222						};
 223					};
 224				};
 225			};
 226
 227			sfc@2902400 {
 228				status = "okay";
 229
 230				ports {
 231					#address-cells = <1>;
 232					#size-cells = <0>;
 233
 234					port@0 {
 235						reg = <0>;
 236
 237						sfc3_cif_in_ep: endpoint {
 238							remote-endpoint = <&xbar_sfc3_in_ep>;
 239						};
 240					};
 241
 242					sfc3_out_port: port@1 {
 243						reg = <1>;
 244
 245						sfc3_cif_out_ep: endpoint {
 246							remote-endpoint = <&xbar_sfc3_out_ep>;
 247						};
 248					};
 249				};
 250			};
 251
 252			sfc@2902600 {
 253				status = "okay";
 254
 255				ports {
 256					#address-cells = <1>;
 257					#size-cells = <0>;
 258
 259					port@0 {
 260						reg = <0>;
 261
 262						sfc4_cif_in_ep: endpoint {
 263							remote-endpoint = <&xbar_sfc4_in_ep>;
 264						};
 265					};
 266
 267					sfc4_out_port: port@1 {
 268						reg = <1>;
 269
 270						sfc4_cif_out_ep: endpoint {
 271							remote-endpoint = <&xbar_sfc4_out_ep>;
 272						};
 273					};
 274				};
 275			};
 276
 277			amx@2903000 {
 278				status = "okay";
 279
 280				ports {
 281					#address-cells = <1>;
 282					#size-cells = <0>;
 283
 284					port@0 {
 285						reg = <0>;
 286
 287						amx1_in1_ep: endpoint {
 288							remote-endpoint = <&xbar_amx1_in1_ep>;
 289						};
 290					};
 291
 292					port@1 {
 293						reg = <1>;
 294
 295						amx1_in2_ep: endpoint {
 296							remote-endpoint = <&xbar_amx1_in2_ep>;
 297						};
 298					};
 299
 300					port@2 {
 301						reg = <2>;
 302
 303						amx1_in3_ep: endpoint {
 304							remote-endpoint = <&xbar_amx1_in3_ep>;
 305						};
 306					};
 307
 308					port@3 {
 309						reg = <3>;
 310
 311						amx1_in4_ep: endpoint {
 312							remote-endpoint = <&xbar_amx1_in4_ep>;
 313						};
 314					};
 315
 316					amx1_out_port: port@4 {
 317						reg = <4>;
 318
 319						amx1_out_ep: endpoint {
 320							remote-endpoint = <&xbar_amx1_out_ep>;
 321						};
 322					};
 323				};
 324			};
 325
 326			amx@2903100 {
 327				status = "okay";
 328
 329				ports {
 330					#address-cells = <1>;
 331					#size-cells = <0>;
 332
 333					port@0 {
 334						reg = <0>;
 335
 336						amx2_in1_ep: endpoint {
 337							remote-endpoint = <&xbar_amx2_in1_ep>;
 338						};
 339					};
 340
 341					port@1 {
 342						reg = <1>;
 343
 344						amx2_in2_ep: endpoint {
 345							remote-endpoint = <&xbar_amx2_in2_ep>;
 346						};
 347					};
 348
 349					amx2_in3_port: port@2 {
 350						reg = <2>;
 351
 352						amx2_in3_ep: endpoint {
 353							remote-endpoint = <&xbar_amx2_in3_ep>;
 354						};
 355					};
 356
 357					amx2_in4_port: port@3 {
 358						reg = <3>;
 359
 360						amx2_in4_ep: endpoint {
 361							remote-endpoint = <&xbar_amx2_in4_ep>;
 362						};
 363					};
 364
 365					amx2_out_port: port@4 {
 366						reg = <4>;
 367
 368						amx2_out_ep: endpoint {
 369							remote-endpoint = <&xbar_amx2_out_ep>;
 370						};
 371					};
 372				};
 373			};
 374
 375			amx@2903200 {
 376				status = "okay";
 377
 378				ports {
 379					#address-cells = <1>;
 380					#size-cells = <0>;
 381
 382					port@0 {
 383						reg = <0>;
 384
 385						amx3_in1_ep: endpoint {
 386							remote-endpoint = <&xbar_amx3_in1_ep>;
 387						};
 388					};
 389
 390					port@1 {
 391						reg = <1>;
 392
 393						amx3_in2_ep: endpoint {
 394							remote-endpoint = <&xbar_amx3_in2_ep>;
 395						};
 396					};
 397
 398					port@2 {
 399						reg = <2>;
 400
 401						amx3_in3_ep: endpoint {
 402							remote-endpoint = <&xbar_amx3_in3_ep>;
 403						};
 404					};
 405
 406					port@3 {
 407						reg = <3>;
 408
 409						amx3_in4_ep: endpoint {
 410							remote-endpoint = <&xbar_amx3_in4_ep>;
 411						};
 412					};
 413
 414					amx3_out_port: port@4 {
 415						reg = <4>;
 416
 417						amx3_out_ep: endpoint {
 418							remote-endpoint = <&xbar_amx3_out_ep>;
 419						};
 420					};
 421				};
 422			};
 423
 424			amx@2903300 {
 425				status = "okay";
 426
 427				ports {
 428					#address-cells = <1>;
 429					#size-cells = <0>;
 430
 431					port@0 {
 432						reg = <0>;
 433
 434						amx4_in1_ep: endpoint {
 435							remote-endpoint = <&xbar_amx4_in1_ep>;
 436						};
 437					};
 438
 439					port@1 {
 440						reg = <1>;
 441
 442						amx4_in2_ep: endpoint {
 443							remote-endpoint = <&xbar_amx4_in2_ep>;
 444						};
 445					};
 446
 447					port@2 {
 448						reg = <2>;
 449
 450						amx4_in3_ep: endpoint {
 451							remote-endpoint = <&xbar_amx4_in3_ep>;
 452						};
 453					};
 454
 455					port@3 {
 456						reg = <3>;
 457
 458						amx4_in4_ep: endpoint {
 459							remote-endpoint = <&xbar_amx4_in4_ep>;
 460						};
 461					};
 462
 463					amx4_out_port: port@4 {
 464						reg = <4>;
 465
 466						amx4_out_ep: endpoint {
 467							remote-endpoint = <&xbar_amx4_out_ep>;
 468						};
 469					};
 470				};
 471			};
 472
 473			adx@2903800 {
 474				status = "okay";
 475
 476				ports {
 477					#address-cells = <1>;
 478					#size-cells = <0>;
 479
 480					port@0 {
 481						reg = <0>;
 482
 483						adx1_in_ep: endpoint {
 484							remote-endpoint = <&xbar_adx1_in_ep>;
 485						};
 486					};
 487
 488					adx1_out1_port: port@1 {
 489						reg = <1>;
 490
 491						adx1_out1_ep: endpoint {
 492							remote-endpoint = <&xbar_adx1_out1_ep>;
 493						};
 494					};
 495
 496					adx1_out2_port: port@2 {
 497						reg = <2>;
 498
 499						adx1_out2_ep: endpoint {
 500							remote-endpoint = <&xbar_adx1_out2_ep>;
 501						};
 502					};
 503
 504					adx1_out3_port: port@3 {
 505						reg = <3>;
 506
 507						adx1_out3_ep: endpoint {
 508							remote-endpoint = <&xbar_adx1_out3_ep>;
 509						};
 510					};
 511
 512					adx1_out4_port: port@4 {
 513						reg = <4>;
 514
 515						adx1_out4_ep: endpoint {
 516							remote-endpoint = <&xbar_adx1_out4_ep>;
 517						};
 518					};
 519				};
 520			};
 521
 522			adx@2903900 {
 523				status = "okay";
 524
 525				ports {
 526					#address-cells = <1>;
 527					#size-cells = <0>;
 528
 529					port@0 {
 530						reg = <0>;
 531
 532						adx2_in_ep: endpoint {
 533							remote-endpoint = <&xbar_adx2_in_ep>;
 534						};
 535					};
 536
 537					adx2_out1_port: port@1 {
 538						reg = <1>;
 539
 540						adx2_out1_ep: endpoint {
 541							remote-endpoint = <&xbar_adx2_out1_ep>;
 542						};
 543					};
 544
 545					adx2_out2_port: port@2 {
 546						reg = <2>;
 547
 548						adx2_out2_ep: endpoint {
 549							remote-endpoint = <&xbar_adx2_out2_ep>;
 550						};
 551					};
 552
 553					adx2_out3_port: port@3 {
 554						reg = <3>;
 555
 556						adx2_out3_ep: endpoint {
 557							remote-endpoint = <&xbar_adx2_out3_ep>;
 558						};
 559					};
 560
 561					adx2_out4_port: port@4 {
 562						reg = <4>;
 563
 564						adx2_out4_ep: endpoint {
 565							remote-endpoint = <&xbar_adx2_out4_ep>;
 566						};
 567					};
 568				};
 569			};
 570
 571			adx@2903a00 {
 572				status = "okay";
 573
 574				ports {
 575					#address-cells = <1>;
 576					#size-cells = <0>;
 577
 578					port@0 {
 579						reg = <0>;
 580
 581						adx3_in_ep: endpoint {
 582							remote-endpoint = <&xbar_adx3_in_ep>;
 583						};
 584					};
 585
 586					adx3_out1_port: port@1 {
 587						reg = <1>;
 588
 589						adx3_out1_ep: endpoint {
 590							remote-endpoint = <&xbar_adx3_out1_ep>;
 591						};
 592					};
 593
 594					adx3_out2_port: port@2 {
 595						reg = <2>;
 596
 597						adx3_out2_ep: endpoint {
 598							remote-endpoint = <&xbar_adx3_out2_ep>;
 599						};
 600					};
 601
 602					adx3_out3_port: port@3 {
 603						reg = <3>;
 604
 605						adx3_out3_ep: endpoint {
 606							remote-endpoint = <&xbar_adx3_out3_ep>;
 607						};
 608					};
 609
 610					adx3_out4_port: port@4 {
 611						reg = <4>;
 612
 613						adx3_out4_ep: endpoint {
 614							remote-endpoint = <&xbar_adx3_out4_ep>;
 615						};
 616					};
 617				};
 618			};
 619
 620			adx@2903b00 {
 621				status = "okay";
 622
 623				ports {
 624					#address-cells = <1>;
 625					#size-cells = <0>;
 626
 627					port@0 {
 628						reg = <0>;
 629
 630						adx4_in_ep: endpoint {
 631							remote-endpoint = <&xbar_adx4_in_ep>;
 632						};
 633					};
 634
 635					adx4_out1_port: port@1 {
 636						reg = <1>;
 637
 638						adx4_out1_ep: endpoint {
 639							remote-endpoint = <&xbar_adx4_out1_ep>;
 640						};
 641					};
 642
 643					adx4_out2_port: port@2 {
 644						reg = <2>;
 645
 646						adx4_out2_ep: endpoint {
 647							remote-endpoint = <&xbar_adx4_out2_ep>;
 648						};
 649					};
 650
 651					adx4_out3_port: port@3 {
 652						reg = <3>;
 653
 654						adx4_out3_ep: endpoint {
 655							remote-endpoint = <&xbar_adx4_out3_ep>;
 656						};
 657					};
 658
 659					adx4_out4_port: port@4 {
 660						reg = <4>;
 661
 662						adx4_out4_ep: endpoint {
 663							remote-endpoint = <&xbar_adx4_out4_ep>;
 664						};
 665					};
 666				};
 667			};
 668
 669			dmic@2904000 {
 670				status = "okay";
 671
 672				ports {
 673					#address-cells = <1>;
 674					#size-cells = <0>;
 675
 676					port@0 {
 677						reg = <0>;
 678
 679						dmic1_cif_ep: endpoint {
 680							remote-endpoint = <&xbar_dmic1_ep>;
 681						};
 682					};
 683
 684					dmic1_port: port@1 {
 685						reg = <1>;
 686
 687						dmic1_dap_ep: endpoint {
 688							/* Place holder for external Codec */
 689						};
 690					};
 691				};
 692			};
 693
 694			dmic@2904100 {
 695				status = "okay";
 696
 697				ports {
 698					#address-cells = <1>;
 699					#size-cells = <0>;
 700
 701					port@0 {
 702						reg = <0>;
 703
 704						dmic2_cif_ep: endpoint {
 705							remote-endpoint = <&xbar_dmic2_ep>;
 706						};
 707					};
 708
 709					dmic2_port: port@1 {
 710						reg = <1>;
 711
 712						dmic2_dap_ep: endpoint {
 713							/* Place holder for external Codec */
 714						};
 715					};
 716				};
 717			};
 718
 719			dmic@2904200 {
 720				status = "okay";
 721
 722				ports {
 723					#address-cells = <1>;
 724					#size-cells = <0>;
 725
 726					port@0 {
 727						reg = <0>;
 728
 729						dmic3_cif_ep: endpoint {
 730							remote-endpoint = <&xbar_dmic3_ep>;
 731						};
 732					};
 733
 734					dmic3_port: port@1 {
 735						reg = <1>;
 736
 737						dmic3_dap_ep: endpoint {
 738							/* Place holder for external Codec */
 739						};
 740					};
 741				};
 742			};
 743
 744			dspk@2905000 {
 745				status = "okay";
 746
 747				ports {
 748					#address-cells = <1>;
 749					#size-cells = <0>;
 750
 751					port@0 {
 752						reg = <0>;
 753
 754						dspk1_cif_ep: endpoint {
 755							remote-endpoint = <&xbar_dspk1_ep>;
 756						};
 757					};
 758
 759					dspk1_port: port@1 {
 760						reg = <1>;
 761
 762						dspk1_dap_ep: endpoint {
 763							/* Place holder for external Codec */
 764						};
 765					};
 766				};
 767			};
 768
 769			dspk@2905100 {
 770				status = "okay";
 771
 772				ports {
 773					#address-cells = <1>;
 774					#size-cells = <0>;
 775
 776					port@0 {
 777						reg = <0>;
 778
 779						dspk2_cif_ep: endpoint {
 780							remote-endpoint = <&xbar_dspk2_ep>;
 781						};
 782					};
 783
 784					dspk2_port: port@1 {
 785						reg = <1>;
 786
 787						dspk2_dap_ep: endpoint {
 788							/* Place holder for external Codec */
 789						};
 790					};
 791				};
 792			};
 793
 794			processing-engine@2908000 {
 795				status = "okay";
 796
 797				ports {
 798					#address-cells = <1>;
 799					#size-cells = <0>;
 800
 801					port@0 {
 802						reg = <0x0>;
 803
 804						ope1_cif_in_ep: endpoint {
 805							remote-endpoint = <&xbar_ope1_in_ep>;
 806						};
 807					};
 808
 809					ope1_out_port: port@1 {
 810						reg = <0x1>;
 811
 812						ope1_cif_out_ep: endpoint {
 813							remote-endpoint = <&xbar_ope1_out_ep>;
 814						};
 815					};
 816				};
 817			};
 818
 819			mvc@290a000 {
 820				status = "okay";
 821
 822				ports {
 823					#address-cells = <1>;
 824					#size-cells = <0>;
 825
 826					port@0 {
 827						reg = <0>;
 828
 829						mvc1_cif_in_ep: endpoint {
 830							remote-endpoint = <&xbar_mvc1_in_ep>;
 831						};
 832					};
 833
 834					mvc1_out_port: port@1 {
 835						reg = <1>;
 836
 837						mvc1_cif_out_ep: endpoint {
 838							remote-endpoint = <&xbar_mvc1_out_ep>;
 839						};
 840					};
 841				};
 842			};
 843
 844			mvc@290a200 {
 845				status = "okay";
 846
 847				ports {
 848					#address-cells = <1>;
 849					#size-cells = <0>;
 850
 851					port@0 {
 852						reg = <0>;
 853
 854						mvc2_cif_in_ep: endpoint {
 855							remote-endpoint = <&xbar_mvc2_in_ep>;
 856						};
 857					};
 858
 859					mvc2_out_port: port@1 {
 860						reg = <1>;
 861
 862						mvc2_cif_out_ep: endpoint {
 863							remote-endpoint = <&xbar_mvc2_out_ep>;
 864						};
 865					};
 866				};
 867			};
 868
 869			amixer@290bb00 {
 870				status = "okay";
 871
 872				ports {
 873					#address-cells = <1>;
 874					#size-cells = <0>;
 875
 876					port@0 {
 877						reg = <0x0>;
 878
 879						mixer_in1_ep: endpoint {
 880							remote-endpoint = <&xbar_mixer_in1_ep>;
 881						};
 882					};
 883
 884					port@1 {
 885						reg = <0x1>;
 886
 887						mixer_in2_ep: endpoint {
 888							remote-endpoint = <&xbar_mixer_in2_ep>;
 889						};
 890					};
 891
 892					port@2 {
 893						reg = <0x2>;
 894
 895						mixer_in3_ep: endpoint {
 896							remote-endpoint = <&xbar_mixer_in3_ep>;
 897						};
 898					};
 899
 900					port@3 {
 901						reg = <0x3>;
 902
 903						mixer_in4_ep: endpoint {
 904							remote-endpoint = <&xbar_mixer_in4_ep>;
 905						};
 906					};
 907
 908					port@4 {
 909						reg = <0x4>;
 910
 911						mixer_in5_ep: endpoint {
 912							remote-endpoint = <&xbar_mixer_in5_ep>;
 913						};
 914					};
 915
 916					port@5 {
 917						reg = <0x5>;
 918
 919						mixer_in6_ep: endpoint {
 920							remote-endpoint = <&xbar_mixer_in6_ep>;
 921						};
 922					};
 923
 924					port@6 {
 925						reg = <0x6>;
 926
 927						mixer_in7_ep: endpoint {
 928							remote-endpoint = <&xbar_mixer_in7_ep>;
 929						};
 930					};
 931
 932					port@7 {
 933						reg = <0x7>;
 934
 935						mixer_in8_ep: endpoint {
 936							remote-endpoint = <&xbar_mixer_in8_ep>;
 937						};
 938					};
 939
 940					port@8 {
 941						reg = <0x8>;
 942
 943						mixer_in9_ep: endpoint {
 944							remote-endpoint = <&xbar_mixer_in9_ep>;
 945						};
 946					};
 947
 948					port@9 {
 949						reg = <0x9>;
 950
 951						mixer_in10_ep: endpoint {
 952							remote-endpoint = <&xbar_mixer_in10_ep>;
 953						};
 954					};
 955
 956					mixer_out1_port: port@a {
 957						reg = <0xa>;
 958
 959						mixer_out1_ep: endpoint {
 960							remote-endpoint = <&xbar_mixer_out1_ep>;
 961						};
 962					};
 963
 964					mixer_out2_port: port@b {
 965						reg = <0xb>;
 966
 967						mixer_out2_ep: endpoint {
 968							remote-endpoint = <&xbar_mixer_out2_ep>;
 969						};
 970					};
 971
 972					mixer_out3_port: port@c {
 973						reg = <0xc>;
 974
 975						mixer_out3_ep: endpoint {
 976							remote-endpoint = <&xbar_mixer_out3_ep>;
 977						};
 978					};
 979
 980					mixer_out4_port: port@d {
 981						reg = <0xd>;
 982
 983						mixer_out4_ep: endpoint {
 984							remote-endpoint = <&xbar_mixer_out4_ep>;
 985						};
 986					};
 987
 988					mixer_out5_port: port@e {
 989						reg = <0xe>;
 990
 991						mixer_out5_ep: endpoint {
 992							remote-endpoint = <&xbar_mixer_out5_ep>;
 993						};
 994					};
 995				};
 996			};
 997
 998			admaif@290f000 {
 999				status = "okay";
1000
1001				ports {
1002					#address-cells = <1>;
1003					#size-cells = <0>;
1004
1005					admaif0_port: port@0 {
1006						reg = <0x0>;
1007
1008						admaif0_ep: endpoint {
1009							remote-endpoint = <&xbar_admaif0_ep>;
1010						};
1011					};
1012
1013					admaif1_port: port@1 {
1014						reg = <0x1>;
1015
1016						admaif1_ep: endpoint {
1017							remote-endpoint = <&xbar_admaif1_ep>;
1018						};
1019					};
1020
1021					admaif2_port: port@2 {
1022						reg = <0x2>;
1023
1024						admaif2_ep: endpoint {
1025							remote-endpoint = <&xbar_admaif2_ep>;
1026						};
1027					};
1028
1029					admaif3_port: port@3 {
1030						reg = <0x3>;
1031
1032						admaif3_ep: endpoint {
1033							remote-endpoint = <&xbar_admaif3_ep>;
1034						};
1035					};
1036
1037					admaif4_port: port@4 {
1038						reg = <0x4>;
1039
1040						admaif4_ep: endpoint {
1041							remote-endpoint = <&xbar_admaif4_ep>;
1042						};
1043					};
1044
1045					admaif5_port: port@5 {
1046						reg = <0x5>;
1047
1048						admaif5_ep: endpoint {
1049							remote-endpoint = <&xbar_admaif5_ep>;
1050						};
1051					};
1052
1053					admaif6_port: port@6 {
1054						reg = <0x6>;
1055
1056						admaif6_ep: endpoint {
1057							remote-endpoint = <&xbar_admaif6_ep>;
1058						};
1059					};
1060
1061					admaif7_port: port@7 {
1062						reg = <0x7>;
1063
1064						admaif7_ep: endpoint {
1065							remote-endpoint = <&xbar_admaif7_ep>;
1066						};
1067					};
1068
1069					admaif8_port: port@8 {
1070						reg = <0x8>;
1071
1072						admaif8_ep: endpoint {
1073							remote-endpoint = <&xbar_admaif8_ep>;
1074						};
1075					};
1076
1077					admaif9_port: port@9 {
1078						reg = <0x9>;
1079
1080						admaif9_ep: endpoint {
1081							remote-endpoint = <&xbar_admaif9_ep>;
1082						};
1083					};
1084
1085					admaif10_port: port@a {
1086						reg = <0xa>;
1087
1088						admaif10_ep: endpoint {
1089							remote-endpoint = <&xbar_admaif10_ep>;
1090						};
1091					};
1092
1093					admaif11_port: port@b {
1094						reg = <0xb>;
1095
1096						admaif11_ep: endpoint {
1097							remote-endpoint = <&xbar_admaif11_ep>;
1098						};
1099					};
1100
1101					admaif12_port: port@c {
1102						reg = <0xc>;
1103
1104						admaif12_ep: endpoint {
1105							remote-endpoint = <&xbar_admaif12_ep>;
1106						};
1107					};
1108
1109					admaif13_port: port@d {
1110						reg = <0xd>;
1111
1112						admaif13_ep: endpoint {
1113							remote-endpoint = <&xbar_admaif13_ep>;
1114						};
1115					};
1116
1117					admaif14_port: port@e {
1118						reg = <0xe>;
1119
1120						admaif14_ep: endpoint {
1121							remote-endpoint = <&xbar_admaif14_ep>;
1122						};
1123					};
1124
1125					admaif15_port: port@f {
1126						reg = <0xf>;
1127
1128						admaif15_ep: endpoint {
1129							remote-endpoint = <&xbar_admaif15_ep>;
1130						};
1131					};
1132
1133					admaif16_port: port@10 {
1134						reg = <0x10>;
1135
1136						admaif16_ep: endpoint {
1137							remote-endpoint = <&xbar_admaif16_ep>;
1138						};
1139					};
1140
1141					admaif17_port: port@11 {
1142						reg = <0x11>;
1143
1144						admaif17_ep: endpoint {
1145							remote-endpoint = <&xbar_admaif17_ep>;
1146						};
1147					};
1148
1149					admaif18_port: port@12 {
1150						reg = <0x12>;
1151
1152						admaif18_ep: endpoint {
1153							remote-endpoint = <&xbar_admaif18_ep>;
1154						};
1155					};
1156
1157					admaif19_port: port@13 {
1158						reg = <0x13>;
1159
1160						admaif19_ep: endpoint {
1161							remote-endpoint = <&xbar_admaif19_ep>;
1162						};
1163					};
1164				};
1165			};
1166
1167			asrc@2910000 {
1168				status = "okay";
1169
1170				ports {
1171					#address-cells = <1>;
1172					#size-cells = <0>;
1173
1174					port@0 {
1175						reg = <0x0>;
1176
1177						asrc_in1_ep: endpoint {
1178							remote-endpoint = <&xbar_asrc_in1_ep>;
1179						};
1180					};
1181
1182					port@1 {
1183						reg = <0x1>;
1184
1185						asrc_in2_ep: endpoint {
1186							remote-endpoint = <&xbar_asrc_in2_ep>;
1187						};
1188					};
1189
1190					port@2 {
1191						reg = <0x2>;
1192
1193						asrc_in3_ep: endpoint {
1194							remote-endpoint = <&xbar_asrc_in3_ep>;
1195						};
1196					};
1197
1198					port@3 {
1199						reg = <0x3>;
1200
1201						asrc_in4_ep: endpoint {
1202							remote-endpoint = <&xbar_asrc_in4_ep>;
1203						};
1204					};
1205
1206					port@4 {
1207						reg = <0x4>;
1208
1209						asrc_in5_ep: endpoint {
1210							remote-endpoint = <&xbar_asrc_in5_ep>;
1211						};
1212					};
1213
1214					port@5 {
1215						reg = <0x5>;
1216
1217						asrc_in6_ep: endpoint {
1218							remote-endpoint = <&xbar_asrc_in6_ep>;
1219						};
1220					};
1221
1222					port@6 {
1223						reg = <0x6>;
1224
1225						asrc_in7_ep: endpoint {
1226							remote-endpoint = <&xbar_asrc_in7_ep>;
1227						};
1228					};
1229
1230					asrc_out1_port: port@7 {
1231						reg = <0x7>;
1232
1233						asrc_out1_ep: endpoint {
1234							remote-endpoint = <&xbar_asrc_out1_ep>;
1235						};
1236					};
1237
1238					asrc_out2_port: port@8 {
1239						reg = <0x8>;
1240
1241						asrc_out2_ep: endpoint {
1242							remote-endpoint = <&xbar_asrc_out2_ep>;
1243						};
1244					};
1245
1246					asrc_out3_port: port@9 {
1247						reg = <0x9>;
1248
1249						asrc_out3_ep: endpoint {
1250							remote-endpoint = <&xbar_asrc_out3_ep>;
1251						};
1252					};
1253
1254					asrc_out4_port: port@a {
1255						reg = <0xa>;
1256
1257						asrc_out4_ep: endpoint {
1258							remote-endpoint = <&xbar_asrc_out4_ep>;
1259						};
1260					};
1261
1262					asrc_out5_port: port@b {
1263						reg = <0xb>;
1264
1265						asrc_out5_ep: endpoint {
1266							remote-endpoint = <&xbar_asrc_out5_ep>;
1267						};
1268					};
1269
1270					asrc_out6_port: port@c {
1271						reg = <0xc>;
1272
1273						asrc_out6_ep: endpoint {
1274							remote-endpoint = <&xbar_asrc_out6_ep>;
1275						};
1276					};
1277				};
1278			};
1279
1280			ports {
1281				#address-cells = <1>;
1282				#size-cells = <0>;
1283
1284				port@0 {
1285					reg = <0x0>;
1286
1287					xbar_admaif0_ep: endpoint {
1288						remote-endpoint = <&admaif0_ep>;
1289					};
1290				};
1291
1292				port@1 {
1293					reg = <0x1>;
1294
1295					xbar_admaif1_ep: endpoint {
1296						remote-endpoint = <&admaif1_ep>;
1297					};
1298				};
1299
1300				port@2 {
1301					reg = <0x2>;
1302
1303					xbar_admaif2_ep: endpoint {
1304						remote-endpoint = <&admaif2_ep>;
1305					};
1306				};
1307
1308				port@3 {
1309					reg = <0x3>;
1310
1311					xbar_admaif3_ep: endpoint {
1312						remote-endpoint = <&admaif3_ep>;
1313					};
1314				};
1315
1316				port@4 {
1317					reg = <0x4>;
1318
1319					xbar_admaif4_ep: endpoint {
1320						remote-endpoint = <&admaif4_ep>;
1321					};
1322				};
1323
1324				port@5 {
1325					reg = <0x5>;
1326
1327					xbar_admaif5_ep: endpoint {
1328						remote-endpoint = <&admaif5_ep>;
1329					};
1330				};
1331
1332				port@6 {
1333					reg = <0x6>;
1334
1335					xbar_admaif6_ep: endpoint {
1336						remote-endpoint = <&admaif6_ep>;
1337					};
1338				};
1339
1340				port@7 {
1341					reg = <0x7>;
1342
1343					xbar_admaif7_ep: endpoint {
1344						remote-endpoint = <&admaif7_ep>;
1345					};
1346				};
1347
1348				port@8 {
1349					reg = <0x8>;
1350
1351					xbar_admaif8_ep: endpoint {
1352						remote-endpoint = <&admaif8_ep>;
1353					};
1354				};
1355
1356				port@9 {
1357					reg = <0x9>;
1358
1359					xbar_admaif9_ep: endpoint {
1360						remote-endpoint = <&admaif9_ep>;
1361					};
1362				};
1363
1364				port@a {
1365					reg = <0xa>;
1366
1367					xbar_admaif10_ep: endpoint {
1368						remote-endpoint = <&admaif10_ep>;
1369					};
1370				};
1371
1372				port@b {
1373					reg = <0xb>;
1374
1375					xbar_admaif11_ep: endpoint {
1376						remote-endpoint = <&admaif11_ep>;
1377					};
1378				};
1379
1380				port@c {
1381					reg = <0xc>;
1382
1383					xbar_admaif12_ep: endpoint {
1384						remote-endpoint = <&admaif12_ep>;
1385					};
1386				};
1387
1388				port@d {
1389					reg = <0xd>;
1390
1391					xbar_admaif13_ep: endpoint {
1392						remote-endpoint = <&admaif13_ep>;
1393					};
1394				};
1395
1396				port@e {
1397					reg = <0xe>;
1398
1399					xbar_admaif14_ep: endpoint {
1400						remote-endpoint = <&admaif14_ep>;
1401					};
1402				};
1403
1404				port@f {
1405					reg = <0xf>;
1406
1407					xbar_admaif15_ep: endpoint {
1408						remote-endpoint = <&admaif15_ep>;
1409					};
1410				};
1411
1412				port@10 {
1413					reg = <0x10>;
1414
1415					xbar_admaif16_ep: endpoint {
1416						remote-endpoint = <&admaif16_ep>;
1417					};
1418				};
1419
1420				port@11 {
1421					reg = <0x11>;
1422
1423					xbar_admaif17_ep: endpoint {
1424						remote-endpoint = <&admaif17_ep>;
1425					};
1426				};
1427
1428				port@12 {
1429					reg = <0x12>;
1430
1431					xbar_admaif18_ep: endpoint {
1432						remote-endpoint = <&admaif18_ep>;
1433					};
1434				};
1435
1436				port@13 {
1437					reg = <0x13>;
1438
1439					xbar_admaif19_ep: endpoint {
1440						remote-endpoint = <&admaif19_ep>;
1441					};
1442				};
1443
1444				xbar_i2s1_port: port@14 {
1445					reg = <0x14>;
1446
1447					xbar_i2s1_ep: endpoint {
1448						remote-endpoint = <&i2s1_cif_ep>;
1449					};
1450				};
1451
1452				xbar_i2s2_port: port@15 {
1453					reg = <0x15>;
1454
1455					xbar_i2s2_ep: endpoint {
1456						remote-endpoint = <&i2s2_cif_ep>;
1457					};
1458				};
1459
1460				xbar_i2s3_port: port@16 {
1461					reg = <0x16>;
1462
1463					xbar_i2s3_ep: endpoint {
1464						remote-endpoint = <&i2s3_cif_ep>;
1465					};
1466				};
1467
1468				xbar_i2s4_port: port@17 {
1469					reg = <0x17>;
1470
1471					xbar_i2s4_ep: endpoint {
1472						remote-endpoint = <&i2s4_cif_ep>;
1473					};
1474				};
1475
1476				xbar_i2s5_port: port@18 {
1477					reg = <0x18>;
1478
1479					xbar_i2s5_ep: endpoint {
1480						remote-endpoint = <&i2s5_cif_ep>;
1481					};
1482				};
1483
1484				xbar_i2s6_port: port@19 {
1485					reg = <0x19>;
1486
1487					xbar_i2s6_ep: endpoint {
1488						remote-endpoint = <&i2s6_cif_ep>;
1489					};
1490				};
1491
1492				xbar_dmic1_port: port@1a {
1493					reg = <0x1a>;
1494
1495					xbar_dmic1_ep: endpoint {
1496						remote-endpoint = <&dmic1_cif_ep>;
1497					};
1498				};
1499
1500				xbar_dmic2_port: port@1b {
1501					reg = <0x1b>;
1502
1503					xbar_dmic2_ep: endpoint {
1504						remote-endpoint = <&dmic2_cif_ep>;
1505					};
1506				};
1507
1508				xbar_dmic3_port: port@1c {
1509					reg = <0x1c>;
1510
1511					xbar_dmic3_ep: endpoint {
1512						remote-endpoint = <&dmic3_cif_ep>;
1513					};
1514				};
1515
1516				xbar_dspk1_port: port@1e {
1517					reg = <0x1e>;
1518
1519					xbar_dspk1_ep: endpoint {
1520						remote-endpoint = <&dspk1_cif_ep>;
1521					};
1522				};
1523
1524				xbar_dspk2_port: port@1f {
1525					reg = <0x1f>;
1526
1527					xbar_dspk2_ep: endpoint {
1528						remote-endpoint = <&dspk2_cif_ep>;
1529					};
1530				};
1531
1532				xbar_sfc1_in_port: port@20 {
1533					reg = <0x20>;
1534
1535					xbar_sfc1_in_ep: endpoint {
1536						remote-endpoint = <&sfc1_cif_in_ep>;
1537					};
1538				};
1539
1540				port@21 {
1541					reg = <0x21>;
1542
1543					xbar_sfc1_out_ep: endpoint {
1544						remote-endpoint = <&sfc1_cif_out_ep>;
1545					};
1546				};
1547
1548				xbar_sfc2_in_port: port@22 {
1549					reg = <0x22>;
1550
1551					xbar_sfc2_in_ep: endpoint {
1552						remote-endpoint = <&sfc2_cif_in_ep>;
1553					};
1554				};
1555
1556				port@23 {
1557					reg = <0x23>;
1558
1559					xbar_sfc2_out_ep: endpoint {
1560						remote-endpoint = <&sfc2_cif_out_ep>;
1561					};
1562				};
1563
1564				xbar_sfc3_in_port: port@24 {
1565					reg = <0x24>;
1566
1567					xbar_sfc3_in_ep: endpoint {
1568						remote-endpoint = <&sfc3_cif_in_ep>;
1569					};
1570				};
1571
1572				port@25 {
1573					reg = <0x25>;
1574
1575					xbar_sfc3_out_ep: endpoint {
1576						remote-endpoint = <&sfc3_cif_out_ep>;
1577					};
1578				};
1579
1580				xbar_sfc4_in_port: port@26 {
1581					reg = <0x26>;
1582
1583					xbar_sfc4_in_ep: endpoint {
1584						remote-endpoint = <&sfc4_cif_in_ep>;
1585					};
1586				};
1587
1588				port@27 {
1589					reg = <0x27>;
1590
1591					xbar_sfc4_out_ep: endpoint {
1592						remote-endpoint = <&sfc4_cif_out_ep>;
1593					};
1594				};
1595
1596				xbar_mvc1_in_port: port@28 {
1597					reg = <0x28>;
1598
1599					xbar_mvc1_in_ep: endpoint {
1600						remote-endpoint = <&mvc1_cif_in_ep>;
1601					};
1602				};
1603
1604				port@29 {
1605					reg = <0x29>;
1606
1607					xbar_mvc1_out_ep: endpoint {
1608						remote-endpoint = <&mvc1_cif_out_ep>;
1609					};
1610				};
1611
1612				xbar_mvc2_in_port: port@2a {
1613					reg = <0x2a>;
1614
1615					xbar_mvc2_in_ep: endpoint {
1616						remote-endpoint = <&mvc2_cif_in_ep>;
1617					};
1618				};
1619
1620				port@2b {
1621					reg = <0x2b>;
1622
1623					xbar_mvc2_out_ep: endpoint {
1624						remote-endpoint = <&mvc2_cif_out_ep>;
1625					};
1626				};
1627
1628				xbar_amx1_in1_port: port@2c {
1629					reg = <0x2c>;
1630
1631					xbar_amx1_in1_ep: endpoint {
1632						remote-endpoint = <&amx1_in1_ep>;
1633					};
1634				};
1635
1636				xbar_amx1_in2_port: port@2d {
1637					reg = <0x2d>;
1638
1639					xbar_amx1_in2_ep: endpoint {
1640						remote-endpoint = <&amx1_in2_ep>;
1641					};
1642				};
1643
1644				xbar_amx1_in3_port: port@2e {
1645					reg = <0x2e>;
1646
1647					xbar_amx1_in3_ep: endpoint {
1648						remote-endpoint = <&amx1_in3_ep>;
1649					};
1650				};
1651
1652				xbar_amx1_in4_port: port@2f {
1653					reg = <0x2f>;
1654
1655					xbar_amx1_in4_ep: endpoint {
1656						remote-endpoint = <&amx1_in4_ep>;
1657					};
1658				};
1659
1660				port@30 {
1661					reg = <0x30>;
1662
1663					xbar_amx1_out_ep: endpoint {
1664						remote-endpoint = <&amx1_out_ep>;
1665					};
1666				};
1667
1668				xbar_amx2_in1_port: port@31 {
1669					reg = <0x31>;
1670
1671					xbar_amx2_in1_ep: endpoint {
1672						remote-endpoint = <&amx2_in1_ep>;
1673					};
1674				};
1675
1676				xbar_amx2_in2_port: port@32 {
1677					reg = <0x32>;
1678
1679					xbar_amx2_in2_ep: endpoint {
1680						remote-endpoint = <&amx2_in2_ep>;
1681					};
1682				};
1683
1684				xbar_amx2_in3_port: port@33 {
1685					reg = <0x33>;
1686
1687					xbar_amx2_in3_ep: endpoint {
1688						remote-endpoint = <&amx2_in3_ep>;
1689					};
1690				};
1691
1692				xbar_amx2_in4_port: port@34 {
1693					reg = <0x34>;
1694
1695					xbar_amx2_in4_ep: endpoint {
1696						remote-endpoint = <&amx2_in4_ep>;
1697					};
1698				};
1699
1700				port@35 {
1701					reg = <0x35>;
1702
1703					xbar_amx2_out_ep: endpoint {
1704						remote-endpoint = <&amx2_out_ep>;
1705					};
1706				};
1707
1708				xbar_amx3_in1_port: port@36 {
1709					reg = <0x36>;
1710
1711					xbar_amx3_in1_ep: endpoint {
1712						remote-endpoint = <&amx3_in1_ep>;
1713					};
1714				};
1715
1716				xbar_amx3_in2_port: port@37 {
1717					reg = <0x37>;
1718
1719					xbar_amx3_in2_ep: endpoint {
1720						remote-endpoint = <&amx3_in2_ep>;
1721					};
1722				};
1723
1724				xbar_amx3_in3_port: port@38 {
1725					reg = <0x38>;
1726
1727					xbar_amx3_in3_ep: endpoint {
1728						remote-endpoint = <&amx3_in3_ep>;
1729					};
1730				};
1731
1732				xbar_amx3_in4_port: port@39 {
1733					reg = <0x39>;
1734
1735					xbar_amx3_in4_ep: endpoint {
1736						remote-endpoint = <&amx3_in4_ep>;
1737					};
1738				};
1739
1740				port@3a {
1741					reg = <0x3a>;
1742
1743					xbar_amx3_out_ep: endpoint {
1744						remote-endpoint = <&amx3_out_ep>;
1745					};
1746				};
1747
1748				xbar_amx4_in1_port: port@3b {
1749					reg = <0x3b>;
1750
1751					xbar_amx4_in1_ep: endpoint {
1752						remote-endpoint = <&amx4_in1_ep>;
1753					};
1754				};
1755
1756				xbar_amx4_in2_port: port@3c {
1757					reg = <0x3c>;
1758
1759					xbar_amx4_in2_ep: endpoint {
1760						remote-endpoint = <&amx4_in2_ep>;
1761					};
1762				};
1763
1764				xbar_amx4_in3_port: port@3d {
1765					reg = <0x3d>;
1766
1767					xbar_amx4_in3_ep: endpoint {
1768						remote-endpoint = <&amx4_in3_ep>;
1769					};
1770				};
1771
1772				xbar_amx4_in4_port: port@3e {
1773					reg = <0x3e>;
1774
1775					xbar_amx4_in4_ep: endpoint {
1776						remote-endpoint = <&amx4_in4_ep>;
1777					};
1778				};
1779
1780				port@3f {
1781					reg = <0x3f>;
1782
1783					xbar_amx4_out_ep: endpoint {
1784						remote-endpoint = <&amx4_out_ep>;
1785					};
1786				};
1787
1788				xbar_adx1_in_port: port@40 {
1789					reg = <0x40>;
1790
1791					xbar_adx1_in_ep: endpoint {
1792						remote-endpoint = <&adx1_in_ep>;
1793					};
1794				};
1795
1796				port@41 {
1797					reg = <0x41>;
1798
1799					xbar_adx1_out1_ep: endpoint {
1800						remote-endpoint = <&adx1_out1_ep>;
1801					};
1802				};
1803
1804				port@42 {
1805					reg = <0x42>;
1806
1807					xbar_adx1_out2_ep: endpoint {
1808						remote-endpoint = <&adx1_out2_ep>;
1809					};
1810				};
1811
1812				port@43 {
1813					reg = <0x43>;
1814
1815					xbar_adx1_out3_ep: endpoint {
1816						remote-endpoint = <&adx1_out3_ep>;
1817					};
1818				};
1819
1820				port@44 {
1821					reg = <0x44>;
1822
1823					xbar_adx1_out4_ep: endpoint {
1824						remote-endpoint = <&adx1_out4_ep>;
1825					};
1826				};
1827
1828				xbar_adx2_in_port: port@45 {
1829					reg = <0x45>;
1830
1831					xbar_adx2_in_ep: endpoint {
1832						remote-endpoint = <&adx2_in_ep>;
1833					};
1834				};
1835
1836				port@46 {
1837					reg = <0x46>;
1838
1839					xbar_adx2_out1_ep: endpoint {
1840						remote-endpoint = <&adx2_out1_ep>;
1841					};
1842				};
1843
1844				port@47 {
1845					reg = <0x47>;
1846
1847					xbar_adx2_out2_ep: endpoint {
1848						remote-endpoint = <&adx2_out2_ep>;
1849					};
1850				};
1851
1852				port@48 {
1853					reg = <0x48>;
1854
1855					xbar_adx2_out3_ep: endpoint {
1856						remote-endpoint = <&adx2_out3_ep>;
1857					};
1858				};
1859
1860				port@49 {
1861					reg = <0x49>;
1862
1863					xbar_adx2_out4_ep: endpoint {
1864						remote-endpoint = <&adx2_out4_ep>;
1865					};
1866				};
1867
1868				xbar_adx3_in_port: port@4a {
1869					reg = <0x4a>;
1870
1871					xbar_adx3_in_ep: endpoint {
1872						remote-endpoint = <&adx3_in_ep>;
1873					};
1874				};
1875
1876				port@4b {
1877					reg = <0x4b>;
1878
1879					xbar_adx3_out1_ep: endpoint {
1880						remote-endpoint = <&adx3_out1_ep>;
1881					};
1882				};
1883
1884				port@4c {
1885					reg = <0x4c>;
1886
1887					xbar_adx3_out2_ep: endpoint {
1888						remote-endpoint = <&adx3_out2_ep>;
1889					};
1890				};
1891
1892				port@4d {
1893					reg = <0x4d>;
1894
1895					xbar_adx3_out3_ep: endpoint {
1896						remote-endpoint = <&adx3_out3_ep>;
1897					};
1898				};
1899
1900				port@4e {
1901					reg = <0x4e>;
1902
1903					xbar_adx3_out4_ep: endpoint {
1904						remote-endpoint = <&adx3_out4_ep>;
1905					};
1906				};
1907
1908				xbar_adx4_in_port: port@4f {
1909					reg = <0x4f>;
1910
1911					xbar_adx4_in_ep: endpoint {
1912						remote-endpoint = <&adx4_in_ep>;
1913					};
1914				};
1915
1916				port@50 {
1917					reg = <0x50>;
1918
1919					xbar_adx4_out1_ep: endpoint {
1920						remote-endpoint = <&adx4_out1_ep>;
1921					};
1922				};
1923
1924				port@51 {
1925					reg = <0x51>;
1926
1927					xbar_adx4_out2_ep: endpoint {
1928						remote-endpoint = <&adx4_out2_ep>;
1929					};
1930				};
1931
1932				port@52 {
1933					reg = <0x52>;
1934
1935					xbar_adx4_out3_ep: endpoint {
1936						remote-endpoint = <&adx4_out3_ep>;
1937					};
1938				};
1939
1940				port@53 {
1941					reg = <0x53>;
1942
1943					xbar_adx4_out4_ep: endpoint {
1944						remote-endpoint = <&adx4_out4_ep>;
1945					};
1946				};
1947
1948				xbar_mixer_in1_port: port@54 {
1949					reg = <0x54>;
1950
1951					xbar_mixer_in1_ep: endpoint {
1952						remote-endpoint = <&mixer_in1_ep>;
1953					};
1954				};
1955
1956				xbar_mixer_in2_port: port@55 {
1957					reg = <0x55>;
1958
1959					xbar_mixer_in2_ep: endpoint {
1960						remote-endpoint = <&mixer_in2_ep>;
1961					};
1962				};
1963
1964				xbar_mixer_in3_port: port@56 {
1965					reg = <0x56>;
1966
1967					xbar_mixer_in3_ep: endpoint {
1968						remote-endpoint = <&mixer_in3_ep>;
1969					};
1970				};
1971
1972				xbar_mixer_in4_port: port@57 {
1973					reg = <0x57>;
1974
1975					xbar_mixer_in4_ep: endpoint {
1976						remote-endpoint = <&mixer_in4_ep>;
1977					};
1978				};
1979
1980				xbar_mixer_in5_port: port@58 {
1981					reg = <0x58>;
1982
1983					xbar_mixer_in5_ep: endpoint {
1984						remote-endpoint = <&mixer_in5_ep>;
1985					};
1986				};
1987
1988				xbar_mixer_in6_port: port@59 {
1989					reg = <0x59>;
1990
1991					xbar_mixer_in6_ep: endpoint {
1992						remote-endpoint = <&mixer_in6_ep>;
1993					};
1994				};
1995
1996				xbar_mixer_in7_port: port@5a {
1997					reg = <0x5a>;
1998
1999					xbar_mixer_in7_ep: endpoint {
2000						remote-endpoint = <&mixer_in7_ep>;
2001					};
2002				};
2003
2004				xbar_mixer_in8_port: port@5b {
2005					reg = <0x5b>;
2006
2007					xbar_mixer_in8_ep: endpoint {
2008						remote-endpoint = <&mixer_in8_ep>;
2009					};
2010				};
2011
2012				xbar_mixer_in9_port: port@5c {
2013					reg = <0x5c>;
2014
2015					xbar_mixer_in9_ep: endpoint {
2016						remote-endpoint = <&mixer_in9_ep>;
2017					};
2018				};
2019
2020				xbar_mixer_in10_port: port@5d {
2021					reg = <0x5d>;
2022
2023					xbar_mixer_in10_ep: endpoint {
2024						remote-endpoint = <&mixer_in10_ep>;
2025					};
2026				};
2027
2028				port@5e {
2029					reg = <0x5e>;
2030
2031					xbar_mixer_out1_ep: endpoint {
2032						remote-endpoint = <&mixer_out1_ep>;
2033					};
2034				};
2035
2036				port@5f {
2037					reg = <0x5f>;
2038
2039					xbar_mixer_out2_ep: endpoint {
2040						remote-endpoint = <&mixer_out2_ep>;
2041					};
2042				};
2043
2044				port@60 {
2045					reg = <0x60>;
2046
2047					xbar_mixer_out3_ep: endpoint {
2048						remote-endpoint = <&mixer_out3_ep>;
2049					};
2050				};
2051
2052				port@61 {
2053					reg = <0x61>;
2054
2055					xbar_mixer_out4_ep: endpoint {
2056						remote-endpoint = <&mixer_out4_ep>;
2057					};
2058				};
2059
2060				port@62 {
2061					reg = <0x62>;
2062
2063					xbar_mixer_out5_ep: endpoint {
2064						remote-endpoint = <&mixer_out5_ep>;
2065					};
2066				};
2067
2068				xbar_asrc_in1_port: port@63 {
2069					reg = <0x63>;
2070
2071					xbar_asrc_in1_ep: endpoint {
2072						remote-endpoint = <&asrc_in1_ep>;
2073					};
2074				};
2075
2076				port@64 {
2077					reg = <0x64>;
2078
2079					xbar_asrc_out1_ep: endpoint {
2080						remote-endpoint = <&asrc_out1_ep>;
2081					};
2082				};
2083
2084				xbar_asrc_in2_port: port@65 {
2085					reg = <0x65>;
2086
2087					xbar_asrc_in2_ep: endpoint {
2088						remote-endpoint = <&asrc_in2_ep>;
2089					};
2090				};
2091
2092				port@66 {
2093					reg = <0x66>;
2094
2095					xbar_asrc_out2_ep: endpoint {
2096						remote-endpoint = <&asrc_out2_ep>;
2097					};
2098				};
2099
2100				xbar_asrc_in3_port: port@67 {
2101					reg = <0x67>;
2102
2103					xbar_asrc_in3_ep: endpoint {
2104						remote-endpoint = <&asrc_in3_ep>;
2105					};
2106				};
2107
2108				port@68 {
2109					reg = <0x68>;
2110
2111					xbar_asrc_out3_ep: endpoint {
2112						remote-endpoint = <&asrc_out3_ep>;
2113					};
2114				};
2115
2116				xbar_asrc_in4_port: port@69 {
2117					reg = <0x69>;
2118
2119					xbar_asrc_in4_ep: endpoint {
2120						remote-endpoint = <&asrc_in4_ep>;
2121					};
2122				};
2123
2124				port@6a {
2125					reg = <0x6a>;
2126
2127					xbar_asrc_out4_ep: endpoint {
2128						remote-endpoint = <&asrc_out4_ep>;
2129					};
2130				};
2131
2132				xbar_asrc_in5_port: port@6b {
2133					reg = <0x6b>;
2134
2135					xbar_asrc_in5_ep: endpoint {
2136						remote-endpoint = <&asrc_in5_ep>;
2137					};
2138				};
2139
2140				port@6c {
2141					reg = <0x6c>;
2142
2143					xbar_asrc_out5_ep: endpoint {
2144						remote-endpoint = <&asrc_out5_ep>;
2145					};
2146				};
2147
2148				xbar_asrc_in6_port: port@6d {
2149					reg = <0x6d>;
2150
2151					xbar_asrc_in6_ep: endpoint {
2152						remote-endpoint = <&asrc_in6_ep>;
2153					};
2154				};
2155
2156				port@6e {
2157					reg = <0x6e>;
2158
2159					xbar_asrc_out6_ep: endpoint {
2160						remote-endpoint = <&asrc_out6_ep>;
2161					};
2162				};
2163
2164				xbar_asrc_in7_port: port@6f {
2165					reg = <0x6f>;
2166
2167					xbar_asrc_in7_ep: endpoint {
2168						remote-endpoint = <&asrc_in7_ep>;
2169					};
2170				};
2171
2172				xbar_ope1_in_port: port@70 {
2173					reg = <0x70>;
2174
2175					xbar_ope1_in_ep: endpoint {
2176						remote-endpoint = <&ope1_cif_in_ep>;
2177					};
2178				};
2179
2180				port@71 {
2181					reg = <0x71>;
2182
2183					xbar_ope1_out_ep: endpoint {
2184						remote-endpoint = <&ope1_cif_out_ep>;
2185					};
2186				};
2187			};
2188		};
2189
2190		dma-controller@2930000 {
2191			status = "okay";
2192		};
2193
2194		interrupt-controller@2a40000 {
2195			status = "okay";
2196		};
2197	};
2198
2199	i2c@3160000 {
2200		power-monitor@42 {
2201			compatible = "ti,ina3221";
2202			reg = <0x42>;
2203			#address-cells = <1>;
2204			#size-cells = <0>;
2205
2206			input@0 {
2207				reg = <0x0>;
2208				label = "VDD_MUX";
2209				shunt-resistor-micro-ohms = <20000>;
2210			};
2211
2212			input@1 {
2213				reg = <0x1>;
2214				label = "VDD_5V0_IO_SYS";
2215				shunt-resistor-micro-ohms = <5000>;
2216			};
2217
2218			input@2 {
2219				reg = <0x2>;
2220				label = "VDD_3V3_SYS";
2221				shunt-resistor-micro-ohms = <10000>;
2222			};
2223		};
2224
2225		power-monitor@43 {
2226			compatible = "ti,ina3221";
2227			reg = <0x43>;
2228			#address-cells = <1>;
2229			#size-cells = <0>;
2230
2231			input@0 {
2232				reg = <0x0>;
2233				label = "VDD_3V3_IO_SLP";
2234				shunt-resistor-micro-ohms = <10000>;
2235			};
2236
2237			input@1 {
2238				reg = <0x1>;
2239				label = "VDD_1V8_IO";
2240				shunt-resistor-micro-ohms = <10000>;
2241			};
2242
2243			input@2 {
2244				reg = <0x2>;
2245				label = "VDD_M2_IN";
2246				shunt-resistor-micro-ohms = <10000>;
2247			};
2248		};
2249
2250		exp1: gpio@74 {
2251			compatible = "ti,tca9539";
2252			reg = <0x74>;
2253
2254			interrupt-parent = <&gpio>;
2255			interrupts = <TEGRA186_MAIN_GPIO(Y, 0)
2256				      GPIO_ACTIVE_LOW>;
2257
2258			#gpio-cells = <2>;
2259			gpio-controller;
2260
2261			vcc-supply = <&vdd_3v3_sys>;
2262		};
2263
2264		exp2: gpio@77 {
2265			compatible = "ti,tca9539";
2266			reg = <0x77>;
2267
2268			interrupt-parent = <&gpio>;
2269			interrupts = <TEGRA186_MAIN_GPIO(Y, 6)
2270				      GPIO_ACTIVE_LOW>;
2271
2272			#gpio-cells = <2>;
2273			gpio-controller;
2274
2275			vcc-supply = <&vdd_1v8>;
2276		};
2277	};
2278
2279	/* SDMMC1 (SD/MMC) */
2280	mmc@3400000 {
2281		status = "okay";
2282
2283		vmmc-supply = <&vdd_sd>;
2284	};
2285
2286	sata@3507000 {
2287		status = "okay";
2288	};
2289
2290	hda@3510000 {
2291		nvidia,model = "NVIDIA Jetson TX2 HDA";
2292		status = "okay";
2293	};
2294
2295	padctl@3520000 {
2296		status = "okay";
2297
2298		avdd-pll-erefeut-supply = <&vdd_1v8_pll>;
2299		avdd-usb-supply = <&vdd_3v3_sys>;
2300		vclamp-usb-supply = <&vdd_1v8>;
2301		vddio-hsic-supply = <&gnd>;
2302
2303		pads {
2304			usb2 {
2305				status = "okay";
2306
2307				lanes {
2308					micro_b: usb2-0 {
2309						nvidia,function = "xusb";
2310						status = "okay";
2311					};
2312
2313					usb2-1 {
2314						nvidia,function = "xusb";
2315						status = "okay";
2316					};
2317
2318					usb2-2 {
2319						nvidia,function = "xusb";
2320						status = "okay";
2321					};
2322				};
2323			};
2324
2325			usb3 {
2326				status = "okay";
2327
2328				lanes {
2329					usb3-0 {
2330						nvidia,function = "xusb";
2331						status = "okay";
2332					};
2333
2334					usb3-1 {
2335						nvidia,function = "xusb";
2336						status = "okay";
2337					};
2338
2339					usb3-2 {
2340						nvidia,function = "xusb";
2341						status = "okay";
2342					};
2343				};
2344			};
2345		};
2346
2347		ports {
2348			usb2-0 {
2349				status = "okay";
2350				mode = "otg";
2351				vbus-supply = <&vdd_usb0>;
2352				usb-role-switch;
2353
2354				connector {
2355					compatible = "gpio-usb-b-connector",
2356						     "usb-b-connector";
2357					label = "micro-USB";
2358					type = "micro";
2359					vbus-gpios = <&gpio
2360						      TEGRA186_MAIN_GPIO(X, 7)
2361						      GPIO_ACTIVE_LOW>;
2362					id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>;
2363				};
2364			};
2365
2366			usb2-1 {
2367				status = "okay";
2368				mode = "host";
2369
2370				vbus-supply = <&vdd_usb1>;
2371			};
2372
2373			usb3-0 {
2374				nvidia,usb2-companion = <1>;
2375				vbus-supply = <&vdd_usb1>;
2376				status = "okay";
2377			};
2378		};
2379	};
2380
2381	usb@3530000 {
2382		status = "okay";
2383
2384		phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>,
2385		       <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>,
2386		       <&{/padctl@3520000/pads/usb3/lanes/usb3-0}>;
2387		phy-names = "usb2-0", "usb2-1", "usb3-0";
2388	};
2389
2390	usb@3550000 {
2391		status = "okay";
2392
2393		phys = <&micro_b>;
2394		phy-names = "usb2-0";
2395	};
2396
2397	i2c@c250000 {
2398		/* carrier board ID EEPROM */
2399		eeprom@57 {
2400			compatible = "atmel,24c02";
2401			reg = <0x57>;
2402
2403			label = "system";
2404			vcc-supply = <&vdd_1v8>;
2405			address-width = <8>;
2406			pagesize = <8>;
2407			size = <256>;
2408			read-only;
2409		};
2410	};
2411
2412	pcie@10003000 {
2413		status = "okay";
2414
2415		dvdd-pex-supply = <&vdd_pex>;
2416		hvdd-pex-pll-supply = <&vdd_1v8>;
2417		hvdd-pex-supply = <&vdd_1v8>;
2418		vddio-pexctl-aud-supply = <&vdd_1v8>;
2419
2420		pci@1,0 {
2421			nvidia,num-lanes = <4>;
2422			status = "okay";
2423		};
2424
2425		pci@2,0 {
2426			nvidia,num-lanes = <0>;
2427			status = "disabled";
2428		};
2429
2430		pci@3,0 {
2431			nvidia,num-lanes = <1>;
2432			status = "disabled";
2433		};
2434	};
2435
2436	host1x@13e00000 {
2437		status = "okay";
2438
2439		dpaux@15040000 {
2440			status = "okay";
2441		};
2442
2443		display-hub@15200000 {
2444			status = "okay";
2445		};
2446
2447		dsi@15300000 {
2448			status = "disabled";
2449		};
2450
2451		/* DP on E3320 */
2452		sor@15540000 {
2453			status = "okay";
2454
2455			avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
2456			vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
2457
2458			nvidia,dpaux = <&dpaux>;
2459		};
2460
2461		sor@15580000 {
2462			status = "okay";
2463
2464			avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
2465			vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
2466			hdmi-supply = <&vdd_hdmi>;
2467
2468			nvidia,ddc-i2c-bus = <&ddc>;
2469			nvidia,hpd-gpio = <&gpio TEGRA186_MAIN_GPIO(P, 1)
2470						 GPIO_ACTIVE_LOW>;
2471		};
2472
2473		dpaux@155c0000 {
2474			status = "okay";
2475		};
2476	};
2477
2478	gpio-keys {
2479		compatible = "gpio-keys";
2480
2481		key-power {
2482			label = "Power";
2483			gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 0)
2484					   GPIO_ACTIVE_LOW>;
2485			linux,input-type = <EV_KEY>;
2486			linux,code = <KEY_POWER>;
2487			debounce-interval = <10>;
2488			wakeup-event-action = <EV_ACT_ASSERTED>;
2489			wakeup-source;
2490		};
2491
2492		key-volume-down {
2493			label = "Volume Down";
2494			gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 2)
2495					   GPIO_ACTIVE_LOW>;
2496			linux,input-type = <EV_KEY>;
2497			linux,code = <KEY_VOLUMEDOWN>;
2498			debounce-interval = <10>;
2499		};
2500
2501		key-volume-up {
2502			label = "Volume Up";
2503			gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 1)
2504					   GPIO_ACTIVE_LOW>;
2505			linux,input-type = <EV_KEY>;
2506			linux,code = <KEY_VOLUMEUP>;
2507			debounce-interval = <10>;
2508		};
2509	};
2510
2511	vdd_sd: regulator-vdd-sd {
2512		compatible = "regulator-fixed";
2513		regulator-name = "SD_CARD_SW_PWR";
2514		regulator-min-microvolt = <3300000>;
2515		regulator-max-microvolt = <3300000>;
2516
2517		gpio = <&gpio TEGRA186_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
2518		enable-active-high;
2519
2520		vin-supply = <&vdd_3v3_sys>;
2521	};
2522
2523	vdd_hdmi: regulator-vdd-hdmi {
2524		compatible = "regulator-fixed";
2525		regulator-name = "VDD_HDMI_5V0";
2526		regulator-min-microvolt = <5000000>;
2527		regulator-max-microvolt = <5000000>;
2528
2529		gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
2530		enable-active-high;
2531
2532		vin-supply = <&vdd_5v0_sys>;
2533	};
2534
2535	vdd_usb0: regulator-vdd-usb0 {
2536		compatible = "regulator-fixed";
2537		regulator-name = "VDD_USB0";
2538		regulator-min-microvolt = <5000000>;
2539		regulator-max-microvolt = <5000000>;
2540
2541		gpio = <&gpio TEGRA186_MAIN_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
2542		enable-active-high;
2543
2544		vin-supply = <&vdd_5v0_sys>;
2545	};
2546
2547	vdd_usb1: regulator-vdd-usb1 {
2548		compatible = "regulator-fixed";
2549		regulator-name = "VDD_USB1";
2550		regulator-min-microvolt = <5000000>;
2551		regulator-max-microvolt = <5000000>;
2552
2553		gpio = <&gpio TEGRA186_MAIN_GPIO(L, 5) GPIO_ACTIVE_HIGH>;
2554		enable-active-high;
2555
2556		vin-supply = <&vdd_5v0_sys>;
2557	};
2558
2559	sound {
2560		compatible = "nvidia,tegra186-audio-graph-card";
2561		status = "okay";
2562
2563		dais = /* FE */
2564		       <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
2565		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
2566		       <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
2567		       <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
2568		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
2569		       /* Router */
2570		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
2571		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>,
2572		       <&xbar_dmic1_port>, <&xbar_dmic2_port>, <&xbar_dmic3_port>,
2573		       <&xbar_dspk1_port>, <&xbar_dspk2_port>,
2574		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
2575		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
2576		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
2577		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
2578		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
2579		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
2580		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
2581		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
2582		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
2583		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
2584		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
2585		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
2586		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
2587		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
2588		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
2589		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
2590		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
2591		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
2592		       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
2593		       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
2594		       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
2595		       <&xbar_asrc_in7_port>,
2596		       <&xbar_ope1_in_port>,
2597		       /* HW accelerators */
2598		       <&sfc1_out_port>, <&sfc2_out_port>,
2599		       <&sfc3_out_port>, <&sfc4_out_port>,
2600		       <&mvc1_out_port>, <&mvc2_out_port>,
2601		       <&amx1_out_port>, <&amx2_out_port>,
2602		       <&amx3_out_port>, <&amx4_out_port>,
2603		       <&adx1_out1_port>, <&adx1_out2_port>,
2604		       <&adx1_out3_port>, <&adx1_out4_port>,
2605		       <&adx2_out1_port>, <&adx2_out2_port>,
2606		       <&adx2_out3_port>, <&adx2_out4_port>,
2607		       <&adx3_out1_port>, <&adx3_out2_port>,
2608		       <&adx3_out3_port>, <&adx3_out4_port>,
2609		       <&adx4_out1_port>, <&adx4_out2_port>,
2610		       <&adx4_out3_port>, <&adx4_out4_port>,
2611		       <&mixer_out1_port>, <&mixer_out2_port>,
2612		       <&mixer_out3_port>, <&mixer_out4_port>,
2613		       <&mixer_out5_port>,
2614		       <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>,
2615		       <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>,
2616		       <&ope1_out_port>,
2617		       /* I/O */
2618		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>,
2619		       <&i2s5_port>, <&i2s6_port>, <&dmic1_port>, <&dmic2_port>,
2620		       <&dmic3_port>, <&dspk1_port>, <&dspk2_port>;
2621
2622		label = "NVIDIA Jetson TX2 APE";
2623	};
2624};