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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * OMAP16xx specific gpio init
4 *
5 * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
6 *
7 * Author:
8 * Charulatha V <charu@ti.com>
9 */
10
11#include <linux/platform_data/gpio-omap.h>
12#include <linux/soc/ti/omap1-io.h>
13
14#include "hardware.h"
15#include "irqs.h"
16#include "soc.h"
17
18#define OMAP1610_GPIO1_BASE 0xfffbe400
19#define OMAP1610_GPIO2_BASE 0xfffbec00
20#define OMAP1610_GPIO3_BASE 0xfffbb400
21#define OMAP1610_GPIO4_BASE 0xfffbbc00
22#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
23
24/* smart idle, enable wakeup */
25#define SYSCONFIG_WORD 0x14
26
27/* mpu gpio */
28static struct resource omap16xx_mpu_gpio_resources[] = {
29 {
30 .start = OMAP1_MPUIO_VBASE,
31 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
32 .flags = IORESOURCE_MEM,
33 },
34 {
35 .start = INT_MPUIO,
36 .flags = IORESOURCE_IRQ,
37 },
38};
39
40static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
41 .revision = USHRT_MAX,
42 .direction = OMAP_MPUIO_IO_CNTL,
43 .datain = OMAP_MPUIO_INPUT_LATCH,
44 .dataout = OMAP_MPUIO_OUTPUT,
45 .irqstatus = OMAP_MPUIO_GPIO_INT,
46 .irqenable = OMAP_MPUIO_GPIO_MASKIT,
47 .irqenable_inv = true,
48 .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
49};
50
51static struct omap_gpio_platform_data omap16xx_mpu_gpio_config = {
52 .is_mpuio = true,
53 .bank_width = 16,
54 .bank_stride = 1,
55 .regs = &omap16xx_mpuio_regs,
56};
57
58static struct platform_device omap16xx_mpu_gpio = {
59 .name = "omap_gpio",
60 .id = 0,
61 .dev = {
62 .platform_data = &omap16xx_mpu_gpio_config,
63 },
64 .num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources),
65 .resource = omap16xx_mpu_gpio_resources,
66};
67
68/* gpio1 */
69static struct resource omap16xx_gpio1_resources[] = {
70 {
71 .start = OMAP1610_GPIO1_BASE,
72 .end = OMAP1610_GPIO1_BASE + SZ_2K - 1,
73 .flags = IORESOURCE_MEM,
74 },
75 {
76 .start = INT_GPIO_BANK1,
77 .flags = IORESOURCE_IRQ,
78 },
79};
80
81static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
82 .revision = OMAP1610_GPIO_REVISION,
83 .direction = OMAP1610_GPIO_DIRECTION,
84 .set_dataout = OMAP1610_GPIO_SET_DATAOUT,
85 .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT,
86 .datain = OMAP1610_GPIO_DATAIN,
87 .dataout = OMAP1610_GPIO_DATAOUT,
88 .irqstatus = OMAP1610_GPIO_IRQSTATUS1,
89 .irqenable = OMAP1610_GPIO_IRQENABLE1,
90 .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
91 .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
92 .wkup_en = OMAP1610_GPIO_WAKEUPENABLE,
93 .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
94 .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
95};
96
97static struct omap_gpio_platform_data omap16xx_gpio1_config = {
98 .bank_width = 16,
99 .regs = &omap16xx_gpio_regs,
100};
101
102static struct platform_device omap16xx_gpio1 = {
103 .name = "omap_gpio",
104 .id = 1,
105 .dev = {
106 .platform_data = &omap16xx_gpio1_config,
107 },
108 .num_resources = ARRAY_SIZE(omap16xx_gpio1_resources),
109 .resource = omap16xx_gpio1_resources,
110};
111
112/* gpio2 */
113static struct resource omap16xx_gpio2_resources[] = {
114 {
115 .start = OMAP1610_GPIO2_BASE,
116 .end = OMAP1610_GPIO2_BASE + SZ_2K - 1,
117 .flags = IORESOURCE_MEM,
118 },
119 {
120 .start = INT_1610_GPIO_BANK2,
121 .flags = IORESOURCE_IRQ,
122 },
123};
124
125static struct omap_gpio_platform_data omap16xx_gpio2_config = {
126 .bank_width = 16,
127 .regs = &omap16xx_gpio_regs,
128};
129
130static struct platform_device omap16xx_gpio2 = {
131 .name = "omap_gpio",
132 .id = 2,
133 .dev = {
134 .platform_data = &omap16xx_gpio2_config,
135 },
136 .num_resources = ARRAY_SIZE(omap16xx_gpio2_resources),
137 .resource = omap16xx_gpio2_resources,
138};
139
140/* gpio3 */
141static struct resource omap16xx_gpio3_resources[] = {
142 {
143 .start = OMAP1610_GPIO3_BASE,
144 .end = OMAP1610_GPIO3_BASE + SZ_2K - 1,
145 .flags = IORESOURCE_MEM,
146 },
147 {
148 .start = INT_1610_GPIO_BANK3,
149 .flags = IORESOURCE_IRQ,
150 },
151};
152
153static struct omap_gpio_platform_data omap16xx_gpio3_config = {
154 .bank_width = 16,
155 .regs = &omap16xx_gpio_regs,
156};
157
158static struct platform_device omap16xx_gpio3 = {
159 .name = "omap_gpio",
160 .id = 3,
161 .dev = {
162 .platform_data = &omap16xx_gpio3_config,
163 },
164 .num_resources = ARRAY_SIZE(omap16xx_gpio3_resources),
165 .resource = omap16xx_gpio3_resources,
166};
167
168/* gpio4 */
169static struct resource omap16xx_gpio4_resources[] = {
170 {
171 .start = OMAP1610_GPIO4_BASE,
172 .end = OMAP1610_GPIO4_BASE + SZ_2K - 1,
173 .flags = IORESOURCE_MEM,
174 },
175 {
176 .start = INT_1610_GPIO_BANK4,
177 .flags = IORESOURCE_IRQ,
178 },
179};
180
181static struct omap_gpio_platform_data omap16xx_gpio4_config = {
182 .bank_width = 16,
183 .regs = &omap16xx_gpio_regs,
184};
185
186static struct platform_device omap16xx_gpio4 = {
187 .name = "omap_gpio",
188 .id = 4,
189 .dev = {
190 .platform_data = &omap16xx_gpio4_config,
191 },
192 .num_resources = ARRAY_SIZE(omap16xx_gpio4_resources),
193 .resource = omap16xx_gpio4_resources,
194};
195
196static struct platform_device *omap16xx_gpio_dev[] __initdata = {
197 &omap16xx_mpu_gpio,
198 &omap16xx_gpio1,
199 &omap16xx_gpio2,
200 &omap16xx_gpio3,
201 &omap16xx_gpio4,
202};
203
204/*
205 * omap16xx_gpio_init needs to be done before
206 * machine_init functions access gpio APIs.
207 * Hence omap16xx_gpio_init is a postcore_initcall.
208 */
209static int __init omap16xx_gpio_init(void)
210{
211 int i;
212 void __iomem *base;
213 struct resource *res;
214 struct platform_device *pdev;
215 struct omap_gpio_platform_data *pdata;
216
217 if (!cpu_is_omap16xx())
218 return -EINVAL;
219
220 /*
221 * Enable system clock for GPIO module.
222 * The CAM_CLK_CTRL *is* really the right place.
223 */
224 omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
225 ULPD_CAM_CLK_CTRL);
226
227 for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
228 pdev = omap16xx_gpio_dev[i];
229 pdata = pdev->dev.platform_data;
230
231 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
232 if (unlikely(!res)) {
233 dev_err(&pdev->dev, "Invalid mem resource.\n");
234 return -ENODEV;
235 }
236
237 base = ioremap(res->start, resource_size(res));
238 if (unlikely(!base)) {
239 dev_err(&pdev->dev, "ioremap failed.\n");
240 return -ENOMEM;
241 }
242
243 __raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG);
244 iounmap(base);
245
246 platform_device_register(omap16xx_gpio_dev[i]);
247 }
248
249 return 0;
250}
251postcore_initcall(omap16xx_gpio_init);
1/*
2 * OMAP16xx specific gpio init
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
5 *
6 * Author:
7 * Charulatha V <charu@ti.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
12 *
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/gpio.h>
20#include <linux/platform_data/gpio-omap.h>
21
22#include <mach/irqs.h>
23
24#include "soc.h"
25
26#define OMAP1610_GPIO1_BASE 0xfffbe400
27#define OMAP1610_GPIO2_BASE 0xfffbec00
28#define OMAP1610_GPIO3_BASE 0xfffbb400
29#define OMAP1610_GPIO4_BASE 0xfffbbc00
30#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
31
32/* smart idle, enable wakeup */
33#define SYSCONFIG_WORD 0x14
34
35/* mpu gpio */
36static struct resource omap16xx_mpu_gpio_resources[] = {
37 {
38 .start = OMAP1_MPUIO_VBASE,
39 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
40 .flags = IORESOURCE_MEM,
41 },
42 {
43 .start = INT_MPUIO,
44 .flags = IORESOURCE_IRQ,
45 },
46};
47
48static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
49 .revision = USHRT_MAX,
50 .direction = OMAP_MPUIO_IO_CNTL,
51 .datain = OMAP_MPUIO_INPUT_LATCH,
52 .dataout = OMAP_MPUIO_OUTPUT,
53 .irqstatus = OMAP_MPUIO_GPIO_INT,
54 .irqenable = OMAP_MPUIO_GPIO_MASKIT,
55 .irqenable_inv = true,
56 .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
57};
58
59static struct omap_gpio_platform_data omap16xx_mpu_gpio_config = {
60 .is_mpuio = true,
61 .bank_width = 16,
62 .bank_stride = 1,
63 .regs = &omap16xx_mpuio_regs,
64};
65
66static struct platform_device omap16xx_mpu_gpio = {
67 .name = "omap_gpio",
68 .id = 0,
69 .dev = {
70 .platform_data = &omap16xx_mpu_gpio_config,
71 },
72 .num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources),
73 .resource = omap16xx_mpu_gpio_resources,
74};
75
76/* gpio1 */
77static struct resource omap16xx_gpio1_resources[] = {
78 {
79 .start = OMAP1610_GPIO1_BASE,
80 .end = OMAP1610_GPIO1_BASE + SZ_2K - 1,
81 .flags = IORESOURCE_MEM,
82 },
83 {
84 .start = INT_GPIO_BANK1,
85 .flags = IORESOURCE_IRQ,
86 },
87};
88
89static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
90 .revision = OMAP1610_GPIO_REVISION,
91 .direction = OMAP1610_GPIO_DIRECTION,
92 .set_dataout = OMAP1610_GPIO_SET_DATAOUT,
93 .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT,
94 .datain = OMAP1610_GPIO_DATAIN,
95 .dataout = OMAP1610_GPIO_DATAOUT,
96 .irqstatus = OMAP1610_GPIO_IRQSTATUS1,
97 .irqenable = OMAP1610_GPIO_IRQENABLE1,
98 .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
99 .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
100 .wkup_en = OMAP1610_GPIO_WAKEUPENABLE,
101 .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
102 .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
103};
104
105static struct omap_gpio_platform_data omap16xx_gpio1_config = {
106 .bank_width = 16,
107 .regs = &omap16xx_gpio_regs,
108};
109
110static struct platform_device omap16xx_gpio1 = {
111 .name = "omap_gpio",
112 .id = 1,
113 .dev = {
114 .platform_data = &omap16xx_gpio1_config,
115 },
116 .num_resources = ARRAY_SIZE(omap16xx_gpio1_resources),
117 .resource = omap16xx_gpio1_resources,
118};
119
120/* gpio2 */
121static struct resource omap16xx_gpio2_resources[] = {
122 {
123 .start = OMAP1610_GPIO2_BASE,
124 .end = OMAP1610_GPIO2_BASE + SZ_2K - 1,
125 .flags = IORESOURCE_MEM,
126 },
127 {
128 .start = INT_1610_GPIO_BANK2,
129 .flags = IORESOURCE_IRQ,
130 },
131};
132
133static struct omap_gpio_platform_data omap16xx_gpio2_config = {
134 .bank_width = 16,
135 .regs = &omap16xx_gpio_regs,
136};
137
138static struct platform_device omap16xx_gpio2 = {
139 .name = "omap_gpio",
140 .id = 2,
141 .dev = {
142 .platform_data = &omap16xx_gpio2_config,
143 },
144 .num_resources = ARRAY_SIZE(omap16xx_gpio2_resources),
145 .resource = omap16xx_gpio2_resources,
146};
147
148/* gpio3 */
149static struct resource omap16xx_gpio3_resources[] = {
150 {
151 .start = OMAP1610_GPIO3_BASE,
152 .end = OMAP1610_GPIO3_BASE + SZ_2K - 1,
153 .flags = IORESOURCE_MEM,
154 },
155 {
156 .start = INT_1610_GPIO_BANK3,
157 .flags = IORESOURCE_IRQ,
158 },
159};
160
161static struct omap_gpio_platform_data omap16xx_gpio3_config = {
162 .bank_width = 16,
163 .regs = &omap16xx_gpio_regs,
164};
165
166static struct platform_device omap16xx_gpio3 = {
167 .name = "omap_gpio",
168 .id = 3,
169 .dev = {
170 .platform_data = &omap16xx_gpio3_config,
171 },
172 .num_resources = ARRAY_SIZE(omap16xx_gpio3_resources),
173 .resource = omap16xx_gpio3_resources,
174};
175
176/* gpio4 */
177static struct resource omap16xx_gpio4_resources[] = {
178 {
179 .start = OMAP1610_GPIO4_BASE,
180 .end = OMAP1610_GPIO4_BASE + SZ_2K - 1,
181 .flags = IORESOURCE_MEM,
182 },
183 {
184 .start = INT_1610_GPIO_BANK4,
185 .flags = IORESOURCE_IRQ,
186 },
187};
188
189static struct omap_gpio_platform_data omap16xx_gpio4_config = {
190 .bank_width = 16,
191 .regs = &omap16xx_gpio_regs,
192};
193
194static struct platform_device omap16xx_gpio4 = {
195 .name = "omap_gpio",
196 .id = 4,
197 .dev = {
198 .platform_data = &omap16xx_gpio4_config,
199 },
200 .num_resources = ARRAY_SIZE(omap16xx_gpio4_resources),
201 .resource = omap16xx_gpio4_resources,
202};
203
204static struct platform_device *omap16xx_gpio_dev[] __initdata = {
205 &omap16xx_mpu_gpio,
206 &omap16xx_gpio1,
207 &omap16xx_gpio2,
208 &omap16xx_gpio3,
209 &omap16xx_gpio4,
210};
211
212/*
213 * omap16xx_gpio_init needs to be done before
214 * machine_init functions access gpio APIs.
215 * Hence omap16xx_gpio_init is a postcore_initcall.
216 */
217static int __init omap16xx_gpio_init(void)
218{
219 int i;
220 void __iomem *base;
221 struct resource *res;
222 struct platform_device *pdev;
223 struct omap_gpio_platform_data *pdata;
224
225 if (!cpu_is_omap16xx())
226 return -EINVAL;
227
228 /*
229 * Enable system clock for GPIO module.
230 * The CAM_CLK_CTRL *is* really the right place.
231 */
232 omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
233 ULPD_CAM_CLK_CTRL);
234
235 for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
236 pdev = omap16xx_gpio_dev[i];
237 pdata = pdev->dev.platform_data;
238
239 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
240 if (unlikely(!res)) {
241 dev_err(&pdev->dev, "Invalid mem resource.\n");
242 return -ENODEV;
243 }
244
245 base = ioremap(res->start, resource_size(res));
246 if (unlikely(!base)) {
247 dev_err(&pdev->dev, "ioremap failed.\n");
248 return -ENOMEM;
249 }
250
251 __raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG);
252 iounmap(base);
253
254 platform_device_register(omap16xx_gpio_dev[i]);
255 }
256
257 return 0;
258}
259postcore_initcall(omap16xx_gpio_init);