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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2017-2018 MediaTek Inc.
4 * Author: Sean Wang <sean.wang@mediatek.com>
5 *
6 */
7
8/dts-v1/;
9#include <dt-bindings/input/input.h>
10#include "mt7623.dtsi"
11#include "mt6323.dtsi"
12
13/ {
14 model = "MediaTek MT7623N with eMMC reference board";
15 compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
16
17 aliases {
18 serial0 = &uart0;
19 serial1 = &uart1;
20 serial2 = &uart2;
21 };
22
23 chosen {
24 stdout-path = "serial2:115200n8";
25 };
26
27 cpus {
28 cpu@0 {
29 proc-supply = <&mt6323_vproc_reg>;
30 };
31
32 cpu@1 {
33 proc-supply = <&mt6323_vproc_reg>;
34 };
35
36 cpu@2 {
37 proc-supply = <&mt6323_vproc_reg>;
38 };
39
40 cpu@3 {
41 proc-supply = <&mt6323_vproc_reg>;
42 };
43 };
44
45 gpio-keys {
46 compatible = "gpio-keys";
47 pinctrl-names = "default";
48 pinctrl-0 = <&key_pins_a>;
49
50 factory {
51 label = "factory";
52 linux,code = <BTN_0>;
53 gpios = <&pio 256 GPIO_ACTIVE_LOW>;
54 };
55
56 wps {
57 label = "wps";
58 linux,code = <KEY_WPS_BUTTON>;
59 gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
60 };
61 };
62
63 memory@80000000 {
64 device_type = "memory";
65 reg = <0 0x80000000 0 0x40000000>;
66 };
67
68 reg_1p8v: regulator-1p8v {
69 compatible = "regulator-fixed";
70 regulator-name = "fixed-1.8V";
71 regulator-min-microvolt = <1800000>;
72 regulator-max-microvolt = <1800000>;
73 regulator-boot-on;
74 regulator-always-on;
75 };
76
77 reg_3p3v: regulator-3p3v {
78 compatible = "regulator-fixed";
79 regulator-name = "fixed-3.3V";
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
82 regulator-boot-on;
83 regulator-always-on;
84 };
85
86 reg_5v: regulator-5v {
87 compatible = "regulator-fixed";
88 regulator-name = "fixed-5V";
89 regulator-min-microvolt = <5000000>;
90 regulator-max-microvolt = <5000000>;
91 regulator-boot-on;
92 regulator-always-on;
93 };
94
95 sound {
96 compatible = "mediatek,mt2701-wm8960-machine";
97 mediatek,platform = <&afe>;
98 audio-routing =
99 "Headphone", "HP_L",
100 "Headphone", "HP_R",
101 "LINPUT1", "AMIC",
102 "RINPUT1", "AMIC";
103 mediatek,audio-codec = <&wm8960>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&i2s0_pins_a>;
106 };
107};
108
109&btif {
110 status = "okay";
111};
112
113&cir {
114 pinctrl-names = "default";
115 pinctrl-0 = <&cir_pins_a>;
116 status = "okay";
117};
118
119&crypto {
120 status = "okay";
121};
122
123ð {
124 status = "okay";
125
126 gmac0: mac@0 {
127 compatible = "mediatek,eth-mac";
128 reg = <0>;
129 phy-mode = "trgmii";
130
131 fixed-link {
132 speed = <1000>;
133 full-duplex;
134 pause;
135 };
136 };
137
138 mac@1 {
139 compatible = "mediatek,eth-mac";
140 reg = <1>;
141 phy-mode = "rgmii";
142 phy-handle = <&phy5>;
143 };
144
145 mdio-bus {
146 #address-cells = <1>;
147 #size-cells = <0>;
148
149 phy5: ethernet-phy@5 {
150 reg = <5>;
151 phy-mode = "rgmii-rxid";
152 };
153
154 switch@0 {
155 compatible = "mediatek,mt7530";
156 reg = <0>;
157 reset-gpios = <&pio 33 0>;
158 core-supply = <&mt6323_vpa_reg>;
159 io-supply = <&mt6323_vemc3v3_reg>;
160
161 ports {
162 #address-cells = <1>;
163 #size-cells = <0>;
164
165 port@0 {
166 reg = <0>;
167 label = "lan0";
168 };
169
170 port@1 {
171 reg = <1>;
172 label = "lan1";
173 };
174
175 port@2 {
176 reg = <2>;
177 label = "lan2";
178 };
179
180 port@3 {
181 reg = <3>;
182 label = "lan3";
183 };
184
185 port@4 {
186 reg = <4>;
187 label = "wan";
188 };
189
190 port@6 {
191 reg = <6>;
192 label = "cpu";
193 ethernet = <&gmac0>;
194 phy-mode = "trgmii";
195
196 fixed-link {
197 speed = <1000>;
198 full-duplex;
199 };
200 };
201 };
202 };
203 };
204};
205
206&i2c0 {
207 pinctrl-names = "default";
208 pinctrl-0 = <&i2c0_pins_a>;
209 status = "okay";
210};
211
212&i2c1 {
213 pinctrl-names = "default";
214 pinctrl-0 = <&i2c1_pins_b>;
215 status = "okay";
216
217 wm8960: wm8960@1a {
218 compatible = "wlf,wm8960";
219 reg = <0x1a>;
220 };
221};
222
223&i2c2 {
224 pinctrl-names = "default";
225 pinctrl-0 = <&i2c2_pins_a>;
226 status = "okay";
227};
228
229&mmc0 {
230 pinctrl-names = "default", "state_uhs";
231 pinctrl-0 = <&mmc0_pins_default>;
232 pinctrl-1 = <&mmc0_pins_uhs>;
233 status = "okay";
234 bus-width = <8>;
235 max-frequency = <50000000>;
236 cap-mmc-highspeed;
237 vmmc-supply = <®_3p3v>;
238 vqmmc-supply = <®_1p8v>;
239 non-removable;
240};
241
242&mmc1 {
243 pinctrl-names = "default", "state_uhs";
244 pinctrl-0 = <&mmc1_pins_default>;
245 pinctrl-1 = <&mmc1_pins_uhs>;
246 status = "okay";
247 bus-width = <4>;
248 max-frequency = <50000000>;
249 cap-sd-highspeed;
250 cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
251 vmmc-supply = <®_3p3v>;
252 vqmmc-supply = <®_3p3v>;
253};
254
255&pcie {
256 pinctrl-names = "default";
257 pinctrl-0 = <&pcie_default>;
258 status = "okay";
259
260 pcie@0,0 {
261 status = "okay";
262 };
263
264 pcie@1,0 {
265 status = "okay";
266 };
267};
268
269&pcie0_phy {
270 status = "okay";
271};
272
273&pcie1_phy {
274 status = "okay";
275};
276
277&pwm {
278 pinctrl-names = "default";
279 pinctrl-0 = <&pwm_pins_a>;
280 status = "okay";
281};
282
283&spi0 {
284 pinctrl-names = "default";
285 pinctrl-0 = <&spi0_pins_a>;
286 status = "okay";
287};
288
289&spi1 {
290 pinctrl-names = "default";
291 pinctrl-0 = <&spi1_pins_a>;
292 status = "okay";
293};
294
295&spi2 {
296 pinctrl-names = "default";
297 pinctrl-0 = <&spi2_pins_a>;
298 status = "okay";
299};
300
301&uart0 {
302 pinctrl-names = "default";
303 pinctrl-0 = <&uart0_pins_a>;
304 status = "okay";
305};
306
307&uart1 {
308 pinctrl-names = "default";
309 pinctrl-0 = <&uart1_pins_a>;
310 status = "okay";
311};
312
313&uart2 {
314 pinctrl-names = "default";
315 pinctrl-0 = <&uart2_pins_a>;
316 status = "okay";
317};
318
319&usb1 {
320 vusb33-supply = <®_3p3v>;
321 vbus-supply = <®_5v>;
322 status = "okay";
323};
324
325&u3phy1 {
326 status = "okay";
327};