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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Freescale SPI/eSPI controller driver library.
4 *
5 * Maintainer: Kumar Gala
6 *
7 * Copyright (C) 2006 Polycom, Inc.
8 *
9 * CPM SPI and QE buffer descriptors mode support:
10 * Copyright (c) 2009 MontaVista Software, Inc.
11 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
12 *
13 * Copyright 2010 Freescale Semiconductor, Inc.
14 */
15#include <linux/dma-mapping.h>
16#include <linux/fsl_devices.h>
17#include <linux/interrupt.h>
18#include <linux/kernel.h>
19#include <linux/mm.h>
20#include <linux/module.h>
21#include <linux/of.h>
22#include <linux/platform_device.h>
23#include <linux/spi/spi.h>
24#ifdef CONFIG_FSL_SOC
25#include <sysdev/fsl_soc.h>
26#endif
27
28#include "spi-fsl-lib.h"
29
30#define MPC8XXX_SPI_RX_BUF(type) \
31void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
32{ \
33 type *rx = mpc8xxx_spi->rx; \
34 *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \
35 mpc8xxx_spi->rx = rx; \
36} \
37EXPORT_SYMBOL_GPL(mpc8xxx_spi_rx_buf_##type);
38
39#define MPC8XXX_SPI_TX_BUF(type) \
40u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
41{ \
42 u32 data; \
43 const type *tx = mpc8xxx_spi->tx; \
44 if (!tx) \
45 return 0; \
46 data = *tx++ << mpc8xxx_spi->tx_shift; \
47 mpc8xxx_spi->tx = tx; \
48 return data; \
49} \
50EXPORT_SYMBOL_GPL(mpc8xxx_spi_tx_buf_##type);
51
52MPC8XXX_SPI_RX_BUF(u8)
53MPC8XXX_SPI_RX_BUF(u16)
54MPC8XXX_SPI_RX_BUF(u32)
55MPC8XXX_SPI_TX_BUF(u8)
56MPC8XXX_SPI_TX_BUF(u16)
57MPC8XXX_SPI_TX_BUF(u32)
58
59struct mpc8xxx_spi_probe_info *to_of_pinfo(struct fsl_spi_platform_data *pdata)
60{
61 return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
62}
63EXPORT_SYMBOL_GPL(to_of_pinfo);
64
65const char *mpc8xxx_spi_strmode(unsigned int flags)
66{
67 if (flags & SPI_QE_CPU_MODE) {
68 return "QE CPU";
69 } else if (flags & SPI_CPM_MODE) {
70 if (flags & SPI_QE)
71 return "QE";
72 else if (flags & SPI_CPM2)
73 return "CPM2";
74 else
75 return "CPM1";
76 }
77 return "CPU";
78}
79EXPORT_SYMBOL_GPL(mpc8xxx_spi_strmode);
80
81void mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
82 unsigned int irq)
83{
84 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
85 struct spi_controller *ctlr;
86 struct mpc8xxx_spi *mpc8xxx_spi;
87
88 ctlr = dev_get_drvdata(dev);
89
90 /* the spi->mode bits understood by this driver: */
91 ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
92 | SPI_LSB_FIRST | SPI_LOOP;
93
94 ctlr->dev.of_node = dev->of_node;
95
96 mpc8xxx_spi = spi_controller_get_devdata(ctlr);
97 mpc8xxx_spi->dev = dev;
98 mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
99 mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
100 mpc8xxx_spi->flags = pdata->flags;
101 mpc8xxx_spi->spibrg = pdata->sysclk;
102 mpc8xxx_spi->irq = irq;
103
104 mpc8xxx_spi->rx_shift = 0;
105 mpc8xxx_spi->tx_shift = 0;
106
107 ctlr->bus_num = pdata->bus_num;
108 ctlr->num_chipselect = pdata->max_chipselect;
109
110 init_completion(&mpc8xxx_spi->done);
111}
112EXPORT_SYMBOL_GPL(mpc8xxx_spi_probe);
113
114int of_mpc8xxx_spi_probe(struct platform_device *ofdev)
115{
116 struct device *dev = &ofdev->dev;
117 struct device_node *np = ofdev->dev.of_node;
118 struct mpc8xxx_spi_probe_info *pinfo;
119 struct fsl_spi_platform_data *pdata;
120 const void *prop;
121 int ret = -ENOMEM;
122
123 pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL);
124 if (!pinfo)
125 return ret;
126
127 pdata = &pinfo->pdata;
128 dev->platform_data = pdata;
129
130 /* Allocate bus num dynamically. */
131 pdata->bus_num = -1;
132
133#ifdef CONFIG_FSL_SOC
134 /* SPI controller is either clocked from QE or SoC clock. */
135 pdata->sysclk = get_brgfreq();
136 if (pdata->sysclk == -1) {
137 pdata->sysclk = fsl_get_sys_freq();
138 if (pdata->sysclk == -1)
139 return -ENODEV;
140 }
141#else
142 ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk);
143 if (ret)
144 return ret;
145#endif
146
147 prop = of_get_property(np, "mode", NULL);
148 if (prop && !strcmp(prop, "cpu-qe"))
149 pdata->flags = SPI_QE_CPU_MODE;
150 else if (prop && !strcmp(prop, "qe"))
151 pdata->flags = SPI_CPM_MODE | SPI_QE;
152 else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
153 pdata->flags = SPI_CPM_MODE | SPI_CPM2;
154 else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
155 pdata->flags = SPI_CPM_MODE | SPI_CPM1;
156
157 return 0;
158}
159EXPORT_SYMBOL_GPL(of_mpc8xxx_spi_probe);
160
161MODULE_DESCRIPTION("Freescale SPI/eSPI controller driver library");
162MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Freescale SPI/eSPI controller driver library.
4 *
5 * Maintainer: Kumar Gala
6 *
7 * Copyright (C) 2006 Polycom, Inc.
8 *
9 * CPM SPI and QE buffer descriptors mode support:
10 * Copyright (c) 2009 MontaVista Software, Inc.
11 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
12 *
13 * Copyright 2010 Freescale Semiconductor, Inc.
14 */
15#include <linux/dma-mapping.h>
16#include <linux/fsl_devices.h>
17#include <linux/interrupt.h>
18#include <linux/kernel.h>
19#include <linux/mm.h>
20#include <linux/module.h>
21#include <linux/of_platform.h>
22#include <linux/spi/spi.h>
23#ifdef CONFIG_FSL_SOC
24#include <sysdev/fsl_soc.h>
25#endif
26
27#include "spi-fsl-lib.h"
28
29#define MPC8XXX_SPI_RX_BUF(type) \
30void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
31{ \
32 type *rx = mpc8xxx_spi->rx; \
33 *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \
34 mpc8xxx_spi->rx = rx; \
35} \
36EXPORT_SYMBOL_GPL(mpc8xxx_spi_rx_buf_##type);
37
38#define MPC8XXX_SPI_TX_BUF(type) \
39u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
40{ \
41 u32 data; \
42 const type *tx = mpc8xxx_spi->tx; \
43 if (!tx) \
44 return 0; \
45 data = *tx++ << mpc8xxx_spi->tx_shift; \
46 mpc8xxx_spi->tx = tx; \
47 return data; \
48} \
49EXPORT_SYMBOL_GPL(mpc8xxx_spi_tx_buf_##type);
50
51MPC8XXX_SPI_RX_BUF(u8)
52MPC8XXX_SPI_RX_BUF(u16)
53MPC8XXX_SPI_RX_BUF(u32)
54MPC8XXX_SPI_TX_BUF(u8)
55MPC8XXX_SPI_TX_BUF(u16)
56MPC8XXX_SPI_TX_BUF(u32)
57
58struct mpc8xxx_spi_probe_info *to_of_pinfo(struct fsl_spi_platform_data *pdata)
59{
60 return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
61}
62EXPORT_SYMBOL_GPL(to_of_pinfo);
63
64const char *mpc8xxx_spi_strmode(unsigned int flags)
65{
66 if (flags & SPI_QE_CPU_MODE) {
67 return "QE CPU";
68 } else if (flags & SPI_CPM_MODE) {
69 if (flags & SPI_QE)
70 return "QE";
71 else if (flags & SPI_CPM2)
72 return "CPM2";
73 else
74 return "CPM1";
75 }
76 return "CPU";
77}
78EXPORT_SYMBOL_GPL(mpc8xxx_spi_strmode);
79
80void mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
81 unsigned int irq)
82{
83 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
84 struct spi_master *master;
85 struct mpc8xxx_spi *mpc8xxx_spi;
86
87 master = dev_get_drvdata(dev);
88
89 /* the spi->mode bits understood by this driver: */
90 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
91 | SPI_LSB_FIRST | SPI_LOOP;
92
93 master->dev.of_node = dev->of_node;
94
95 mpc8xxx_spi = spi_master_get_devdata(master);
96 mpc8xxx_spi->dev = dev;
97 mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
98 mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
99 mpc8xxx_spi->flags = pdata->flags;
100 mpc8xxx_spi->spibrg = pdata->sysclk;
101 mpc8xxx_spi->irq = irq;
102
103 mpc8xxx_spi->rx_shift = 0;
104 mpc8xxx_spi->tx_shift = 0;
105
106 master->bus_num = pdata->bus_num;
107 master->num_chipselect = pdata->max_chipselect;
108
109 init_completion(&mpc8xxx_spi->done);
110}
111EXPORT_SYMBOL_GPL(mpc8xxx_spi_probe);
112
113int of_mpc8xxx_spi_probe(struct platform_device *ofdev)
114{
115 struct device *dev = &ofdev->dev;
116 struct device_node *np = ofdev->dev.of_node;
117 struct mpc8xxx_spi_probe_info *pinfo;
118 struct fsl_spi_platform_data *pdata;
119 const void *prop;
120 int ret = -ENOMEM;
121
122 pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL);
123 if (!pinfo)
124 return ret;
125
126 pdata = &pinfo->pdata;
127 dev->platform_data = pdata;
128
129 /* Allocate bus num dynamically. */
130 pdata->bus_num = -1;
131
132#ifdef CONFIG_FSL_SOC
133 /* SPI controller is either clocked from QE or SoC clock. */
134 pdata->sysclk = get_brgfreq();
135 if (pdata->sysclk == -1) {
136 pdata->sysclk = fsl_get_sys_freq();
137 if (pdata->sysclk == -1)
138 return -ENODEV;
139 }
140#else
141 ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk);
142 if (ret)
143 return ret;
144#endif
145
146 prop = of_get_property(np, "mode", NULL);
147 if (prop && !strcmp(prop, "cpu-qe"))
148 pdata->flags = SPI_QE_CPU_MODE;
149 else if (prop && !strcmp(prop, "qe"))
150 pdata->flags = SPI_CPM_MODE | SPI_QE;
151 else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
152 pdata->flags = SPI_CPM_MODE | SPI_CPM2;
153 else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
154 pdata->flags = SPI_CPM_MODE | SPI_CPM1;
155
156 return 0;
157}
158EXPORT_SYMBOL_GPL(of_mpc8xxx_spi_probe);
159
160MODULE_LICENSE("GPL");