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1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2019, Intel Corporation. */
3
4#include <linux/filter.h>
5#include <linux/net/intel/libie/rx.h>
6
7#include "ice_txrx_lib.h"
8#include "ice_eswitch.h"
9#include "ice_lib.h"
10
11/**
12 * ice_release_rx_desc - Store the new tail and head values
13 * @rx_ring: ring to bump
14 * @val: new head index
15 */
16void ice_release_rx_desc(struct ice_rx_ring *rx_ring, u16 val)
17{
18 u16 prev_ntu = rx_ring->next_to_use & ~0x7;
19
20 rx_ring->next_to_use = val;
21
22 /* update next to alloc since we have filled the ring */
23 rx_ring->next_to_alloc = val;
24
25 /* QRX_TAIL will be updated with any tail value, but hardware ignores
26 * the lower 3 bits. This makes it so we only bump tail on meaningful
27 * boundaries. Also, this allows us to bump tail on intervals of 8 up to
28 * the budget depending on the current traffic load.
29 */
30 val &= ~0x7;
31 if (prev_ntu != val) {
32 /* Force memory writes to complete before letting h/w
33 * know there are new descriptors to fetch. (Only
34 * applicable for weak-ordered memory model archs,
35 * such as IA-64).
36 */
37 wmb();
38 writel(val, rx_ring->tail);
39 }
40}
41
42/**
43 * ice_get_rx_hash - get RX hash value from descriptor
44 * @rx_desc: specific descriptor
45 *
46 * Returns hash, if present, 0 otherwise.
47 */
48static u32 ice_get_rx_hash(const union ice_32b_rx_flex_desc *rx_desc)
49{
50 const struct ice_32b_rx_flex_desc_nic *nic_mdid;
51
52 if (unlikely(rx_desc->wb.rxdid != ICE_RXDID_FLEX_NIC))
53 return 0;
54
55 nic_mdid = (struct ice_32b_rx_flex_desc_nic *)rx_desc;
56 return le32_to_cpu(nic_mdid->rss_hash);
57}
58
59/**
60 * ice_rx_hash_to_skb - set the hash value in the skb
61 * @rx_ring: descriptor ring
62 * @rx_desc: specific descriptor
63 * @skb: pointer to current skb
64 * @rx_ptype: the ptype value from the descriptor
65 */
66static void
67ice_rx_hash_to_skb(const struct ice_rx_ring *rx_ring,
68 const union ice_32b_rx_flex_desc *rx_desc,
69 struct sk_buff *skb, u16 rx_ptype)
70{
71 struct libeth_rx_pt decoded;
72 u32 hash;
73
74 decoded = libie_rx_pt_parse(rx_ptype);
75 if (!libeth_rx_pt_has_hash(rx_ring->netdev, decoded))
76 return;
77
78 hash = ice_get_rx_hash(rx_desc);
79 if (likely(hash))
80 libeth_rx_pt_set_hash(skb, hash, decoded);
81}
82
83/**
84 * ice_rx_csum - Indicate in skb if checksum is good
85 * @ring: the ring we care about
86 * @skb: skb currently being received and modified
87 * @rx_desc: the receive descriptor
88 * @ptype: the packet type decoded by hardware
89 *
90 * skb->protocol must be set before this function is called
91 */
92static void
93ice_rx_csum(struct ice_rx_ring *ring, struct sk_buff *skb,
94 union ice_32b_rx_flex_desc *rx_desc, u16 ptype)
95{
96 struct libeth_rx_pt decoded;
97 u16 rx_status0, rx_status1;
98 bool ipv4, ipv6;
99
100 /* Start with CHECKSUM_NONE and by default csum_level = 0 */
101 skb->ip_summed = CHECKSUM_NONE;
102
103 decoded = libie_rx_pt_parse(ptype);
104 if (!libeth_rx_pt_has_checksum(ring->netdev, decoded))
105 return;
106
107 rx_status0 = le16_to_cpu(rx_desc->wb.status_error0);
108 rx_status1 = le16_to_cpu(rx_desc->wb.status_error1);
109
110 /* check if HW has decoded the packet and checksum */
111 if (!(rx_status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_L3L4P_S)))
112 return;
113
114 ipv4 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV4;
115 ipv6 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV6;
116
117 if (ipv4 && (rx_status0 & (BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S)))) {
118 ring->vsi->back->hw_rx_eipe_error++;
119 return;
120 }
121
122 if (ipv4 && (rx_status0 & (BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_IPE_S))))
123 goto checksum_fail;
124
125 if (ipv6 && (rx_status0 & (BIT(ICE_RX_FLEX_DESC_STATUS0_IPV6EXADD_S))))
126 goto checksum_fail;
127
128 /* check for L4 errors and handle packets that were not able to be
129 * checksummed due to arrival speed
130 */
131 if (rx_status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_L4E_S))
132 goto checksum_fail;
133
134 /* check for outer UDP checksum error in tunneled packets */
135 if ((rx_status1 & BIT(ICE_RX_FLEX_DESC_STATUS1_NAT_S)) &&
136 (rx_status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S)))
137 goto checksum_fail;
138
139 /* If there is an outer header present that might contain a checksum
140 * we need to bump the checksum level by 1 to reflect the fact that
141 * we are indicating we validated the inner checksum.
142 */
143 if (decoded.tunnel_type >= LIBETH_RX_PT_TUNNEL_IP_GRENAT)
144 skb->csum_level = 1;
145
146 skb->ip_summed = CHECKSUM_UNNECESSARY;
147 return;
148
149checksum_fail:
150 ring->vsi->back->hw_csum_rx_error++;
151}
152
153/**
154 * ice_ptp_rx_hwts_to_skb - Put RX timestamp into skb
155 * @rx_ring: Ring to get the VSI info
156 * @rx_desc: Receive descriptor
157 * @skb: Particular skb to send timestamp with
158 *
159 * The timestamp is in ns, so we must convert the result first.
160 */
161static void
162ice_ptp_rx_hwts_to_skb(struct ice_rx_ring *rx_ring,
163 const union ice_32b_rx_flex_desc *rx_desc,
164 struct sk_buff *skb)
165{
166 u64 ts_ns = ice_ptp_get_rx_hwts(rx_desc, &rx_ring->pkt_ctx);
167
168 skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ts_ns);
169}
170
171/**
172 * ice_get_ptype - Read HW packet type from the descriptor
173 * @rx_desc: RX descriptor
174 */
175static u16 ice_get_ptype(const union ice_32b_rx_flex_desc *rx_desc)
176{
177 return le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
178 ICE_RX_FLEX_DESC_PTYPE_M;
179}
180
181/**
182 * ice_process_skb_fields - Populate skb header fields from Rx descriptor
183 * @rx_ring: Rx descriptor ring packet is being transacted on
184 * @rx_desc: pointer to the EOP Rx descriptor
185 * @skb: pointer to current skb being populated
186 *
187 * This function checks the ring, descriptor, and packet information in
188 * order to populate the hash, checksum, VLAN, protocol, and
189 * other fields within the skb.
190 */
191void
192ice_process_skb_fields(struct ice_rx_ring *rx_ring,
193 union ice_32b_rx_flex_desc *rx_desc,
194 struct sk_buff *skb)
195{
196 u16 ptype = ice_get_ptype(rx_desc);
197
198 ice_rx_hash_to_skb(rx_ring, rx_desc, skb, ptype);
199
200 /* modifies the skb - consumes the enet header */
201 if (unlikely(rx_ring->flags & ICE_RX_FLAGS_MULTIDEV)) {
202 struct net_device *netdev = ice_eswitch_get_target(rx_ring,
203 rx_desc);
204
205 if (ice_is_port_repr_netdev(netdev))
206 ice_repr_inc_rx_stats(netdev, skb->len);
207 skb->protocol = eth_type_trans(skb, netdev);
208 } else {
209 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
210 }
211
212 ice_rx_csum(rx_ring, skb, rx_desc, ptype);
213
214 if (rx_ring->ptp_rx)
215 ice_ptp_rx_hwts_to_skb(rx_ring, rx_desc, skb);
216}
217
218/**
219 * ice_receive_skb - Send a completed packet up the stack
220 * @rx_ring: Rx ring in play
221 * @skb: packet to send up
222 * @vlan_tci: VLAN TCI for packet
223 *
224 * This function sends the completed packet (via. skb) up the stack using
225 * gro receive functions (with/without VLAN tag)
226 */
227void
228ice_receive_skb(struct ice_rx_ring *rx_ring, struct sk_buff *skb, u16 vlan_tci)
229{
230 if ((vlan_tci & VLAN_VID_MASK) && rx_ring->vlan_proto)
231 __vlan_hwaccel_put_tag(skb, rx_ring->vlan_proto,
232 vlan_tci);
233
234 napi_gro_receive(&rx_ring->q_vector->napi, skb);
235}
236
237/**
238 * ice_clean_xdp_tx_buf - Free and unmap XDP Tx buffer
239 * @dev: device for DMA mapping
240 * @tx_buf: Tx buffer to clean
241 * @bq: XDP bulk flush struct
242 */
243static void
244ice_clean_xdp_tx_buf(struct device *dev, struct ice_tx_buf *tx_buf,
245 struct xdp_frame_bulk *bq)
246{
247 dma_unmap_single(dev, dma_unmap_addr(tx_buf, dma),
248 dma_unmap_len(tx_buf, len), DMA_TO_DEVICE);
249 dma_unmap_len_set(tx_buf, len, 0);
250
251 switch (tx_buf->type) {
252 case ICE_TX_BUF_XDP_TX:
253 page_frag_free(tx_buf->raw_buf);
254 break;
255 case ICE_TX_BUF_XDP_XMIT:
256 xdp_return_frame_bulk(tx_buf->xdpf, bq);
257 break;
258 }
259
260 tx_buf->type = ICE_TX_BUF_EMPTY;
261}
262
263/**
264 * ice_clean_xdp_irq - Reclaim resources after transmit completes on XDP ring
265 * @xdp_ring: XDP ring to clean
266 */
267static u32 ice_clean_xdp_irq(struct ice_tx_ring *xdp_ring)
268{
269 int total_bytes = 0, total_pkts = 0;
270 struct device *dev = xdp_ring->dev;
271 u32 ntc = xdp_ring->next_to_clean;
272 struct ice_tx_desc *tx_desc;
273 u32 cnt = xdp_ring->count;
274 struct xdp_frame_bulk bq;
275 u32 frags, xdp_tx = 0;
276 u32 ready_frames = 0;
277 u32 idx;
278 u32 ret;
279
280 idx = xdp_ring->tx_buf[ntc].rs_idx;
281 tx_desc = ICE_TX_DESC(xdp_ring, idx);
282 if (tx_desc->cmd_type_offset_bsz &
283 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)) {
284 if (idx >= ntc)
285 ready_frames = idx - ntc + 1;
286 else
287 ready_frames = idx + cnt - ntc + 1;
288 }
289
290 if (unlikely(!ready_frames))
291 return 0;
292 ret = ready_frames;
293
294 xdp_frame_bulk_init(&bq);
295 rcu_read_lock(); /* xdp_return_frame_bulk() */
296
297 while (ready_frames) {
298 struct ice_tx_buf *tx_buf = &xdp_ring->tx_buf[ntc];
299 struct ice_tx_buf *head = tx_buf;
300
301 /* bytecount holds size of head + frags */
302 total_bytes += tx_buf->bytecount;
303 frags = tx_buf->nr_frags;
304 total_pkts++;
305 /* count head + frags */
306 ready_frames -= frags + 1;
307 xdp_tx++;
308
309 ntc++;
310 if (ntc == cnt)
311 ntc = 0;
312
313 for (int i = 0; i < frags; i++) {
314 tx_buf = &xdp_ring->tx_buf[ntc];
315
316 ice_clean_xdp_tx_buf(dev, tx_buf, &bq);
317 ntc++;
318 if (ntc == cnt)
319 ntc = 0;
320 }
321
322 ice_clean_xdp_tx_buf(dev, head, &bq);
323 }
324
325 xdp_flush_frame_bulk(&bq);
326 rcu_read_unlock();
327
328 tx_desc->cmd_type_offset_bsz = 0;
329 xdp_ring->next_to_clean = ntc;
330 xdp_ring->xdp_tx_active -= xdp_tx;
331 ice_update_tx_ring_stats(xdp_ring, total_pkts, total_bytes);
332
333 return ret;
334}
335
336/**
337 * __ice_xmit_xdp_ring - submit frame to XDP ring for transmission
338 * @xdp: XDP buffer to be placed onto Tx descriptors
339 * @xdp_ring: XDP ring for transmission
340 * @frame: whether this comes from .ndo_xdp_xmit()
341 */
342int __ice_xmit_xdp_ring(struct xdp_buff *xdp, struct ice_tx_ring *xdp_ring,
343 bool frame)
344{
345 struct skb_shared_info *sinfo = NULL;
346 u32 size = xdp->data_end - xdp->data;
347 struct device *dev = xdp_ring->dev;
348 u32 ntu = xdp_ring->next_to_use;
349 struct ice_tx_desc *tx_desc;
350 struct ice_tx_buf *tx_head;
351 struct ice_tx_buf *tx_buf;
352 u32 cnt = xdp_ring->count;
353 void *data = xdp->data;
354 u32 nr_frags = 0;
355 u32 free_space;
356 u32 frag = 0;
357
358 free_space = ICE_DESC_UNUSED(xdp_ring);
359 if (free_space < ICE_RING_QUARTER(xdp_ring))
360 free_space += ice_clean_xdp_irq(xdp_ring);
361
362 if (unlikely(!free_space))
363 goto busy;
364
365 if (unlikely(xdp_buff_has_frags(xdp))) {
366 sinfo = xdp_get_shared_info_from_buff(xdp);
367 nr_frags = sinfo->nr_frags;
368 if (free_space < nr_frags + 1)
369 goto busy;
370 }
371
372 tx_desc = ICE_TX_DESC(xdp_ring, ntu);
373 tx_head = &xdp_ring->tx_buf[ntu];
374 tx_buf = tx_head;
375
376 for (;;) {
377 dma_addr_t dma;
378
379 dma = dma_map_single(dev, data, size, DMA_TO_DEVICE);
380 if (dma_mapping_error(dev, dma))
381 goto dma_unmap;
382
383 /* record length, and DMA address */
384 dma_unmap_len_set(tx_buf, len, size);
385 dma_unmap_addr_set(tx_buf, dma, dma);
386
387 if (frame) {
388 tx_buf->type = ICE_TX_BUF_FRAG;
389 } else {
390 tx_buf->type = ICE_TX_BUF_XDP_TX;
391 tx_buf->raw_buf = data;
392 }
393
394 tx_desc->buf_addr = cpu_to_le64(dma);
395 tx_desc->cmd_type_offset_bsz = ice_build_ctob(0, 0, size, 0);
396
397 ntu++;
398 if (ntu == cnt)
399 ntu = 0;
400
401 if (frag == nr_frags)
402 break;
403
404 tx_desc = ICE_TX_DESC(xdp_ring, ntu);
405 tx_buf = &xdp_ring->tx_buf[ntu];
406
407 data = skb_frag_address(&sinfo->frags[frag]);
408 size = skb_frag_size(&sinfo->frags[frag]);
409 frag++;
410 }
411
412 /* store info about bytecount and frag count in first desc */
413 tx_head->bytecount = xdp_get_buff_len(xdp);
414 tx_head->nr_frags = nr_frags;
415
416 if (frame) {
417 tx_head->type = ICE_TX_BUF_XDP_XMIT;
418 tx_head->xdpf = xdp->data_hard_start;
419 }
420
421 /* update last descriptor from a frame with EOP */
422 tx_desc->cmd_type_offset_bsz |=
423 cpu_to_le64(ICE_TX_DESC_CMD_EOP << ICE_TXD_QW1_CMD_S);
424
425 xdp_ring->xdp_tx_active++;
426 xdp_ring->next_to_use = ntu;
427
428 return ICE_XDP_TX;
429
430dma_unmap:
431 for (;;) {
432 tx_buf = &xdp_ring->tx_buf[ntu];
433 dma_unmap_page(dev, dma_unmap_addr(tx_buf, dma),
434 dma_unmap_len(tx_buf, len), DMA_TO_DEVICE);
435 dma_unmap_len_set(tx_buf, len, 0);
436 if (tx_buf == tx_head)
437 break;
438
439 if (!ntu)
440 ntu += cnt;
441 ntu--;
442 }
443 return ICE_XDP_CONSUMED;
444
445busy:
446 xdp_ring->ring_stats->tx_stats.tx_busy++;
447
448 return ICE_XDP_CONSUMED;
449}
450
451/**
452 * ice_finalize_xdp_rx - Bump XDP Tx tail and/or flush redirect map
453 * @xdp_ring: XDP ring
454 * @xdp_res: Result of the receive batch
455 * @first_idx: index to write from caller
456 *
457 * This function bumps XDP Tx tail and/or flush redirect map, and
458 * should be called when a batch of packets has been processed in the
459 * napi loop.
460 */
461void ice_finalize_xdp_rx(struct ice_tx_ring *xdp_ring, unsigned int xdp_res,
462 u32 first_idx)
463{
464 struct ice_tx_buf *tx_buf = &xdp_ring->tx_buf[first_idx];
465
466 if (xdp_res & ICE_XDP_REDIR)
467 xdp_do_flush();
468
469 if (xdp_res & ICE_XDP_TX) {
470 if (static_branch_unlikely(&ice_xdp_locking_key))
471 spin_lock(&xdp_ring->tx_lock);
472 /* store index of descriptor with RS bit set in the first
473 * ice_tx_buf of given NAPI batch
474 */
475 tx_buf->rs_idx = ice_set_rs_bit(xdp_ring);
476 ice_xdp_ring_update_tail(xdp_ring);
477 if (static_branch_unlikely(&ice_xdp_locking_key))
478 spin_unlock(&xdp_ring->tx_lock);
479 }
480}
481
482/**
483 * ice_xdp_rx_hw_ts - HW timestamp XDP hint handler
484 * @ctx: XDP buff pointer
485 * @ts_ns: destination address
486 *
487 * Copy HW timestamp (if available) to the destination address.
488 */
489static int ice_xdp_rx_hw_ts(const struct xdp_md *ctx, u64 *ts_ns)
490{
491 const struct ice_xdp_buff *xdp_ext = (void *)ctx;
492
493 *ts_ns = ice_ptp_get_rx_hwts(xdp_ext->eop_desc,
494 xdp_ext->pkt_ctx);
495 if (!*ts_ns)
496 return -ENODATA;
497
498 return 0;
499}
500
501/**
502 * ice_xdp_rx_hash_type - Get XDP-specific hash type from the RX descriptor
503 * @eop_desc: End of Packet descriptor
504 */
505static enum xdp_rss_hash_type
506ice_xdp_rx_hash_type(const union ice_32b_rx_flex_desc *eop_desc)
507{
508 return libie_rx_pt_parse(ice_get_ptype(eop_desc)).hash_type;
509}
510
511/**
512 * ice_xdp_rx_hash - RX hash XDP hint handler
513 * @ctx: XDP buff pointer
514 * @hash: hash destination address
515 * @rss_type: XDP hash type destination address
516 *
517 * Copy RX hash (if available) and its type to the destination address.
518 */
519static int ice_xdp_rx_hash(const struct xdp_md *ctx, u32 *hash,
520 enum xdp_rss_hash_type *rss_type)
521{
522 const struct ice_xdp_buff *xdp_ext = (void *)ctx;
523
524 *hash = ice_get_rx_hash(xdp_ext->eop_desc);
525 *rss_type = ice_xdp_rx_hash_type(xdp_ext->eop_desc);
526 if (!likely(*hash))
527 return -ENODATA;
528
529 return 0;
530}
531
532/**
533 * ice_xdp_rx_vlan_tag - VLAN tag XDP hint handler
534 * @ctx: XDP buff pointer
535 * @vlan_proto: destination address for VLAN protocol
536 * @vlan_tci: destination address for VLAN TCI
537 *
538 * Copy VLAN tag (if was stripped) and corresponding protocol
539 * to the destination address.
540 */
541static int ice_xdp_rx_vlan_tag(const struct xdp_md *ctx, __be16 *vlan_proto,
542 u16 *vlan_tci)
543{
544 const struct ice_xdp_buff *xdp_ext = (void *)ctx;
545
546 *vlan_proto = xdp_ext->pkt_ctx->vlan_proto;
547 if (!*vlan_proto)
548 return -ENODATA;
549
550 *vlan_tci = ice_get_vlan_tci(xdp_ext->eop_desc);
551 if (!*vlan_tci)
552 return -ENODATA;
553
554 return 0;
555}
556
557const struct xdp_metadata_ops ice_xdp_md_ops = {
558 .xmo_rx_timestamp = ice_xdp_rx_hw_ts,
559 .xmo_rx_hash = ice_xdp_rx_hash,
560 .xmo_rx_vlan_tag = ice_xdp_rx_vlan_tag,
561};
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2019, Intel Corporation. */
3
4#include "ice_txrx_lib.h"
5
6/**
7 * ice_release_rx_desc - Store the new tail and head values
8 * @rx_ring: ring to bump
9 * @val: new head index
10 */
11void ice_release_rx_desc(struct ice_ring *rx_ring, u16 val)
12{
13 u16 prev_ntu = rx_ring->next_to_use & ~0x7;
14
15 rx_ring->next_to_use = val;
16
17 /* update next to alloc since we have filled the ring */
18 rx_ring->next_to_alloc = val;
19
20 /* QRX_TAIL will be updated with any tail value, but hardware ignores
21 * the lower 3 bits. This makes it so we only bump tail on meaningful
22 * boundaries. Also, this allows us to bump tail on intervals of 8 up to
23 * the budget depending on the current traffic load.
24 */
25 val &= ~0x7;
26 if (prev_ntu != val) {
27 /* Force memory writes to complete before letting h/w
28 * know there are new descriptors to fetch. (Only
29 * applicable for weak-ordered memory model archs,
30 * such as IA-64).
31 */
32 wmb();
33 writel(val, rx_ring->tail);
34 }
35}
36
37/**
38 * ice_ptype_to_htype - get a hash type
39 * @ptype: the ptype value from the descriptor
40 *
41 * Returns a hash type to be used by skb_set_hash
42 */
43static enum pkt_hash_types ice_ptype_to_htype(u8 __always_unused ptype)
44{
45 return PKT_HASH_TYPE_NONE;
46}
47
48/**
49 * ice_rx_hash - set the hash value in the skb
50 * @rx_ring: descriptor ring
51 * @rx_desc: specific descriptor
52 * @skb: pointer to current skb
53 * @rx_ptype: the ptype value from the descriptor
54 */
55static void
56ice_rx_hash(struct ice_ring *rx_ring, union ice_32b_rx_flex_desc *rx_desc,
57 struct sk_buff *skb, u8 rx_ptype)
58{
59 struct ice_32b_rx_flex_desc_nic *nic_mdid;
60 u32 hash;
61
62 if (!(rx_ring->netdev->features & NETIF_F_RXHASH))
63 return;
64
65 if (rx_desc->wb.rxdid != ICE_RXDID_FLEX_NIC)
66 return;
67
68 nic_mdid = (struct ice_32b_rx_flex_desc_nic *)rx_desc;
69 hash = le32_to_cpu(nic_mdid->rss_hash);
70 skb_set_hash(skb, hash, ice_ptype_to_htype(rx_ptype));
71}
72
73/**
74 * ice_rx_csum - Indicate in skb if checksum is good
75 * @ring: the ring we care about
76 * @skb: skb currently being received and modified
77 * @rx_desc: the receive descriptor
78 * @ptype: the packet type decoded by hardware
79 *
80 * skb->protocol must be set before this function is called
81 */
82static void
83ice_rx_csum(struct ice_ring *ring, struct sk_buff *skb,
84 union ice_32b_rx_flex_desc *rx_desc, u8 ptype)
85{
86 struct ice_rx_ptype_decoded decoded;
87 u16 rx_status0, rx_status1;
88 bool ipv4, ipv6;
89
90 rx_status0 = le16_to_cpu(rx_desc->wb.status_error0);
91 rx_status1 = le16_to_cpu(rx_desc->wb.status_error1);
92
93 decoded = ice_decode_rx_desc_ptype(ptype);
94
95 /* Start with CHECKSUM_NONE and by default csum_level = 0 */
96 skb->ip_summed = CHECKSUM_NONE;
97 skb_checksum_none_assert(skb);
98
99 /* check if Rx checksum is enabled */
100 if (!(ring->netdev->features & NETIF_F_RXCSUM))
101 return;
102
103 /* check if HW has decoded the packet and checksum */
104 if (!(rx_status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_L3L4P_S)))
105 return;
106
107 if (!(decoded.known && decoded.outer_ip))
108 return;
109
110 ipv4 = (decoded.outer_ip == ICE_RX_PTYPE_OUTER_IP) &&
111 (decoded.outer_ip_ver == ICE_RX_PTYPE_OUTER_IPV4);
112 ipv6 = (decoded.outer_ip == ICE_RX_PTYPE_OUTER_IP) &&
113 (decoded.outer_ip_ver == ICE_RX_PTYPE_OUTER_IPV6);
114
115 if (ipv4 && (rx_status0 & (BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_IPE_S) |
116 BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S))))
117 goto checksum_fail;
118
119 if (ipv6 && (rx_status0 & (BIT(ICE_RX_FLEX_DESC_STATUS0_IPV6EXADD_S))))
120 goto checksum_fail;
121
122 /* check for L4 errors and handle packets that were not able to be
123 * checksummed due to arrival speed
124 */
125 if (rx_status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_L4E_S))
126 goto checksum_fail;
127
128 /* check for outer UDP checksum error in tunneled packets */
129 if ((rx_status1 & BIT(ICE_RX_FLEX_DESC_STATUS1_NAT_S)) &&
130 (rx_status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S)))
131 goto checksum_fail;
132
133 /* If there is an outer header present that might contain a checksum
134 * we need to bump the checksum level by 1 to reflect the fact that
135 * we are indicating we validated the inner checksum.
136 */
137 if (decoded.tunnel_type >= ICE_RX_PTYPE_TUNNEL_IP_GRENAT)
138 skb->csum_level = 1;
139
140 /* Only report checksum unnecessary for TCP, UDP, or SCTP */
141 switch (decoded.inner_prot) {
142 case ICE_RX_PTYPE_INNER_PROT_TCP:
143 case ICE_RX_PTYPE_INNER_PROT_UDP:
144 case ICE_RX_PTYPE_INNER_PROT_SCTP:
145 skb->ip_summed = CHECKSUM_UNNECESSARY;
146 default:
147 break;
148 }
149 return;
150
151checksum_fail:
152 ring->vsi->back->hw_csum_rx_error++;
153}
154
155/**
156 * ice_process_skb_fields - Populate skb header fields from Rx descriptor
157 * @rx_ring: Rx descriptor ring packet is being transacted on
158 * @rx_desc: pointer to the EOP Rx descriptor
159 * @skb: pointer to current skb being populated
160 * @ptype: the packet type decoded by hardware
161 *
162 * This function checks the ring, descriptor, and packet information in
163 * order to populate the hash, checksum, VLAN, protocol, and
164 * other fields within the skb.
165 */
166void
167ice_process_skb_fields(struct ice_ring *rx_ring,
168 union ice_32b_rx_flex_desc *rx_desc,
169 struct sk_buff *skb, u8 ptype)
170{
171 ice_rx_hash(rx_ring, rx_desc, skb, ptype);
172
173 /* modifies the skb - consumes the enet header */
174 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
175
176 ice_rx_csum(rx_ring, skb, rx_desc, ptype);
177}
178
179/**
180 * ice_receive_skb - Send a completed packet up the stack
181 * @rx_ring: Rx ring in play
182 * @skb: packet to send up
183 * @vlan_tag: VLAN tag for packet
184 *
185 * This function sends the completed packet (via. skb) up the stack using
186 * gro receive functions (with/without VLAN tag)
187 */
188void
189ice_receive_skb(struct ice_ring *rx_ring, struct sk_buff *skb, u16 vlan_tag)
190{
191 if ((rx_ring->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
192 (vlan_tag & VLAN_VID_MASK))
193 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
194 if (napi_gro_receive(&rx_ring->q_vector->napi, skb) == GRO_DROP) {
195 /* this is tracked separately to help us debug stack drops */
196 rx_ring->rx_stats.gro_dropped++;
197 netdev_dbg(rx_ring->netdev, "Receive Queue %d: Dropped packet from GRO\n",
198 rx_ring->q_index);
199 }
200}
201
202/**
203 * ice_xmit_xdp_ring - submit single packet to XDP ring for transmission
204 * @data: packet data pointer
205 * @size: packet data size
206 * @xdp_ring: XDP ring for transmission
207 */
208int ice_xmit_xdp_ring(void *data, u16 size, struct ice_ring *xdp_ring)
209{
210 u16 i = xdp_ring->next_to_use;
211 struct ice_tx_desc *tx_desc;
212 struct ice_tx_buf *tx_buf;
213 dma_addr_t dma;
214
215 if (!unlikely(ICE_DESC_UNUSED(xdp_ring))) {
216 xdp_ring->tx_stats.tx_busy++;
217 return ICE_XDP_CONSUMED;
218 }
219
220 dma = dma_map_single(xdp_ring->dev, data, size, DMA_TO_DEVICE);
221 if (dma_mapping_error(xdp_ring->dev, dma))
222 return ICE_XDP_CONSUMED;
223
224 tx_buf = &xdp_ring->tx_buf[i];
225 tx_buf->bytecount = size;
226 tx_buf->gso_segs = 1;
227 tx_buf->raw_buf = data;
228
229 /* record length, and DMA address */
230 dma_unmap_len_set(tx_buf, len, size);
231 dma_unmap_addr_set(tx_buf, dma, dma);
232
233 tx_desc = ICE_TX_DESC(xdp_ring, i);
234 tx_desc->buf_addr = cpu_to_le64(dma);
235 tx_desc->cmd_type_offset_bsz = ice_build_ctob(ICE_TXD_LAST_DESC_CMD, 0,
236 size, 0);
237
238 /* Make certain all of the status bits have been updated
239 * before next_to_watch is written.
240 */
241 smp_wmb();
242
243 i++;
244 if (i == xdp_ring->count)
245 i = 0;
246
247 tx_buf->next_to_watch = tx_desc;
248 xdp_ring->next_to_use = i;
249
250 return ICE_XDP_TX;
251}
252
253/**
254 * ice_xmit_xdp_buff - convert an XDP buffer to an XDP frame and send it
255 * @xdp: XDP buffer
256 * @xdp_ring: XDP Tx ring
257 *
258 * Returns negative on failure, 0 on success.
259 */
260int ice_xmit_xdp_buff(struct xdp_buff *xdp, struct ice_ring *xdp_ring)
261{
262 struct xdp_frame *xdpf = xdp_convert_buff_to_frame(xdp);
263
264 if (unlikely(!xdpf))
265 return ICE_XDP_CONSUMED;
266
267 return ice_xmit_xdp_ring(xdpf->data, xdpf->len, xdp_ring);
268}
269
270/**
271 * ice_finalize_xdp_rx - Bump XDP Tx tail and/or flush redirect map
272 * @rx_ring: Rx ring
273 * @xdp_res: Result of the receive batch
274 *
275 * This function bumps XDP Tx tail and/or flush redirect map, and
276 * should be called when a batch of packets has been processed in the
277 * napi loop.
278 */
279void ice_finalize_xdp_rx(struct ice_ring *rx_ring, unsigned int xdp_res)
280{
281 if (xdp_res & ICE_XDP_REDIR)
282 xdp_do_flush_map();
283
284 if (xdp_res & ICE_XDP_TX) {
285 struct ice_ring *xdp_ring =
286 rx_ring->vsi->xdp_rings[rx_ring->q_index];
287
288 ice_xdp_ring_update_tail(xdp_ring);
289 }
290}