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1/*
2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
3 *
4 * For licencing details see kernel-base/COPYING
5 */
6#include <linux/dmi.h>
7#include <linux/init.h>
8#include <linux/ioport.h>
9#include <linux/export.h>
10#include <linux/pci.h>
11#include <linux/acpi.h>
12
13#include <asm/acpi.h>
14#include <asm/bios_ebda.h>
15#include <asm/paravirt.h>
16#include <asm/pci_x86.h>
17#include <asm/mpspec.h>
18#include <asm/setup.h>
19#include <asm/apic.h>
20#include <asm/e820/api.h>
21#include <asm/time.h>
22#include <asm/irq.h>
23#include <asm/io_apic.h>
24#include <asm/hpet.h>
25#include <asm/memtype.h>
26#include <asm/tsc.h>
27#include <asm/iommu.h>
28#include <asm/mach_traps.h>
29#include <asm/irqdomain.h>
30#include <asm/realmode.h>
31
32void x86_init_noop(void) { }
33void __init x86_init_uint_noop(unsigned int unused) { }
34static int __init iommu_init_noop(void) { return 0; }
35static void iommu_shutdown_noop(void) { }
36bool __init bool_x86_init_noop(void) { return false; }
37void x86_op_int_noop(int cpu) { }
38int set_rtc_noop(const struct timespec64 *now) { return -EINVAL; }
39void get_rtc_noop(struct timespec64 *now) { }
40
41static __initconst const struct of_device_id of_cmos_match[] = {
42 { .compatible = "motorola,mc146818" },
43 {}
44};
45
46/*
47 * Allow devicetree configured systems to disable the RTC by setting the
48 * corresponding DT node's status property to disabled. Code is optimized
49 * out for CONFIG_OF=n builds.
50 */
51static __init void x86_wallclock_init(void)
52{
53 struct device_node *node = of_find_matching_node(NULL, of_cmos_match);
54
55 if (node && !of_device_is_available(node)) {
56 x86_platform.get_wallclock = get_rtc_noop;
57 x86_platform.set_wallclock = set_rtc_noop;
58 }
59}
60
61/*
62 * The platform setup functions are preset with the default functions
63 * for standard PC hardware.
64 */
65struct x86_init_ops x86_init __initdata = {
66
67 .resources = {
68 .probe_roms = probe_roms,
69 .reserve_resources = reserve_standard_io_resources,
70 .memory_setup = e820__memory_setup_default,
71 .dmi_setup = dmi_setup,
72 },
73
74 .mpparse = {
75 .setup_ioapic_ids = x86_init_noop,
76 .find_mptable = mpparse_find_mptable,
77 .early_parse_smp_cfg = mpparse_parse_early_smp_config,
78 .parse_smp_cfg = mpparse_parse_smp_config,
79 },
80
81 .irqs = {
82 .pre_vector_init = init_ISA_irqs,
83 .intr_init = native_init_IRQ,
84 .intr_mode_select = apic_intr_mode_select,
85 .intr_mode_init = apic_intr_mode_init,
86 .create_pci_msi_domain = native_create_pci_msi_domain,
87 },
88
89 .oem = {
90 .arch_setup = x86_init_noop,
91 .banner = default_banner,
92 },
93
94 .paging = {
95 .pagetable_init = native_pagetable_init,
96 },
97
98 .timers = {
99 .setup_percpu_clockev = setup_boot_APIC_clock,
100 .timer_init = hpet_time_init,
101 .wallclock_init = x86_wallclock_init,
102 },
103
104 .iommu = {
105 .iommu_init = iommu_init_noop,
106 },
107
108 .pci = {
109 .init = x86_default_pci_init,
110 .init_irq = x86_default_pci_init_irq,
111 .fixup_irqs = x86_default_pci_fixup_irqs,
112 },
113
114 .hyper = {
115 .init_platform = x86_init_noop,
116 .guest_late_init = x86_init_noop,
117 .x2apic_available = bool_x86_init_noop,
118 .msi_ext_dest_id = bool_x86_init_noop,
119 .init_mem_mapping = x86_init_noop,
120 .init_after_bootmem = x86_init_noop,
121 },
122
123 .acpi = {
124 .set_root_pointer = x86_default_set_root_pointer,
125 .get_root_pointer = x86_default_get_root_pointer,
126 .reduced_hw_early_init = acpi_generic_reduced_hw_init,
127 },
128};
129
130struct x86_cpuinit_ops x86_cpuinit = {
131 .early_percpu_clock_init = x86_init_noop,
132 .setup_percpu_clockev = setup_secondary_APIC_clock,
133 .parallel_bringup = true,
134};
135
136static void default_nmi_init(void) { };
137
138static int enc_status_change_prepare_noop(unsigned long vaddr, int npages, bool enc) { return 0; }
139static int enc_status_change_finish_noop(unsigned long vaddr, int npages, bool enc) { return 0; }
140static bool enc_tlb_flush_required_noop(bool enc) { return false; }
141static bool enc_cache_flush_required_noop(void) { return false; }
142static void enc_kexec_begin_noop(void) {}
143static void enc_kexec_finish_noop(void) {}
144static bool is_private_mmio_noop(u64 addr) {return false; }
145
146struct x86_platform_ops x86_platform __ro_after_init = {
147 .calibrate_cpu = native_calibrate_cpu_early,
148 .calibrate_tsc = native_calibrate_tsc,
149 .get_wallclock = mach_get_cmos_time,
150 .set_wallclock = mach_set_cmos_time,
151 .iommu_shutdown = iommu_shutdown_noop,
152 .is_untracked_pat_range = is_ISA_range,
153 .nmi_init = default_nmi_init,
154 .get_nmi_reason = default_get_nmi_reason,
155 .save_sched_clock_state = tsc_save_sched_clock_state,
156 .restore_sched_clock_state = tsc_restore_sched_clock_state,
157 .realmode_reserve = reserve_real_mode,
158 .realmode_init = init_real_mode,
159 .hyper.pin_vcpu = x86_op_int_noop,
160 .hyper.is_private_mmio = is_private_mmio_noop,
161
162 .guest = {
163 .enc_status_change_prepare = enc_status_change_prepare_noop,
164 .enc_status_change_finish = enc_status_change_finish_noop,
165 .enc_tlb_flush_required = enc_tlb_flush_required_noop,
166 .enc_cache_flush_required = enc_cache_flush_required_noop,
167 .enc_kexec_begin = enc_kexec_begin_noop,
168 .enc_kexec_finish = enc_kexec_finish_noop,
169 },
170};
171
172EXPORT_SYMBOL_GPL(x86_platform);
173
174struct x86_apic_ops x86_apic_ops __ro_after_init = {
175 .io_apic_read = native_io_apic_read,
176 .restore = native_restore_boot_irq_mode,
177};
1/*
2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
3 *
4 * For licencing details see kernel-base/COPYING
5 */
6#include <linux/init.h>
7#include <linux/ioport.h>
8#include <linux/export.h>
9#include <linux/pci.h>
10
11#include <asm/acpi.h>
12#include <asm/bios_ebda.h>
13#include <asm/paravirt.h>
14#include <asm/pci_x86.h>
15#include <asm/mpspec.h>
16#include <asm/setup.h>
17#include <asm/apic.h>
18#include <asm/e820/api.h>
19#include <asm/time.h>
20#include <asm/irq.h>
21#include <asm/io_apic.h>
22#include <asm/hpet.h>
23#include <asm/memtype.h>
24#include <asm/tsc.h>
25#include <asm/iommu.h>
26#include <asm/mach_traps.h>
27
28void x86_init_noop(void) { }
29void __init x86_init_uint_noop(unsigned int unused) { }
30static int __init iommu_init_noop(void) { return 0; }
31static void iommu_shutdown_noop(void) { }
32bool __init bool_x86_init_noop(void) { return false; }
33void x86_op_int_noop(int cpu) { }
34static __init int set_rtc_noop(const struct timespec64 *now) { return -EINVAL; }
35static __init void get_rtc_noop(struct timespec64 *now) { }
36
37static __initconst const struct of_device_id of_cmos_match[] = {
38 { .compatible = "motorola,mc146818" },
39 {}
40};
41
42/*
43 * Allow devicetree configured systems to disable the RTC by setting the
44 * corresponding DT node's status property to disabled. Code is optimized
45 * out for CONFIG_OF=n builds.
46 */
47static __init void x86_wallclock_init(void)
48{
49 struct device_node *node = of_find_matching_node(NULL, of_cmos_match);
50
51 if (node && !of_device_is_available(node)) {
52 x86_platform.get_wallclock = get_rtc_noop;
53 x86_platform.set_wallclock = set_rtc_noop;
54 }
55}
56
57/*
58 * The platform setup functions are preset with the default functions
59 * for standard PC hardware.
60 */
61struct x86_init_ops x86_init __initdata = {
62
63 .resources = {
64 .probe_roms = probe_roms,
65 .reserve_resources = reserve_standard_io_resources,
66 .memory_setup = e820__memory_setup_default,
67 },
68
69 .mpparse = {
70 .mpc_record = x86_init_uint_noop,
71 .setup_ioapic_ids = x86_init_noop,
72 .mpc_apic_id = default_mpc_apic_id,
73 .smp_read_mpc_oem = default_smp_read_mpc_oem,
74 .mpc_oem_bus_info = default_mpc_oem_bus_info,
75 .find_smp_config = default_find_smp_config,
76 .get_smp_config = default_get_smp_config,
77 },
78
79 .irqs = {
80 .pre_vector_init = init_ISA_irqs,
81 .intr_init = native_init_IRQ,
82 .intr_mode_select = apic_intr_mode_select,
83 .intr_mode_init = apic_intr_mode_init
84 },
85
86 .oem = {
87 .arch_setup = x86_init_noop,
88 .banner = default_banner,
89 },
90
91 .paging = {
92 .pagetable_init = native_pagetable_init,
93 },
94
95 .timers = {
96 .setup_percpu_clockev = setup_boot_APIC_clock,
97 .timer_init = hpet_time_init,
98 .wallclock_init = x86_wallclock_init,
99 },
100
101 .iommu = {
102 .iommu_init = iommu_init_noop,
103 },
104
105 .pci = {
106 .init = x86_default_pci_init,
107 .init_irq = x86_default_pci_init_irq,
108 .fixup_irqs = x86_default_pci_fixup_irqs,
109 },
110
111 .hyper = {
112 .init_platform = x86_init_noop,
113 .guest_late_init = x86_init_noop,
114 .x2apic_available = bool_x86_init_noop,
115 .init_mem_mapping = x86_init_noop,
116 .init_after_bootmem = x86_init_noop,
117 },
118
119 .acpi = {
120 .set_root_pointer = x86_default_set_root_pointer,
121 .get_root_pointer = x86_default_get_root_pointer,
122 .reduced_hw_early_init = acpi_generic_reduced_hw_init,
123 },
124};
125
126struct x86_cpuinit_ops x86_cpuinit = {
127 .early_percpu_clock_init = x86_init_noop,
128 .setup_percpu_clockev = setup_secondary_APIC_clock,
129};
130
131static void default_nmi_init(void) { };
132
133struct x86_platform_ops x86_platform __ro_after_init = {
134 .calibrate_cpu = native_calibrate_cpu_early,
135 .calibrate_tsc = native_calibrate_tsc,
136 .get_wallclock = mach_get_cmos_time,
137 .set_wallclock = mach_set_rtc_mmss,
138 .iommu_shutdown = iommu_shutdown_noop,
139 .is_untracked_pat_range = is_ISA_range,
140 .nmi_init = default_nmi_init,
141 .get_nmi_reason = default_get_nmi_reason,
142 .save_sched_clock_state = tsc_save_sched_clock_state,
143 .restore_sched_clock_state = tsc_restore_sched_clock_state,
144 .hyper.pin_vcpu = x86_op_int_noop,
145};
146
147EXPORT_SYMBOL_GPL(x86_platform);
148
149#if defined(CONFIG_PCI_MSI)
150struct x86_msi_ops x86_msi __ro_after_init = {
151 .setup_msi_irqs = native_setup_msi_irqs,
152 .teardown_msi_irq = native_teardown_msi_irq,
153 .teardown_msi_irqs = default_teardown_msi_irqs,
154 .restore_msi_irqs = default_restore_msi_irqs,
155};
156
157/* MSI arch specific hooks */
158int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
159{
160 return x86_msi.setup_msi_irqs(dev, nvec, type);
161}
162
163void arch_teardown_msi_irqs(struct pci_dev *dev)
164{
165 x86_msi.teardown_msi_irqs(dev);
166}
167
168void arch_teardown_msi_irq(unsigned int irq)
169{
170 x86_msi.teardown_msi_irq(irq);
171}
172
173void arch_restore_msi_irqs(struct pci_dev *dev)
174{
175 x86_msi.restore_msi_irqs(dev);
176}
177#endif
178
179struct x86_apic_ops x86_apic_ops __ro_after_init = {
180 .io_apic_read = native_io_apic_read,
181 .restore = native_restore_boot_irq_mode,
182};