1/*
  2 * Header for code common to all OMAP2+ machines.
  3 *
  4 * This program is free software; you can redistribute it and/or modify it
  5 * under the terms of the GNU General Public License as published by the
  6 * Free Software Foundation; either version 2 of the License, or (at your
  7 * option) any later version.
  8 *
  9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
 12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 19 *
 20 * You should have received a copy of the  GNU General Public License along
 21 * with this program; if not, write  to the Free Software Foundation, Inc.,
 22 * 675 Mass Ave, Cambridge, MA 02139, USA.
 23 */
 24
 25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
 26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
 27#ifndef __ASSEMBLER__
 28
 29#include <linux/irq.h>
 30#include <linux/delay.h>
 31#include <linux/i2c.h>
 32#include <linux/mfd/twl.h>
 33#include <linux/platform_data/i2c-omap.h>
 34#include <linux/reboot.h>
 35#include <linux/irqchip/irq-omap-intc.h>
 36
 37#include <asm/proc-fns.h>
 38#include <asm/hardware/cache-l2x0.h>
 39
 40#include "i2c.h"
 
 
 
 41
 42#define OMAP_INTC_START		NR_IRQS
 43
 44extern int (*omap_pm_soc_init)(void);
 45int omap_pm_nop_init(void);
 46
 
 
 
 
 
 
 
 
 
 47#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
 48int omap3_pm_init(void);
 49#else
 50static inline int omap3_pm_init(void)
 51{
 52	return 0;
 53}
 54#endif
 55
 56#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
 57int omap4_pm_init(void);
 58int omap4_pm_init_early(void);
 59#else
 60static inline int omap4_pm_init(void)
 61{
 62	return 0;
 63}
 64
 65static inline int omap4_pm_init_early(void)
 66{
 67	return 0;
 68}
 69#endif
 70
 71#if defined(CONFIG_PM) && (defined(CONFIG_SOC_AM33XX) || \
 72	defined(CONFIG_SOC_AM43XX))
 73int amx3_common_pm_init(void);
 74#else
 75static inline int amx3_common_pm_init(void)
 76{
 77	return 0;
 78}
 79#endif
 80
 
 
 
 
 
 
 81#ifdef CONFIG_CACHE_L2X0
 82int omap_l2_cache_init(void);
 83#define OMAP_L2C_AUX_CTRL	(L2C_AUX_CTRL_SHARED_OVERRIDE | \
 84				 L310_AUX_CTRL_DATA_PREFETCH | \
 85				 L310_AUX_CTRL_INSTR_PREFETCH)
 86void omap4_l2c310_write_sec(unsigned long val, unsigned reg);
 87#else
 88static inline int omap_l2_cache_init(void)
 89{
 90	return 0;
 91}
 92
 93#define OMAP_L2C_AUX_CTRL	0
 94#define omap4_l2c310_write_sec	NULL
 95#endif
 96
 97#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
 98extern void omap5_realtime_timer_init(void);
 99#else
100static inline void omap5_realtime_timer_init(void)
101{
102}
103#endif
104
105void omap2420_init_early(void);
106void omap2430_init_early(void);
107void omap3430_init_early(void);
 
108void omap3630_init_early(void);
 
109void am33xx_init_early(void);
110void am35xx_init_early(void);
111void ti814x_init_early(void);
112void ti816x_init_early(void);
 
113void am43xx_init_early(void);
114void am43xx_init_late(void);
115void omap4430_init_early(void);
116void omap5_init_early(void);
117void omap3_init_late(void);
118void omap4430_init_late(void);
 
 
119void ti81xx_init_late(void);
120void am33xx_init_late(void);
121void omap5_init_late(void);
 
122void dra7xx_init_early(void);
123void dra7xx_init_late(void);
124
125#ifdef CONFIG_SOC_BUS
126void omap_soc_device_init(void);
127#else
128static inline void omap_soc_device_init(void)
129{
130}
131#endif
132
133#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
134void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
135#else
136static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
137{
138}
139#endif
140
141#ifdef CONFIG_SOC_AM33XX
142void am33xx_restart(enum reboot_mode mode, const char *cmd);
143#else
144static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
145{
146}
147#endif
148
149#ifdef CONFIG_ARCH_OMAP3
150void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
151#else
152static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
153{
154}
155#endif
156
157#ifdef CONFIG_SOC_TI81XX
158void ti81xx_restart(enum reboot_mode mode, const char *cmd);
159#else
160static inline void ti81xx_restart(enum reboot_mode mode, const char *cmd)
161{
162}
163#endif
164
165#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
166	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
167void omap44xx_restart(enum reboot_mode mode, const char *cmd);
168#else
169static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
170{
171}
172#endif
173
174#ifdef CONFIG_OMAP_INTERCONNECT_BARRIER
175void omap_barrier_reserve_memblock(void);
176void omap_barriers_init(void);
177#else
178static inline void omap_barrier_reserve_memblock(void)
179{
180}
181#endif
182
183/* This gets called from mach-omap2/io.c, do not call this */
184void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
185
186void __init omap242x_map_io(void);
187void __init omap243x_map_io(void);
188void __init omap3_map_io(void);
189void __init am33xx_map_io(void);
190void __init omap4_map_io(void);
191void __init omap5_map_io(void);
192void __init dra7xx_map_io(void);
193void __init ti81xx_map_io(void);
194
195/**
196 * omap_test_timeout - busy-loop, testing a condition
197 * @cond: condition to test until it evaluates to true
198 * @timeout: maximum number of microseconds in the timeout
199 * @index: loop index (integer)
200 *
201 * Loop waiting for @cond to become true or until at least @timeout
202 * microseconds have passed.  To use, define some integer @index in the
203 * calling code.  After running, if @index == @timeout, then the loop has
204 * timed out.
205 */
206#define omap_test_timeout(cond, timeout, index)			\
207({								\
208	for (index = 0; index < timeout; index++) {		\
209		if (cond)					\
210			break;					\
211		udelay(1);					\
212	}							\
213})
214
 
 
 
 
 
215void omap_gic_of_init(void);
216
217#ifdef CONFIG_CACHE_L2X0
218extern void __iomem *omap4_get_l2cache_base(void);
219#endif
220
221struct device_node;
222
223#ifdef CONFIG_SMP
224extern void __iomem *omap4_get_scu_base(void);
225#else
226static inline void __iomem *omap4_get_scu_base(void)
227{
228	return NULL;
229}
230#endif
231
232extern void gic_dist_disable(void);
233extern void gic_dist_enable(void);
234extern bool gic_dist_disabled(void);
235extern void gic_timer_retrigger(void);
236extern void _omap_smc1(u32 fn, u32 arg);
237extern void omap4_sar_ram_init(void);
238extern void __iomem *omap4_get_sar_ram_base(void);
239extern void omap4_mpuss_early_init(void);
240extern void omap_do_wfi(void);
241extern void omap_interconnect_sync(void);
242
243#ifdef CONFIG_SMP
244/* Needed for secondary core boot */
245extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
246extern void omap_auxcoreboot_addr(u32 cpu_addr);
247extern u32 omap_read_auxcoreboot0(void);
248
249extern void omap4_cpu_die(unsigned int cpu);
250extern int omap4_cpu_kill(unsigned int cpu);
251
252extern const struct smp_operations omap4_smp_ops;
253#endif
254
255extern u32 omap4_get_cpu1_ns_pa_addr(void);
256
257#if defined(CONFIG_SMP) && defined(CONFIG_PM)
258extern int omap4_mpuss_init(void);
259extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state,
260				bool rcuidle);
261extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
262#else
263static inline int omap4_enter_lowpower(unsigned int cpu,
264					unsigned int power_state,
265					bool rcuidle)
266{
267	cpu_do_idle();
268	return 0;
269}
270
271static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
272{
273	cpu_do_idle();
274	return 0;
275}
276
277static inline int omap4_mpuss_init(void)
278{
279	return 0;
280}
281
282#endif
283
284#ifdef CONFIG_ARCH_OMAP4
285void omap4_secondary_startup(void);
286void omap4460_secondary_startup(void);
287int omap4_finish_suspend(unsigned long cpu_state);
288void omap4_cpu_resume(void);
289#else
290static inline void omap4_secondary_startup(void)
291{
292}
293
294static inline void omap4460_secondary_startup(void)
295{
296}
297static inline int omap4_finish_suspend(unsigned long cpu_state)
298{
299	return 0;
300}
301static inline void omap4_cpu_resume(void)
302{
303}
304#endif
305
306#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
307void omap5_secondary_startup(void);
308void omap5_secondary_hyp_startup(void);
309#else
310static inline void omap5_secondary_startup(void)
311{
312}
313
314static inline void omap5_secondary_hyp_startup(void)
315{
316}
317#endif
318
 
 
 
 
 
 
 
 
 
319struct omap_system_dma_plat_info;
320
321void pdata_quirks_init(const struct of_device_id *);
322void omap_auxdata_legacy_init(struct device *dev);
323void omap_pcs_legacy_init(int irq, void (*rearm)(void));
324extern struct omap_system_dma_plat_info dma_plat_info;
325
326struct omap_sdrc_params;
327extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
328				      struct omap_sdrc_params *sdrc_cs1);
329extern void omap_reserve(void);
330
331struct omap_hwmod;
332extern int omap_dss_reset(struct omap_hwmod *);
333
334/* SoC specific clock initializer */
335int omap_clk_init(void);
336
337#if IS_ENABLED(CONFIG_OMAP_IOMMU)
338int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
339				    u8 *pwrst);
340#else
341static inline int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev,
342						  bool request, u8 *pwrst)
343{
344	return 0;
345}
346#endif
347
348#endif /* __ASSEMBLER__ */
349#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */

  1/*
  2 * Header for code common to all OMAP2+ machines.
  3 *
  4 * This program is free software; you can redistribute it and/or modify it
  5 * under the terms of the GNU General Public License as published by the
  6 * Free Software Foundation; either version 2 of the License, or (at your
  7 * option) any later version.
  8 *
  9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
 12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 19 *
 20 * You should have received a copy of the  GNU General Public License along
 21 * with this program; if not, write  to the Free Software Foundation, Inc.,
 22 * 675 Mass Ave, Cambridge, MA 02139, USA.
 23 */
 24
 25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
 26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
 27#ifndef __ASSEMBLER__
 28
 29#include <linux/irq.h>
 30#include <linux/delay.h>
 31#include <linux/i2c.h>
 32#include <linux/mfd/twl.h>
 33#include <linux/platform_data/i2c-omap.h>
 34#include <linux/reboot.h>
 35#include <linux/irqchip/irq-omap-intc.h>
 36
 37#include <asm/proc-fns.h>
 38#include <asm/hardware/cache-l2x0.h>
 39
 40#include "i2c.h"
 41#include "serial.h"
 42
 43#include "usb.h"
 44
 45#define OMAP_INTC_START		NR_IRQS
 46
 47extern int (*omap_pm_soc_init)(void);
 48int omap_pm_nop_init(void);
 49
 50#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
 51int omap2_pm_init(void);
 52#else
 53static inline int omap2_pm_init(void)
 54{
 55	return 0;
 56}
 57#endif
 58
 59#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
 60int omap3_pm_init(void);
 61#else
 62static inline int omap3_pm_init(void)
 63{
 64	return 0;
 65}
 66#endif
 67
 68#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
 69int omap4_pm_init(void);
 70int omap4_pm_init_early(void);
 71#else
 72static inline int omap4_pm_init(void)
 73{
 74	return 0;
 75}
 76
 77static inline int omap4_pm_init_early(void)
 78{
 79	return 0;
 80}
 81#endif
 82
 83#if defined(CONFIG_PM) && (defined(CONFIG_SOC_AM33XX) || \
 84	defined(CONFIG_SOC_AM43XX))
 85int amx3_common_pm_init(void);
 86#else
 87static inline int amx3_common_pm_init(void)
 88{
 89	return 0;
 90}
 91#endif
 92
 93extern void omap2_init_common_infrastructure(void);
 94
 95extern void omap_init_time(void);
 96extern void omap3_secure_sync32k_timer_init(void);
 97extern void omap3_gptimer_timer_init(void);
 98extern void omap4_local_timer_init(void);
 99#ifdef CONFIG_CACHE_L2X0
100int omap_l2_cache_init(void);
101#define OMAP_L2C_AUX_CTRL	(L2C_AUX_CTRL_SHARED_OVERRIDE | \
102				 L310_AUX_CTRL_DATA_PREFETCH | \
103				 L310_AUX_CTRL_INSTR_PREFETCH)
104void omap4_l2c310_write_sec(unsigned long val, unsigned reg);
105#else
106static inline int omap_l2_cache_init(void)
107{
108	return 0;
109}
110
111#define OMAP_L2C_AUX_CTRL	0
112#define omap4_l2c310_write_sec	NULL
113#endif
114
115#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
116extern void omap5_realtime_timer_init(void);
117#else
118static inline void omap5_realtime_timer_init(void)
119{
120}
121#endif
122
123void omap2420_init_early(void);
124void omap2430_init_early(void);
125void omap3430_init_early(void);
126void omap35xx_init_early(void);
127void omap3630_init_early(void);
128void omap3_init_early(void);	/* Do not use this one */
129void am33xx_init_early(void);
130void am35xx_init_early(void);
131void ti814x_init_early(void);
132void ti816x_init_early(void);
133void am33xx_init_early(void);
134void am43xx_init_early(void);
135void am43xx_init_late(void);
136void omap4430_init_early(void);
137void omap5_init_early(void);
138void omap3_init_late(void);
139void omap4430_init_late(void);
140void omap2420_init_late(void);
141void omap2430_init_late(void);
142void ti81xx_init_late(void);
143void am33xx_init_late(void);
144void omap5_init_late(void);
145int omap2_common_pm_late_init(void);
146void dra7xx_init_early(void);
147void dra7xx_init_late(void);
148
149#ifdef CONFIG_SOC_BUS
150void omap_soc_device_init(void);
151#else
152static inline void omap_soc_device_init(void)
153{
154}
155#endif
156
157#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
158void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
159#else
160static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
161{
162}
163#endif
164
165#ifdef CONFIG_SOC_AM33XX
166void am33xx_restart(enum reboot_mode mode, const char *cmd);
167#else
168static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
169{
170}
171#endif
172
173#ifdef CONFIG_ARCH_OMAP3
174void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
175#else
176static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
177{
178}
179#endif
180
181#ifdef CONFIG_SOC_TI81XX
182void ti81xx_restart(enum reboot_mode mode, const char *cmd);
183#else
184static inline void ti81xx_restart(enum reboot_mode mode, const char *cmd)
185{
186}
187#endif
188
189#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
190	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
191void omap44xx_restart(enum reboot_mode mode, const char *cmd);
192#else
193static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
194{
195}
196#endif
197
198#ifdef CONFIG_OMAP_INTERCONNECT_BARRIER
199void omap_barrier_reserve_memblock(void);
200void omap_barriers_init(void);
201#else
202static inline void omap_barrier_reserve_memblock(void)
203{
204}
205#endif
206
207/* This gets called from mach-omap2/io.c, do not call this */
208void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
209
210void __init omap242x_map_io(void);
211void __init omap243x_map_io(void);
212void __init omap3_map_io(void);
213void __init am33xx_map_io(void);
214void __init omap4_map_io(void);
215void __init omap5_map_io(void);
216void __init dra7xx_map_io(void);
217void __init ti81xx_map_io(void);
218
219/**
220 * omap_test_timeout - busy-loop, testing a condition
221 * @cond: condition to test until it evaluates to true
222 * @timeout: maximum number of microseconds in the timeout
223 * @index: loop index (integer)
224 *
225 * Loop waiting for @cond to become true or until at least @timeout
226 * microseconds have passed.  To use, define some integer @index in the
227 * calling code.  After running, if @index == @timeout, then the loop has
228 * timed out.
229 */
230#define omap_test_timeout(cond, timeout, index)			\
231({								\
232	for (index = 0; index < timeout; index++) {		\
233		if (cond)					\
234			break;					\
235		udelay(1);					\
236	}							\
237})
238
239extern struct device *omap2_get_mpuss_device(void);
240extern struct device *omap2_get_iva_device(void);
241extern struct device *omap2_get_l3_device(void);
242extern struct device *omap4_get_dsp_device(void);
243
244void omap_gic_of_init(void);
245
246#ifdef CONFIG_CACHE_L2X0
247extern void __iomem *omap4_get_l2cache_base(void);
248#endif
249
250struct device_node;
251
252#ifdef CONFIG_SMP
253extern void __iomem *omap4_get_scu_base(void);
254#else
255static inline void __iomem *omap4_get_scu_base(void)
256{
257	return NULL;
258}
259#endif
260
261extern void gic_dist_disable(void);
262extern void gic_dist_enable(void);
263extern bool gic_dist_disabled(void);
264extern void gic_timer_retrigger(void);
265extern void _omap_smc1(u32 fn, u32 arg);
266extern void omap4_sar_ram_init(void);
267extern void __iomem *omap4_get_sar_ram_base(void);
268extern void omap4_mpuss_early_init(void);
269extern void omap_do_wfi(void);
270
271
272#ifdef CONFIG_SMP
273/* Needed for secondary core boot */
274extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
275extern void omap_auxcoreboot_addr(u32 cpu_addr);
276extern u32 omap_read_auxcoreboot0(void);
277
278extern void omap4_cpu_die(unsigned int cpu);
279extern int omap4_cpu_kill(unsigned int cpu);
280
281extern const struct smp_operations omap4_smp_ops;
282#endif
283
284extern u32 omap4_get_cpu1_ns_pa_addr(void);
285
286#if defined(CONFIG_SMP) && defined(CONFIG_PM)
287extern int omap4_mpuss_init(void);
288extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
 
289extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
290#else
291static inline int omap4_enter_lowpower(unsigned int cpu,
292					unsigned int power_state)
 
293{
294	cpu_do_idle();
295	return 0;
296}
297
298static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
299{
300	cpu_do_idle();
301	return 0;
302}
303
304static inline int omap4_mpuss_init(void)
305{
306	return 0;
307}
308
309#endif
310
311#ifdef CONFIG_ARCH_OMAP4
312void omap4_secondary_startup(void);
313void omap4460_secondary_startup(void);
314int omap4_finish_suspend(unsigned long cpu_state);
315void omap4_cpu_resume(void);
316#else
317static inline void omap4_secondary_startup(void)
318{
319}
320
321static inline void omap4460_secondary_startup(void)
322{
323}
324static inline int omap4_finish_suspend(unsigned long cpu_state)
325{
326	return 0;
327}
328static inline void omap4_cpu_resume(void)
329{
330}
331#endif
332
333#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
334void omap5_secondary_startup(void);
335void omap5_secondary_hyp_startup(void);
336#else
337static inline void omap5_secondary_startup(void)
338{
339}
340
341static inline void omap5_secondary_hyp_startup(void)
342{
343}
344#endif
345
346#ifdef CONFIG_SOC_DRA7XX
347extern int dra7xx_pciess_reset(struct omap_hwmod *oh);
348#else
349static inline int dra7xx_pciess_reset(struct omap_hwmod *oh)
350{
351	return 0;
352}
353#endif
354
355struct omap_system_dma_plat_info;
356
357void pdata_quirks_init(const struct of_device_id *);
358void omap_auxdata_legacy_init(struct device *dev);
359void omap_pcs_legacy_init(int irq, void (*rearm)(void));
360extern struct omap_system_dma_plat_info dma_plat_info;
361
362struct omap_sdrc_params;
363extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
364				      struct omap_sdrc_params *sdrc_cs1);
365extern void omap_reserve(void);
366
367struct omap_hwmod;
368extern int omap_dss_reset(struct omap_hwmod *);
369
370/* SoC specific clock initializer */
371int omap_clk_init(void);
 
 
 
 
 
 
 
 
 
 
 
372
373#endif /* __ASSEMBLER__ */
374#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */