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   1// SPDX-License-Identifier: GPL-2.0+
   2/dts-v1/;
   3#include "aspeed-g5.dtsi"
   4#include <dt-bindings/gpio/aspeed-gpio.h>
   5#include <dt-bindings/leds/leds-pca955x.h>
   6
   7/ {
   8	model = "Mihawk BMC";
   9	compatible = "ibm,mihawk-bmc", "aspeed,ast2500";
  10
  11	aliases {
  12		i2c215 = &bus6_mux215;
  13		i2c216 = &bus6_mux216;
  14		i2c217 = &bus6_mux217;
  15		i2c218 = &bus6_mux218;
  16		i2c219 = &bus6_mux219;
  17		i2c220 = &bus6_mux220;
  18		i2c221 = &bus6_mux221;
  19		i2c222 = &bus6_mux222;
  20		i2c223 = &bus7_mux223;
  21		i2c224 = &bus7_mux224;
  22		i2c225 = &bus7_mux225;
  23		i2c226 = &bus7_mux226;
  24		i2c227 = &bus7_mux227;
  25		i2c228 = &bus7_mux228;
  26		i2c229 = &bus7_mux229;
  27		i2c230 = &bus7_mux230;
  28		i2c231 = &bus9_mux231;
  29		i2c232 = &bus9_mux232;
  30		i2c233 = &bus9_mux233;
  31		i2c234 = &bus9_mux234;
  32		i2c235 = &bus9_mux235;
  33		i2c236 = &bus9_mux236;
  34		i2c237 = &bus9_mux237;
  35		i2c238 = &bus9_mux238;
  36		i2c239 = &bus10_mux239;
  37		i2c240 = &bus10_mux240;
  38		i2c241 = &bus10_mux241;
  39		i2c242 = &bus10_mux242;
  40		i2c243 = &bus10_mux243;
  41		i2c244 = &bus10_mux244;
  42		i2c245 = &bus10_mux245;
  43		i2c246 = &bus10_mux246;
  44		i2c247 = &bus12_mux247;
  45		i2c248 = &bus12_mux248;
  46		i2c249 = &bus12_mux249;
  47		i2c250 = &bus12_mux250;
  48		i2c251 = &bus13_mux251;
  49		i2c252 = &bus13_mux252;
  50		i2c253 = &bus13_mux253;
  51		i2c254 = &bus13_mux254;
  52		i2c255 = &bus13_mux255;
  53		i2c256 = &bus13_mux256;
  54		i2c257 = &bus13_mux257;
  55		i2c258 = &bus13_mux258;
  56	};
  57
  58	chosen {
  59		stdout-path = &uart5;
  60		bootargs = "console=ttyS4,115200 earlyprintk";
  61	};
  62
  63	memory@80000000 {
  64		reg = <0x80000000 0x20000000>;
  65	};
  66
  67	reserved-memory {
  68		#address-cells = <1>;
  69		#size-cells = <1>;
  70		ranges;
  71
  72		flash_memory: region@98000000 {
  73			no-map;
  74			reg = <0x98000000 0x04000000>; /* 64M */
  75		};
  76
  77		gfx_memory: framebuffer {
  78			size = <0x01000000>;
  79			alignment = <0x01000000>;
  80			compatible = "shared-dma-pool";
  81			reusable;
  82		};
  83
  84		video_engine_memory: jpegbuffer {
  85			size = <0x02000000>;
  86			alignment = <0x01000000>;
  87			compatible = "shared-dma-pool";
  88			reusable;
  89		};
  90	};
  91
  92	gpio-keys {
  93		compatible = "gpio-keys";
  94
  95		air-water {
  96			label = "air-water";
  97			gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
  98			linux,code = <ASPEED_GPIO(F, 6)>;
  99		};
 100
 101		checkstop {
 102			label = "checkstop";
 103			gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
 104			linux,code = <ASPEED_GPIO(J, 2)>;
 105		};
 106
 107		ps0-presence {
 108			label = "ps0-presence";
 109			gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
 110			linux,code = <ASPEED_GPIO(Z, 2)>;
 111		};
 112
 113		ps1-presence {
 114			label = "ps1-presence";
 115			gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
 116			linux,code = <ASPEED_GPIO(Z, 0)>;
 117		};
 118		id-button {
 119			label = "id-button";
 120			gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
 121			linux,code = <ASPEED_GPIO(F, 1)>;
 122		};
 123	};
 124
 125	gpio-keys-polled {
 126		compatible = "gpio-keys-polled";
 127		poll-interval = <1000>;
 128
 129		fan0-presence {
 130			label = "fan0-presence";
 131			gpios = <&pca9552 9 GPIO_ACTIVE_LOW>;
 132			linux,code = <9>;
 133		};
 134
 135		fan1-presence {
 136			label = "fan1-presence";
 137			gpios = <&pca9552 10 GPIO_ACTIVE_LOW>;
 138			linux,code = <10>;
 139		};
 140
 141		fan2-presence {
 142			label = "fan2-presence";
 143			gpios = <&pca9552 11 GPIO_ACTIVE_LOW>;
 144			linux,code = <11>;
 145		};
 146
 147		fan3-presence {
 148			label = "fan3-presence";
 149			gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
 150			linux,code = <12>;
 151		};
 152
 153		fan4-presence {
 154			label = "fan4-presence";
 155			gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
 156			linux,code = <13>;
 157		};
 158
 159		fan5-presence {
 160			label = "fan5-presence";
 161			gpios = <&pca9552 14 GPIO_ACTIVE_LOW>;
 162			linux,code = <14>;
 163		};
 164	};
 165
 166	leds {
 167		compatible = "gpio-leds";
 168
 169		front-fault {
 170			retain-state-shutdown;
 171			default-state = "keep";
 172			gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
 173		};
 174
 175		power-button {
 176			retain-state-shutdown;
 177			default-state = "keep";
 178			gpios = <&gpio ASPEED_GPIO(AA, 1) GPIO_ACTIVE_LOW>;
 179		};
 180
 181		front-id {
 182			retain-state-shutdown;
 183			default-state = "keep";
 184			gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
 185		};
 186
 187
 188		fan0 {
 189			retain-state-shutdown;
 190			default-state = "keep";
 191			gpios = <&pca9552 0 GPIO_ACTIVE_LOW>;
 192		};
 193
 194		fan1 {
 195			retain-state-shutdown;
 196			default-state = "keep";
 197			gpios = <&pca9552 1 GPIO_ACTIVE_LOW>;
 198		};
 199
 200		fan2 {
 201			retain-state-shutdown;
 202			default-state = "keep";
 203			gpios = <&pca9552 2 GPIO_ACTIVE_LOW>;
 204		};
 205
 206		fan3 {
 207			retain-state-shutdown;
 208			default-state = "keep";
 209			gpios = <&pca9552 3 GPIO_ACTIVE_LOW>;
 210		};
 211
 212		fan4 {
 213			retain-state-shutdown;
 214			default-state = "keep";
 215			gpios = <&pca9552 4 GPIO_ACTIVE_LOW>;
 216		};
 217
 218		fan5 {
 219			retain-state-shutdown;
 220			default-state = "keep";
 221			gpios = <&pca9552 5 GPIO_ACTIVE_LOW>;
 222		};
 223	};
 224
 225	fsi: gpio-fsi {
 226		compatible = "fsi-master-gpio", "fsi-master";
 227		#address-cells = <2>;
 228		#size-cells = <0>;
 229		no-gpio-delays;
 230
 231		clock-gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_HIGH>;
 232		data-gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_HIGH>;
 233		mux-gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
 234		enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 235		trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
 236	};
 237	iio-hwmon-12v {
 238		compatible = "iio-hwmon";
 239		io-channels = <&adc 0>;
 240	};
 241
 242	iio-hwmon-5v {
 243		compatible = "iio-hwmon";
 244		io-channels = <&adc 1>;
 245	};
 246
 247	iio-hwmon-3v {
 248		compatible = "iio-hwmon";
 249		io-channels = <&adc 2>;
 250	};
 251
 252	iio-hwmon-vdd0 {
 253		compatible = "iio-hwmon";
 254		io-channels = <&adc 3>;
 255	};
 256
 257	iio-hwmon-vdd1 {
 258		compatible = "iio-hwmon";
 259		io-channels = <&adc 4>;
 260	};
 261
 262	iio-hwmon-vcs0 {
 263		compatible = "iio-hwmon";
 264		io-channels = <&adc 5>;
 265	};
 266
 267	iio-hwmon-vcs1 {
 268		compatible = "iio-hwmon";
 269		io-channels = <&adc 6>;
 270	};
 271
 272	iio-hwmon-vdn0 {
 273		compatible = "iio-hwmon";
 274		io-channels = <&adc 7>;
 275	};
 276
 277	iio-hwmon-vdn1 {
 278		compatible = "iio-hwmon";
 279		io-channels = <&adc 8>;
 280	};
 281
 282	iio-hwmon-vio0 {
 283		compatible = "iio-hwmon";
 284		io-channels = <&adc 9>;
 285	};
 286
 287	iio-hwmon-vio1 {
 288		compatible = "iio-hwmon";
 289		io-channels = <&adc 10>;
 290	};
 291
 292	iio-hwmon-vddra {
 293		compatible = "iio-hwmon";
 294		io-channels = <&adc 11>;
 295	};
 296
 297	iio-hwmon-battery {
 298		compatible = "iio-hwmon";
 299		io-channels = <&adc 12>;
 300	};
 301
 302	iio-hwmon-vddrb {
 303		compatible = "iio-hwmon";
 304		io-channels = <&adc 13>;
 305	};
 306
 307	iio-hwmon-vddrc {
 308		compatible = "iio-hwmon";
 309		io-channels = <&adc 14>;
 310	};
 311
 312	iio-hwmon-vddrd {
 313		compatible = "iio-hwmon";
 314		io-channels = <&adc 15>;
 315	};
 316};
 317
 318&pwm_tacho {
 319	status = "okay";
 320	pinctrl-names = "default";
 321	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
 322		&pinctrl_pwm2_default &pinctrl_pwm3_default
 323		&pinctrl_pwm4_default &pinctrl_pwm5_default>;
 324
 325	fan@0 {
 326		reg = <0x00>;
 327		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
 328	};
 329
 330	fan@1 {
 331		reg = <0x01>;
 332		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
 333	};
 334
 335	fan@2 {
 336		reg = <0x02>;
 337		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
 338	};
 339
 340	fan@3 {
 341		reg = <0x03>;
 342		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
 343	};
 344
 345	fan@4 {
 346		reg = <0x04>;
 347		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
 348	};
 349
 350	fan@5 {
 351		reg = <0x05>;
 352		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
 353	};
 354
 355	fan@6 {
 356		reg = <0x00>;
 357		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
 358	};
 359
 360	fan@7 {
 361		reg = <0x01>;
 362		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
 363	};
 364
 365	fan@8 {
 366		reg = <0x02>;
 367		aspeed,fan-tach-ch = /bits/ 8 <0x08>;
 368	};
 369
 370	fan@9 {
 371		reg = <0x03>;
 372		aspeed,fan-tach-ch = /bits/ 8 <0x09>;
 373	};
 374
 375	fan@10 {
 376		reg = <0x04>;
 377		aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
 378	};
 379
 380	fan@11 {
 381		reg = <0x05>;
 382		aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
 383	};
 384};
 385
 386&fmc {
 387	status = "okay";
 388	flash@0 {
 389		status = "okay";
 390		label = "bmc";
 391		m25p,fast-read;
 392		spi-max-frequency = <50000000>;
 393		partitions {
 394			#address-cells = < 1 >;
 395			#size-cells = < 1 >;
 396			compatible = "fixed-partitions";
 397			u-boot@0 {
 398				reg = < 0 0x60000 >;
 399				label = "u-boot";
 400			};
 401			u-boot-env@60000 {
 402				reg = < 0x60000 0x20000 >;
 403				label = "u-boot-env";
 404			};
 405			obmc-ubi@80000 {
 406				reg = < 0x80000 0x1F80000 >;
 407				label = "obmc-ubi";
 408			};
 409		};
 410	};
 411	flash@1 {
 412		status = "okay";
 413		label = "alt-bmc";
 414		m25p,fast-read;
 415		spi-max-frequency = <50000000>;
 416		partitions {
 417			#address-cells = < 1 >;
 418			#size-cells = < 1 >;
 419			compatible = "fixed-partitions";
 420			u-boot@0 {
 421				reg = < 0 0x60000 >;
 422				label = "alt-u-boot";
 423			};
 424			u-boot-env@60000 {
 425				reg = < 0x60000 0x20000 >;
 426				label = "alt-u-boot-env";
 427			};
 428			obmc-ubi@80000 {
 429				reg = < 0x80000 0x1F80000 >;
 430				label = "alt-obmc-ubi";
 431			};
 432		};
 433	};
 434};
 435
 436&spi1 {
 437	status = "okay";
 438	pinctrl-names = "default";
 439	pinctrl-0 = <&pinctrl_spi1_default>;
 440
 441	flash@0 {
 442		status = "okay";
 443		label = "pnor";
 444		m25p,fast-read;
 445		spi-max-frequency = <100000000>;
 446	};
 447};
 448
 449&lpc_ctrl {
 450	status = "okay";
 451	memory-region = <&flash_memory>;
 452	flash = <&spi1>;
 453};
 454
 455&uart1 {
 456	/* Rear RS-232 connector */
 457	status = "okay";
 458
 459	pinctrl-names = "default";
 460	pinctrl-0 = <&pinctrl_txd1_default
 461			&pinctrl_rxd1_default
 462			&pinctrl_nrts1_default
 463			&pinctrl_ndtr1_default
 464			&pinctrl_ndsr1_default
 465			&pinctrl_ncts1_default
 466			&pinctrl_ndcd1_default
 467			&pinctrl_nri1_default>;
 468};
 469
 470&uart2 {
 471	/* APSS */
 472	status = "okay";
 473
 474	pinctrl-names = "default";
 475	pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
 476};
 477
 478&uart5 {
 479	status = "okay";
 480};
 481
 482&mac0 {
 483	status = "okay";
 484
 485	pinctrl-names = "default";
 486	pinctrl-0 = <&pinctrl_rmii1_default>;
 487	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
 488		 <&syscon ASPEED_CLK_MAC1RCLK>;
 489	clock-names = "MACCLK", "RCLK";
 490	use-ncsi;
 491};
 492
 493&mac1 {
 494	status = "okay";
 495
 496	pinctrl-names = "default";
 497	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
 498};
 499
 500&i2c0 {
 501	status = "disabled";
 502};
 503
 504&i2c1 {
 505	status = "disabled";
 506};
 507
 508&i2c2 {
 509	status = "okay";
 510
 511	/* SAMTEC P0 */
 512	/* SAMTEC P1 */
 513
 514};
 515
 516&i2c3 {
 517	status = "okay";
 518
 519	/* APSS */
 520	/* CPLD */
 521
 522	/* PCA9516 (repeater) ->
 523	 *    CLK Buffer 9FGS9092
 524	 *    CLK Buffer 9DBL0651BKILFT
 525	 *    CLK Buffer 9DBL0651BKILFT
 526	 *    Power Supply 0
 527	 *    Power Supply 1
 528	 *    PCA 9552 LED
 529	 */
 530
 531	power-supply@58 {
 532		compatible = "ibm,cffps1";
 533		reg = <0x58>;
 534	};
 535
 536	power-supply@5b {
 537		compatible = "ibm,cffps1";
 538		reg = <0x5b>;
 539	};
 540
 541	pca9552: pca9552@60 {
 542		compatible = "nxp,pca9552";
 543		reg = <0x60>;
 544		#address-cells = <1>;
 545		#size-cells = <0>;
 546		gpio-controller;
 547		#gpio-cells = <2>;
 548
 549		gpio@0 {
 550			reg = <0>;
 551			type = <PCA955X_TYPE_GPIO>;
 552		};
 553		gpio@1 {
 554			reg = <1>;
 555			type = <PCA955X_TYPE_GPIO>;
 556		};
 557		gpio@2 {
 558			reg = <2>;
 559			type = <PCA955X_TYPE_GPIO>;
 560		};
 561		gpio@3 {
 562			reg = <3>;
 563			type = <PCA955X_TYPE_GPIO>;
 564		};
 565		gpio@4 {
 566			reg = <4>;
 567			type = <PCA955X_TYPE_GPIO>;
 568		};
 569		gpio@5 {
 570			reg = <5>;
 571			type = <PCA955X_TYPE_GPIO>;
 572		};
 573		gpio@6 {
 574			reg = <6>;
 575			type = <PCA955X_TYPE_GPIO>;
 576		};
 577		gpio@7 {
 578			reg = <7>;
 579			type = <PCA955X_TYPE_GPIO>;
 580		};
 581		gpio@8 {
 582			reg = <8>;
 583			type = <PCA955X_TYPE_GPIO>;
 584		};
 585		gpio@9 {
 586			reg = <9>;
 587			type = <PCA955X_TYPE_GPIO>;
 588		};
 589		gpio@10 {
 590			reg = <10>;
 591			type = <PCA955X_TYPE_GPIO>;
 592		};
 593		gpio@11 {
 594			reg = <11>;
 595			type = <PCA955X_TYPE_GPIO>;
 596		};
 597		gpio@12 {
 598			reg = <12>;
 599			type = <PCA955X_TYPE_GPIO>;
 600		};
 601		gpio@13 {
 602			reg = <13>;
 603			type = <PCA955X_TYPE_GPIO>;
 604		};
 605		gpio@14 {
 606			reg = <14>;
 607			type = <PCA955X_TYPE_GPIO>;
 608		};
 609		gpio@15 {
 610			reg = <15>;
 611			type = <PCA955X_TYPE_GPIO>;
 612		};
 613
 614	};
 615
 616};
 617
 618&i2c4 {
 619	status = "okay";
 620
 621	/* CP0 VDD & VCS : IR35221 */
 622	/* CP0 VDN : IR35221 */
 623	/* CP0 VIO : IR38064 */
 624	/* CP0 VDDR : PXM1330 */
 625
 626	ir35221@70 {
 627		compatible = "infineon,ir35221";
 628		reg = <0x70>;
 629	};
 630
 631	ir35221@72 {
 632		compatible = "infineon,ir35221";
 633		reg = <0x72>;
 634	};
 635
 636};
 637
 638&i2c5 {
 639	status = "okay";
 640
 641	/* CP0 VDD & VCS : IR35221 */
 642	/* CP0 VDN : IR35221 */
 643	/* CP0 VIO : IR38064 */
 644	/* CP0 VDDR : PXM1330 */
 645
 646	ir35221@70 {
 647		compatible = "infineon,ir35221";
 648		reg = <0x70>;
 649	};
 650
 651	ir35221@72 {
 652		compatible = "infineon,ir35221";
 653		reg = <0x72>;
 654	};
 655
 656};
 657
 658&i2c6 {
 659	status = "okay";
 660
 661	/* pca9548 -> NVMe1 to 8 */
 662
 663	pca9548@70 {
 664		compatible = "nxp,pca9548";
 665		#address-cells = <1>;
 666		#size-cells = <0>;
 667		reg = <0x70>;
 668
 669		bus7_mux223: i2c@0 {
 670			#address-cells = <1>;
 671			#size-cells = <0>;
 672			reg = <0>;
 673		};
 674
 675		bus7_mux224: i2c@1 {
 676			#address-cells = <1>;
 677			#size-cells = <0>;
 678			reg = <1>;
 679		};
 680
 681		bus7_mux225: i2c@2 {
 682			#address-cells = <1>;
 683			#size-cells = <0>;
 684			reg = <2>;
 685		};
 686
 687		bus7_mux226: i2c@3 {
 688			#address-cells = <1>;
 689			#size-cells = <0>;
 690			reg = <3>;
 691		};
 692
 693		bus7_mux227: i2c@4 {
 694			#address-cells = <1>;
 695			#size-cells = <0>;
 696			reg = <4>;
 697		};
 698
 699		bus7_mux228: i2c@5 {
 700			#address-cells = <1>;
 701			#size-cells = <0>;
 702			reg = <5>;
 703		};
 704
 705		bus7_mux229: i2c@6 {
 706			#address-cells = <1>;
 707			#size-cells = <0>;
 708			reg = <6>;
 709		};
 710
 711		bus7_mux230: i2c@7 {
 712			#address-cells = <1>;
 713			#size-cells = <0>;
 714			reg = <7>;
 715		};
 716	};
 717
 718};
 719
 720&i2c7 {
 721	status = "okay";
 722
 723	/* pca9548 -> NVMe9 to 16 */
 724
 725	pca9548@70 {
 726		compatible = "nxp,pca9548";
 727		#address-cells = <1>;
 728		#size-cells = <0>;
 729		reg = <0x70>;
 730
 731		bus6_mux215: i2c@0 {
 732			#address-cells = <1>;
 733			#size-cells = <0>;
 734			reg = <0>;
 735		};
 736
 737		bus6_mux216: i2c@1 {
 738			#address-cells = <1>;
 739			#size-cells = <0>;
 740			reg = <1>;
 741		};
 742
 743		bus6_mux217: i2c@2 {
 744			#address-cells = <1>;
 745			#size-cells = <0>;
 746			reg = <2>;
 747		};
 748
 749		bus6_mux218: i2c@3 {
 750			#address-cells = <1>;
 751			#size-cells = <0>;
 752			reg = <3>;
 753		};
 754
 755		bus6_mux219: i2c@4 {
 756			#address-cells = <1>;
 757			#size-cells = <0>;
 758			reg = <4>;
 759		};
 760
 761		bus6_mux220: i2c@5 {
 762			#address-cells = <1>;
 763			#size-cells = <0>;
 764			reg = <5>;
 765		};
 766
 767		bus6_mux221: i2c@6 {
 768			#address-cells = <1>;
 769			#size-cells = <0>;
 770			reg = <6>;
 771		};
 772
 773		bus6_mux222: i2c@7 {
 774			#address-cells = <1>;
 775			#size-cells = <0>;
 776			reg = <7>;
 777		};
 778	};
 779
 780};
 781
 782&i2c8 {
 783	status = "okay";
 784
 785	eeprom@50 {
 786		compatible = "atmel,24c64";
 787		reg = <0x50>;
 788	};
 789};
 790
 791&i2c9 {
 792	status = "okay";
 793
 794	/* pca9545 Riser ->
 795	*	PCIe x8  Slot3
 796	*	PCIe x16 slot4
 797	*	PCIe x8  slot5
 798	*	I2C BMC RISER PCA9554
 799	*	BMC SCL/SDA PCA9554
 800	*	PCA9554
 801	*/
 802
 803	/* pca9545 ->
 804	*	PCIe x16 Slot1
 805	*	PCIe x8  slot2
 806	*	PEX8748
 807	*/
 808
 809	pca9545riser@70 {
 810		compatible = "nxp,pca9545";
 811		#address-cells = <1>;
 812		#size-cells = <0>;
 813		reg = <0x70>;
 814
 815		i2c-mux-idle-disconnect;
 816		interrupt-controller;
 817		#interrupt-cells = <2>;
 818
 819		bus9_mux231: i2c@0 {
 820			#address-cells = <1>;
 821			#size-cells = <0>;
 822			reg = <0>;
 823
 824			tca9554@39 {
 825				compatible = "ti,tca9554";
 826				reg = <0x39>;
 827				gpio-controller;
 828				#gpio-cells = <2>;
 829
 830				smbus0 {
 831					gpio-hog;
 832					gpios = <4 GPIO_ACTIVE_HIGH>;
 833					output-high;
 834					line-name = "smbus0";
 835				};
 836			};
 837
 838			tmp431@4c {
 839				compatible = "ti,tmp401";
 840				reg = <0x4c>;
 841			};
 842		};
 843
 844		bus9_mux232: i2c@1 {
 845			#address-cells = <1>;
 846			#size-cells = <0>;
 847			reg = <1>;
 848
 849			tca9554@39 {
 850				compatible = "ti,tca9554";
 851				reg = <0x39>;
 852				gpio-controller;
 853				#gpio-cells = <2>;
 854
 855				smbus1 {
 856					gpio-hog;
 857					gpios = <4 GPIO_ACTIVE_HIGH>;
 858					output-high;
 859					line-name = "smbus1";
 860				};
 861			};
 862
 863			tmp431@4c {
 864				compatible = "ti,tmp401";
 865				reg = <0x4c>;
 866			};
 867		};
 868
 869		bus9_mux233: i2c@2 {
 870			#address-cells = <1>;
 871			#size-cells = <0>;
 872			reg = <2>;
 873		};
 874
 875		bus9_mux234: i2c@3 {
 876			#address-cells = <1>;
 877			#size-cells = <0>;
 878			reg = <3>;
 879		};
 880	};
 881
 882	pca9545@71 {
 883		compatible = "nxp,pca9545";
 884		#address-cells = <1>;
 885		#size-cells = <0>;
 886		reg = <0x71>;
 887
 888		i2c-mux-idle-disconnect;
 889		interrupt-controller;
 890		#interrupt-cells = <2>;
 891
 892		bus9_mux235: i2c@0 {
 893			#address-cells = <1>;
 894			#size-cells = <0>;
 895			reg = <0>;
 896
 897			tca9554@39 {
 898				compatible = "ti,tca9554";
 899				reg = <0x39>;
 900				gpio-controller;
 901				#gpio-cells = <2>;
 902
 903				smbus2 {
 904					gpio-hog;
 905					gpios = <4 GPIO_ACTIVE_HIGH>;
 906					output-high;
 907					line-name = "smbus2";
 908				};
 909			};
 910
 911			tmp431@4c {
 912				compatible = "ti,tmp401";
 913				reg = <0x4c>;
 914			};
 915		};
 916
 917		bus9_mux236: i2c@1 {
 918			#address-cells = <1>;
 919			#size-cells = <0>;
 920			reg = <1>;
 921
 922			tca9554@39 {
 923				compatible = "ti,tca9554";
 924				reg = <0x39>;
 925				gpio-controller;
 926				#gpio-cells = <2>;
 927
 928				smbus3 {
 929					gpio-hog;
 930					gpios = <4 GPIO_ACTIVE_HIGH>;
 931					output-high;
 932					line-name = "smbus3";
 933				};
 934			};
 935
 936			tmp431@4c {
 937				compatible = "ti,tmp401";
 938				reg = <0x4c>;
 939			};
 940		};
 941
 942		bus9_mux237: i2c@2 {
 943			#address-cells = <1>;
 944			#size-cells = <0>;
 945			reg = <2>;
 946		};
 947
 948		bus9_mux238: i2c@3 {
 949			#address-cells = <1>;
 950			#size-cells = <0>;
 951			reg = <3>;
 952		};
 953	};
 954};
 955
 956&i2c10 {
 957	status = "okay";
 958
 959	/* pca9545 Riser ->
 960	* 	PCIe x8  Slot8
 961	* 	PCIe x16 slot9
 962	* 	PCIe x8  slot10
 963	* 	I2C BMC RISER PCA9554
 964	* 	BMC SCL/SDA PCA9554
 965	* 	PCA9554
 966	*/
 967
 968	/* pca9545 ->
 969	*	PCIe x16 Slot1
 970	*	PCIe x8  slot2
 971	*	PEX8748
 972	*/
 973
 974	pca9545riser@70 {
 975		compatible = "nxp,pca9545";
 976		#address-cells = <1>;
 977		#size-cells = <0>;
 978		reg = <0x70>;
 979
 980		i2c-mux-idle-disconnect;
 981		interrupt-controller;
 982		#interrupt-cells = <2>;
 983
 984		bus10_mux239: i2c@0 {
 985			#address-cells = <1>;
 986			#size-cells = <0>;
 987			reg = <0>;
 988
 989			tca9554@39 {
 990				compatible = "ti,tca9554";
 991				reg = <0x39>;
 992				gpio-controller;
 993				#gpio-cells = <2>;
 994
 995				smbus4 {
 996					gpio-hog;
 997					gpios = <4 GPIO_ACTIVE_HIGH>;
 998					output-high;
 999					line-name = "smbus4";
1000				};
1001			};
1002
1003			tmp431@4c {
1004				compatible = "ti,tmp401";
1005				reg = <0x4c>;
1006			};
1007		};
1008
1009		bus10_mux240: i2c@1 {
1010			#address-cells = <1>;
1011			#size-cells = <0>;
1012			reg = <1>;
1013
1014			tca9554@39 {
1015				compatible = "ti,tca9554";
1016				reg = <0x39>;
1017				gpio-controller;
1018				#gpio-cells = <2>;
1019
1020				smbus5 {
1021					gpio-hog;
1022					gpios = <4 GPIO_ACTIVE_HIGH>;
1023					output-high;
1024					line-name = "smbus5";
1025				};
1026			};
1027
1028			tmp431@4c {
1029				compatible = "ti,tmp401";
1030				reg = <0x4c>;
1031			};
1032		};
1033
1034		bus10_mux241: i2c@2 {
1035			#address-cells = <1>;
1036			#size-cells = <0>;
1037			reg = <2>;
1038		};
1039
1040		bus10_mux242: i2c@3 {
1041			#address-cells = <1>;
1042			#size-cells = <0>;
1043			reg = <3>;
1044		};
1045	};
1046
1047	pca9545@71 {
1048		compatible = "nxp,pca9545";
1049		#address-cells = <1>;
1050		#size-cells = <0>;
1051		reg = <0x71>;
1052
1053		i2c-mux-idle-disconnect;
1054		interrupt-controller;
1055		#interrupt-cells = <2>;
1056
1057		bus10_mux243: i2c@0 {
1058			#address-cells = <1>;
1059			#size-cells = <0>;
1060			reg = <0>;
1061
1062			tca9554@39 {
1063				compatible = "ti,tca9554";
1064				reg = <0x39>;
1065				gpio-controller;
1066				#gpio-cells = <2>;
1067
1068				smbus6 {
1069					gpio-hog;
1070					gpios = <4 GPIO_ACTIVE_HIGH>;
1071					output-high;
1072					line-name = "smbus6";
1073				};
1074			};
1075
1076			tmp431@4c {
1077				compatible = "ti,tmp401";
1078				reg = <0x4c>;
1079			};
1080		};
1081
1082		bus10_mux244: i2c@1 {
1083			#address-cells = <1>;
1084			#size-cells = <0>;
1085			reg = <1>;
1086
1087			tca9554@39 {
1088				compatible = "ti,tca9554";
1089				reg = <0x39>;
1090				gpio-controller;
1091				#gpio-cells = <2>;
1092
1093				smbus7 {
1094					gpio-hog;
1095					gpios = <4 GPIO_ACTIVE_HIGH>;
1096					output-high;
1097					line-name = "smbus7";
1098				};
1099			};
1100
1101			tmp431@4c {
1102				compatible = "ti,tmp401";
1103				reg = <0x4c>;
1104			};
1105		};
1106
1107		bus10_mux245: i2c@2 {
1108			#address-cells = <1>;
1109			#size-cells = <0>;
1110			reg = <2>;
1111		};
1112
1113		bus10_mux246: i2c@3 {
1114			#address-cells = <1>;
1115			#size-cells = <0>;
1116			reg = <3>;
1117		};
1118	};
1119};
1120
1121&i2c11 {
1122	status = "okay";
1123
1124	/* TPM */
1125	/* RTC RX8900CE */
1126	/* FPGA for power sequence */
1127	/* TMP275A */
1128	/* TMP275A */
1129	/* EMC1462 */
1130
1131	tpm@57 {
1132		compatible = "infineon,slb9645tt";
1133		reg = <0x57>;
1134	};
1135
1136	rtc@32 {
1137		compatible = "epson,rx8900";
1138		reg = <0x32>;
1139	};
1140
1141	tmp275@48 {
1142		compatible = "ti,tmp275";
1143		reg = <0x48>;
1144	};
1145
1146	tmp275@49 {
1147		compatible = "ti,tmp275";
1148		reg = <0x49>;
1149	};
1150
1151	/* chip emc1462 use emc1403 driver */
1152	emc1403@4c {
1153		compatible = "smsc,emc1403";
1154		reg = <0x4c>;
1155	};
1156
1157};
1158
1159&i2c12 {
1160	status = "okay";
1161
1162	/* pca9545 ->
1163	*	SAS BP1
1164	*	SAS BP2
1165	*	NVMe BP
1166	*	M.2 riser
1167	*/
1168
1169	pca9545@70 {
1170		compatible = "nxp,pca9545";
1171		#address-cells = <1>;
1172		#size-cells = <0>;
1173		reg = <0x70>;
1174
1175		interrupt-controller;
1176		#interrupt-cells = <2>;
1177
1178		bus12_mux247: i2c@0 {
1179			#address-cells = <1>;
1180			#size-cells = <0>;
1181			reg = <0>;
1182
1183			eeprom@50 {
1184				compatible = "atmel,24c64";
1185				reg = <0x50>;
1186			};
1187		};
1188
1189		bus12_mux248: i2c@1 {
1190			#address-cells = <1>;
1191			#size-cells = <0>;
1192			reg = <1>;
1193
1194			eeprom@50 {
1195				compatible = "atmel,24c64";
1196				reg = <0x50>;
1197			};
1198		};
1199
1200		bus12_mux249: i2c@2 {
1201			#address-cells = <1>;
1202			#size-cells = <0>;
1203			reg = <2>;
1204
1205			eeprom@50 {
1206				compatible = "atmel,24c64";
1207				reg = <0x50>;
1208			};
1209		};
1210
1211		bus12_mux250: i2c@3 {
1212			#address-cells = <1>;
1213			#size-cells = <0>;
1214			reg = <3>;
1215
1216			tmp275@48 {
1217				compatible = "ti,tmp275";
1218				reg = <0x48>;
1219			};
1220		};
1221
1222	};
1223
1224};
1225
1226&i2c13 {
1227	status = "okay";
1228
1229	/* pca9548 ->
1230	*	NVMe BP
1231	*	NVMe HDD17 to 24
1232	*/
1233
1234	pca9548@70 {
1235		compatible = "nxp,pca9548";
1236		#address-cells = <1>;
1237		#size-cells = <0>;
1238		reg = <0x70>;
1239		bus13_mux251: i2c@0 {
1240			#address-cells = <1>;
1241			#size-cells = <0>;
1242			reg = <0>;
1243		};
1244
1245		bus13_mux252: i2c@1 {
1246			#address-cells = <1>;
1247			#size-cells = <0>;
1248			reg = <1>;
1249		};
1250
1251		bus13_mux253: i2c@2 {
1252			#address-cells = <1>;
1253			#size-cells = <0>;
1254			reg = <2>;
1255		};
1256
1257		bus13_mux254: i2c@3 {
1258			#address-cells = <1>;
1259			#size-cells = <0>;
1260			reg = <3>;
1261		};
1262
1263		bus13_mux255: i2c@4 {
1264			#address-cells = <1>;
1265			#size-cells = <0>;
1266			reg = <4>;
1267		};
1268
1269		bus13_mux256: i2c@5 {
1270			#address-cells = <1>;
1271			#size-cells = <0>;
1272			reg = <5>;
1273		};
1274
1275		bus13_mux257: i2c@6 {
1276			#address-cells = <1>;
1277			#size-cells = <0>;
1278			reg = <6>;
1279		};
1280
1281		bus13_mux258: i2c@7 {
1282			#address-cells = <1>;
1283			#size-cells = <0>;
1284			reg = <7>;
1285		};
1286	};
1287};
1288
1289&vuart {
1290	status = "okay";
1291};
1292
1293&gfx {
1294	status = "okay";
1295	memory-region = <&gfx_memory>;
1296};
1297
1298&adc {
1299	status = "okay";
1300	pinctrl-names = "default";
1301	pinctrl-0 = <&pinctrl_adc0_default
1302			&pinctrl_adc1_default
1303			&pinctrl_adc2_default
1304			&pinctrl_adc3_default
1305			&pinctrl_adc4_default
1306			&pinctrl_adc5_default
1307			&pinctrl_adc6_default
1308			&pinctrl_adc7_default
1309			&pinctrl_adc8_default
1310			&pinctrl_adc9_default
1311			&pinctrl_adc10_default
1312			&pinctrl_adc11_default
1313			&pinctrl_adc12_default
1314			&pinctrl_adc13_default
1315			&pinctrl_adc14_default
1316			&pinctrl_adc15_default>;
1317};
1318
1319&wdt1 {
1320	aspeed,reset-type = "none";
1321	aspeed,external-signal;
1322	aspeed,ext-push-pull;
1323	aspeed,ext-active-high;
1324
1325	pinctrl-names = "default";
1326	pinctrl-0 = <&pinctrl_wdtrst1_default>;
1327};
1328
1329&wdt2 {
1330	aspeed,alt-boot;
1331};
1332
1333&ibt {
1334	status = "okay";
1335};
1336
1337&vhub {
1338	status = "okay";
1339};
1340
1341&video {
1342	status = "okay";
1343	memory-region = <&video_engine_memory>;
1344};
1345
1346#include "ibm-power9-dual.dtsi"
1347