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1// SPDX-License-Identifier: GPL-2.0-or-later
2// Copyright 2019 IBM Corp.
3/dts-v1/;
4
5#include "aspeed-g6.dtsi"
6#include <dt-bindings/gpio/aspeed-gpio.h>
7#include <dt-bindings/leds/leds-pca955x.h>
8
9/ {
10 model = "Rainier";
11 compatible = "ibm,rainier-bmc", "aspeed,ast2600";
12
13 aliases {
14 serial4 = &uart5;
15 i2c16 = &i2c2mux0;
16 i2c17 = &i2c2mux1;
17 i2c18 = &i2c2mux2;
18 i2c19 = &i2c2mux3;
19
20 spi10 = &cfam0_spi0;
21 spi11 = &cfam0_spi1;
22 spi12 = &cfam0_spi2;
23 spi13 = &cfam0_spi3;
24 spi20 = &cfam1_spi0;
25 spi21 = &cfam1_spi1;
26 spi22 = &cfam1_spi2;
27 spi23 = &cfam1_spi3;
28 spi30 = &cfam2_spi0;
29 spi31 = &cfam2_spi1;
30 spi32 = &cfam2_spi2;
31 spi33 = &cfam2_spi3;
32 };
33
34 chosen {
35 stdout-path = &uart5;
36 bootargs = "console=ttyS4,115200n8";
37 };
38
39 memory@80000000 {
40 device_type = "memory";
41 reg = <0x80000000 0x40000000>;
42 };
43
44 reserved-memory {
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48
49 flash_memory: region@B8000000 {
50 no-map;
51 reg = <0xB8000000 0x04000000>; /* 64M */
52 };
53
54 vga_memory: region@bf000000 {
55 no-map;
56 reg = <0xbf000000 0x01000000>; /* 16M */
57 };
58 };
59
60 gpio-keys {
61 compatible = "gpio-keys";
62
63 ps0-presence {
64 label = "ps0-presence";
65 gpios = <&gpio0 ASPEED_GPIO(S, 0) GPIO_ACTIVE_LOW>;
66 linux,code = <ASPEED_GPIO(S, 0)>;
67 };
68
69 ps1-presence {
70 label = "ps1-presence";
71 gpios = <&gpio0 ASPEED_GPIO(S, 1) GPIO_ACTIVE_LOW>;
72 linux,code = <ASPEED_GPIO(S, 1)>;
73 };
74
75 ps2-presence {
76 label = "ps2-presence";
77 gpios = <&gpio0 ASPEED_GPIO(S, 2) GPIO_ACTIVE_LOW>;
78 linux,code = <ASPEED_GPIO(S, 2)>;
79 };
80
81 ps3-presence {
82 label = "ps3-presence";
83 gpios = <&gpio0 ASPEED_GPIO(S, 3) GPIO_ACTIVE_LOW>;
84 linux,code = <ASPEED_GPIO(S, 3)>;
85 };
86 };
87
88 i2c2mux: i2cmux {
89 compatible = "i2c-mux-gpio";
90 #address-cells = <1>;
91 #size-cells = <0>;
92 status = "okay";
93
94 i2c-parent = <&i2c2>;
95 mux-gpios = <&gpio0 ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>,
96 <&gpio0 ASPEED_GPIO(G, 5) GPIO_ACTIVE_HIGH>;
97 idle-state = <0>;
98
99 i2c2mux0: i2c@0 {
100 #address-cells = <1>;
101 #size-cells = <0>;
102 reg = <0>;
103 };
104
105 i2c2mux1: i2c@1 {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 reg = <1>;
109 };
110
111 i2c2mux2: i2c@2 {
112 #address-cells = <1>;
113 #size-cells = <0>;
114 reg = <2>;
115 };
116
117 i2c2mux3: i2c@3 {
118 #address-cells = <1>;
119 #size-cells = <0>;
120 reg = <3>;
121 };
122 };
123};
124
125&ehci1 {
126 status = "okay";
127};
128
129&gpio0 {
130 gpio-line-names =
131 /*A0-A7*/ "","","","","","","","",
132 /*B0-B7*/ "","","","","","","checkstop","",
133 /*C0-C7*/ "","","","","","","","",
134 /*D0-D7*/ "","","","","","","","",
135 /*E0-E7*/ "","","","","","","","",
136 /*F0-F7*/ "","","","","","","","",
137 /*G0-G7*/ "","","","","","","","",
138 /*H0-H7*/ "","","","","","","","",
139 /*I0-I7*/ "","","","","","","","",
140 /*J0-J7*/ "","","","","","","","",
141 /*K0-K7*/ "","","","","","","","",
142 /*L0-L7*/ "","","","","","","","",
143 /*M0-M7*/ "","","","","","","","",
144 /*N0-N7*/ "","","","","","","","",
145 /*O0-O7*/ "","","","usb-power","","","","",
146 /*P0-P7*/ "","","","","","","","",
147 /*Q0-Q7*/ "cfam-reset","","","","","","","",
148 /*R0-R7*/ "","","","","","","","",
149 /*S0-S7*/ "presence-ps0","presence-ps1","presence-ps2","presence-ps3",
150 "","","","",
151 /*T0-T7*/ "","","","","","","","",
152 /*U0-U7*/ "","","","","","","","",
153 /*V0-V7*/ "","","","","","","","",
154 /*W0-W7*/ "","","","","","","","",
155 /*X0-X7*/ "","","","","","","","",
156 /*Y0-Y7*/ "","","","","","","","",
157 /*Z0-Z7*/ "","","","","","","","",
158 /*AA0-AA7*/ "","","","","","","","",
159 /*AB0-AB7*/ "","","","","","","","",
160 /*AC0-AC7*/ "","","","","","","","";
161
162 pin_mclr_vpp {
163 gpio-hog;
164 gpios = <ASPEED_GPIO(P, 7) GPIO_OPEN_DRAIN>;
165 output-high;
166 line-name = "mclr_vpp";
167 };
168
169 i2c3_mux_oe_n {
170 gpio-hog;
171 gpios = <ASPEED_GPIO(G, 6) GPIO_ACTIVE_LOW>;
172 output-high;
173 line-name = "I2C3_MUX_OE_N";
174 };
175};
176
177&emmc_controller {
178 status = "okay";
179};
180
181&emmc {
182 status = "okay";
183};
184
185&fsim0 {
186 status = "okay";
187
188 #address-cells = <2>;
189 #size-cells = <0>;
190
191 /*
192 * CFAM Reset is supposed to be active low but pass1 hardware is wired
193 * active high.
194 */
195 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
196
197 cfam@0,0 {
198 reg = <0 0>;
199 #address-cells = <1>;
200 #size-cells = <1>;
201 chip-id = <0>;
202
203 scom@1000 {
204 compatible = "ibm,fsi2pib";
205 reg = <0x1000 0x400>;
206 };
207
208 i2c@1800 {
209 compatible = "ibm,fsi-i2c-master";
210 reg = <0x1800 0x400>;
211 #address-cells = <1>;
212 #size-cells = <0>;
213 };
214
215 fsi2spi@1c00 {
216 compatible = "ibm,fsi2spi";
217 reg = <0x1c00 0x400>;
218 #address-cells = <1>;
219 #size-cells = <0>;
220
221 cfam0_spi0: spi@0 {
222 reg = <0x0>;
223 #address-cells = <1>;
224 #size-cells = <0>;
225
226 eeprom@0 {
227 at25,byte-len = <0x80000>;
228 at25,addr-mode = <4>;
229 at25,page-size = <256>;
230
231 compatible = "atmel,at25";
232 reg = <0>;
233 spi-max-frequency = <1000000>;
234 };
235 };
236
237 cfam0_spi1: spi@20 {
238 reg = <0x20>;
239 #address-cells = <1>;
240 #size-cells = <0>;
241
242 eeprom@0 {
243 at25,byte-len = <0x80000>;
244 at25,addr-mode = <4>;
245 at25,page-size = <256>;
246
247 compatible = "atmel,at25";
248 reg = <0>;
249 spi-max-frequency = <1000000>;
250 };
251 };
252
253 cfam0_spi2: spi@40 {
254 reg = <0x40>;
255 #address-cells = <1>;
256 #size-cells = <0>;
257
258 eeprom@0 {
259 at25,byte-len = <0x80000>;
260 at25,addr-mode = <4>;
261 at25,page-size = <256>;
262
263 compatible = "atmel,at25";
264 reg = <0>;
265 spi-max-frequency = <1000000>;
266 };
267 };
268
269 cfam0_spi3: spi@60 {
270 reg = <0x60>;
271 #address-cells = <1>;
272 #size-cells = <0>;
273
274 eeprom@0 {
275 at25,byte-len = <0x80000>;
276 at25,addr-mode = <4>;
277 at25,page-size = <256>;
278
279 compatible = "atmel,at25";
280 reg = <0>;
281 spi-max-frequency = <1000000>;
282 };
283 };
284 };
285
286 sbefifo@2400 {
287 compatible = "ibm,p9-sbefifo";
288 reg = <0x2400 0x400>;
289 #address-cells = <1>;
290 #size-cells = <0>;
291
292 fsi_occ0: occ {
293 compatible = "ibm,p10-occ";
294 };
295 };
296
297 fsi_hub0: hub@3400 {
298 compatible = "fsi-master-hub";
299 reg = <0x3400 0x400>;
300 #address-cells = <2>;
301 #size-cells = <0>;
302
303 no-scan-on-init;
304 };
305 };
306};
307
308&fsi_hub0 {
309 cfam@1,0 {
310 reg = <1 0>;
311 #address-cells = <1>;
312 #size-cells = <1>;
313 chip-id = <1>;
314
315 scom@1000 {
316 compatible = "ibm,fsi2pib";
317 reg = <0x1000 0x400>;
318 };
319
320 i2c@1800 {
321 compatible = "ibm,fsi-i2c-master";
322 reg = <0x1800 0x400>;
323 #address-cells = <1>;
324 #size-cells = <0>;
325 };
326
327 fsi2spi@1c00 {
328 compatible = "ibm,fsi2spi";
329 reg = <0x1c00 0x400>;
330 #address-cells = <1>;
331 #size-cells = <0>;
332
333 cfam1_spi0: spi@0 {
334 reg = <0x0>;
335 #address-cells = <1>;
336 #size-cells = <0>;
337
338 eeprom@0 {
339 at25,byte-len = <0x80000>;
340 at25,addr-mode = <4>;
341 at25,page-size = <256>;
342
343 compatible = "atmel,at25";
344 reg = <0>;
345 spi-max-frequency = <1000000>;
346 };
347 };
348
349 cfam1_spi1: spi@20 {
350 reg = <0x20>;
351 #address-cells = <1>;
352 #size-cells = <0>;
353
354 eeprom@0 {
355 at25,byte-len = <0x80000>;
356 at25,addr-mode = <4>;
357 at25,page-size = <256>;
358
359 compatible = "atmel,at25";
360 reg = <0>;
361 spi-max-frequency = <1000000>;
362 };
363 };
364
365 cfam1_spi2: spi@40 {
366 reg = <0x40>;
367 #address-cells = <1>;
368 #size-cells = <0>;
369
370 eeprom@0 {
371 at25,byte-len = <0x80000>;
372 at25,addr-mode = <4>;
373 at25,page-size = <256>;
374
375 compatible = "atmel,at25";
376 reg = <0>;
377 spi-max-frequency = <1000000>;
378 };
379 };
380
381 cfam1_spi3: spi@60 {
382 reg = <0x60>;
383 #address-cells = <1>;
384 #size-cells = <0>;
385
386 eeprom@0 {
387 at25,byte-len = <0x80000>;
388 at25,addr-mode = <4>;
389 at25,page-size = <256>;
390
391 compatible = "atmel,at25";
392 reg = <0>;
393 spi-max-frequency = <1000000>;
394 };
395 };
396 };
397
398 sbefifo@2400 {
399 compatible = "ibm,p9-sbefifo";
400 reg = <0x2400 0x400>;
401 #address-cells = <1>;
402 #size-cells = <0>;
403
404 fsi_occ1: occ {
405 compatible = "ibm,p10-occ";
406 };
407 };
408
409 fsi_hub1: hub@3400 {
410 compatible = "fsi-master-hub";
411 reg = <0x3400 0x400>;
412 #address-cells = <2>;
413 #size-cells = <0>;
414
415 no-scan-on-init;
416 };
417 };
418
419 cfam@2,0 {
420 reg = <2 0>;
421 #address-cells = <1>;
422 #size-cells = <1>;
423 chip-id = <2>;
424
425 scom@1000 {
426 compatible = "ibm,fsi2pib";
427 reg = <0x1000 0x400>;
428 };
429
430 i2c@1800 {
431 compatible = "ibm,fsi-i2c-master";
432 reg = <0x1800 0x400>;
433 #address-cells = <1>;
434 #size-cells = <0>;
435 };
436
437 fsi2spi@1c00 {
438 compatible = "ibm,fsi2spi";
439 reg = <0x1c00 0x400>;
440 #address-cells = <1>;
441 #size-cells = <0>;
442
443 cfam2_spi0: spi@0 {
444 reg = <0x0>;
445 #address-cells = <1>;
446 #size-cells = <0>;
447
448 eeprom@0 {
449 at25,byte-len = <0x80000>;
450 at25,addr-mode = <4>;
451 at25,page-size = <256>;
452
453 compatible = "atmel,at25";
454 reg = <0>;
455 spi-max-frequency = <1000000>;
456 };
457 };
458
459 cfam2_spi1: spi@20 {
460 reg = <0x20>;
461 #address-cells = <1>;
462 #size-cells = <0>;
463
464 eeprom@0 {
465 at25,byte-len = <0x80000>;
466 at25,addr-mode = <4>;
467 at25,page-size = <256>;
468
469 compatible = "atmel,at25";
470 reg = <0>;
471 spi-max-frequency = <1000000>;
472 };
473 };
474
475 cfam2_spi2: spi@40 {
476 reg = <0x40>;
477 #address-cells = <1>;
478 #size-cells = <0>;
479
480 eeprom@0 {
481 at25,byte-len = <0x80000>;
482 at25,addr-mode = <4>;
483 at25,page-size = <256>;
484
485 compatible = "atmel,at25";
486 reg = <0>;
487 spi-max-frequency = <1000000>;
488 };
489 };
490
491 cfam2_spi3: spi@60 {
492 reg = <0x60>;
493 #address-cells = <1>;
494 #size-cells = <0>;
495
496 eeprom@0 {
497 at25,byte-len = <0x80000>;
498 at25,addr-mode = <4>;
499 at25,page-size = <256>;
500
501 compatible = "atmel,at25";
502 reg = <0>;
503 spi-max-frequency = <1000000>;
504 };
505 };
506 };
507
508 sbefifo@2400 {
509 compatible = "ibm,p9-sbefifo";
510 reg = <0x2400 0x400>;
511 #address-cells = <1>;
512 #size-cells = <0>;
513
514 fsi_occ2: occ {
515 compatible = "ibm,p10-occ";
516 };
517 };
518
519 fsi_hub2: hub@3400 {
520 compatible = "fsi-master-hub";
521 reg = <0x3400 0x400>;
522 #address-cells = <2>;
523 #size-cells = <0>;
524
525 no-scan-on-init;
526 };
527 };
528};
529
530/* Legacy OCC numbering (to get rid of when userspace is fixed) */
531&fsi_occ0 {
532 reg = <1>;
533};
534
535&fsi_occ1 {
536 reg = <2>;
537};
538
539&fsi_occ2 {
540 reg = <3>;
541};
542
543&ibt {
544 status = "okay";
545};
546
547&i2c0 {
548 status = "okay";
549
550 eeprom@51 {
551 compatible = "atmel,24c64";
552 reg = <0x51>;
553 };
554
555 tca9554@40 {
556 compatible = "ti,tca9554";
557 reg = <0x40>;
558 gpio-controller;
559 #gpio-cells = <2>;
560
561 smbus0 {
562 gpio-hog;
563 gpios = <4 GPIO_ACTIVE_HIGH>;
564 output-high;
565 line-name = "smbus0";
566 };
567 };
568
569};
570
571&i2c1 {
572 status = "okay";
573};
574
575&i2c2 {
576 status = "okay";
577};
578
579&i2c3 {
580 status = "okay";
581
582 power-supply@68 {
583 compatible = "ibm,cffps";
584 reg = <0x68>;
585 };
586
587 power-supply@69 {
588 compatible = "ibm,cffps";
589 reg = <0x69>;
590 };
591
592 power-supply@6a {
593 compatible = "ibm,cffps";
594 reg = <0x6a>;
595 };
596
597 power-supply@6b {
598 compatible = "ibm,cffps";
599 reg = <0x6b>;
600 };
601};
602
603&i2c4 {
604 status = "okay";
605
606 tmp275@48 {
607 compatible = "ti,tmp275";
608 reg = <0x48>;
609 };
610
611 tmp275@49 {
612 compatible = "ti,tmp275";
613 reg = <0x49>;
614 };
615
616 tmp275@4a {
617 compatible = "ti,tmp275";
618 reg = <0x4a>;
619 };
620
621 eeprom@50 {
622 compatible = "atmel,24c64";
623 reg = <0x50>;
624 };
625
626 eeprom@51 {
627 compatible = "atmel,24c64";
628 reg = <0x51>;
629 };
630
631 eeprom@52 {
632 compatible = "atmel,24c64";
633 reg = <0x52>;
634 };
635};
636
637&i2c5 {
638 status = "okay";
639
640 tmp275@48 {
641 compatible = "ti,tmp275";
642 reg = <0x48>;
643 };
644
645 tmp275@49 {
646 compatible = "ti,tmp275";
647 reg = <0x49>;
648 };
649
650 eeprom@50 {
651 compatible = "atmel,24c64";
652 reg = <0x50>;
653 };
654
655 eeprom@51 {
656 compatible = "atmel,24c64";
657 reg = <0x51>;
658 };
659};
660
661&i2c6 {
662 status = "okay";
663
664 tmp275@48 {
665 compatible = "ti,tmp275";
666 reg = <0x48>;
667 };
668
669 tmp275@4a {
670 compatible = "ti,tmp275";
671 reg = <0x4a>;
672 };
673
674 tmp275@4b {
675 compatible = "ti,tmp275";
676 reg = <0x4b>;
677 };
678
679 eeprom@50 {
680 compatible = "atmel,24c64";
681 reg = <0x50>;
682 };
683
684 eeprom@51 {
685 compatible = "atmel,24c64";
686 reg = <0x51>;
687 };
688
689 eeprom@52 {
690 compatible = "atmel,24c64";
691 reg = <0x52>;
692 };
693
694 eeprom@53 {
695 compatible = "atmel,24c64";
696 reg = <0x53>;
697 };
698};
699
700&i2c7 {
701 status = "okay";
702
703 si7021-a20@20 {
704 compatible = "silabs,si7020";
705 reg = <0x20>;
706 };
707
708 tmp275@48 {
709 compatible = "ti,tmp275";
710 reg = <0x48>;
711 };
712
713 max31785@52 {
714 compatible = "maxim,max31785a";
715 reg = <0x52>;
716 #address-cells = <1>;
717 #size-cells = <0>;
718
719 fan@0 {
720 compatible = "pmbus-fan";
721 reg = <0>;
722 tach-pulses = <2>;
723 };
724
725 fan@1 {
726 compatible = "pmbus-fan";
727 reg = <1>;
728 tach-pulses = <2>;
729 };
730
731 fan@2 {
732 compatible = "pmbus-fan";
733 reg = <2>;
734 tach-pulses = <2>;
735 };
736
737 fan@3 {
738 compatible = "pmbus-fan";
739 reg = <3>;
740 tach-pulses = <2>;
741 };
742 };
743
744 pca0: pca9552@61 {
745 compatible = "nxp,pca9552";
746 reg = <0x61>;
747 #address-cells = <1>;
748 #size-cells = <0>;
749
750 gpio-controller;
751 #gpio-cells = <2>;
752
753 gpio@0 {
754 reg = <0>;
755 type = <PCA955X_TYPE_GPIO>;
756 };
757
758 gpio@1 {
759 reg = <1>;
760 type = <PCA955X_TYPE_GPIO>;
761 };
762
763 gpio@2 {
764 reg = <2>;
765 type = <PCA955X_TYPE_GPIO>;
766 };
767
768 gpio@3 {
769 reg = <3>;
770 type = <PCA955X_TYPE_GPIO>;
771 };
772
773 gpio@4 {
774 reg = <4>;
775 type = <PCA955X_TYPE_GPIO>;
776 };
777
778 gpio@5 {
779 reg = <5>;
780 type = <PCA955X_TYPE_GPIO>;
781 };
782
783 gpio@6 {
784 reg = <6>;
785 type = <PCA955X_TYPE_GPIO>;
786 };
787
788 gpio@7 {
789 reg = <7>;
790 type = <PCA955X_TYPE_GPIO>;
791 };
792
793 gpio@8 {
794 reg = <8>;
795 type = <PCA955X_TYPE_GPIO>;
796 };
797
798 gpio@9 {
799 reg = <9>;
800 type = <PCA955X_TYPE_GPIO>;
801 };
802
803 gpio@10 {
804 reg = <10>;
805 type = <PCA955X_TYPE_GPIO>;
806 };
807
808 gpio@11 {
809 reg = <11>;
810 type = <PCA955X_TYPE_GPIO>;
811 };
812
813 gpio@12 {
814 reg = <12>;
815 type = <PCA955X_TYPE_GPIO>;
816 };
817
818 gpio@13 {
819 reg = <13>;
820 type = <PCA955X_TYPE_GPIO>;
821 };
822
823 gpio@14 {
824 reg = <14>;
825 type = <PCA955X_TYPE_GPIO>;
826 };
827
828 gpio@15 {
829 reg = <15>;
830 type = <PCA955X_TYPE_GPIO>;
831 };
832 };
833
834 dps: dps310@76 {
835 compatible = "infineon,dps310";
836 reg = <0x76>;
837 #io-channel-cells = <0>;
838 };
839
840 eeprom@50 {
841 compatible = "atmel,24c64";
842 reg = <0x50>;
843 };
844
845 eeprom@51 {
846 compatible = "atmel,24c64";
847 reg = <0x51>;
848 };
849};
850
851&i2c8 {
852 status = "okay";
853
854 ucd90320@11 {
855 compatible = "ti,ucd90320";
856 reg = <0x11>;
857 };
858
859 rtc@32 {
860 compatible = "epson,rx8900";
861 reg = <0x32>;
862 };
863
864 tmp275@48 {
865 compatible = "ti,tmp275";
866 reg = <0x48>;
867 };
868
869 tmp275@4a {
870 compatible = "ti,tmp275";
871 reg = <0x4a>;
872 };
873
874 eeprom@50 {
875 compatible = "atmel,24c64";
876 reg = <0x50>;
877 };
878
879 eeprom@51 {
880 compatible = "atmel,24c64";
881 reg = <0x51>;
882 };
883
884 pca1: pca9552@61 {
885 compatible = "nxp,pca9552";
886 reg = <0x61>;
887 #address-cells = <1>;
888 #size-cells = <0>;
889 gpio-controller;
890 #gpio-cells = <2>;
891
892 gpio@0 {
893 reg = <0>;
894 type = <PCA955X_TYPE_GPIO>;
895 };
896
897 gpio@1 {
898 reg = <1>;
899 type = <PCA955X_TYPE_GPIO>;
900 };
901
902 gpio@2 {
903 reg = <2>;
904 type = <PCA955X_TYPE_GPIO>;
905 };
906
907 gpio@3 {
908 reg = <3>;
909 type = <PCA955X_TYPE_GPIO>;
910 };
911
912 gpio@4 {
913 reg = <4>;
914 type = <PCA955X_TYPE_GPIO>;
915 };
916
917 gpio@5 {
918 reg = <5>;
919 type = <PCA955X_TYPE_GPIO>;
920 };
921
922 gpio@6 {
923 reg = <6>;
924 type = <PCA955X_TYPE_GPIO>;
925 };
926
927 gpio@7 {
928 reg = <7>;
929 type = <PCA955X_TYPE_GPIO>;
930 };
931
932 gpio@8 {
933 reg = <8>;
934 type = <PCA955X_TYPE_GPIO>;
935 };
936
937 gpio@9 {
938 reg = <9>;
939 type = <PCA955X_TYPE_GPIO>;
940 };
941
942 gpio@10 {
943 reg = <10>;
944 type = <PCA955X_TYPE_GPIO>;
945 };
946
947 gpio@11 {
948 reg = <11>;
949 type = <PCA955X_TYPE_GPIO>;
950 };
951
952 gpio@12 {
953 reg = <12>;
954 type = <PCA955X_TYPE_GPIO>;
955 };
956
957 gpio@13 {
958 reg = <13>;
959 type = <PCA955X_TYPE_GPIO>;
960 };
961
962 gpio@14 {
963 reg = <14>;
964 type = <PCA955X_TYPE_GPIO>;
965 };
966
967 gpio@15 {
968 reg = <15>;
969 type = <PCA955X_TYPE_GPIO>;
970 };
971 };
972
973};
974
975&i2c9 {
976 status = "okay";
977
978 tmp423a@4c {
979 compatible = "ti,tmp423";
980 reg = <0x4c>;
981 };
982
983 tmp423b@4d {
984 compatible = "ti,tmp423";
985 reg = <0x4d>;
986 };
987
988 eeprom@50 {
989 compatible = "atmel,24c128";
990 reg = <0x50>;
991 };
992};
993
994&i2c10 {
995 status = "okay";
996
997 tmp423a@4c {
998 compatible = "ti,tmp423";
999 reg = <0x4c>;
1000 };
1001
1002 tmp423b@4d {
1003 compatible = "ti,tmp423";
1004 reg = <0x4d>;
1005 };
1006
1007 eeprom@50 {
1008 compatible = "atmel,24c128";
1009 reg = <0x50>;
1010 };
1011};
1012
1013&i2c11 {
1014 status = "okay";
1015
1016 tmp275@48 {
1017 compatible = "ti,tmp275";
1018 reg = <0x48>;
1019 };
1020
1021 tmp275@49 {
1022 compatible = "ti,tmp275";
1023 reg = <0x49>;
1024 };
1025
1026 eeprom@50 {
1027 compatible = "atmel,24c64";
1028 reg = <0x50>;
1029 };
1030
1031 eeprom@51 {
1032 compatible = "atmel,24c64";
1033 reg = <0x51>;
1034 };
1035};
1036
1037&i2c12 {
1038 status = "okay";
1039};
1040
1041&i2c13 {
1042 status = "okay";
1043
1044 eeprom@50 {
1045 compatible = "atmel,24c64";
1046 reg = <0x50>;
1047 };
1048};
1049
1050&i2c14 {
1051 status = "okay";
1052
1053 eeprom@50 {
1054 compatible = "atmel,24c64";
1055 reg = <0x50>;
1056 };
1057};
1058
1059&i2c15 {
1060 status = "okay";
1061
1062 eeprom@50 {
1063 compatible = "atmel,24c64";
1064 reg = <0x50>;
1065 };
1066};
1067
1068&vuart1 {
1069 status = "okay";
1070};
1071
1072&vuart2 {
1073 status = "okay";
1074};
1075
1076&lpc_ctrl {
1077 status = "okay";
1078 memory-region = <&flash_memory>;
1079};
1080
1081&mac2 {
1082 status = "okay";
1083 pinctrl-names = "default";
1084 pinctrl-0 = <&pinctrl_rmii3_default>;
1085 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>,
1086 <&syscon ASPEED_CLK_MAC3RCLK>;
1087 clock-names = "MACCLK", "RCLK";
1088 use-ncsi;
1089};
1090
1091&mac3 {
1092 status = "okay";
1093 pinctrl-names = "default";
1094 pinctrl-0 = <&pinctrl_rmii4_default>;
1095 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>,
1096 <&syscon ASPEED_CLK_MAC4RCLK>;
1097 clock-names = "MACCLK", "RCLK";
1098 use-ncsi;
1099};
1100
1101&fmc {
1102 status = "okay";
1103 flash@0 {
1104 status = "okay";
1105 m25p,fast-read;
1106 label = "bmc";
1107 spi-max-frequency = <50000000>;
1108#include "openbmc-flash-layout-128.dtsi"
1109 };
1110};
1111
1112&spi1 {
1113 status = "okay";
1114 pinctrl-names = "default";
1115 pinctrl-0 = <&pinctrl_spi1_default>;
1116
1117 flash@0 {
1118 status = "okay";
1119 m25p,fast-read;
1120 label = "pnor";
1121 spi-max-frequency = <100000000>;
1122 };
1123};