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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * PWM framework driver for Cirrus Logic EP93xx
4 *
5 * Copyright (c) 2009 Matthieu Crapet <mcrapet@gmail.com>
6 * Copyright (c) 2009, 2013 H Hartley Sweeten <hsweeten@visionengravers.com>
7 *
8 * EP9301/02 have only one channel:
9 * platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14)
10 *
11 * EP9307 has only one channel:
12 * platform device ep93xx-pwm.0 - PWMOUT
13 *
14 * EP9312/15 have two channels:
15 * platform device ep93xx-pwm.0 - PWMOUT
16 * platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14)
17 */
18
19#include <linux/module.h>
20#include <linux/mod_devicetable.h>
21#include <linux/platform_device.h>
22#include <linux/slab.h>
23#include <linux/clk.h>
24#include <linux/err.h>
25#include <linux/io.h>
26#include <linux/pwm.h>
27
28#include <asm/div64.h>
29
30#define EP93XX_PWMx_TERM_COUNT 0x00
31#define EP93XX_PWMx_DUTY_CYCLE 0x04
32#define EP93XX_PWMx_ENABLE 0x08
33#define EP93XX_PWMx_INVERT 0x0c
34
35struct ep93xx_pwm {
36 void __iomem *base;
37 struct clk *clk;
38};
39
40static inline struct ep93xx_pwm *to_ep93xx_pwm(struct pwm_chip *chip)
41{
42 return pwmchip_get_drvdata(chip);
43}
44
45static int ep93xx_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
46 const struct pwm_state *state)
47{
48 int ret;
49 struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip);
50 bool enabled = state->enabled;
51 void __iomem *base = ep93xx_pwm->base;
52 unsigned long long c;
53 unsigned long period_cycles;
54 unsigned long duty_cycles;
55 unsigned long term;
56
57 if (state->polarity != pwm->state.polarity) {
58 if (enabled) {
59 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
60 clk_disable_unprepare(ep93xx_pwm->clk);
61 enabled = false;
62 }
63
64 /*
65 * The clock needs to be enabled to access the PWM registers.
66 * Polarity can only be changed when the PWM is disabled.
67 */
68 ret = clk_prepare_enable(ep93xx_pwm->clk);
69 if (ret)
70 return ret;
71
72 if (state->polarity == PWM_POLARITY_INVERSED)
73 writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_INVERT);
74 else
75 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_INVERT);
76
77 clk_disable_unprepare(ep93xx_pwm->clk);
78 }
79
80 if (!state->enabled) {
81 if (enabled) {
82 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
83 clk_disable_unprepare(ep93xx_pwm->clk);
84 }
85
86 return 0;
87 }
88
89 /*
90 * The clock needs to be enabled to access the PWM registers.
91 * Configuration can be changed at any time.
92 */
93 if (!pwm_is_enabled(pwm)) {
94 ret = clk_prepare_enable(ep93xx_pwm->clk);
95 if (ret)
96 return ret;
97 }
98
99 c = clk_get_rate(ep93xx_pwm->clk);
100 c *= state->period;
101 do_div(c, 1000000000);
102 period_cycles = c;
103
104 c = period_cycles;
105 c *= state->duty_cycle;
106 do_div(c, state->period);
107 duty_cycles = c;
108
109 if (period_cycles < 0x10000 && duty_cycles < 0x10000) {
110 term = readw(base + EP93XX_PWMx_TERM_COUNT);
111
112 /* Order is important if PWM is running */
113 if (period_cycles > term) {
114 writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
115 writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
116 } else {
117 writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
118 writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
119 }
120 ret = 0;
121 } else {
122 ret = -EINVAL;
123 }
124
125 if (!pwm_is_enabled(pwm))
126 clk_disable_unprepare(ep93xx_pwm->clk);
127
128 if (ret)
129 return ret;
130
131 if (!enabled) {
132 ret = clk_prepare_enable(ep93xx_pwm->clk);
133 if (ret)
134 return ret;
135
136 writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
137 }
138
139 return 0;
140}
141
142static const struct pwm_ops ep93xx_pwm_ops = {
143 .apply = ep93xx_pwm_apply,
144};
145
146static int ep93xx_pwm_probe(struct platform_device *pdev)
147{
148 struct pwm_chip *chip;
149 struct ep93xx_pwm *ep93xx_pwm;
150 int ret;
151
152 chip = devm_pwmchip_alloc(&pdev->dev, 1, sizeof(*ep93xx_pwm));
153 if (IS_ERR(chip))
154 return PTR_ERR(chip);
155 ep93xx_pwm = to_ep93xx_pwm(chip);
156
157 ep93xx_pwm->base = devm_platform_ioremap_resource(pdev, 0);
158 if (IS_ERR(ep93xx_pwm->base))
159 return PTR_ERR(ep93xx_pwm->base);
160
161 ep93xx_pwm->clk = devm_clk_get(&pdev->dev, "pwm_clk");
162 if (IS_ERR(ep93xx_pwm->clk))
163 return PTR_ERR(ep93xx_pwm->clk);
164
165 chip->ops = &ep93xx_pwm_ops;
166
167 ret = devm_pwmchip_add(&pdev->dev, chip);
168 if (ret < 0)
169 return ret;
170
171 return 0;
172}
173
174static const struct of_device_id ep93xx_pwm_of_ids[] = {
175 { .compatible = "cirrus,ep9301-pwm" },
176 { /* sentinel */}
177};
178MODULE_DEVICE_TABLE(of, ep93xx_pwm_of_ids);
179
180static struct platform_driver ep93xx_pwm_driver = {
181 .driver = {
182 .name = "ep93xx-pwm",
183 .of_match_table = ep93xx_pwm_of_ids,
184 },
185 .probe = ep93xx_pwm_probe,
186};
187module_platform_driver(ep93xx_pwm_driver);
188
189MODULE_DESCRIPTION("Cirrus Logic EP93xx PWM driver");
190MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>");
191MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
192MODULE_ALIAS("platform:ep93xx-pwm");
193MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * PWM framework driver for Cirrus Logic EP93xx
4 *
5 * Copyright (c) 2009 Matthieu Crapet <mcrapet@gmail.com>
6 * Copyright (c) 2009, 2013 H Hartley Sweeten <hsweeten@visionengravers.com>
7 *
8 * EP9301/02 have only one channel:
9 * platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14)
10 *
11 * EP9307 has only one channel:
12 * platform device ep93xx-pwm.0 - PWMOUT
13 *
14 * EP9312/15 have two channels:
15 * platform device ep93xx-pwm.0 - PWMOUT
16 * platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14)
17 */
18
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/slab.h>
22#include <linux/clk.h>
23#include <linux/err.h>
24#include <linux/io.h>
25#include <linux/pwm.h>
26
27#include <asm/div64.h>
28
29#include <linux/soc/cirrus/ep93xx.h> /* for ep93xx_pwm_{acquire,release}_gpio() */
30
31#define EP93XX_PWMx_TERM_COUNT 0x00
32#define EP93XX_PWMx_DUTY_CYCLE 0x04
33#define EP93XX_PWMx_ENABLE 0x08
34#define EP93XX_PWMx_INVERT 0x0c
35
36struct ep93xx_pwm {
37 void __iomem *base;
38 struct clk *clk;
39 struct pwm_chip chip;
40};
41
42static inline struct ep93xx_pwm *to_ep93xx_pwm(struct pwm_chip *chip)
43{
44 return container_of(chip, struct ep93xx_pwm, chip);
45}
46
47static int ep93xx_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
48{
49 struct platform_device *pdev = to_platform_device(chip->dev);
50
51 return ep93xx_pwm_acquire_gpio(pdev);
52}
53
54static void ep93xx_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
55{
56 struct platform_device *pdev = to_platform_device(chip->dev);
57
58 ep93xx_pwm_release_gpio(pdev);
59}
60
61static int ep93xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
62 int duty_ns, int period_ns)
63{
64 struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip);
65 void __iomem *base = ep93xx_pwm->base;
66 unsigned long long c;
67 unsigned long period_cycles;
68 unsigned long duty_cycles;
69 unsigned long term;
70 int ret = 0;
71
72 /*
73 * The clock needs to be enabled to access the PWM registers.
74 * Configuration can be changed at any time.
75 */
76 if (!pwm_is_enabled(pwm)) {
77 ret = clk_enable(ep93xx_pwm->clk);
78 if (ret)
79 return ret;
80 }
81
82 c = clk_get_rate(ep93xx_pwm->clk);
83 c *= period_ns;
84 do_div(c, 1000000000);
85 period_cycles = c;
86
87 c = period_cycles;
88 c *= duty_ns;
89 do_div(c, period_ns);
90 duty_cycles = c;
91
92 if (period_cycles < 0x10000 && duty_cycles < 0x10000) {
93 term = readw(base + EP93XX_PWMx_TERM_COUNT);
94
95 /* Order is important if PWM is running */
96 if (period_cycles > term) {
97 writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
98 writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
99 } else {
100 writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
101 writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
102 }
103 } else {
104 ret = -EINVAL;
105 }
106
107 if (!pwm_is_enabled(pwm))
108 clk_disable(ep93xx_pwm->clk);
109
110 return ret;
111}
112
113static int ep93xx_pwm_polarity(struct pwm_chip *chip, struct pwm_device *pwm,
114 enum pwm_polarity polarity)
115{
116 struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip);
117 int ret;
118
119 /*
120 * The clock needs to be enabled to access the PWM registers.
121 * Polarity can only be changed when the PWM is disabled.
122 */
123 ret = clk_enable(ep93xx_pwm->clk);
124 if (ret)
125 return ret;
126
127 if (polarity == PWM_POLARITY_INVERSED)
128 writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_INVERT);
129 else
130 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_INVERT);
131
132 clk_disable(ep93xx_pwm->clk);
133
134 return 0;
135}
136
137static int ep93xx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
138{
139 struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip);
140 int ret;
141
142 ret = clk_enable(ep93xx_pwm->clk);
143 if (ret)
144 return ret;
145
146 writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
147
148 return 0;
149}
150
151static void ep93xx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
152{
153 struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip);
154
155 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
156 clk_disable(ep93xx_pwm->clk);
157}
158
159static const struct pwm_ops ep93xx_pwm_ops = {
160 .request = ep93xx_pwm_request,
161 .free = ep93xx_pwm_free,
162 .config = ep93xx_pwm_config,
163 .set_polarity = ep93xx_pwm_polarity,
164 .enable = ep93xx_pwm_enable,
165 .disable = ep93xx_pwm_disable,
166 .owner = THIS_MODULE,
167};
168
169static int ep93xx_pwm_probe(struct platform_device *pdev)
170{
171 struct ep93xx_pwm *ep93xx_pwm;
172 struct resource *res;
173 int ret;
174
175 ep93xx_pwm = devm_kzalloc(&pdev->dev, sizeof(*ep93xx_pwm), GFP_KERNEL);
176 if (!ep93xx_pwm)
177 return -ENOMEM;
178
179 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
180 ep93xx_pwm->base = devm_ioremap_resource(&pdev->dev, res);
181 if (IS_ERR(ep93xx_pwm->base))
182 return PTR_ERR(ep93xx_pwm->base);
183
184 ep93xx_pwm->clk = devm_clk_get(&pdev->dev, "pwm_clk");
185 if (IS_ERR(ep93xx_pwm->clk))
186 return PTR_ERR(ep93xx_pwm->clk);
187
188 ep93xx_pwm->chip.dev = &pdev->dev;
189 ep93xx_pwm->chip.ops = &ep93xx_pwm_ops;
190 ep93xx_pwm->chip.base = -1;
191 ep93xx_pwm->chip.npwm = 1;
192
193 ret = pwmchip_add(&ep93xx_pwm->chip);
194 if (ret < 0)
195 return ret;
196
197 platform_set_drvdata(pdev, ep93xx_pwm);
198 return 0;
199}
200
201static int ep93xx_pwm_remove(struct platform_device *pdev)
202{
203 struct ep93xx_pwm *ep93xx_pwm = platform_get_drvdata(pdev);
204
205 return pwmchip_remove(&ep93xx_pwm->chip);
206}
207
208static struct platform_driver ep93xx_pwm_driver = {
209 .driver = {
210 .name = "ep93xx-pwm",
211 },
212 .probe = ep93xx_pwm_probe,
213 .remove = ep93xx_pwm_remove,
214};
215module_platform_driver(ep93xx_pwm_driver);
216
217MODULE_DESCRIPTION("Cirrus Logic EP93xx PWM driver");
218MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>");
219MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
220MODULE_ALIAS("platform:ep93xx-pwm");
221MODULE_LICENSE("GPL");