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1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2019, Intel Corporation. */
3
4#include "ice_common.h"
5#include "ice_flex_pipe.h"
6#include "ice_flow.h"
7#include "ice.h"
8
9static const u32 ice_sect_lkup[ICE_BLK_COUNT][ICE_SECT_COUNT] = {
10 /* SWITCH */
11 {
12 ICE_SID_XLT0_SW,
13 ICE_SID_XLT_KEY_BUILDER_SW,
14 ICE_SID_XLT1_SW,
15 ICE_SID_XLT2_SW,
16 ICE_SID_PROFID_TCAM_SW,
17 ICE_SID_PROFID_REDIR_SW,
18 ICE_SID_FLD_VEC_SW,
19 ICE_SID_CDID_KEY_BUILDER_SW,
20 ICE_SID_CDID_REDIR_SW
21 },
22
23 /* ACL */
24 {
25 ICE_SID_XLT0_ACL,
26 ICE_SID_XLT_KEY_BUILDER_ACL,
27 ICE_SID_XLT1_ACL,
28 ICE_SID_XLT2_ACL,
29 ICE_SID_PROFID_TCAM_ACL,
30 ICE_SID_PROFID_REDIR_ACL,
31 ICE_SID_FLD_VEC_ACL,
32 ICE_SID_CDID_KEY_BUILDER_ACL,
33 ICE_SID_CDID_REDIR_ACL
34 },
35
36 /* FD */
37 {
38 ICE_SID_XLT0_FD,
39 ICE_SID_XLT_KEY_BUILDER_FD,
40 ICE_SID_XLT1_FD,
41 ICE_SID_XLT2_FD,
42 ICE_SID_PROFID_TCAM_FD,
43 ICE_SID_PROFID_REDIR_FD,
44 ICE_SID_FLD_VEC_FD,
45 ICE_SID_CDID_KEY_BUILDER_FD,
46 ICE_SID_CDID_REDIR_FD
47 },
48
49 /* RSS */
50 {
51 ICE_SID_XLT0_RSS,
52 ICE_SID_XLT_KEY_BUILDER_RSS,
53 ICE_SID_XLT1_RSS,
54 ICE_SID_XLT2_RSS,
55 ICE_SID_PROFID_TCAM_RSS,
56 ICE_SID_PROFID_REDIR_RSS,
57 ICE_SID_FLD_VEC_RSS,
58 ICE_SID_CDID_KEY_BUILDER_RSS,
59 ICE_SID_CDID_REDIR_RSS
60 },
61
62 /* PE */
63 {
64 ICE_SID_XLT0_PE,
65 ICE_SID_XLT_KEY_BUILDER_PE,
66 ICE_SID_XLT1_PE,
67 ICE_SID_XLT2_PE,
68 ICE_SID_PROFID_TCAM_PE,
69 ICE_SID_PROFID_REDIR_PE,
70 ICE_SID_FLD_VEC_PE,
71 ICE_SID_CDID_KEY_BUILDER_PE,
72 ICE_SID_CDID_REDIR_PE
73 }
74};
75
76/**
77 * ice_sect_id - returns section ID
78 * @blk: block type
79 * @sect: section type
80 *
81 * This helper function returns the proper section ID given a block type and a
82 * section type.
83 */
84static u32 ice_sect_id(enum ice_block blk, enum ice_sect sect)
85{
86 return ice_sect_lkup[blk][sect];
87}
88
89/**
90 * ice_hw_ptype_ena - check if the PTYPE is enabled or not
91 * @hw: pointer to the HW structure
92 * @ptype: the hardware PTYPE
93 */
94bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype)
95{
96 return ptype < ICE_FLOW_PTYPE_MAX &&
97 test_bit(ptype, hw->hw_ptype);
98}
99
100/* Key creation */
101
102#define ICE_DC_KEY 0x1 /* don't care */
103#define ICE_DC_KEYINV 0x1
104#define ICE_NM_KEY 0x0 /* never match */
105#define ICE_NM_KEYINV 0x0
106#define ICE_0_KEY 0x1 /* match 0 */
107#define ICE_0_KEYINV 0x0
108#define ICE_1_KEY 0x0 /* match 1 */
109#define ICE_1_KEYINV 0x1
110
111/**
112 * ice_gen_key_word - generate 16-bits of a key/mask word
113 * @val: the value
114 * @valid: valid bits mask (change only the valid bits)
115 * @dont_care: don't care mask
116 * @nvr_mtch: never match mask
117 * @key: pointer to an array of where the resulting key portion
118 * @key_inv: pointer to an array of where the resulting key invert portion
119 *
120 * This function generates 16-bits from a 8-bit value, an 8-bit don't care mask
121 * and an 8-bit never match mask. The 16-bits of output are divided into 8 bits
122 * of key and 8 bits of key invert.
123 *
124 * '0' = b01, always match a 0 bit
125 * '1' = b10, always match a 1 bit
126 * '?' = b11, don't care bit (always matches)
127 * '~' = b00, never match bit
128 *
129 * Input:
130 * val: b0 1 0 1 0 1
131 * dont_care: b0 0 1 1 0 0
132 * never_mtch: b0 0 0 0 1 1
133 * ------------------------------
134 * Result: key: b01 10 11 11 00 00
135 */
136static int
137ice_gen_key_word(u8 val, u8 valid, u8 dont_care, u8 nvr_mtch, u8 *key,
138 u8 *key_inv)
139{
140 u8 in_key = *key, in_key_inv = *key_inv;
141 u8 i;
142
143 /* 'dont_care' and 'nvr_mtch' masks cannot overlap */
144 if ((dont_care ^ nvr_mtch) != (dont_care | nvr_mtch))
145 return -EIO;
146
147 *key = 0;
148 *key_inv = 0;
149
150 /* encode the 8 bits into 8-bit key and 8-bit key invert */
151 for (i = 0; i < 8; i++) {
152 *key >>= 1;
153 *key_inv >>= 1;
154
155 if (!(valid & 0x1)) { /* change only valid bits */
156 *key |= (in_key & 0x1) << 7;
157 *key_inv |= (in_key_inv & 0x1) << 7;
158 } else if (dont_care & 0x1) { /* don't care bit */
159 *key |= ICE_DC_KEY << 7;
160 *key_inv |= ICE_DC_KEYINV << 7;
161 } else if (nvr_mtch & 0x1) { /* never match bit */
162 *key |= ICE_NM_KEY << 7;
163 *key_inv |= ICE_NM_KEYINV << 7;
164 } else if (val & 0x01) { /* exact 1 match */
165 *key |= ICE_1_KEY << 7;
166 *key_inv |= ICE_1_KEYINV << 7;
167 } else { /* exact 0 match */
168 *key |= ICE_0_KEY << 7;
169 *key_inv |= ICE_0_KEYINV << 7;
170 }
171
172 dont_care >>= 1;
173 nvr_mtch >>= 1;
174 valid >>= 1;
175 val >>= 1;
176 in_key >>= 1;
177 in_key_inv >>= 1;
178 }
179
180 return 0;
181}
182
183/**
184 * ice_bits_max_set - determine if the number of bits set is within a maximum
185 * @mask: pointer to the byte array which is the mask
186 * @size: the number of bytes in the mask
187 * @max: the max number of set bits
188 *
189 * This function determines if there are at most 'max' number of bits set in an
190 * array. Returns true if the number for bits set is <= max or will return false
191 * otherwise.
192 */
193static bool ice_bits_max_set(const u8 *mask, u16 size, u16 max)
194{
195 u16 count = 0;
196 u16 i;
197
198 /* check each byte */
199 for (i = 0; i < size; i++) {
200 /* if 0, go to next byte */
201 if (!mask[i])
202 continue;
203
204 /* We know there is at least one set bit in this byte because of
205 * the above check; if we already have found 'max' number of
206 * bits set, then we can return failure now.
207 */
208 if (count == max)
209 return false;
210
211 /* count the bits in this byte, checking threshold */
212 count += hweight8(mask[i]);
213 if (count > max)
214 return false;
215 }
216
217 return true;
218}
219
220/**
221 * ice_set_key - generate a variable sized key with multiples of 16-bits
222 * @key: pointer to where the key will be stored
223 * @size: the size of the complete key in bytes (must be even)
224 * @val: array of 8-bit values that makes up the value portion of the key
225 * @upd: array of 8-bit masks that determine what key portion to update
226 * @dc: array of 8-bit masks that make up the don't care mask
227 * @nm: array of 8-bit masks that make up the never match mask
228 * @off: the offset of the first byte in the key to update
229 * @len: the number of bytes in the key update
230 *
231 * This function generates a key from a value, a don't care mask and a never
232 * match mask.
233 * upd, dc, and nm are optional parameters, and can be NULL:
234 * upd == NULL --> upd mask is all 1's (update all bits)
235 * dc == NULL --> dc mask is all 0's (no don't care bits)
236 * nm == NULL --> nm mask is all 0's (no never match bits)
237 */
238static int
239ice_set_key(u8 *key, u16 size, u8 *val, u8 *upd, u8 *dc, u8 *nm, u16 off,
240 u16 len)
241{
242 u16 half_size;
243 u16 i;
244
245 /* size must be a multiple of 2 bytes. */
246 if (size % 2)
247 return -EIO;
248
249 half_size = size / 2;
250 if (off + len > half_size)
251 return -EIO;
252
253 /* Make sure at most one bit is set in the never match mask. Having more
254 * than one never match mask bit set will cause HW to consume excessive
255 * power otherwise; this is a power management efficiency check.
256 */
257#define ICE_NVR_MTCH_BITS_MAX 1
258 if (nm && !ice_bits_max_set(nm, len, ICE_NVR_MTCH_BITS_MAX))
259 return -EIO;
260
261 for (i = 0; i < len; i++)
262 if (ice_gen_key_word(val[i], upd ? upd[i] : 0xff,
263 dc ? dc[i] : 0, nm ? nm[i] : 0,
264 key + off + i, key + half_size + off + i))
265 return -EIO;
266
267 return 0;
268}
269
270/**
271 * ice_acquire_change_lock
272 * @hw: pointer to the HW structure
273 * @access: access type (read or write)
274 *
275 * This function will request ownership of the change lock.
276 */
277int
278ice_acquire_change_lock(struct ice_hw *hw, enum ice_aq_res_access_type access)
279{
280 return ice_acquire_res(hw, ICE_CHANGE_LOCK_RES_ID, access,
281 ICE_CHANGE_LOCK_TIMEOUT);
282}
283
284/**
285 * ice_release_change_lock
286 * @hw: pointer to the HW structure
287 *
288 * This function will release the change lock using the proper Admin Command.
289 */
290void ice_release_change_lock(struct ice_hw *hw)
291{
292 ice_release_res(hw, ICE_CHANGE_LOCK_RES_ID);
293}
294
295/**
296 * ice_get_open_tunnel_port - retrieve an open tunnel port
297 * @hw: pointer to the HW structure
298 * @port: returns open port
299 * @type: type of tunnel, can be TNL_LAST if it doesn't matter
300 */
301bool
302ice_get_open_tunnel_port(struct ice_hw *hw, u16 *port,
303 enum ice_tunnel_type type)
304{
305 bool res = false;
306 u16 i;
307
308 mutex_lock(&hw->tnl_lock);
309
310 for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++)
311 if (hw->tnl.tbl[i].valid && hw->tnl.tbl[i].port &&
312 (type == TNL_LAST || type == hw->tnl.tbl[i].type)) {
313 *port = hw->tnl.tbl[i].port;
314 res = true;
315 break;
316 }
317
318 mutex_unlock(&hw->tnl_lock);
319
320 return res;
321}
322
323/**
324 * ice_upd_dvm_boost_entry
325 * @hw: pointer to the HW structure
326 * @entry: pointer to double vlan boost entry info
327 */
328static int
329ice_upd_dvm_boost_entry(struct ice_hw *hw, struct ice_dvm_entry *entry)
330{
331 struct ice_boost_tcam_section *sect_rx, *sect_tx;
332 int status = -ENOSPC;
333 struct ice_buf_build *bld;
334 u8 val, dc, nm;
335
336 bld = ice_pkg_buf_alloc(hw);
337 if (!bld)
338 return -ENOMEM;
339
340 /* allocate 2 sections, one for Rx parser, one for Tx parser */
341 if (ice_pkg_buf_reserve_section(bld, 2))
342 goto ice_upd_dvm_boost_entry_err;
343
344 sect_rx = ice_pkg_buf_alloc_section(bld, ICE_SID_RXPARSER_BOOST_TCAM,
345 struct_size(sect_rx, tcam, 1));
346 if (!sect_rx)
347 goto ice_upd_dvm_boost_entry_err;
348 sect_rx->count = cpu_to_le16(1);
349
350 sect_tx = ice_pkg_buf_alloc_section(bld, ICE_SID_TXPARSER_BOOST_TCAM,
351 struct_size(sect_tx, tcam, 1));
352 if (!sect_tx)
353 goto ice_upd_dvm_boost_entry_err;
354 sect_tx->count = cpu_to_le16(1);
355
356 /* copy original boost entry to update package buffer */
357 memcpy(sect_rx->tcam, entry->boost_entry, sizeof(*sect_rx->tcam));
358
359 /* re-write the don't care and never match bits accordingly */
360 if (entry->enable) {
361 /* all bits are don't care */
362 val = 0x00;
363 dc = 0xFF;
364 nm = 0x00;
365 } else {
366 /* disable, one never match bit, the rest are don't care */
367 val = 0x00;
368 dc = 0xF7;
369 nm = 0x08;
370 }
371
372 ice_set_key((u8 *)§_rx->tcam[0].key, sizeof(sect_rx->tcam[0].key),
373 &val, NULL, &dc, &nm, 0, sizeof(u8));
374
375 /* exact copy of entry to Tx section entry */
376 memcpy(sect_tx->tcam, sect_rx->tcam, sizeof(*sect_tx->tcam));
377
378 status = ice_update_pkg_no_lock(hw, ice_pkg_buf(bld), 1);
379
380ice_upd_dvm_boost_entry_err:
381 ice_pkg_buf_free(hw, bld);
382
383 return status;
384}
385
386/**
387 * ice_set_dvm_boost_entries
388 * @hw: pointer to the HW structure
389 *
390 * Enable double vlan by updating the appropriate boost tcam entries.
391 */
392int ice_set_dvm_boost_entries(struct ice_hw *hw)
393{
394 u16 i;
395
396 for (i = 0; i < hw->dvm_upd.count; i++) {
397 int status;
398
399 status = ice_upd_dvm_boost_entry(hw, &hw->dvm_upd.tbl[i]);
400 if (status)
401 return status;
402 }
403
404 return 0;
405}
406
407/**
408 * ice_tunnel_idx_to_entry - convert linear index to the sparse one
409 * @hw: pointer to the HW structure
410 * @type: type of tunnel
411 * @idx: linear index
412 *
413 * Stack assumes we have 2 linear tables with indexes [0, count_valid),
414 * but really the port table may be sprase, and types are mixed, so convert
415 * the stack index into the device index.
416 */
417static u16 ice_tunnel_idx_to_entry(struct ice_hw *hw, enum ice_tunnel_type type,
418 u16 idx)
419{
420 u16 i;
421
422 for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++)
423 if (hw->tnl.tbl[i].valid &&
424 hw->tnl.tbl[i].type == type &&
425 idx-- == 0)
426 return i;
427
428 WARN_ON_ONCE(1);
429 return 0;
430}
431
432/**
433 * ice_create_tunnel
434 * @hw: pointer to the HW structure
435 * @index: device table entry
436 * @type: type of tunnel
437 * @port: port of tunnel to create
438 *
439 * Create a tunnel by updating the parse graph in the parser. We do that by
440 * creating a package buffer with the tunnel info and issuing an update package
441 * command.
442 */
443static int
444ice_create_tunnel(struct ice_hw *hw, u16 index,
445 enum ice_tunnel_type type, u16 port)
446{
447 struct ice_boost_tcam_section *sect_rx, *sect_tx;
448 struct ice_buf_build *bld;
449 int status = -ENOSPC;
450
451 mutex_lock(&hw->tnl_lock);
452
453 bld = ice_pkg_buf_alloc(hw);
454 if (!bld) {
455 status = -ENOMEM;
456 goto ice_create_tunnel_end;
457 }
458
459 /* allocate 2 sections, one for Rx parser, one for Tx parser */
460 if (ice_pkg_buf_reserve_section(bld, 2))
461 goto ice_create_tunnel_err;
462
463 sect_rx = ice_pkg_buf_alloc_section(bld, ICE_SID_RXPARSER_BOOST_TCAM,
464 struct_size(sect_rx, tcam, 1));
465 if (!sect_rx)
466 goto ice_create_tunnel_err;
467 sect_rx->count = cpu_to_le16(1);
468
469 sect_tx = ice_pkg_buf_alloc_section(bld, ICE_SID_TXPARSER_BOOST_TCAM,
470 struct_size(sect_tx, tcam, 1));
471 if (!sect_tx)
472 goto ice_create_tunnel_err;
473 sect_tx->count = cpu_to_le16(1);
474
475 /* copy original boost entry to update package buffer */
476 memcpy(sect_rx->tcam, hw->tnl.tbl[index].boost_entry,
477 sizeof(*sect_rx->tcam));
478
479 /* over-write the never-match dest port key bits with the encoded port
480 * bits
481 */
482 ice_set_key((u8 *)§_rx->tcam[0].key, sizeof(sect_rx->tcam[0].key),
483 (u8 *)&port, NULL, NULL, NULL,
484 (u16)offsetof(struct ice_boost_key_value, hv_dst_port_key),
485 sizeof(sect_rx->tcam[0].key.key.hv_dst_port_key));
486
487 /* exact copy of entry to Tx section entry */
488 memcpy(sect_tx->tcam, sect_rx->tcam, sizeof(*sect_tx->tcam));
489
490 status = ice_update_pkg(hw, ice_pkg_buf(bld), 1);
491 if (!status)
492 hw->tnl.tbl[index].port = port;
493
494ice_create_tunnel_err:
495 ice_pkg_buf_free(hw, bld);
496
497ice_create_tunnel_end:
498 mutex_unlock(&hw->tnl_lock);
499
500 return status;
501}
502
503/**
504 * ice_destroy_tunnel
505 * @hw: pointer to the HW structure
506 * @index: device table entry
507 * @type: type of tunnel
508 * @port: port of tunnel to destroy (ignored if the all parameter is true)
509 *
510 * Destroys a tunnel or all tunnels by creating an update package buffer
511 * targeting the specific updates requested and then performing an update
512 * package.
513 */
514static int
515ice_destroy_tunnel(struct ice_hw *hw, u16 index, enum ice_tunnel_type type,
516 u16 port)
517{
518 struct ice_boost_tcam_section *sect_rx, *sect_tx;
519 struct ice_buf_build *bld;
520 int status = -ENOSPC;
521
522 mutex_lock(&hw->tnl_lock);
523
524 if (WARN_ON(!hw->tnl.tbl[index].valid ||
525 hw->tnl.tbl[index].type != type ||
526 hw->tnl.tbl[index].port != port)) {
527 status = -EIO;
528 goto ice_destroy_tunnel_end;
529 }
530
531 bld = ice_pkg_buf_alloc(hw);
532 if (!bld) {
533 status = -ENOMEM;
534 goto ice_destroy_tunnel_end;
535 }
536
537 /* allocate 2 sections, one for Rx parser, one for Tx parser */
538 if (ice_pkg_buf_reserve_section(bld, 2))
539 goto ice_destroy_tunnel_err;
540
541 sect_rx = ice_pkg_buf_alloc_section(bld, ICE_SID_RXPARSER_BOOST_TCAM,
542 struct_size(sect_rx, tcam, 1));
543 if (!sect_rx)
544 goto ice_destroy_tunnel_err;
545 sect_rx->count = cpu_to_le16(1);
546
547 sect_tx = ice_pkg_buf_alloc_section(bld, ICE_SID_TXPARSER_BOOST_TCAM,
548 struct_size(sect_tx, tcam, 1));
549 if (!sect_tx)
550 goto ice_destroy_tunnel_err;
551 sect_tx->count = cpu_to_le16(1);
552
553 /* copy original boost entry to update package buffer, one copy to Rx
554 * section, another copy to the Tx section
555 */
556 memcpy(sect_rx->tcam, hw->tnl.tbl[index].boost_entry,
557 sizeof(*sect_rx->tcam));
558 memcpy(sect_tx->tcam, hw->tnl.tbl[index].boost_entry,
559 sizeof(*sect_tx->tcam));
560
561 status = ice_update_pkg(hw, ice_pkg_buf(bld), 1);
562 if (!status)
563 hw->tnl.tbl[index].port = 0;
564
565ice_destroy_tunnel_err:
566 ice_pkg_buf_free(hw, bld);
567
568ice_destroy_tunnel_end:
569 mutex_unlock(&hw->tnl_lock);
570
571 return status;
572}
573
574int ice_udp_tunnel_set_port(struct net_device *netdev, unsigned int table,
575 unsigned int idx, struct udp_tunnel_info *ti)
576{
577 struct ice_netdev_priv *np = netdev_priv(netdev);
578 struct ice_vsi *vsi = np->vsi;
579 struct ice_pf *pf = vsi->back;
580 enum ice_tunnel_type tnl_type;
581 int status;
582 u16 index;
583
584 tnl_type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? TNL_VXLAN : TNL_GENEVE;
585 index = ice_tunnel_idx_to_entry(&pf->hw, tnl_type, idx);
586
587 status = ice_create_tunnel(&pf->hw, index, tnl_type, ntohs(ti->port));
588 if (status) {
589 netdev_err(netdev, "Error adding UDP tunnel - %d\n",
590 status);
591 return -EIO;
592 }
593
594 udp_tunnel_nic_set_port_priv(netdev, table, idx, index);
595 return 0;
596}
597
598int ice_udp_tunnel_unset_port(struct net_device *netdev, unsigned int table,
599 unsigned int idx, struct udp_tunnel_info *ti)
600{
601 struct ice_netdev_priv *np = netdev_priv(netdev);
602 struct ice_vsi *vsi = np->vsi;
603 struct ice_pf *pf = vsi->back;
604 enum ice_tunnel_type tnl_type;
605 int status;
606
607 tnl_type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? TNL_VXLAN : TNL_GENEVE;
608
609 status = ice_destroy_tunnel(&pf->hw, ti->hw_priv, tnl_type,
610 ntohs(ti->port));
611 if (status) {
612 netdev_err(netdev, "Error removing UDP tunnel - %d\n",
613 status);
614 return -EIO;
615 }
616
617 return 0;
618}
619
620/**
621 * ice_find_prot_off - find prot ID and offset pair, based on prof and FV index
622 * @hw: pointer to the hardware structure
623 * @blk: hardware block
624 * @prof: profile ID
625 * @fv_idx: field vector word index
626 * @prot: variable to receive the protocol ID
627 * @off: variable to receive the protocol offset
628 */
629int
630ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 fv_idx,
631 u8 *prot, u16 *off)
632{
633 struct ice_fv_word *fv_ext;
634
635 if (prof >= hw->blk[blk].es.count)
636 return -EINVAL;
637
638 if (fv_idx >= hw->blk[blk].es.fvw)
639 return -EINVAL;
640
641 fv_ext = hw->blk[blk].es.t + (prof * hw->blk[blk].es.fvw);
642
643 *prot = fv_ext[fv_idx].prot_id;
644 *off = fv_ext[fv_idx].off;
645
646 return 0;
647}
648
649/* PTG Management */
650
651/**
652 * ice_ptg_find_ptype - Search for packet type group using packet type (ptype)
653 * @hw: pointer to the hardware structure
654 * @blk: HW block
655 * @ptype: the ptype to search for
656 * @ptg: pointer to variable that receives the PTG
657 *
658 * This function will search the PTGs for a particular ptype, returning the
659 * PTG ID that contains it through the PTG parameter, with the value of
660 * ICE_DEFAULT_PTG (0) meaning it is part the default PTG.
661 */
662static int
663ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg)
664{
665 if (ptype >= ICE_XLT1_CNT || !ptg)
666 return -EINVAL;
667
668 *ptg = hw->blk[blk].xlt1.ptypes[ptype].ptg;
669 return 0;
670}
671
672/**
673 * ice_ptg_alloc_val - Allocates a new packet type group ID by value
674 * @hw: pointer to the hardware structure
675 * @blk: HW block
676 * @ptg: the PTG to allocate
677 *
678 * This function allocates a given packet type group ID specified by the PTG
679 * parameter.
680 */
681static void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg)
682{
683 hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true;
684}
685
686/**
687 * ice_ptg_remove_ptype - Removes ptype from a particular packet type group
688 * @hw: pointer to the hardware structure
689 * @blk: HW block
690 * @ptype: the ptype to remove
691 * @ptg: the PTG to remove the ptype from
692 *
693 * This function will remove the ptype from the specific PTG, and move it to
694 * the default PTG (ICE_DEFAULT_PTG).
695 */
696static int
697ice_ptg_remove_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
698{
699 struct ice_ptg_ptype **ch;
700 struct ice_ptg_ptype *p;
701
702 if (ptype > ICE_XLT1_CNT - 1)
703 return -EINVAL;
704
705 if (!hw->blk[blk].xlt1.ptg_tbl[ptg].in_use)
706 return -ENOENT;
707
708 /* Should not happen if .in_use is set, bad config */
709 if (!hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype)
710 return -EIO;
711
712 /* find the ptype within this PTG, and bypass the link over it */
713 p = hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;
714 ch = &hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;
715 while (p) {
716 if (ptype == (p - hw->blk[blk].xlt1.ptypes)) {
717 *ch = p->next_ptype;
718 break;
719 }
720
721 ch = &p->next_ptype;
722 p = p->next_ptype;
723 }
724
725 hw->blk[blk].xlt1.ptypes[ptype].ptg = ICE_DEFAULT_PTG;
726 hw->blk[blk].xlt1.ptypes[ptype].next_ptype = NULL;
727
728 return 0;
729}
730
731/**
732 * ice_ptg_add_mv_ptype - Adds/moves ptype to a particular packet type group
733 * @hw: pointer to the hardware structure
734 * @blk: HW block
735 * @ptype: the ptype to add or move
736 * @ptg: the PTG to add or move the ptype to
737 *
738 * This function will either add or move a ptype to a particular PTG depending
739 * on if the ptype is already part of another group. Note that using a
740 * destination PTG ID of ICE_DEFAULT_PTG (0) will move the ptype to the
741 * default PTG.
742 */
743static int
744ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
745{
746 u8 original_ptg;
747 int status;
748
749 if (ptype > ICE_XLT1_CNT - 1)
750 return -EINVAL;
751
752 if (!hw->blk[blk].xlt1.ptg_tbl[ptg].in_use && ptg != ICE_DEFAULT_PTG)
753 return -ENOENT;
754
755 status = ice_ptg_find_ptype(hw, blk, ptype, &original_ptg);
756 if (status)
757 return status;
758
759 /* Is ptype already in the correct PTG? */
760 if (original_ptg == ptg)
761 return 0;
762
763 /* Remove from original PTG and move back to the default PTG */
764 if (original_ptg != ICE_DEFAULT_PTG)
765 ice_ptg_remove_ptype(hw, blk, ptype, original_ptg);
766
767 /* Moving to default PTG? Then we're done with this request */
768 if (ptg == ICE_DEFAULT_PTG)
769 return 0;
770
771 /* Add ptype to PTG at beginning of list */
772 hw->blk[blk].xlt1.ptypes[ptype].next_ptype =
773 hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;
774 hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype =
775 &hw->blk[blk].xlt1.ptypes[ptype];
776
777 hw->blk[blk].xlt1.ptypes[ptype].ptg = ptg;
778 hw->blk[blk].xlt1.t[ptype] = ptg;
779
780 return 0;
781}
782
783/* Block / table size info */
784struct ice_blk_size_details {
785 u16 xlt1; /* # XLT1 entries */
786 u16 xlt2; /* # XLT2 entries */
787 u16 prof_tcam; /* # profile ID TCAM entries */
788 u16 prof_id; /* # profile IDs */
789 u8 prof_cdid_bits; /* # CDID one-hot bits used in key */
790 u16 prof_redir; /* # profile redirection entries */
791 u16 es; /* # extraction sequence entries */
792 u16 fvw; /* # field vector words */
793 u8 overwrite; /* overwrite existing entries allowed */
794 u8 reverse; /* reverse FV order */
795};
796
797static const struct ice_blk_size_details blk_sizes[ICE_BLK_COUNT] = {
798 /**
799 * Table Definitions
800 * XLT1 - Number of entries in XLT1 table
801 * XLT2 - Number of entries in XLT2 table
802 * TCAM - Number of entries Profile ID TCAM table
803 * CDID - Control Domain ID of the hardware block
804 * PRED - Number of entries in the Profile Redirection Table
805 * FV - Number of entries in the Field Vector
806 * FVW - Width (in WORDs) of the Field Vector
807 * OVR - Overwrite existing table entries
808 * REV - Reverse FV
809 */
810 /* XLT1 , XLT2 ,TCAM, PID,CDID,PRED, FV, FVW */
811 /* Overwrite , Reverse FV */
812 /* SW */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 256, 0, 256, 256, 48,
813 false, false },
814 /* ACL */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 32,
815 false, false },
816 /* FD */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 24,
817 false, true },
818 /* RSS */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 24,
819 true, true },
820 /* PE */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 64, 32, 0, 32, 32, 24,
821 false, false },
822};
823
824enum ice_sid_all {
825 ICE_SID_XLT1_OFF = 0,
826 ICE_SID_XLT2_OFF,
827 ICE_SID_PR_OFF,
828 ICE_SID_PR_REDIR_OFF,
829 ICE_SID_ES_OFF,
830 ICE_SID_OFF_COUNT,
831};
832
833/* Characteristic handling */
834
835/**
836 * ice_match_prop_lst - determine if properties of two lists match
837 * @list1: first properties list
838 * @list2: second properties list
839 *
840 * Count, cookies and the order must match in order to be considered equivalent.
841 */
842static bool
843ice_match_prop_lst(struct list_head *list1, struct list_head *list2)
844{
845 struct ice_vsig_prof *tmp1;
846 struct ice_vsig_prof *tmp2;
847 u16 chk_count = 0;
848 u16 count = 0;
849
850 /* compare counts */
851 list_for_each_entry(tmp1, list1, list)
852 count++;
853 list_for_each_entry(tmp2, list2, list)
854 chk_count++;
855 if (!count || count != chk_count)
856 return false;
857
858 tmp1 = list_first_entry(list1, struct ice_vsig_prof, list);
859 tmp2 = list_first_entry(list2, struct ice_vsig_prof, list);
860
861 /* profile cookies must compare, and in the exact same order to take
862 * into account priority
863 */
864 while (count--) {
865 if (tmp2->profile_cookie != tmp1->profile_cookie)
866 return false;
867
868 tmp1 = list_next_entry(tmp1, list);
869 tmp2 = list_next_entry(tmp2, list);
870 }
871
872 return true;
873}
874
875/* VSIG Management */
876
877/**
878 * ice_vsig_find_vsi - find a VSIG that contains a specified VSI
879 * @hw: pointer to the hardware structure
880 * @blk: HW block
881 * @vsi: VSI of interest
882 * @vsig: pointer to receive the VSI group
883 *
884 * This function will lookup the VSI entry in the XLT2 list and return
885 * the VSI group its associated with.
886 */
887static int
888ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
889{
890 if (!vsig || vsi >= ICE_MAX_VSI)
891 return -EINVAL;
892
893 /* As long as there's a default or valid VSIG associated with the input
894 * VSI, the functions returns a success. Any handling of VSIG will be
895 * done by the following add, update or remove functions.
896 */
897 *vsig = hw->blk[blk].xlt2.vsis[vsi].vsig;
898
899 return 0;
900}
901
902/**
903 * ice_vsig_alloc_val - allocate a new VSIG by value
904 * @hw: pointer to the hardware structure
905 * @blk: HW block
906 * @vsig: the VSIG to allocate
907 *
908 * This function will allocate a given VSIG specified by the VSIG parameter.
909 */
910static u16 ice_vsig_alloc_val(struct ice_hw *hw, enum ice_block blk, u16 vsig)
911{
912 u16 idx = vsig & ICE_VSIG_IDX_M;
913
914 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use) {
915 INIT_LIST_HEAD(&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst);
916 hw->blk[blk].xlt2.vsig_tbl[idx].in_use = true;
917 }
918
919 return ICE_VSIG_VALUE(idx, hw->pf_id);
920}
921
922/**
923 * ice_vsig_alloc - Finds a free entry and allocates a new VSIG
924 * @hw: pointer to the hardware structure
925 * @blk: HW block
926 *
927 * This function will iterate through the VSIG list and mark the first
928 * unused entry for the new VSIG entry as used and return that value.
929 */
930static u16 ice_vsig_alloc(struct ice_hw *hw, enum ice_block blk)
931{
932 u16 i;
933
934 for (i = 1; i < ICE_MAX_VSIGS; i++)
935 if (!hw->blk[blk].xlt2.vsig_tbl[i].in_use)
936 return ice_vsig_alloc_val(hw, blk, i);
937
938 return ICE_DEFAULT_VSIG;
939}
940
941/**
942 * ice_find_dup_props_vsig - find VSI group with a specified set of properties
943 * @hw: pointer to the hardware structure
944 * @blk: HW block
945 * @chs: characteristic list
946 * @vsig: returns the VSIG with the matching profiles, if found
947 *
948 * Each VSIG is associated with a characteristic set; i.e. all VSIs under
949 * a group have the same characteristic set. To check if there exists a VSIG
950 * which has the same characteristics as the input characteristics; this
951 * function will iterate through the XLT2 list and return the VSIG that has a
952 * matching configuration. In order to make sure that priorities are accounted
953 * for, the list must match exactly, including the order in which the
954 * characteristics are listed.
955 */
956static int
957ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
958 struct list_head *chs, u16 *vsig)
959{
960 struct ice_xlt2 *xlt2 = &hw->blk[blk].xlt2;
961 u16 i;
962
963 for (i = 0; i < xlt2->count; i++)
964 if (xlt2->vsig_tbl[i].in_use &&
965 ice_match_prop_lst(chs, &xlt2->vsig_tbl[i].prop_lst)) {
966 *vsig = ICE_VSIG_VALUE(i, hw->pf_id);
967 return 0;
968 }
969
970 return -ENOENT;
971}
972
973/**
974 * ice_vsig_free - free VSI group
975 * @hw: pointer to the hardware structure
976 * @blk: HW block
977 * @vsig: VSIG to remove
978 *
979 * The function will remove all VSIs associated with the input VSIG and move
980 * them to the DEFAULT_VSIG and mark the VSIG available.
981 */
982static int ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
983{
984 struct ice_vsig_prof *dtmp, *del;
985 struct ice_vsig_vsi *vsi_cur;
986 u16 idx;
987
988 idx = vsig & ICE_VSIG_IDX_M;
989 if (idx >= ICE_MAX_VSIGS)
990 return -EINVAL;
991
992 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
993 return -ENOENT;
994
995 hw->blk[blk].xlt2.vsig_tbl[idx].in_use = false;
996
997 vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
998 /* If the VSIG has at least 1 VSI then iterate through the
999 * list and remove the VSIs before deleting the group.
1000 */
1001 if (vsi_cur) {
1002 /* remove all vsis associated with this VSIG XLT2 entry */
1003 do {
1004 struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
1005
1006 vsi_cur->vsig = ICE_DEFAULT_VSIG;
1007 vsi_cur->changed = 1;
1008 vsi_cur->next_vsi = NULL;
1009 vsi_cur = tmp;
1010 } while (vsi_cur);
1011
1012 /* NULL terminate head of VSI list */
1013 hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;
1014 }
1015
1016 /* free characteristic list */
1017 list_for_each_entry_safe(del, dtmp,
1018 &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
1019 list) {
1020 list_del(&del->list);
1021 devm_kfree(ice_hw_to_dev(hw), del);
1022 }
1023
1024 /* if VSIG characteristic list was cleared for reset
1025 * re-initialize the list head
1026 */
1027 INIT_LIST_HEAD(&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst);
1028
1029 return 0;
1030}
1031
1032/**
1033 * ice_vsig_remove_vsi - remove VSI from VSIG
1034 * @hw: pointer to the hardware structure
1035 * @blk: HW block
1036 * @vsi: VSI to remove
1037 * @vsig: VSI group to remove from
1038 *
1039 * The function will remove the input VSI from its VSI group and move it
1040 * to the DEFAULT_VSIG.
1041 */
1042static int
1043ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
1044{
1045 struct ice_vsig_vsi **vsi_head, *vsi_cur, *vsi_tgt;
1046 u16 idx;
1047
1048 idx = vsig & ICE_VSIG_IDX_M;
1049
1050 if (vsi >= ICE_MAX_VSI || idx >= ICE_MAX_VSIGS)
1051 return -EINVAL;
1052
1053 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
1054 return -ENOENT;
1055
1056 /* entry already in default VSIG, don't have to remove */
1057 if (idx == ICE_DEFAULT_VSIG)
1058 return 0;
1059
1060 vsi_head = &hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
1061 if (!(*vsi_head))
1062 return -EIO;
1063
1064 vsi_tgt = &hw->blk[blk].xlt2.vsis[vsi];
1065 vsi_cur = (*vsi_head);
1066
1067 /* iterate the VSI list, skip over the entry to be removed */
1068 while (vsi_cur) {
1069 if (vsi_tgt == vsi_cur) {
1070 (*vsi_head) = vsi_cur->next_vsi;
1071 break;
1072 }
1073 vsi_head = &vsi_cur->next_vsi;
1074 vsi_cur = vsi_cur->next_vsi;
1075 }
1076
1077 /* verify if VSI was removed from group list */
1078 if (!vsi_cur)
1079 return -ENOENT;
1080
1081 vsi_cur->vsig = ICE_DEFAULT_VSIG;
1082 vsi_cur->changed = 1;
1083 vsi_cur->next_vsi = NULL;
1084
1085 return 0;
1086}
1087
1088/**
1089 * ice_vsig_add_mv_vsi - add or move a VSI to a VSI group
1090 * @hw: pointer to the hardware structure
1091 * @blk: HW block
1092 * @vsi: VSI to move
1093 * @vsig: destination VSI group
1094 *
1095 * This function will move or add the input VSI to the target VSIG.
1096 * The function will find the original VSIG the VSI belongs to and
1097 * move the entry to the DEFAULT_VSIG, update the original VSIG and
1098 * then move entry to the new VSIG.
1099 */
1100static int
1101ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
1102{
1103 struct ice_vsig_vsi *tmp;
1104 u16 orig_vsig, idx;
1105 int status;
1106
1107 idx = vsig & ICE_VSIG_IDX_M;
1108
1109 if (vsi >= ICE_MAX_VSI || idx >= ICE_MAX_VSIGS)
1110 return -EINVAL;
1111
1112 /* if VSIG not in use and VSIG is not default type this VSIG
1113 * doesn't exist.
1114 */
1115 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use &&
1116 vsig != ICE_DEFAULT_VSIG)
1117 return -ENOENT;
1118
1119 status = ice_vsig_find_vsi(hw, blk, vsi, &orig_vsig);
1120 if (status)
1121 return status;
1122
1123 /* no update required if vsigs match */
1124 if (orig_vsig == vsig)
1125 return 0;
1126
1127 if (orig_vsig != ICE_DEFAULT_VSIG) {
1128 /* remove entry from orig_vsig and add to default VSIG */
1129 status = ice_vsig_remove_vsi(hw, blk, vsi, orig_vsig);
1130 if (status)
1131 return status;
1132 }
1133
1134 if (idx == ICE_DEFAULT_VSIG)
1135 return 0;
1136
1137 /* Create VSI entry and add VSIG and prop_mask values */
1138 hw->blk[blk].xlt2.vsis[vsi].vsig = vsig;
1139 hw->blk[blk].xlt2.vsis[vsi].changed = 1;
1140
1141 /* Add new entry to the head of the VSIG list */
1142 tmp = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
1143 hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi =
1144 &hw->blk[blk].xlt2.vsis[vsi];
1145 hw->blk[blk].xlt2.vsis[vsi].next_vsi = tmp;
1146 hw->blk[blk].xlt2.t[vsi] = vsig;
1147
1148 return 0;
1149}
1150
1151/**
1152 * ice_prof_has_mask_idx - determine if profile index masking is identical
1153 * @hw: pointer to the hardware structure
1154 * @blk: HW block
1155 * @prof: profile to check
1156 * @idx: profile index to check
1157 * @mask: mask to match
1158 */
1159static bool
1160ice_prof_has_mask_idx(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 idx,
1161 u16 mask)
1162{
1163 bool expect_no_mask = false;
1164 bool found = false;
1165 bool match = false;
1166 u16 i;
1167
1168 /* If mask is 0x0000 or 0xffff, then there is no masking */
1169 if (mask == 0 || mask == 0xffff)
1170 expect_no_mask = true;
1171
1172 /* Scan the enabled masks on this profile, for the specified idx */
1173 for (i = hw->blk[blk].masks.first; i < hw->blk[blk].masks.first +
1174 hw->blk[blk].masks.count; i++)
1175 if (hw->blk[blk].es.mask_ena[prof] & BIT(i))
1176 if (hw->blk[blk].masks.masks[i].in_use &&
1177 hw->blk[blk].masks.masks[i].idx == idx) {
1178 found = true;
1179 if (hw->blk[blk].masks.masks[i].mask == mask)
1180 match = true;
1181 break;
1182 }
1183
1184 if (expect_no_mask) {
1185 if (found)
1186 return false;
1187 } else {
1188 if (!match)
1189 return false;
1190 }
1191
1192 return true;
1193}
1194
1195/**
1196 * ice_prof_has_mask - determine if profile masking is identical
1197 * @hw: pointer to the hardware structure
1198 * @blk: HW block
1199 * @prof: profile to check
1200 * @masks: masks to match
1201 */
1202static bool
1203ice_prof_has_mask(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 *masks)
1204{
1205 u16 i;
1206
1207 /* es->mask_ena[prof] will have the mask */
1208 for (i = 0; i < hw->blk[blk].es.fvw; i++)
1209 if (!ice_prof_has_mask_idx(hw, blk, prof, i, masks[i]))
1210 return false;
1211
1212 return true;
1213}
1214
1215/**
1216 * ice_find_prof_id_with_mask - find profile ID for a given field vector
1217 * @hw: pointer to the hardware structure
1218 * @blk: HW block
1219 * @fv: field vector to search for
1220 * @masks: masks for FV
1221 * @symm: symmetric setting for RSS flows
1222 * @prof_id: receives the profile ID
1223 */
1224static int
1225ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk,
1226 struct ice_fv_word *fv, u16 *masks, bool symm,
1227 u8 *prof_id)
1228{
1229 struct ice_es *es = &hw->blk[blk].es;
1230 u8 i;
1231
1232 /* For FD, we don't want to re-use a existed profile with the same
1233 * field vector and mask. This will cause rule interference.
1234 */
1235 if (blk == ICE_BLK_FD)
1236 return -ENOENT;
1237
1238 for (i = 0; i < (u8)es->count; i++) {
1239 u16 off = i * es->fvw;
1240
1241 if (blk == ICE_BLK_RSS && es->symm[i] != symm)
1242 continue;
1243
1244 if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv)))
1245 continue;
1246
1247 /* check if masks settings are the same for this profile */
1248 if (masks && !ice_prof_has_mask(hw, blk, i, masks))
1249 continue;
1250
1251 *prof_id = i;
1252 return 0;
1253 }
1254
1255 return -ENOENT;
1256}
1257
1258/**
1259 * ice_prof_id_rsrc_type - get profile ID resource type for a block type
1260 * @blk: the block type
1261 * @rsrc_type: pointer to variable to receive the resource type
1262 */
1263static bool ice_prof_id_rsrc_type(enum ice_block blk, u16 *rsrc_type)
1264{
1265 switch (blk) {
1266 case ICE_BLK_FD:
1267 *rsrc_type = ICE_AQC_RES_TYPE_FD_PROF_BLDR_PROFID;
1268 break;
1269 case ICE_BLK_RSS:
1270 *rsrc_type = ICE_AQC_RES_TYPE_HASH_PROF_BLDR_PROFID;
1271 break;
1272 default:
1273 return false;
1274 }
1275 return true;
1276}
1277
1278/**
1279 * ice_tcam_ent_rsrc_type - get TCAM entry resource type for a block type
1280 * @blk: the block type
1281 * @rsrc_type: pointer to variable to receive the resource type
1282 */
1283static bool ice_tcam_ent_rsrc_type(enum ice_block blk, u16 *rsrc_type)
1284{
1285 switch (blk) {
1286 case ICE_BLK_FD:
1287 *rsrc_type = ICE_AQC_RES_TYPE_FD_PROF_BLDR_TCAM;
1288 break;
1289 case ICE_BLK_RSS:
1290 *rsrc_type = ICE_AQC_RES_TYPE_HASH_PROF_BLDR_TCAM;
1291 break;
1292 default:
1293 return false;
1294 }
1295 return true;
1296}
1297
1298/**
1299 * ice_alloc_tcam_ent - allocate hardware TCAM entry
1300 * @hw: pointer to the HW struct
1301 * @blk: the block to allocate the TCAM for
1302 * @btm: true to allocate from bottom of table, false to allocate from top
1303 * @tcam_idx: pointer to variable to receive the TCAM entry
1304 *
1305 * This function allocates a new entry in a Profile ID TCAM for a specific
1306 * block.
1307 */
1308static int
1309ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, bool btm,
1310 u16 *tcam_idx)
1311{
1312 u16 res_type;
1313
1314 if (!ice_tcam_ent_rsrc_type(blk, &res_type))
1315 return -EINVAL;
1316
1317 return ice_alloc_hw_res(hw, res_type, 1, btm, tcam_idx);
1318}
1319
1320/**
1321 * ice_free_tcam_ent - free hardware TCAM entry
1322 * @hw: pointer to the HW struct
1323 * @blk: the block from which to free the TCAM entry
1324 * @tcam_idx: the TCAM entry to free
1325 *
1326 * This function frees an entry in a Profile ID TCAM for a specific block.
1327 */
1328static int
1329ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
1330{
1331 u16 res_type;
1332
1333 if (!ice_tcam_ent_rsrc_type(blk, &res_type))
1334 return -EINVAL;
1335
1336 return ice_free_hw_res(hw, res_type, 1, &tcam_idx);
1337}
1338
1339/**
1340 * ice_alloc_prof_id - allocate profile ID
1341 * @hw: pointer to the HW struct
1342 * @blk: the block to allocate the profile ID for
1343 * @prof_id: pointer to variable to receive the profile ID
1344 *
1345 * This function allocates a new profile ID, which also corresponds to a Field
1346 * Vector (Extraction Sequence) entry.
1347 */
1348static int ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
1349{
1350 u16 res_type;
1351 u16 get_prof;
1352 int status;
1353
1354 if (!ice_prof_id_rsrc_type(blk, &res_type))
1355 return -EINVAL;
1356
1357 status = ice_alloc_hw_res(hw, res_type, 1, false, &get_prof);
1358 if (!status)
1359 *prof_id = (u8)get_prof;
1360
1361 return status;
1362}
1363
1364/**
1365 * ice_free_prof_id - free profile ID
1366 * @hw: pointer to the HW struct
1367 * @blk: the block from which to free the profile ID
1368 * @prof_id: the profile ID to free
1369 *
1370 * This function frees a profile ID, which also corresponds to a Field Vector.
1371 */
1372static int ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
1373{
1374 u16 tmp_prof_id = (u16)prof_id;
1375 u16 res_type;
1376
1377 if (!ice_prof_id_rsrc_type(blk, &res_type))
1378 return -EINVAL;
1379
1380 return ice_free_hw_res(hw, res_type, 1, &tmp_prof_id);
1381}
1382
1383/**
1384 * ice_prof_inc_ref - increment reference count for profile
1385 * @hw: pointer to the HW struct
1386 * @blk: the block from which to free the profile ID
1387 * @prof_id: the profile ID for which to increment the reference count
1388 */
1389static int ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
1390{
1391 if (prof_id > hw->blk[blk].es.count)
1392 return -EINVAL;
1393
1394 hw->blk[blk].es.ref_count[prof_id]++;
1395
1396 return 0;
1397}
1398
1399/**
1400 * ice_write_prof_mask_reg - write profile mask register
1401 * @hw: pointer to the HW struct
1402 * @blk: hardware block
1403 * @mask_idx: mask index
1404 * @idx: index of the FV which will use the mask
1405 * @mask: the 16-bit mask
1406 */
1407static void
1408ice_write_prof_mask_reg(struct ice_hw *hw, enum ice_block blk, u16 mask_idx,
1409 u16 idx, u16 mask)
1410{
1411 u32 offset;
1412 u32 val;
1413
1414 switch (blk) {
1415 case ICE_BLK_RSS:
1416 offset = GLQF_HMASK(mask_idx);
1417 val = FIELD_PREP(GLQF_HMASK_MSK_INDEX_M, idx);
1418 val |= FIELD_PREP(GLQF_HMASK_MASK_M, mask);
1419 break;
1420 case ICE_BLK_FD:
1421 offset = GLQF_FDMASK(mask_idx);
1422 val = FIELD_PREP(GLQF_FDMASK_MSK_INDEX_M, idx);
1423 val |= FIELD_PREP(GLQF_FDMASK_MASK_M, mask);
1424 break;
1425 default:
1426 ice_debug(hw, ICE_DBG_PKG, "No profile masks for block %d\n",
1427 blk);
1428 return;
1429 }
1430
1431 wr32(hw, offset, val);
1432 ice_debug(hw, ICE_DBG_PKG, "write mask, blk %d (%d): %x = %x\n",
1433 blk, idx, offset, val);
1434}
1435
1436/**
1437 * ice_write_prof_mask_enable_res - write profile mask enable register
1438 * @hw: pointer to the HW struct
1439 * @blk: hardware block
1440 * @prof_id: profile ID
1441 * @enable_mask: enable mask
1442 */
1443static void
1444ice_write_prof_mask_enable_res(struct ice_hw *hw, enum ice_block blk,
1445 u16 prof_id, u32 enable_mask)
1446{
1447 u32 offset;
1448
1449 switch (blk) {
1450 case ICE_BLK_RSS:
1451 offset = GLQF_HMASK_SEL(prof_id);
1452 break;
1453 case ICE_BLK_FD:
1454 offset = GLQF_FDMASK_SEL(prof_id);
1455 break;
1456 default:
1457 ice_debug(hw, ICE_DBG_PKG, "No profile masks for block %d\n",
1458 blk);
1459 return;
1460 }
1461
1462 wr32(hw, offset, enable_mask);
1463 ice_debug(hw, ICE_DBG_PKG, "write mask enable, blk %d (%d): %x = %x\n",
1464 blk, prof_id, offset, enable_mask);
1465}
1466
1467/**
1468 * ice_init_prof_masks - initial prof masks
1469 * @hw: pointer to the HW struct
1470 * @blk: hardware block
1471 */
1472static void ice_init_prof_masks(struct ice_hw *hw, enum ice_block blk)
1473{
1474 u16 per_pf;
1475 u16 i;
1476
1477 mutex_init(&hw->blk[blk].masks.lock);
1478
1479 per_pf = ICE_PROF_MASK_COUNT / hw->dev_caps.num_funcs;
1480
1481 hw->blk[blk].masks.count = per_pf;
1482 hw->blk[blk].masks.first = hw->pf_id * per_pf;
1483
1484 memset(hw->blk[blk].masks.masks, 0, sizeof(hw->blk[blk].masks.masks));
1485
1486 for (i = hw->blk[blk].masks.first;
1487 i < hw->blk[blk].masks.first + hw->blk[blk].masks.count; i++)
1488 ice_write_prof_mask_reg(hw, blk, i, 0, 0);
1489}
1490
1491/**
1492 * ice_init_all_prof_masks - initialize all prof masks
1493 * @hw: pointer to the HW struct
1494 */
1495static void ice_init_all_prof_masks(struct ice_hw *hw)
1496{
1497 ice_init_prof_masks(hw, ICE_BLK_RSS);
1498 ice_init_prof_masks(hw, ICE_BLK_FD);
1499}
1500
1501/**
1502 * ice_alloc_prof_mask - allocate profile mask
1503 * @hw: pointer to the HW struct
1504 * @blk: hardware block
1505 * @idx: index of FV which will use the mask
1506 * @mask: the 16-bit mask
1507 * @mask_idx: variable to receive the mask index
1508 */
1509static int
1510ice_alloc_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 idx, u16 mask,
1511 u16 *mask_idx)
1512{
1513 bool found_unused = false, found_copy = false;
1514 u16 unused_idx = 0, copy_idx = 0;
1515 int status = -ENOSPC;
1516 u16 i;
1517
1518 if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
1519 return -EINVAL;
1520
1521 mutex_lock(&hw->blk[blk].masks.lock);
1522
1523 for (i = hw->blk[blk].masks.first;
1524 i < hw->blk[blk].masks.first + hw->blk[blk].masks.count; i++)
1525 if (hw->blk[blk].masks.masks[i].in_use) {
1526 /* if mask is in use and it exactly duplicates the
1527 * desired mask and index, then in can be reused
1528 */
1529 if (hw->blk[blk].masks.masks[i].mask == mask &&
1530 hw->blk[blk].masks.masks[i].idx == idx) {
1531 found_copy = true;
1532 copy_idx = i;
1533 break;
1534 }
1535 } else {
1536 /* save off unused index, but keep searching in case
1537 * there is an exact match later on
1538 */
1539 if (!found_unused) {
1540 found_unused = true;
1541 unused_idx = i;
1542 }
1543 }
1544
1545 if (found_copy)
1546 i = copy_idx;
1547 else if (found_unused)
1548 i = unused_idx;
1549 else
1550 goto err_ice_alloc_prof_mask;
1551
1552 /* update mask for a new entry */
1553 if (found_unused) {
1554 hw->blk[blk].masks.masks[i].in_use = true;
1555 hw->blk[blk].masks.masks[i].mask = mask;
1556 hw->blk[blk].masks.masks[i].idx = idx;
1557 hw->blk[blk].masks.masks[i].ref = 0;
1558 ice_write_prof_mask_reg(hw, blk, i, idx, mask);
1559 }
1560
1561 hw->blk[blk].masks.masks[i].ref++;
1562 *mask_idx = i;
1563 status = 0;
1564
1565err_ice_alloc_prof_mask:
1566 mutex_unlock(&hw->blk[blk].masks.lock);
1567
1568 return status;
1569}
1570
1571/**
1572 * ice_free_prof_mask - free profile mask
1573 * @hw: pointer to the HW struct
1574 * @blk: hardware block
1575 * @mask_idx: index of mask
1576 */
1577static int
1578ice_free_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 mask_idx)
1579{
1580 if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
1581 return -EINVAL;
1582
1583 if (!(mask_idx >= hw->blk[blk].masks.first &&
1584 mask_idx < hw->blk[blk].masks.first + hw->blk[blk].masks.count))
1585 return -ENOENT;
1586
1587 mutex_lock(&hw->blk[blk].masks.lock);
1588
1589 if (!hw->blk[blk].masks.masks[mask_idx].in_use)
1590 goto exit_ice_free_prof_mask;
1591
1592 if (hw->blk[blk].masks.masks[mask_idx].ref > 1) {
1593 hw->blk[blk].masks.masks[mask_idx].ref--;
1594 goto exit_ice_free_prof_mask;
1595 }
1596
1597 /* remove mask */
1598 hw->blk[blk].masks.masks[mask_idx].in_use = false;
1599 hw->blk[blk].masks.masks[mask_idx].mask = 0;
1600 hw->blk[blk].masks.masks[mask_idx].idx = 0;
1601
1602 /* update mask as unused entry */
1603 ice_debug(hw, ICE_DBG_PKG, "Free mask, blk %d, mask %d\n", blk,
1604 mask_idx);
1605 ice_write_prof_mask_reg(hw, blk, mask_idx, 0, 0);
1606
1607exit_ice_free_prof_mask:
1608 mutex_unlock(&hw->blk[blk].masks.lock);
1609
1610 return 0;
1611}
1612
1613/**
1614 * ice_free_prof_masks - free all profile masks for a profile
1615 * @hw: pointer to the HW struct
1616 * @blk: hardware block
1617 * @prof_id: profile ID
1618 */
1619static int
1620ice_free_prof_masks(struct ice_hw *hw, enum ice_block blk, u16 prof_id)
1621{
1622 u32 mask_bm;
1623 u16 i;
1624
1625 if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
1626 return -EINVAL;
1627
1628 mask_bm = hw->blk[blk].es.mask_ena[prof_id];
1629 for (i = 0; i < BITS_PER_BYTE * sizeof(mask_bm); i++)
1630 if (mask_bm & BIT(i))
1631 ice_free_prof_mask(hw, blk, i);
1632
1633 return 0;
1634}
1635
1636/**
1637 * ice_shutdown_prof_masks - releases lock for masking
1638 * @hw: pointer to the HW struct
1639 * @blk: hardware block
1640 *
1641 * This should be called before unloading the driver
1642 */
1643static void ice_shutdown_prof_masks(struct ice_hw *hw, enum ice_block blk)
1644{
1645 u16 i;
1646
1647 mutex_lock(&hw->blk[blk].masks.lock);
1648
1649 for (i = hw->blk[blk].masks.first;
1650 i < hw->blk[blk].masks.first + hw->blk[blk].masks.count; i++) {
1651 ice_write_prof_mask_reg(hw, blk, i, 0, 0);
1652
1653 hw->blk[blk].masks.masks[i].in_use = false;
1654 hw->blk[blk].masks.masks[i].idx = 0;
1655 hw->blk[blk].masks.masks[i].mask = 0;
1656 }
1657
1658 mutex_unlock(&hw->blk[blk].masks.lock);
1659 mutex_destroy(&hw->blk[blk].masks.lock);
1660}
1661
1662/**
1663 * ice_shutdown_all_prof_masks - releases all locks for masking
1664 * @hw: pointer to the HW struct
1665 *
1666 * This should be called before unloading the driver
1667 */
1668static void ice_shutdown_all_prof_masks(struct ice_hw *hw)
1669{
1670 ice_shutdown_prof_masks(hw, ICE_BLK_RSS);
1671 ice_shutdown_prof_masks(hw, ICE_BLK_FD);
1672}
1673
1674/**
1675 * ice_update_prof_masking - set registers according to masking
1676 * @hw: pointer to the HW struct
1677 * @blk: hardware block
1678 * @prof_id: profile ID
1679 * @masks: masks
1680 */
1681static int
1682ice_update_prof_masking(struct ice_hw *hw, enum ice_block blk, u16 prof_id,
1683 u16 *masks)
1684{
1685 bool err = false;
1686 u32 ena_mask = 0;
1687 u16 idx;
1688 u16 i;
1689
1690 /* Only support FD and RSS masking, otherwise nothing to be done */
1691 if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
1692 return 0;
1693
1694 for (i = 0; i < hw->blk[blk].es.fvw; i++)
1695 if (masks[i] && masks[i] != 0xFFFF) {
1696 if (!ice_alloc_prof_mask(hw, blk, i, masks[i], &idx)) {
1697 ena_mask |= BIT(idx);
1698 } else {
1699 /* not enough bitmaps */
1700 err = true;
1701 break;
1702 }
1703 }
1704
1705 if (err) {
1706 /* free any bitmaps we have allocated */
1707 for (i = 0; i < BITS_PER_BYTE * sizeof(ena_mask); i++)
1708 if (ena_mask & BIT(i))
1709 ice_free_prof_mask(hw, blk, i);
1710
1711 return -EIO;
1712 }
1713
1714 /* enable the masks for this profile */
1715 ice_write_prof_mask_enable_res(hw, blk, prof_id, ena_mask);
1716
1717 /* store enabled masks with profile so that they can be freed later */
1718 hw->blk[blk].es.mask_ena[prof_id] = ena_mask;
1719
1720 return 0;
1721}
1722
1723/**
1724 * ice_write_es - write an extraction sequence and symmetric setting to hardware
1725 * @hw: pointer to the HW struct
1726 * @blk: the block in which to write the extraction sequence
1727 * @prof_id: the profile ID to write
1728 * @fv: pointer to the extraction sequence to write - NULL to clear extraction
1729 * @symm: symmetric setting for RSS profiles
1730 */
1731static void
1732ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
1733 struct ice_fv_word *fv, bool symm)
1734{
1735 u16 off;
1736
1737 off = prof_id * hw->blk[blk].es.fvw;
1738 if (!fv) {
1739 memset(&hw->blk[blk].es.t[off], 0,
1740 hw->blk[blk].es.fvw * sizeof(*fv));
1741 hw->blk[blk].es.written[prof_id] = false;
1742 } else {
1743 memcpy(&hw->blk[blk].es.t[off], fv,
1744 hw->blk[blk].es.fvw * sizeof(*fv));
1745 }
1746
1747 if (blk == ICE_BLK_RSS)
1748 hw->blk[blk].es.symm[prof_id] = symm;
1749}
1750
1751/**
1752 * ice_prof_dec_ref - decrement reference count for profile
1753 * @hw: pointer to the HW struct
1754 * @blk: the block from which to free the profile ID
1755 * @prof_id: the profile ID for which to decrement the reference count
1756 */
1757static int
1758ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
1759{
1760 if (prof_id > hw->blk[blk].es.count)
1761 return -EINVAL;
1762
1763 if (hw->blk[blk].es.ref_count[prof_id] > 0) {
1764 if (!--hw->blk[blk].es.ref_count[prof_id]) {
1765 ice_write_es(hw, blk, prof_id, NULL, false);
1766 ice_free_prof_masks(hw, blk, prof_id);
1767 return ice_free_prof_id(hw, blk, prof_id);
1768 }
1769 }
1770
1771 return 0;
1772}
1773
1774/* Block / table section IDs */
1775static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = {
1776 /* SWITCH */
1777 { ICE_SID_XLT1_SW,
1778 ICE_SID_XLT2_SW,
1779 ICE_SID_PROFID_TCAM_SW,
1780 ICE_SID_PROFID_REDIR_SW,
1781 ICE_SID_FLD_VEC_SW
1782 },
1783
1784 /* ACL */
1785 { ICE_SID_XLT1_ACL,
1786 ICE_SID_XLT2_ACL,
1787 ICE_SID_PROFID_TCAM_ACL,
1788 ICE_SID_PROFID_REDIR_ACL,
1789 ICE_SID_FLD_VEC_ACL
1790 },
1791
1792 /* FD */
1793 { ICE_SID_XLT1_FD,
1794 ICE_SID_XLT2_FD,
1795 ICE_SID_PROFID_TCAM_FD,
1796 ICE_SID_PROFID_REDIR_FD,
1797 ICE_SID_FLD_VEC_FD
1798 },
1799
1800 /* RSS */
1801 { ICE_SID_XLT1_RSS,
1802 ICE_SID_XLT2_RSS,
1803 ICE_SID_PROFID_TCAM_RSS,
1804 ICE_SID_PROFID_REDIR_RSS,
1805 ICE_SID_FLD_VEC_RSS
1806 },
1807
1808 /* PE */
1809 { ICE_SID_XLT1_PE,
1810 ICE_SID_XLT2_PE,
1811 ICE_SID_PROFID_TCAM_PE,
1812 ICE_SID_PROFID_REDIR_PE,
1813 ICE_SID_FLD_VEC_PE
1814 }
1815};
1816
1817/**
1818 * ice_init_sw_xlt1_db - init software XLT1 database from HW tables
1819 * @hw: pointer to the hardware structure
1820 * @blk: the HW block to initialize
1821 */
1822static void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
1823{
1824 u16 pt;
1825
1826 for (pt = 0; pt < hw->blk[blk].xlt1.count; pt++) {
1827 u8 ptg;
1828
1829 ptg = hw->blk[blk].xlt1.t[pt];
1830 if (ptg != ICE_DEFAULT_PTG) {
1831 ice_ptg_alloc_val(hw, blk, ptg);
1832 ice_ptg_add_mv_ptype(hw, blk, pt, ptg);
1833 }
1834 }
1835}
1836
1837/**
1838 * ice_init_sw_xlt2_db - init software XLT2 database from HW tables
1839 * @hw: pointer to the hardware structure
1840 * @blk: the HW block to initialize
1841 */
1842static void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
1843{
1844 u16 vsi;
1845
1846 for (vsi = 0; vsi < hw->blk[blk].xlt2.count; vsi++) {
1847 u16 vsig;
1848
1849 vsig = hw->blk[blk].xlt2.t[vsi];
1850 if (vsig) {
1851 ice_vsig_alloc_val(hw, blk, vsig);
1852 ice_vsig_add_mv_vsi(hw, blk, vsi, vsig);
1853 /* no changes at this time, since this has been
1854 * initialized from the original package
1855 */
1856 hw->blk[blk].xlt2.vsis[vsi].changed = 0;
1857 }
1858 }
1859}
1860
1861/**
1862 * ice_init_sw_db - init software database from HW tables
1863 * @hw: pointer to the hardware structure
1864 */
1865static void ice_init_sw_db(struct ice_hw *hw)
1866{
1867 u16 i;
1868
1869 for (i = 0; i < ICE_BLK_COUNT; i++) {
1870 ice_init_sw_xlt1_db(hw, (enum ice_block)i);
1871 ice_init_sw_xlt2_db(hw, (enum ice_block)i);
1872 }
1873}
1874
1875/**
1876 * ice_fill_tbl - Reads content of a single table type into database
1877 * @hw: pointer to the hardware structure
1878 * @block_id: Block ID of the table to copy
1879 * @sid: Section ID of the table to copy
1880 *
1881 * Will attempt to read the entire content of a given table of a single block
1882 * into the driver database. We assume that the buffer will always
1883 * be as large or larger than the data contained in the package. If
1884 * this condition is not met, there is most likely an error in the package
1885 * contents.
1886 */
1887static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
1888{
1889 u32 dst_len, sect_len, offset = 0;
1890 struct ice_prof_redir_section *pr;
1891 struct ice_prof_id_section *pid;
1892 struct ice_xlt1_section *xlt1;
1893 struct ice_xlt2_section *xlt2;
1894 struct ice_sw_fv_section *es;
1895 struct ice_pkg_enum state;
1896 u8 *src, *dst;
1897 void *sect;
1898
1899 /* if the HW segment pointer is null then the first iteration of
1900 * ice_pkg_enum_section() will fail. In this case the HW tables will
1901 * not be filled and return success.
1902 */
1903 if (!hw->seg) {
1904 ice_debug(hw, ICE_DBG_PKG, "hw->seg is NULL, tables are not filled\n");
1905 return;
1906 }
1907
1908 memset(&state, 0, sizeof(state));
1909
1910 sect = ice_pkg_enum_section(hw->seg, &state, sid);
1911
1912 while (sect) {
1913 switch (sid) {
1914 case ICE_SID_XLT1_SW:
1915 case ICE_SID_XLT1_FD:
1916 case ICE_SID_XLT1_RSS:
1917 case ICE_SID_XLT1_ACL:
1918 case ICE_SID_XLT1_PE:
1919 xlt1 = sect;
1920 src = xlt1->value;
1921 sect_len = le16_to_cpu(xlt1->count) *
1922 sizeof(*hw->blk[block_id].xlt1.t);
1923 dst = hw->blk[block_id].xlt1.t;
1924 dst_len = hw->blk[block_id].xlt1.count *
1925 sizeof(*hw->blk[block_id].xlt1.t);
1926 break;
1927 case ICE_SID_XLT2_SW:
1928 case ICE_SID_XLT2_FD:
1929 case ICE_SID_XLT2_RSS:
1930 case ICE_SID_XLT2_ACL:
1931 case ICE_SID_XLT2_PE:
1932 xlt2 = sect;
1933 src = (__force u8 *)xlt2->value;
1934 sect_len = le16_to_cpu(xlt2->count) *
1935 sizeof(*hw->blk[block_id].xlt2.t);
1936 dst = (u8 *)hw->blk[block_id].xlt2.t;
1937 dst_len = hw->blk[block_id].xlt2.count *
1938 sizeof(*hw->blk[block_id].xlt2.t);
1939 break;
1940 case ICE_SID_PROFID_TCAM_SW:
1941 case ICE_SID_PROFID_TCAM_FD:
1942 case ICE_SID_PROFID_TCAM_RSS:
1943 case ICE_SID_PROFID_TCAM_ACL:
1944 case ICE_SID_PROFID_TCAM_PE:
1945 pid = sect;
1946 src = (u8 *)pid->entry;
1947 sect_len = le16_to_cpu(pid->count) *
1948 sizeof(*hw->blk[block_id].prof.t);
1949 dst = (u8 *)hw->blk[block_id].prof.t;
1950 dst_len = hw->blk[block_id].prof.count *
1951 sizeof(*hw->blk[block_id].prof.t);
1952 break;
1953 case ICE_SID_PROFID_REDIR_SW:
1954 case ICE_SID_PROFID_REDIR_FD:
1955 case ICE_SID_PROFID_REDIR_RSS:
1956 case ICE_SID_PROFID_REDIR_ACL:
1957 case ICE_SID_PROFID_REDIR_PE:
1958 pr = sect;
1959 src = pr->redir_value;
1960 sect_len = le16_to_cpu(pr->count) *
1961 sizeof(*hw->blk[block_id].prof_redir.t);
1962 dst = hw->blk[block_id].prof_redir.t;
1963 dst_len = hw->blk[block_id].prof_redir.count *
1964 sizeof(*hw->blk[block_id].prof_redir.t);
1965 break;
1966 case ICE_SID_FLD_VEC_SW:
1967 case ICE_SID_FLD_VEC_FD:
1968 case ICE_SID_FLD_VEC_RSS:
1969 case ICE_SID_FLD_VEC_ACL:
1970 case ICE_SID_FLD_VEC_PE:
1971 es = sect;
1972 src = (u8 *)es->fv;
1973 sect_len = (u32)(le16_to_cpu(es->count) *
1974 hw->blk[block_id].es.fvw) *
1975 sizeof(*hw->blk[block_id].es.t);
1976 dst = (u8 *)hw->blk[block_id].es.t;
1977 dst_len = (u32)(hw->blk[block_id].es.count *
1978 hw->blk[block_id].es.fvw) *
1979 sizeof(*hw->blk[block_id].es.t);
1980 break;
1981 default:
1982 return;
1983 }
1984
1985 /* if the section offset exceeds destination length, terminate
1986 * table fill.
1987 */
1988 if (offset > dst_len)
1989 return;
1990
1991 /* if the sum of section size and offset exceed destination size
1992 * then we are out of bounds of the HW table size for that PF.
1993 * Changing section length to fill the remaining table space
1994 * of that PF.
1995 */
1996 if ((offset + sect_len) > dst_len)
1997 sect_len = dst_len - offset;
1998
1999 memcpy(dst + offset, src, sect_len);
2000 offset += sect_len;
2001 sect = ice_pkg_enum_section(NULL, &state, sid);
2002 }
2003}
2004
2005/**
2006 * ice_fill_blk_tbls - Read package context for tables
2007 * @hw: pointer to the hardware structure
2008 *
2009 * Reads the current package contents and populates the driver
2010 * database with the data iteratively for all advanced feature
2011 * blocks. Assume that the HW tables have been allocated.
2012 */
2013void ice_fill_blk_tbls(struct ice_hw *hw)
2014{
2015 u8 i;
2016
2017 for (i = 0; i < ICE_BLK_COUNT; i++) {
2018 enum ice_block blk_id = (enum ice_block)i;
2019
2020 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].xlt1.sid);
2021 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].xlt2.sid);
2022 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].prof.sid);
2023 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].prof_redir.sid);
2024 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].es.sid);
2025 }
2026
2027 ice_init_sw_db(hw);
2028}
2029
2030/**
2031 * ice_free_prof_map - free profile map
2032 * @hw: pointer to the hardware structure
2033 * @blk_idx: HW block index
2034 */
2035static void ice_free_prof_map(struct ice_hw *hw, u8 blk_idx)
2036{
2037 struct ice_es *es = &hw->blk[blk_idx].es;
2038 struct ice_prof_map *del, *tmp;
2039
2040 mutex_lock(&es->prof_map_lock);
2041 list_for_each_entry_safe(del, tmp, &es->prof_map, list) {
2042 list_del(&del->list);
2043 devm_kfree(ice_hw_to_dev(hw), del);
2044 }
2045 INIT_LIST_HEAD(&es->prof_map);
2046 mutex_unlock(&es->prof_map_lock);
2047}
2048
2049/**
2050 * ice_free_flow_profs - free flow profile entries
2051 * @hw: pointer to the hardware structure
2052 * @blk_idx: HW block index
2053 */
2054static void ice_free_flow_profs(struct ice_hw *hw, u8 blk_idx)
2055{
2056 struct ice_flow_prof *p, *tmp;
2057
2058 mutex_lock(&hw->fl_profs_locks[blk_idx]);
2059 list_for_each_entry_safe(p, tmp, &hw->fl_profs[blk_idx], l_entry) {
2060 struct ice_flow_entry *e, *t;
2061
2062 list_for_each_entry_safe(e, t, &p->entries, l_entry)
2063 ice_flow_rem_entry(hw, (enum ice_block)blk_idx,
2064 ICE_FLOW_ENTRY_HNDL(e));
2065
2066 list_del(&p->l_entry);
2067
2068 mutex_destroy(&p->entries_lock);
2069 devm_kfree(ice_hw_to_dev(hw), p);
2070 }
2071 mutex_unlock(&hw->fl_profs_locks[blk_idx]);
2072
2073 /* if driver is in reset and tables are being cleared
2074 * re-initialize the flow profile list heads
2075 */
2076 INIT_LIST_HEAD(&hw->fl_profs[blk_idx]);
2077}
2078
2079/**
2080 * ice_free_vsig_tbl - free complete VSIG table entries
2081 * @hw: pointer to the hardware structure
2082 * @blk: the HW block on which to free the VSIG table entries
2083 */
2084static void ice_free_vsig_tbl(struct ice_hw *hw, enum ice_block blk)
2085{
2086 u16 i;
2087
2088 if (!hw->blk[blk].xlt2.vsig_tbl)
2089 return;
2090
2091 for (i = 1; i < ICE_MAX_VSIGS; i++)
2092 if (hw->blk[blk].xlt2.vsig_tbl[i].in_use)
2093 ice_vsig_free(hw, blk, i);
2094}
2095
2096/**
2097 * ice_free_hw_tbls - free hardware table memory
2098 * @hw: pointer to the hardware structure
2099 */
2100void ice_free_hw_tbls(struct ice_hw *hw)
2101{
2102 struct ice_rss_cfg *r, *rt;
2103 u8 i;
2104
2105 for (i = 0; i < ICE_BLK_COUNT; i++) {
2106 if (hw->blk[i].is_list_init) {
2107 struct ice_es *es = &hw->blk[i].es;
2108
2109 ice_free_prof_map(hw, i);
2110 mutex_destroy(&es->prof_map_lock);
2111
2112 ice_free_flow_profs(hw, i);
2113 mutex_destroy(&hw->fl_profs_locks[i]);
2114
2115 hw->blk[i].is_list_init = false;
2116 }
2117 ice_free_vsig_tbl(hw, (enum ice_block)i);
2118 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt1.ptypes);
2119 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt1.ptg_tbl);
2120 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt1.t);
2121 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt2.t);
2122 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt2.vsig_tbl);
2123 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt2.vsis);
2124 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].prof.t);
2125 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].prof_redir.t);
2126 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.t);
2127 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.ref_count);
2128 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.symm);
2129 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.written);
2130 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.mask_ena);
2131 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].prof_id.id);
2132 }
2133
2134 list_for_each_entry_safe(r, rt, &hw->rss_list_head, l_entry) {
2135 list_del(&r->l_entry);
2136 devm_kfree(ice_hw_to_dev(hw), r);
2137 }
2138 mutex_destroy(&hw->rss_locks);
2139 ice_shutdown_all_prof_masks(hw);
2140 memset(hw->blk, 0, sizeof(hw->blk));
2141}
2142
2143/**
2144 * ice_init_flow_profs - init flow profile locks and list heads
2145 * @hw: pointer to the hardware structure
2146 * @blk_idx: HW block index
2147 */
2148static void ice_init_flow_profs(struct ice_hw *hw, u8 blk_idx)
2149{
2150 mutex_init(&hw->fl_profs_locks[blk_idx]);
2151 INIT_LIST_HEAD(&hw->fl_profs[blk_idx]);
2152}
2153
2154/**
2155 * ice_clear_hw_tbls - clear HW tables and flow profiles
2156 * @hw: pointer to the hardware structure
2157 */
2158void ice_clear_hw_tbls(struct ice_hw *hw)
2159{
2160 u8 i;
2161
2162 for (i = 0; i < ICE_BLK_COUNT; i++) {
2163 struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;
2164 struct ice_prof_id *prof_id = &hw->blk[i].prof_id;
2165 struct ice_prof_tcam *prof = &hw->blk[i].prof;
2166 struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;
2167 struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;
2168 struct ice_es *es = &hw->blk[i].es;
2169
2170 if (hw->blk[i].is_list_init) {
2171 ice_free_prof_map(hw, i);
2172 ice_free_flow_profs(hw, i);
2173 }
2174
2175 ice_free_vsig_tbl(hw, (enum ice_block)i);
2176
2177 memset(xlt1->ptypes, 0, xlt1->count * sizeof(*xlt1->ptypes));
2178 memset(xlt1->ptg_tbl, 0,
2179 ICE_MAX_PTGS * sizeof(*xlt1->ptg_tbl));
2180 memset(xlt1->t, 0, xlt1->count * sizeof(*xlt1->t));
2181
2182 memset(xlt2->vsis, 0, xlt2->count * sizeof(*xlt2->vsis));
2183 memset(xlt2->vsig_tbl, 0,
2184 xlt2->count * sizeof(*xlt2->vsig_tbl));
2185 memset(xlt2->t, 0, xlt2->count * sizeof(*xlt2->t));
2186
2187 memset(prof->t, 0, prof->count * sizeof(*prof->t));
2188 memset(prof_redir->t, 0,
2189 prof_redir->count * sizeof(*prof_redir->t));
2190
2191 memset(es->t, 0, es->count * sizeof(*es->t) * es->fvw);
2192 memset(es->ref_count, 0, es->count * sizeof(*es->ref_count));
2193 memset(es->symm, 0, es->count * sizeof(*es->symm));
2194 memset(es->written, 0, es->count * sizeof(*es->written));
2195 memset(es->mask_ena, 0, es->count * sizeof(*es->mask_ena));
2196
2197 memset(prof_id->id, 0, prof_id->count * sizeof(*prof_id->id));
2198 }
2199}
2200
2201/**
2202 * ice_init_hw_tbls - init hardware table memory
2203 * @hw: pointer to the hardware structure
2204 */
2205int ice_init_hw_tbls(struct ice_hw *hw)
2206{
2207 u8 i;
2208
2209 mutex_init(&hw->rss_locks);
2210 INIT_LIST_HEAD(&hw->rss_list_head);
2211 ice_init_all_prof_masks(hw);
2212 for (i = 0; i < ICE_BLK_COUNT; i++) {
2213 struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;
2214 struct ice_prof_id *prof_id = &hw->blk[i].prof_id;
2215 struct ice_prof_tcam *prof = &hw->blk[i].prof;
2216 struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;
2217 struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;
2218 struct ice_es *es = &hw->blk[i].es;
2219 u16 j;
2220
2221 if (hw->blk[i].is_list_init)
2222 continue;
2223
2224 ice_init_flow_profs(hw, i);
2225 mutex_init(&es->prof_map_lock);
2226 INIT_LIST_HEAD(&es->prof_map);
2227 hw->blk[i].is_list_init = true;
2228
2229 hw->blk[i].overwrite = blk_sizes[i].overwrite;
2230 es->reverse = blk_sizes[i].reverse;
2231
2232 xlt1->sid = ice_blk_sids[i][ICE_SID_XLT1_OFF];
2233 xlt1->count = blk_sizes[i].xlt1;
2234
2235 xlt1->ptypes = devm_kcalloc(ice_hw_to_dev(hw), xlt1->count,
2236 sizeof(*xlt1->ptypes), GFP_KERNEL);
2237
2238 if (!xlt1->ptypes)
2239 goto err;
2240
2241 xlt1->ptg_tbl = devm_kcalloc(ice_hw_to_dev(hw), ICE_MAX_PTGS,
2242 sizeof(*xlt1->ptg_tbl),
2243 GFP_KERNEL);
2244
2245 if (!xlt1->ptg_tbl)
2246 goto err;
2247
2248 xlt1->t = devm_kcalloc(ice_hw_to_dev(hw), xlt1->count,
2249 sizeof(*xlt1->t), GFP_KERNEL);
2250 if (!xlt1->t)
2251 goto err;
2252
2253 xlt2->sid = ice_blk_sids[i][ICE_SID_XLT2_OFF];
2254 xlt2->count = blk_sizes[i].xlt2;
2255
2256 xlt2->vsis = devm_kcalloc(ice_hw_to_dev(hw), xlt2->count,
2257 sizeof(*xlt2->vsis), GFP_KERNEL);
2258
2259 if (!xlt2->vsis)
2260 goto err;
2261
2262 xlt2->vsig_tbl = devm_kcalloc(ice_hw_to_dev(hw), xlt2->count,
2263 sizeof(*xlt2->vsig_tbl),
2264 GFP_KERNEL);
2265 if (!xlt2->vsig_tbl)
2266 goto err;
2267
2268 for (j = 0; j < xlt2->count; j++)
2269 INIT_LIST_HEAD(&xlt2->vsig_tbl[j].prop_lst);
2270
2271 xlt2->t = devm_kcalloc(ice_hw_to_dev(hw), xlt2->count,
2272 sizeof(*xlt2->t), GFP_KERNEL);
2273 if (!xlt2->t)
2274 goto err;
2275
2276 prof->sid = ice_blk_sids[i][ICE_SID_PR_OFF];
2277 prof->count = blk_sizes[i].prof_tcam;
2278 prof->max_prof_id = blk_sizes[i].prof_id;
2279 prof->cdid_bits = blk_sizes[i].prof_cdid_bits;
2280 prof->t = devm_kcalloc(ice_hw_to_dev(hw), prof->count,
2281 sizeof(*prof->t), GFP_KERNEL);
2282
2283 if (!prof->t)
2284 goto err;
2285
2286 prof_redir->sid = ice_blk_sids[i][ICE_SID_PR_REDIR_OFF];
2287 prof_redir->count = blk_sizes[i].prof_redir;
2288 prof_redir->t = devm_kcalloc(ice_hw_to_dev(hw),
2289 prof_redir->count,
2290 sizeof(*prof_redir->t),
2291 GFP_KERNEL);
2292
2293 if (!prof_redir->t)
2294 goto err;
2295
2296 es->sid = ice_blk_sids[i][ICE_SID_ES_OFF];
2297 es->count = blk_sizes[i].es;
2298 es->fvw = blk_sizes[i].fvw;
2299 es->t = devm_kcalloc(ice_hw_to_dev(hw),
2300 (u32)(es->count * es->fvw),
2301 sizeof(*es->t), GFP_KERNEL);
2302 if (!es->t)
2303 goto err;
2304
2305 es->ref_count = devm_kcalloc(ice_hw_to_dev(hw), es->count,
2306 sizeof(*es->ref_count),
2307 GFP_KERNEL);
2308 if (!es->ref_count)
2309 goto err;
2310
2311 es->symm = devm_kcalloc(ice_hw_to_dev(hw), es->count,
2312 sizeof(*es->symm), GFP_KERNEL);
2313 if (!es->symm)
2314 goto err;
2315
2316 es->written = devm_kcalloc(ice_hw_to_dev(hw), es->count,
2317 sizeof(*es->written), GFP_KERNEL);
2318 if (!es->written)
2319 goto err;
2320
2321 es->mask_ena = devm_kcalloc(ice_hw_to_dev(hw), es->count,
2322 sizeof(*es->mask_ena), GFP_KERNEL);
2323 if (!es->mask_ena)
2324 goto err;
2325
2326 prof_id->count = blk_sizes[i].prof_id;
2327 prof_id->id = devm_kcalloc(ice_hw_to_dev(hw), prof_id->count,
2328 sizeof(*prof_id->id), GFP_KERNEL);
2329 if (!prof_id->id)
2330 goto err;
2331 }
2332 return 0;
2333
2334err:
2335 ice_free_hw_tbls(hw);
2336 return -ENOMEM;
2337}
2338
2339/**
2340 * ice_prof_gen_key - generate profile ID key
2341 * @hw: pointer to the HW struct
2342 * @blk: the block in which to write profile ID to
2343 * @ptg: packet type group (PTG) portion of key
2344 * @vsig: VSIG portion of key
2345 * @cdid: CDID portion of key
2346 * @flags: flag portion of key
2347 * @vl_msk: valid mask
2348 * @dc_msk: don't care mask
2349 * @nm_msk: never match mask
2350 * @key: output of profile ID key
2351 */
2352static int
2353ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
2354 u8 cdid, u16 flags, u8 vl_msk[ICE_TCAM_KEY_VAL_SZ],
2355 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ], u8 nm_msk[ICE_TCAM_KEY_VAL_SZ],
2356 u8 key[ICE_TCAM_KEY_SZ])
2357{
2358 struct ice_prof_id_key inkey;
2359
2360 inkey.xlt1 = ptg;
2361 inkey.xlt2_cdid = cpu_to_le16(vsig);
2362 inkey.flags = cpu_to_le16(flags);
2363
2364 switch (hw->blk[blk].prof.cdid_bits) {
2365 case 0:
2366 break;
2367 case 2:
2368#define ICE_CD_2_M 0xC000U
2369#define ICE_CD_2_S 14
2370 inkey.xlt2_cdid &= ~cpu_to_le16(ICE_CD_2_M);
2371 inkey.xlt2_cdid |= cpu_to_le16(BIT(cdid) << ICE_CD_2_S);
2372 break;
2373 case 4:
2374#define ICE_CD_4_M 0xF000U
2375#define ICE_CD_4_S 12
2376 inkey.xlt2_cdid &= ~cpu_to_le16(ICE_CD_4_M);
2377 inkey.xlt2_cdid |= cpu_to_le16(BIT(cdid) << ICE_CD_4_S);
2378 break;
2379 case 8:
2380#define ICE_CD_8_M 0xFF00U
2381#define ICE_CD_8_S 16
2382 inkey.xlt2_cdid &= ~cpu_to_le16(ICE_CD_8_M);
2383 inkey.xlt2_cdid |= cpu_to_le16(BIT(cdid) << ICE_CD_8_S);
2384 break;
2385 default:
2386 ice_debug(hw, ICE_DBG_PKG, "Error in profile config\n");
2387 break;
2388 }
2389
2390 return ice_set_key(key, ICE_TCAM_KEY_SZ, (u8 *)&inkey, vl_msk, dc_msk,
2391 nm_msk, 0, ICE_TCAM_KEY_SZ / 2);
2392}
2393
2394/**
2395 * ice_tcam_write_entry - write TCAM entry
2396 * @hw: pointer to the HW struct
2397 * @blk: the block in which to write profile ID to
2398 * @idx: the entry index to write to
2399 * @prof_id: profile ID
2400 * @ptg: packet type group (PTG) portion of key
2401 * @vsig: VSIG portion of key
2402 * @cdid: CDID portion of key
2403 * @flags: flag portion of key
2404 * @vl_msk: valid mask
2405 * @dc_msk: don't care mask
2406 * @nm_msk: never match mask
2407 */
2408static int
2409ice_tcam_write_entry(struct ice_hw *hw, enum ice_block blk, u16 idx,
2410 u8 prof_id, u8 ptg, u16 vsig, u8 cdid, u16 flags,
2411 u8 vl_msk[ICE_TCAM_KEY_VAL_SZ],
2412 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ],
2413 u8 nm_msk[ICE_TCAM_KEY_VAL_SZ])
2414{
2415 struct ice_prof_tcam_entry;
2416 int status;
2417
2418 status = ice_prof_gen_key(hw, blk, ptg, vsig, cdid, flags, vl_msk,
2419 dc_msk, nm_msk, hw->blk[blk].prof.t[idx].key);
2420 if (!status) {
2421 hw->blk[blk].prof.t[idx].addr = cpu_to_le16(idx);
2422 hw->blk[blk].prof.t[idx].prof_id = prof_id;
2423 }
2424
2425 return status;
2426}
2427
2428/**
2429 * ice_vsig_get_ref - returns number of VSIs belong to a VSIG
2430 * @hw: pointer to the hardware structure
2431 * @blk: HW block
2432 * @vsig: VSIG to query
2433 * @refs: pointer to variable to receive the reference count
2434 */
2435static int
2436ice_vsig_get_ref(struct ice_hw *hw, enum ice_block blk, u16 vsig, u16 *refs)
2437{
2438 u16 idx = vsig & ICE_VSIG_IDX_M;
2439 struct ice_vsig_vsi *ptr;
2440
2441 *refs = 0;
2442
2443 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
2444 return -ENOENT;
2445
2446 ptr = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
2447 while (ptr) {
2448 (*refs)++;
2449 ptr = ptr->next_vsi;
2450 }
2451
2452 return 0;
2453}
2454
2455/**
2456 * ice_has_prof_vsig - check to see if VSIG has a specific profile
2457 * @hw: pointer to the hardware structure
2458 * @blk: HW block
2459 * @vsig: VSIG to check against
2460 * @hdl: profile handle
2461 */
2462static bool
2463ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
2464{
2465 u16 idx = vsig & ICE_VSIG_IDX_M;
2466 struct ice_vsig_prof *ent;
2467
2468 list_for_each_entry(ent, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
2469 list)
2470 if (ent->profile_cookie == hdl)
2471 return true;
2472
2473 ice_debug(hw, ICE_DBG_INIT, "Characteristic list for VSI group %d not found.\n",
2474 vsig);
2475 return false;
2476}
2477
2478/**
2479 * ice_prof_bld_es - build profile ID extraction sequence changes
2480 * @hw: pointer to the HW struct
2481 * @blk: hardware block
2482 * @bld: the update package buffer build to add to
2483 * @chgs: the list of changes to make in hardware
2484 */
2485static int
2486ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
2487 struct ice_buf_build *bld, struct list_head *chgs)
2488{
2489 u16 vec_size = hw->blk[blk].es.fvw * sizeof(struct ice_fv_word);
2490 struct ice_chs_chg *tmp;
2491
2492 list_for_each_entry(tmp, chgs, list_entry)
2493 if (tmp->type == ICE_PTG_ES_ADD && tmp->add_prof) {
2494 u16 off = tmp->prof_id * hw->blk[blk].es.fvw;
2495 struct ice_pkg_es *p;
2496 u32 id;
2497
2498 id = ice_sect_id(blk, ICE_VEC_TBL);
2499 p = ice_pkg_buf_alloc_section(bld, id,
2500 struct_size(p, es, 1) +
2501 vec_size -
2502 sizeof(p->es[0]));
2503
2504 if (!p)
2505 return -ENOSPC;
2506
2507 p->count = cpu_to_le16(1);
2508 p->offset = cpu_to_le16(tmp->prof_id);
2509
2510 memcpy(p->es, &hw->blk[blk].es.t[off], vec_size);
2511 }
2512
2513 return 0;
2514}
2515
2516/**
2517 * ice_prof_bld_tcam - build profile ID TCAM changes
2518 * @hw: pointer to the HW struct
2519 * @blk: hardware block
2520 * @bld: the update package buffer build to add to
2521 * @chgs: the list of changes to make in hardware
2522 */
2523static int
2524ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
2525 struct ice_buf_build *bld, struct list_head *chgs)
2526{
2527 struct ice_chs_chg *tmp;
2528
2529 list_for_each_entry(tmp, chgs, list_entry)
2530 if (tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) {
2531 struct ice_prof_id_section *p;
2532 u32 id;
2533
2534 id = ice_sect_id(blk, ICE_PROF_TCAM);
2535 p = ice_pkg_buf_alloc_section(bld, id,
2536 struct_size(p, entry, 1));
2537
2538 if (!p)
2539 return -ENOSPC;
2540
2541 p->count = cpu_to_le16(1);
2542 p->entry[0].addr = cpu_to_le16(tmp->tcam_idx);
2543 p->entry[0].prof_id = tmp->prof_id;
2544
2545 memcpy(p->entry[0].key,
2546 &hw->blk[blk].prof.t[tmp->tcam_idx].key,
2547 sizeof(hw->blk[blk].prof.t->key));
2548 }
2549
2550 return 0;
2551}
2552
2553/**
2554 * ice_prof_bld_xlt1 - build XLT1 changes
2555 * @blk: hardware block
2556 * @bld: the update package buffer build to add to
2557 * @chgs: the list of changes to make in hardware
2558 */
2559static int
2560ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
2561 struct list_head *chgs)
2562{
2563 struct ice_chs_chg *tmp;
2564
2565 list_for_each_entry(tmp, chgs, list_entry)
2566 if (tmp->type == ICE_PTG_ES_ADD && tmp->add_ptg) {
2567 struct ice_xlt1_section *p;
2568 u32 id;
2569
2570 id = ice_sect_id(blk, ICE_XLT1);
2571 p = ice_pkg_buf_alloc_section(bld, id,
2572 struct_size(p, value, 1));
2573
2574 if (!p)
2575 return -ENOSPC;
2576
2577 p->count = cpu_to_le16(1);
2578 p->offset = cpu_to_le16(tmp->ptype);
2579 p->value[0] = tmp->ptg;
2580 }
2581
2582 return 0;
2583}
2584
2585/**
2586 * ice_prof_bld_xlt2 - build XLT2 changes
2587 * @blk: hardware block
2588 * @bld: the update package buffer build to add to
2589 * @chgs: the list of changes to make in hardware
2590 */
2591static int
2592ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,
2593 struct list_head *chgs)
2594{
2595 struct ice_chs_chg *tmp;
2596
2597 list_for_each_entry(tmp, chgs, list_entry) {
2598 struct ice_xlt2_section *p;
2599 u32 id;
2600
2601 switch (tmp->type) {
2602 case ICE_VSIG_ADD:
2603 case ICE_VSI_MOVE:
2604 case ICE_VSIG_REM:
2605 id = ice_sect_id(blk, ICE_XLT2);
2606 p = ice_pkg_buf_alloc_section(bld, id,
2607 struct_size(p, value, 1));
2608
2609 if (!p)
2610 return -ENOSPC;
2611
2612 p->count = cpu_to_le16(1);
2613 p->offset = cpu_to_le16(tmp->vsi);
2614 p->value[0] = cpu_to_le16(tmp->vsig);
2615 break;
2616 default:
2617 break;
2618 }
2619 }
2620
2621 return 0;
2622}
2623
2624/**
2625 * ice_upd_prof_hw - update hardware using the change list
2626 * @hw: pointer to the HW struct
2627 * @blk: hardware block
2628 * @chgs: the list of changes to make in hardware
2629 */
2630static int
2631ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
2632 struct list_head *chgs)
2633{
2634 struct ice_buf_build *b;
2635 struct ice_chs_chg *tmp;
2636 u16 pkg_sects;
2637 u16 xlt1 = 0;
2638 u16 xlt2 = 0;
2639 u16 tcam = 0;
2640 u16 es = 0;
2641 int status;
2642 u16 sects;
2643
2644 /* count number of sections we need */
2645 list_for_each_entry(tmp, chgs, list_entry) {
2646 switch (tmp->type) {
2647 case ICE_PTG_ES_ADD:
2648 if (tmp->add_ptg)
2649 xlt1++;
2650 if (tmp->add_prof)
2651 es++;
2652 break;
2653 case ICE_TCAM_ADD:
2654 tcam++;
2655 break;
2656 case ICE_VSIG_ADD:
2657 case ICE_VSI_MOVE:
2658 case ICE_VSIG_REM:
2659 xlt2++;
2660 break;
2661 default:
2662 break;
2663 }
2664 }
2665 sects = xlt1 + xlt2 + tcam + es;
2666
2667 if (!sects)
2668 return 0;
2669
2670 /* Build update package buffer */
2671 b = ice_pkg_buf_alloc(hw);
2672 if (!b)
2673 return -ENOMEM;
2674
2675 status = ice_pkg_buf_reserve_section(b, sects);
2676 if (status)
2677 goto error_tmp;
2678
2679 /* Preserve order of table update: ES, TCAM, PTG, VSIG */
2680 if (es) {
2681 status = ice_prof_bld_es(hw, blk, b, chgs);
2682 if (status)
2683 goto error_tmp;
2684 }
2685
2686 if (tcam) {
2687 status = ice_prof_bld_tcam(hw, blk, b, chgs);
2688 if (status)
2689 goto error_tmp;
2690 }
2691
2692 if (xlt1) {
2693 status = ice_prof_bld_xlt1(blk, b, chgs);
2694 if (status)
2695 goto error_tmp;
2696 }
2697
2698 if (xlt2) {
2699 status = ice_prof_bld_xlt2(blk, b, chgs);
2700 if (status)
2701 goto error_tmp;
2702 }
2703
2704 /* After package buffer build check if the section count in buffer is
2705 * non-zero and matches the number of sections detected for package
2706 * update.
2707 */
2708 pkg_sects = ice_pkg_buf_get_active_sections(b);
2709 if (!pkg_sects || pkg_sects != sects) {
2710 status = -EINVAL;
2711 goto error_tmp;
2712 }
2713
2714 /* update package */
2715 status = ice_update_pkg(hw, ice_pkg_buf(b), 1);
2716 if (status == -EIO)
2717 ice_debug(hw, ICE_DBG_INIT, "Unable to update HW profile\n");
2718
2719error_tmp:
2720 ice_pkg_buf_free(hw, b);
2721 return status;
2722}
2723
2724/**
2725 * ice_update_fd_mask - set Flow Director Field Vector mask for a profile
2726 * @hw: pointer to the HW struct
2727 * @prof_id: profile ID
2728 * @mask_sel: mask select
2729 *
2730 * This function enable any of the masks selected by the mask select parameter
2731 * for the profile specified.
2732 */
2733static void ice_update_fd_mask(struct ice_hw *hw, u16 prof_id, u32 mask_sel)
2734{
2735 wr32(hw, GLQF_FDMASK_SEL(prof_id), mask_sel);
2736
2737 ice_debug(hw, ICE_DBG_INIT, "fd mask(%d): %x = %x\n", prof_id,
2738 GLQF_FDMASK_SEL(prof_id), mask_sel);
2739}
2740
2741struct ice_fd_src_dst_pair {
2742 u8 prot_id;
2743 u8 count;
2744 u16 off;
2745};
2746
2747static const struct ice_fd_src_dst_pair ice_fd_pairs[] = {
2748 /* These are defined in pairs */
2749 { ICE_PROT_IPV4_OF_OR_S, 2, 12 },
2750 { ICE_PROT_IPV4_OF_OR_S, 2, 16 },
2751
2752 { ICE_PROT_IPV4_IL, 2, 12 },
2753 { ICE_PROT_IPV4_IL, 2, 16 },
2754
2755 { ICE_PROT_IPV6_OF_OR_S, 8, 8 },
2756 { ICE_PROT_IPV6_OF_OR_S, 8, 24 },
2757
2758 { ICE_PROT_IPV6_IL, 8, 8 },
2759 { ICE_PROT_IPV6_IL, 8, 24 },
2760
2761 { ICE_PROT_TCP_IL, 1, 0 },
2762 { ICE_PROT_TCP_IL, 1, 2 },
2763
2764 { ICE_PROT_UDP_OF, 1, 0 },
2765 { ICE_PROT_UDP_OF, 1, 2 },
2766
2767 { ICE_PROT_UDP_IL_OR_S, 1, 0 },
2768 { ICE_PROT_UDP_IL_OR_S, 1, 2 },
2769
2770 { ICE_PROT_SCTP_IL, 1, 0 },
2771 { ICE_PROT_SCTP_IL, 1, 2 }
2772};
2773
2774#define ICE_FD_SRC_DST_PAIR_COUNT ARRAY_SIZE(ice_fd_pairs)
2775
2776/**
2777 * ice_update_fd_swap - set register appropriately for a FD FV extraction
2778 * @hw: pointer to the HW struct
2779 * @prof_id: profile ID
2780 * @es: extraction sequence (length of array is determined by the block)
2781 */
2782static int
2783ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
2784{
2785 DECLARE_BITMAP(pair_list, ICE_FD_SRC_DST_PAIR_COUNT);
2786 u8 pair_start[ICE_FD_SRC_DST_PAIR_COUNT] = { 0 };
2787#define ICE_FD_FV_NOT_FOUND (-2)
2788 s8 first_free = ICE_FD_FV_NOT_FOUND;
2789 u8 used[ICE_MAX_FV_WORDS] = { 0 };
2790 s8 orig_free, si;
2791 u32 mask_sel = 0;
2792 u8 i, j, k;
2793
2794 bitmap_zero(pair_list, ICE_FD_SRC_DST_PAIR_COUNT);
2795
2796 /* This code assumes that the Flow Director field vectors are assigned
2797 * from the end of the FV indexes working towards the zero index, that
2798 * only complete fields will be included and will be consecutive, and
2799 * that there are no gaps between valid indexes.
2800 */
2801
2802 /* Determine swap fields present */
2803 for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) {
2804 /* Find the first free entry, assuming right to left population.
2805 * This is where we can start adding additional pairs if needed.
2806 */
2807 if (first_free == ICE_FD_FV_NOT_FOUND && es[i].prot_id !=
2808 ICE_PROT_INVALID)
2809 first_free = i - 1;
2810
2811 for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++)
2812 if (es[i].prot_id == ice_fd_pairs[j].prot_id &&
2813 es[i].off == ice_fd_pairs[j].off) {
2814 __set_bit(j, pair_list);
2815 pair_start[j] = i;
2816 }
2817 }
2818
2819 orig_free = first_free;
2820
2821 /* determine missing swap fields that need to be added */
2822 for (i = 0; i < ICE_FD_SRC_DST_PAIR_COUNT; i += 2) {
2823 u8 bit1 = test_bit(i + 1, pair_list);
2824 u8 bit0 = test_bit(i, pair_list);
2825
2826 if (bit0 ^ bit1) {
2827 u8 index;
2828
2829 /* add the appropriate 'paired' entry */
2830 if (!bit0)
2831 index = i;
2832 else
2833 index = i + 1;
2834
2835 /* check for room */
2836 if (first_free + 1 < (s8)ice_fd_pairs[index].count)
2837 return -ENOSPC;
2838
2839 /* place in extraction sequence */
2840 for (k = 0; k < ice_fd_pairs[index].count; k++) {
2841 es[first_free - k].prot_id =
2842 ice_fd_pairs[index].prot_id;
2843 es[first_free - k].off =
2844 ice_fd_pairs[index].off + (k * 2);
2845
2846 if (k > first_free)
2847 return -EIO;
2848
2849 /* keep track of non-relevant fields */
2850 mask_sel |= BIT(first_free - k);
2851 }
2852
2853 pair_start[index] = first_free;
2854 first_free -= ice_fd_pairs[index].count;
2855 }
2856 }
2857
2858 /* fill in the swap array */
2859 si = hw->blk[ICE_BLK_FD].es.fvw - 1;
2860 while (si >= 0) {
2861 u8 indexes_used = 1;
2862
2863 /* assume flat at this index */
2864#define ICE_SWAP_VALID 0x80
2865 used[si] = si | ICE_SWAP_VALID;
2866
2867 if (orig_free == ICE_FD_FV_NOT_FOUND || si <= orig_free) {
2868 si -= indexes_used;
2869 continue;
2870 }
2871
2872 /* check for a swap location */
2873 for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++)
2874 if (es[si].prot_id == ice_fd_pairs[j].prot_id &&
2875 es[si].off == ice_fd_pairs[j].off) {
2876 u8 idx;
2877
2878 /* determine the appropriate matching field */
2879 idx = j + ((j % 2) ? -1 : 1);
2880
2881 indexes_used = ice_fd_pairs[idx].count;
2882 for (k = 0; k < indexes_used; k++) {
2883 used[si - k] = (pair_start[idx] - k) |
2884 ICE_SWAP_VALID;
2885 }
2886
2887 break;
2888 }
2889
2890 si -= indexes_used;
2891 }
2892
2893 /* for each set of 4 swap and 4 inset indexes, write the appropriate
2894 * register
2895 */
2896 for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) {
2897 u32 raw_swap = 0;
2898 u32 raw_in = 0;
2899
2900 for (k = 0; k < 4; k++) {
2901 u8 idx;
2902
2903 idx = (j * 4) + k;
2904 if (used[idx] && !(mask_sel & BIT(idx))) {
2905 raw_swap |= used[idx] << (k * BITS_PER_BYTE);
2906#define ICE_INSET_DFLT 0x9f
2907 raw_in |= ICE_INSET_DFLT << (k * BITS_PER_BYTE);
2908 }
2909 }
2910
2911 /* write the appropriate swap register set */
2912 wr32(hw, GLQF_FDSWAP(prof_id, j), raw_swap);
2913
2914 ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %08x\n",
2915 prof_id, j, GLQF_FDSWAP(prof_id, j), raw_swap);
2916
2917 /* write the appropriate inset register set */
2918 wr32(hw, GLQF_FDINSET(prof_id, j), raw_in);
2919
2920 ice_debug(hw, ICE_DBG_INIT, "inset wr(%d, %d): %x = %08x\n",
2921 prof_id, j, GLQF_FDINSET(prof_id, j), raw_in);
2922 }
2923
2924 /* initially clear the mask select for this profile */
2925 ice_update_fd_mask(hw, prof_id, 0);
2926
2927 return 0;
2928}
2929
2930/* The entries here needs to match the order of enum ice_ptype_attrib */
2931static const struct ice_ptype_attrib_info ice_ptype_attributes[] = {
2932 { ICE_GTP_PDU_EH, ICE_GTP_PDU_FLAG_MASK },
2933 { ICE_GTP_SESSION, ICE_GTP_FLAGS_MASK },
2934 { ICE_GTP_DOWNLINK, ICE_GTP_FLAGS_MASK },
2935 { ICE_GTP_UPLINK, ICE_GTP_FLAGS_MASK },
2936};
2937
2938/**
2939 * ice_get_ptype_attrib_info - get PTYPE attribute information
2940 * @type: attribute type
2941 * @info: pointer to variable to the attribute information
2942 */
2943static void
2944ice_get_ptype_attrib_info(enum ice_ptype_attrib_type type,
2945 struct ice_ptype_attrib_info *info)
2946{
2947 *info = ice_ptype_attributes[type];
2948}
2949
2950/**
2951 * ice_add_prof_attrib - add any PTG with attributes to profile
2952 * @prof: pointer to the profile to which PTG entries will be added
2953 * @ptg: PTG to be added
2954 * @ptype: PTYPE that needs to be looked up
2955 * @attr: array of attributes that will be considered
2956 * @attr_cnt: number of elements in the attribute array
2957 */
2958static int
2959ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,
2960 const struct ice_ptype_attributes *attr, u16 attr_cnt)
2961{
2962 bool found = false;
2963 u16 i;
2964
2965 for (i = 0; i < attr_cnt; i++)
2966 if (attr[i].ptype == ptype) {
2967 found = true;
2968
2969 prof->ptg[prof->ptg_cnt] = ptg;
2970 ice_get_ptype_attrib_info(attr[i].attrib,
2971 &prof->attr[prof->ptg_cnt]);
2972
2973 if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE)
2974 return -ENOSPC;
2975 }
2976
2977 if (!found)
2978 return -ENOENT;
2979
2980 return 0;
2981}
2982
2983/**
2984 * ice_disable_fd_swap - set register appropriately to disable FD SWAP
2985 * @hw: pointer to the HW struct
2986 * @prof_id: profile ID
2987 */
2988static void
2989ice_disable_fd_swap(struct ice_hw *hw, u8 prof_id)
2990{
2991 u16 swap_val, fvw_num;
2992 unsigned int i;
2993
2994 swap_val = ICE_SWAP_VALID;
2995 fvw_num = hw->blk[ICE_BLK_FD].es.fvw / ICE_FDIR_REG_SET_SIZE;
2996
2997 /* Since the SWAP Flag in the Programming Desc doesn't work,
2998 * here add method to disable the SWAP Option via setting
2999 * certain SWAP and INSET register sets.
3000 */
3001 for (i = 0; i < fvw_num ; i++) {
3002 u32 raw_swap, raw_in;
3003 unsigned int j;
3004
3005 raw_swap = 0;
3006 raw_in = 0;
3007
3008 for (j = 0; j < ICE_FDIR_REG_SET_SIZE; j++) {
3009 raw_swap |= (swap_val++) << (j * BITS_PER_BYTE);
3010 raw_in |= ICE_INSET_DFLT << (j * BITS_PER_BYTE);
3011 }
3012
3013 /* write the FDIR swap register set */
3014 wr32(hw, GLQF_FDSWAP(prof_id, i), raw_swap);
3015
3016 ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): 0x%x = 0x%08x\n",
3017 prof_id, i, GLQF_FDSWAP(prof_id, i), raw_swap);
3018
3019 /* write the FDIR inset register set */
3020 wr32(hw, GLQF_FDINSET(prof_id, i), raw_in);
3021
3022 ice_debug(hw, ICE_DBG_INIT, "inset wr(%d, %d): 0x%x = 0x%08x\n",
3023 prof_id, i, GLQF_FDINSET(prof_id, i), raw_in);
3024 }
3025}
3026
3027/*
3028 * ice_add_prof - add profile
3029 * @hw: pointer to the HW struct
3030 * @blk: hardware block
3031 * @id: profile tracking ID
3032 * @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits)
3033 * @attr: array of attributes
3034 * @attr_cnt: number of elements in attr array
3035 * @es: extraction sequence (length of array is determined by the block)
3036 * @masks: mask for extraction sequence
3037 * @symm: symmetric setting for RSS profiles
3038 * @fd_swap: enable/disable FDIR paired src/dst fields swap option
3039 *
3040 * This function registers a profile, which matches a set of PTYPES with a
3041 * particular extraction sequence. While the hardware profile is allocated
3042 * it will not be written until the first call to ice_add_flow that specifies
3043 * the ID value used here.
3044 */
3045int
3046ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
3047 const struct ice_ptype_attributes *attr, u16 attr_cnt,
3048 struct ice_fv_word *es, u16 *masks, bool symm, bool fd_swap)
3049{
3050 u32 bytes = DIV_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE);
3051 DECLARE_BITMAP(ptgs_used, ICE_XLT1_CNT);
3052 struct ice_prof_map *prof;
3053 u8 byte = 0;
3054 u8 prof_id;
3055 int status;
3056
3057 bitmap_zero(ptgs_used, ICE_XLT1_CNT);
3058
3059 mutex_lock(&hw->blk[blk].es.prof_map_lock);
3060
3061 /* search for existing profile */
3062 status = ice_find_prof_id_with_mask(hw, blk, es, masks, symm, &prof_id);
3063 if (status) {
3064 /* allocate profile ID */
3065 status = ice_alloc_prof_id(hw, blk, &prof_id);
3066 if (status)
3067 goto err_ice_add_prof;
3068 if (blk == ICE_BLK_FD && fd_swap) {
3069 /* For Flow Director block, the extraction sequence may
3070 * need to be altered in the case where there are paired
3071 * fields that have no match. This is necessary because
3072 * for Flow Director, src and dest fields need to paired
3073 * for filter programming and these values are swapped
3074 * during Tx.
3075 */
3076 status = ice_update_fd_swap(hw, prof_id, es);
3077 if (status)
3078 goto err_ice_add_prof;
3079 } else if (blk == ICE_BLK_FD) {
3080 ice_disable_fd_swap(hw, prof_id);
3081 }
3082 status = ice_update_prof_masking(hw, blk, prof_id, masks);
3083 if (status)
3084 goto err_ice_add_prof;
3085
3086 /* and write new es */
3087 ice_write_es(hw, blk, prof_id, es, symm);
3088 }
3089
3090 ice_prof_inc_ref(hw, blk, prof_id);
3091
3092 /* add profile info */
3093 prof = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*prof), GFP_KERNEL);
3094 if (!prof) {
3095 status = -ENOMEM;
3096 goto err_ice_add_prof;
3097 }
3098
3099 prof->profile_cookie = id;
3100 prof->prof_id = prof_id;
3101 prof->ptg_cnt = 0;
3102 prof->context = 0;
3103
3104 /* build list of ptgs */
3105 while (bytes && prof->ptg_cnt < ICE_MAX_PTG_PER_PROFILE) {
3106 u8 bit;
3107
3108 if (!ptypes[byte]) {
3109 bytes--;
3110 byte++;
3111 continue;
3112 }
3113
3114 /* Examine 8 bits per byte */
3115 for_each_set_bit(bit, (unsigned long *)&ptypes[byte],
3116 BITS_PER_BYTE) {
3117 u16 ptype;
3118 u8 ptg;
3119
3120 ptype = byte * BITS_PER_BYTE + bit;
3121
3122 /* The package should place all ptypes in a non-zero
3123 * PTG, so the following call should never fail.
3124 */
3125 if (ice_ptg_find_ptype(hw, blk, ptype, &ptg))
3126 continue;
3127
3128 /* If PTG is already added, skip and continue */
3129 if (test_bit(ptg, ptgs_used))
3130 continue;
3131
3132 __set_bit(ptg, ptgs_used);
3133 /* Check to see there are any attributes for
3134 * this PTYPE, and add them if found.
3135 */
3136 status = ice_add_prof_attrib(prof, ptg, ptype,
3137 attr, attr_cnt);
3138 if (status == -ENOSPC)
3139 break;
3140 if (status) {
3141 /* This is simple a PTYPE/PTG with no
3142 * attribute
3143 */
3144 prof->ptg[prof->ptg_cnt] = ptg;
3145 prof->attr[prof->ptg_cnt].flags = 0;
3146 prof->attr[prof->ptg_cnt].mask = 0;
3147
3148 if (++prof->ptg_cnt >=
3149 ICE_MAX_PTG_PER_PROFILE)
3150 break;
3151 }
3152 }
3153
3154 bytes--;
3155 byte++;
3156 }
3157
3158 list_add(&prof->list, &hw->blk[blk].es.prof_map);
3159 status = 0;
3160
3161err_ice_add_prof:
3162 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
3163 return status;
3164}
3165
3166/**
3167 * ice_search_prof_id - Search for a profile tracking ID
3168 * @hw: pointer to the HW struct
3169 * @blk: hardware block
3170 * @id: profile tracking ID
3171 *
3172 * This will search for a profile tracking ID which was previously added.
3173 * The profile map lock should be held before calling this function.
3174 */
3175struct ice_prof_map *
3176ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id)
3177{
3178 struct ice_prof_map *entry = NULL;
3179 struct ice_prof_map *map;
3180
3181 list_for_each_entry(map, &hw->blk[blk].es.prof_map, list)
3182 if (map->profile_cookie == id) {
3183 entry = map;
3184 break;
3185 }
3186
3187 return entry;
3188}
3189
3190/**
3191 * ice_vsig_prof_id_count - count profiles in a VSIG
3192 * @hw: pointer to the HW struct
3193 * @blk: hardware block
3194 * @vsig: VSIG to remove the profile from
3195 */
3196static u16
3197ice_vsig_prof_id_count(struct ice_hw *hw, enum ice_block blk, u16 vsig)
3198{
3199 u16 idx = vsig & ICE_VSIG_IDX_M, count = 0;
3200 struct ice_vsig_prof *p;
3201
3202 list_for_each_entry(p, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
3203 list)
3204 count++;
3205
3206 return count;
3207}
3208
3209/**
3210 * ice_rel_tcam_idx - release a TCAM index
3211 * @hw: pointer to the HW struct
3212 * @blk: hardware block
3213 * @idx: the index to release
3214 */
3215static int ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
3216{
3217 /* Masks to invoke a never match entry */
3218 u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
3219 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFE, 0xFF, 0xFF, 0xFF, 0xFF };
3220 u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x01, 0x00, 0x00, 0x00, 0x00 };
3221 int status;
3222
3223 /* write the TCAM entry */
3224 status = ice_tcam_write_entry(hw, blk, idx, 0, 0, 0, 0, 0, vl_msk,
3225 dc_msk, nm_msk);
3226 if (status)
3227 return status;
3228
3229 /* release the TCAM entry */
3230 status = ice_free_tcam_ent(hw, blk, idx);
3231
3232 return status;
3233}
3234
3235/**
3236 * ice_rem_prof_id - remove one profile from a VSIG
3237 * @hw: pointer to the HW struct
3238 * @blk: hardware block
3239 * @prof: pointer to profile structure to remove
3240 */
3241static int
3242ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
3243 struct ice_vsig_prof *prof)
3244{
3245 int status;
3246 u16 i;
3247
3248 for (i = 0; i < prof->tcam_count; i++)
3249 if (prof->tcam[i].in_use) {
3250 prof->tcam[i].in_use = false;
3251 status = ice_rel_tcam_idx(hw, blk,
3252 prof->tcam[i].tcam_idx);
3253 if (status)
3254 return -EIO;
3255 }
3256
3257 return 0;
3258}
3259
3260/**
3261 * ice_rem_vsig - remove VSIG
3262 * @hw: pointer to the HW struct
3263 * @blk: hardware block
3264 * @vsig: the VSIG to remove
3265 * @chg: the change list
3266 */
3267static int
3268ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
3269 struct list_head *chg)
3270{
3271 u16 idx = vsig & ICE_VSIG_IDX_M;
3272 struct ice_vsig_vsi *vsi_cur;
3273 struct ice_vsig_prof *d, *t;
3274
3275 /* remove TCAM entries */
3276 list_for_each_entry_safe(d, t,
3277 &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
3278 list) {
3279 int status;
3280
3281 status = ice_rem_prof_id(hw, blk, d);
3282 if (status)
3283 return status;
3284
3285 list_del(&d->list);
3286 devm_kfree(ice_hw_to_dev(hw), d);
3287 }
3288
3289 /* Move all VSIS associated with this VSIG to the default VSIG */
3290 vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
3291 /* If the VSIG has at least 1 VSI then iterate through the list
3292 * and remove the VSIs before deleting the group.
3293 */
3294 if (vsi_cur)
3295 do {
3296 struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
3297 struct ice_chs_chg *p;
3298
3299 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p),
3300 GFP_KERNEL);
3301 if (!p)
3302 return -ENOMEM;
3303
3304 p->type = ICE_VSIG_REM;
3305 p->orig_vsig = vsig;
3306 p->vsig = ICE_DEFAULT_VSIG;
3307 p->vsi = vsi_cur - hw->blk[blk].xlt2.vsis;
3308
3309 list_add(&p->list_entry, chg);
3310
3311 vsi_cur = tmp;
3312 } while (vsi_cur);
3313
3314 return ice_vsig_free(hw, blk, vsig);
3315}
3316
3317/**
3318 * ice_rem_prof_id_vsig - remove a specific profile from a VSIG
3319 * @hw: pointer to the HW struct
3320 * @blk: hardware block
3321 * @vsig: VSIG to remove the profile from
3322 * @hdl: profile handle indicating which profile to remove
3323 * @chg: list to receive a record of changes
3324 */
3325static int
3326ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
3327 struct list_head *chg)
3328{
3329 u16 idx = vsig & ICE_VSIG_IDX_M;
3330 struct ice_vsig_prof *p, *t;
3331
3332 list_for_each_entry_safe(p, t,
3333 &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
3334 list)
3335 if (p->profile_cookie == hdl) {
3336 int status;
3337
3338 if (ice_vsig_prof_id_count(hw, blk, vsig) == 1)
3339 /* this is the last profile, remove the VSIG */
3340 return ice_rem_vsig(hw, blk, vsig, chg);
3341
3342 status = ice_rem_prof_id(hw, blk, p);
3343 if (!status) {
3344 list_del(&p->list);
3345 devm_kfree(ice_hw_to_dev(hw), p);
3346 }
3347 return status;
3348 }
3349
3350 return -ENOENT;
3351}
3352
3353/**
3354 * ice_rem_flow_all - remove all flows with a particular profile
3355 * @hw: pointer to the HW struct
3356 * @blk: hardware block
3357 * @id: profile tracking ID
3358 */
3359static int ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
3360{
3361 struct ice_chs_chg *del, *tmp;
3362 struct list_head chg;
3363 int status;
3364 u16 i;
3365
3366 INIT_LIST_HEAD(&chg);
3367
3368 for (i = 1; i < ICE_MAX_VSIGS; i++)
3369 if (hw->blk[blk].xlt2.vsig_tbl[i].in_use) {
3370 if (ice_has_prof_vsig(hw, blk, i, id)) {
3371 status = ice_rem_prof_id_vsig(hw, blk, i, id,
3372 &chg);
3373 if (status)
3374 goto err_ice_rem_flow_all;
3375 }
3376 }
3377
3378 status = ice_upd_prof_hw(hw, blk, &chg);
3379
3380err_ice_rem_flow_all:
3381 list_for_each_entry_safe(del, tmp, &chg, list_entry) {
3382 list_del(&del->list_entry);
3383 devm_kfree(ice_hw_to_dev(hw), del);
3384 }
3385
3386 return status;
3387}
3388
3389/**
3390 * ice_rem_prof - remove profile
3391 * @hw: pointer to the HW struct
3392 * @blk: hardware block
3393 * @id: profile tracking ID
3394 *
3395 * This will remove the profile specified by the ID parameter, which was
3396 * previously created through ice_add_prof. If any existing entries
3397 * are associated with this profile, they will be removed as well.
3398 */
3399int ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
3400{
3401 struct ice_prof_map *pmap;
3402 int status;
3403
3404 mutex_lock(&hw->blk[blk].es.prof_map_lock);
3405
3406 pmap = ice_search_prof_id(hw, blk, id);
3407 if (!pmap) {
3408 status = -ENOENT;
3409 goto err_ice_rem_prof;
3410 }
3411
3412 /* remove all flows with this profile */
3413 status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);
3414 if (status)
3415 goto err_ice_rem_prof;
3416
3417 /* dereference profile, and possibly remove */
3418 ice_prof_dec_ref(hw, blk, pmap->prof_id);
3419
3420 list_del(&pmap->list);
3421 devm_kfree(ice_hw_to_dev(hw), pmap);
3422
3423err_ice_rem_prof:
3424 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
3425 return status;
3426}
3427
3428/**
3429 * ice_get_prof - get profile
3430 * @hw: pointer to the HW struct
3431 * @blk: hardware block
3432 * @hdl: profile handle
3433 * @chg: change list
3434 */
3435static int
3436ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl,
3437 struct list_head *chg)
3438{
3439 struct ice_prof_map *map;
3440 struct ice_chs_chg *p;
3441 int status = 0;
3442 u16 i;
3443
3444 mutex_lock(&hw->blk[blk].es.prof_map_lock);
3445 /* Get the details on the profile specified by the handle ID */
3446 map = ice_search_prof_id(hw, blk, hdl);
3447 if (!map) {
3448 status = -ENOENT;
3449 goto err_ice_get_prof;
3450 }
3451
3452 for (i = 0; i < map->ptg_cnt; i++)
3453 if (!hw->blk[blk].es.written[map->prof_id]) {
3454 /* add ES to change list */
3455 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p),
3456 GFP_KERNEL);
3457 if (!p) {
3458 status = -ENOMEM;
3459 goto err_ice_get_prof;
3460 }
3461
3462 p->type = ICE_PTG_ES_ADD;
3463 p->ptype = 0;
3464 p->ptg = map->ptg[i];
3465 p->add_ptg = 0;
3466
3467 p->add_prof = 1;
3468 p->prof_id = map->prof_id;
3469
3470 hw->blk[blk].es.written[map->prof_id] = true;
3471
3472 list_add(&p->list_entry, chg);
3473 }
3474
3475err_ice_get_prof:
3476 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
3477 /* let caller clean up the change list */
3478 return status;
3479}
3480
3481/**
3482 * ice_get_profs_vsig - get a copy of the list of profiles from a VSIG
3483 * @hw: pointer to the HW struct
3484 * @blk: hardware block
3485 * @vsig: VSIG from which to copy the list
3486 * @lst: output list
3487 *
3488 * This routine makes a copy of the list of profiles in the specified VSIG.
3489 */
3490static int
3491ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
3492 struct list_head *lst)
3493{
3494 struct ice_vsig_prof *ent1, *ent2;
3495 u16 idx = vsig & ICE_VSIG_IDX_M;
3496
3497 list_for_each_entry(ent1, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
3498 list) {
3499 struct ice_vsig_prof *p;
3500
3501 /* copy to the input list */
3502 p = devm_kmemdup(ice_hw_to_dev(hw), ent1, sizeof(*p),
3503 GFP_KERNEL);
3504 if (!p)
3505 goto err_ice_get_profs_vsig;
3506
3507 list_add_tail(&p->list, lst);
3508 }
3509
3510 return 0;
3511
3512err_ice_get_profs_vsig:
3513 list_for_each_entry_safe(ent1, ent2, lst, list) {
3514 list_del(&ent1->list);
3515 devm_kfree(ice_hw_to_dev(hw), ent1);
3516 }
3517
3518 return -ENOMEM;
3519}
3520
3521/**
3522 * ice_add_prof_to_lst - add profile entry to a list
3523 * @hw: pointer to the HW struct
3524 * @blk: hardware block
3525 * @lst: the list to be added to
3526 * @hdl: profile handle of entry to add
3527 */
3528static int
3529ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
3530 struct list_head *lst, u64 hdl)
3531{
3532 struct ice_prof_map *map;
3533 struct ice_vsig_prof *p;
3534 int status = 0;
3535 u16 i;
3536
3537 mutex_lock(&hw->blk[blk].es.prof_map_lock);
3538 map = ice_search_prof_id(hw, blk, hdl);
3539 if (!map) {
3540 status = -ENOENT;
3541 goto err_ice_add_prof_to_lst;
3542 }
3543
3544 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
3545 if (!p) {
3546 status = -ENOMEM;
3547 goto err_ice_add_prof_to_lst;
3548 }
3549
3550 p->profile_cookie = map->profile_cookie;
3551 p->prof_id = map->prof_id;
3552 p->tcam_count = map->ptg_cnt;
3553
3554 for (i = 0; i < map->ptg_cnt; i++) {
3555 p->tcam[i].prof_id = map->prof_id;
3556 p->tcam[i].tcam_idx = ICE_INVALID_TCAM;
3557 p->tcam[i].ptg = map->ptg[i];
3558 }
3559
3560 list_add(&p->list, lst);
3561
3562err_ice_add_prof_to_lst:
3563 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
3564 return status;
3565}
3566
3567/**
3568 * ice_move_vsi - move VSI to another VSIG
3569 * @hw: pointer to the HW struct
3570 * @blk: hardware block
3571 * @vsi: the VSI to move
3572 * @vsig: the VSIG to move the VSI to
3573 * @chg: the change list
3574 */
3575static int
3576ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig,
3577 struct list_head *chg)
3578{
3579 struct ice_chs_chg *p;
3580 u16 orig_vsig;
3581 int status;
3582
3583 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
3584 if (!p)
3585 return -ENOMEM;
3586
3587 status = ice_vsig_find_vsi(hw, blk, vsi, &orig_vsig);
3588 if (!status)
3589 status = ice_vsig_add_mv_vsi(hw, blk, vsi, vsig);
3590
3591 if (status) {
3592 devm_kfree(ice_hw_to_dev(hw), p);
3593 return status;
3594 }
3595
3596 p->type = ICE_VSI_MOVE;
3597 p->vsi = vsi;
3598 p->orig_vsig = orig_vsig;
3599 p->vsig = vsig;
3600
3601 list_add(&p->list_entry, chg);
3602
3603 return 0;
3604}
3605
3606/**
3607 * ice_rem_chg_tcam_ent - remove a specific TCAM entry from change list
3608 * @hw: pointer to the HW struct
3609 * @idx: the index of the TCAM entry to remove
3610 * @chg: the list of change structures to search
3611 */
3612static void
3613ice_rem_chg_tcam_ent(struct ice_hw *hw, u16 idx, struct list_head *chg)
3614{
3615 struct ice_chs_chg *pos, *tmp;
3616
3617 list_for_each_entry_safe(tmp, pos, chg, list_entry)
3618 if (tmp->type == ICE_TCAM_ADD && tmp->tcam_idx == idx) {
3619 list_del(&tmp->list_entry);
3620 devm_kfree(ice_hw_to_dev(hw), tmp);
3621 }
3622}
3623
3624/**
3625 * ice_prof_tcam_ena_dis - add enable or disable TCAM change
3626 * @hw: pointer to the HW struct
3627 * @blk: hardware block
3628 * @enable: true to enable, false to disable
3629 * @vsig: the VSIG of the TCAM entry
3630 * @tcam: pointer the TCAM info structure of the TCAM to disable
3631 * @chg: the change list
3632 *
3633 * This function appends an enable or disable TCAM entry in the change log
3634 */
3635static int
3636ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
3637 u16 vsig, struct ice_tcam_inf *tcam,
3638 struct list_head *chg)
3639{
3640 struct ice_chs_chg *p;
3641 int status;
3642
3643 u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
3644 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0x00, 0x00, 0x00 };
3645 u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x00, 0x00, 0x00, 0x00, 0x00 };
3646
3647 /* if disabling, free the TCAM */
3648 if (!enable) {
3649 status = ice_rel_tcam_idx(hw, blk, tcam->tcam_idx);
3650
3651 /* if we have already created a change for this TCAM entry, then
3652 * we need to remove that entry, in order to prevent writing to
3653 * a TCAM entry we no longer will have ownership of.
3654 */
3655 ice_rem_chg_tcam_ent(hw, tcam->tcam_idx, chg);
3656 tcam->tcam_idx = 0;
3657 tcam->in_use = 0;
3658 return status;
3659 }
3660
3661 /* for re-enabling, reallocate a TCAM */
3662 /* for entries with empty attribute masks, allocate entry from
3663 * the bottom of the TCAM table; otherwise, allocate from the
3664 * top of the table in order to give it higher priority
3665 */
3666 status = ice_alloc_tcam_ent(hw, blk, tcam->attr.mask == 0,
3667 &tcam->tcam_idx);
3668 if (status)
3669 return status;
3670
3671 /* add TCAM to change list */
3672 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
3673 if (!p)
3674 return -ENOMEM;
3675
3676 status = ice_tcam_write_entry(hw, blk, tcam->tcam_idx, tcam->prof_id,
3677 tcam->ptg, vsig, 0, tcam->attr.flags,
3678 vl_msk, dc_msk, nm_msk);
3679 if (status)
3680 goto err_ice_prof_tcam_ena_dis;
3681
3682 tcam->in_use = 1;
3683
3684 p->type = ICE_TCAM_ADD;
3685 p->add_tcam_idx = true;
3686 p->prof_id = tcam->prof_id;
3687 p->ptg = tcam->ptg;
3688 p->vsig = 0;
3689 p->tcam_idx = tcam->tcam_idx;
3690
3691 /* log change */
3692 list_add(&p->list_entry, chg);
3693
3694 return 0;
3695
3696err_ice_prof_tcam_ena_dis:
3697 devm_kfree(ice_hw_to_dev(hw), p);
3698 return status;
3699}
3700
3701/**
3702 * ice_adj_prof_priorities - adjust profile based on priorities
3703 * @hw: pointer to the HW struct
3704 * @blk: hardware block
3705 * @vsig: the VSIG for which to adjust profile priorities
3706 * @chg: the change list
3707 */
3708static int
3709ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
3710 struct list_head *chg)
3711{
3712 DECLARE_BITMAP(ptgs_used, ICE_XLT1_CNT);
3713 struct ice_vsig_prof *t;
3714 int status;
3715 u16 idx;
3716
3717 bitmap_zero(ptgs_used, ICE_XLT1_CNT);
3718 idx = vsig & ICE_VSIG_IDX_M;
3719
3720 /* Priority is based on the order in which the profiles are added. The
3721 * newest added profile has highest priority and the oldest added
3722 * profile has the lowest priority. Since the profile property list for
3723 * a VSIG is sorted from newest to oldest, this code traverses the list
3724 * in order and enables the first of each PTG that it finds (that is not
3725 * already enabled); it also disables any duplicate PTGs that it finds
3726 * in the older profiles (that are currently enabled).
3727 */
3728
3729 list_for_each_entry(t, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
3730 list) {
3731 u16 i;
3732
3733 for (i = 0; i < t->tcam_count; i++) {
3734 /* Scan the priorities from newest to oldest.
3735 * Make sure that the newest profiles take priority.
3736 */
3737 if (test_bit(t->tcam[i].ptg, ptgs_used) &&
3738 t->tcam[i].in_use) {
3739 /* need to mark this PTG as never match, as it
3740 * was already in use and therefore duplicate
3741 * (and lower priority)
3742 */
3743 status = ice_prof_tcam_ena_dis(hw, blk, false,
3744 vsig,
3745 &t->tcam[i],
3746 chg);
3747 if (status)
3748 return status;
3749 } else if (!test_bit(t->tcam[i].ptg, ptgs_used) &&
3750 !t->tcam[i].in_use) {
3751 /* need to enable this PTG, as it in not in use
3752 * and not enabled (highest priority)
3753 */
3754 status = ice_prof_tcam_ena_dis(hw, blk, true,
3755 vsig,
3756 &t->tcam[i],
3757 chg);
3758 if (status)
3759 return status;
3760 }
3761
3762 /* keep track of used ptgs */
3763 __set_bit(t->tcam[i].ptg, ptgs_used);
3764 }
3765 }
3766
3767 return 0;
3768}
3769
3770/**
3771 * ice_add_prof_id_vsig - add profile to VSIG
3772 * @hw: pointer to the HW struct
3773 * @blk: hardware block
3774 * @vsig: the VSIG to which this profile is to be added
3775 * @hdl: the profile handle indicating the profile to add
3776 * @rev: true to add entries to the end of the list
3777 * @chg: the change list
3778 */
3779static int
3780ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
3781 bool rev, struct list_head *chg)
3782{
3783 /* Masks that ignore flags */
3784 u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
3785 u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0x00, 0x00, 0x00 };
3786 u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x00, 0x00, 0x00, 0x00, 0x00 };
3787 struct ice_prof_map *map;
3788 struct ice_vsig_prof *t;
3789 struct ice_chs_chg *p;
3790 u16 vsig_idx, i;
3791 int status = 0;
3792
3793 /* Error, if this VSIG already has this profile */
3794 if (ice_has_prof_vsig(hw, blk, vsig, hdl))
3795 return -EEXIST;
3796
3797 /* new VSIG profile structure */
3798 t = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*t), GFP_KERNEL);
3799 if (!t)
3800 return -ENOMEM;
3801
3802 mutex_lock(&hw->blk[blk].es.prof_map_lock);
3803 /* Get the details on the profile specified by the handle ID */
3804 map = ice_search_prof_id(hw, blk, hdl);
3805 if (!map) {
3806 status = -ENOENT;
3807 goto err_ice_add_prof_id_vsig;
3808 }
3809
3810 t->profile_cookie = map->profile_cookie;
3811 t->prof_id = map->prof_id;
3812 t->tcam_count = map->ptg_cnt;
3813
3814 /* create TCAM entries */
3815 for (i = 0; i < map->ptg_cnt; i++) {
3816 u16 tcam_idx;
3817
3818 /* add TCAM to change list */
3819 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
3820 if (!p) {
3821 status = -ENOMEM;
3822 goto err_ice_add_prof_id_vsig;
3823 }
3824
3825 /* allocate the TCAM entry index */
3826 /* for entries with empty attribute masks, allocate entry from
3827 * the bottom of the TCAM table; otherwise, allocate from the
3828 * top of the table in order to give it higher priority
3829 */
3830 status = ice_alloc_tcam_ent(hw, blk, map->attr[i].mask == 0,
3831 &tcam_idx);
3832 if (status) {
3833 devm_kfree(ice_hw_to_dev(hw), p);
3834 goto err_ice_add_prof_id_vsig;
3835 }
3836
3837 t->tcam[i].ptg = map->ptg[i];
3838 t->tcam[i].prof_id = map->prof_id;
3839 t->tcam[i].tcam_idx = tcam_idx;
3840 t->tcam[i].attr = map->attr[i];
3841 t->tcam[i].in_use = true;
3842
3843 p->type = ICE_TCAM_ADD;
3844 p->add_tcam_idx = true;
3845 p->prof_id = t->tcam[i].prof_id;
3846 p->ptg = t->tcam[i].ptg;
3847 p->vsig = vsig;
3848 p->tcam_idx = t->tcam[i].tcam_idx;
3849
3850 /* write the TCAM entry */
3851 status = ice_tcam_write_entry(hw, blk, t->tcam[i].tcam_idx,
3852 t->tcam[i].prof_id,
3853 t->tcam[i].ptg, vsig, 0, 0,
3854 vl_msk, dc_msk, nm_msk);
3855 if (status) {
3856 devm_kfree(ice_hw_to_dev(hw), p);
3857 goto err_ice_add_prof_id_vsig;
3858 }
3859
3860 /* log change */
3861 list_add(&p->list_entry, chg);
3862 }
3863
3864 /* add profile to VSIG */
3865 vsig_idx = vsig & ICE_VSIG_IDX_M;
3866 if (rev)
3867 list_add_tail(&t->list,
3868 &hw->blk[blk].xlt2.vsig_tbl[vsig_idx].prop_lst);
3869 else
3870 list_add(&t->list,
3871 &hw->blk[blk].xlt2.vsig_tbl[vsig_idx].prop_lst);
3872
3873 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
3874 return status;
3875
3876err_ice_add_prof_id_vsig:
3877 mutex_unlock(&hw->blk[blk].es.prof_map_lock);
3878 /* let caller clean up the change list */
3879 devm_kfree(ice_hw_to_dev(hw), t);
3880 return status;
3881}
3882
3883/**
3884 * ice_create_prof_id_vsig - add a new VSIG with a single profile
3885 * @hw: pointer to the HW struct
3886 * @blk: hardware block
3887 * @vsi: the initial VSI that will be in VSIG
3888 * @hdl: the profile handle of the profile that will be added to the VSIG
3889 * @chg: the change list
3890 */
3891static int
3892ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
3893 struct list_head *chg)
3894{
3895 struct ice_chs_chg *p;
3896 u16 new_vsig;
3897 int status;
3898
3899 p = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*p), GFP_KERNEL);
3900 if (!p)
3901 return -ENOMEM;
3902
3903 new_vsig = ice_vsig_alloc(hw, blk);
3904 if (!new_vsig) {
3905 status = -EIO;
3906 goto err_ice_create_prof_id_vsig;
3907 }
3908
3909 status = ice_move_vsi(hw, blk, vsi, new_vsig, chg);
3910 if (status)
3911 goto err_ice_create_prof_id_vsig;
3912
3913 status = ice_add_prof_id_vsig(hw, blk, new_vsig, hdl, false, chg);
3914 if (status)
3915 goto err_ice_create_prof_id_vsig;
3916
3917 p->type = ICE_VSIG_ADD;
3918 p->vsi = vsi;
3919 p->orig_vsig = ICE_DEFAULT_VSIG;
3920 p->vsig = new_vsig;
3921
3922 list_add(&p->list_entry, chg);
3923
3924 return 0;
3925
3926err_ice_create_prof_id_vsig:
3927 /* let caller clean up the change list */
3928 devm_kfree(ice_hw_to_dev(hw), p);
3929 return status;
3930}
3931
3932/**
3933 * ice_create_vsig_from_lst - create a new VSIG with a list of profiles
3934 * @hw: pointer to the HW struct
3935 * @blk: hardware block
3936 * @vsi: the initial VSI that will be in VSIG
3937 * @lst: the list of profile that will be added to the VSIG
3938 * @new_vsig: return of new VSIG
3939 * @chg: the change list
3940 */
3941static int
3942ice_create_vsig_from_lst(struct ice_hw *hw, enum ice_block blk, u16 vsi,
3943 struct list_head *lst, u16 *new_vsig,
3944 struct list_head *chg)
3945{
3946 struct ice_vsig_prof *t;
3947 int status;
3948 u16 vsig;
3949
3950 vsig = ice_vsig_alloc(hw, blk);
3951 if (!vsig)
3952 return -EIO;
3953
3954 status = ice_move_vsi(hw, blk, vsi, vsig, chg);
3955 if (status)
3956 return status;
3957
3958 list_for_each_entry(t, lst, list) {
3959 /* Reverse the order here since we are copying the list */
3960 status = ice_add_prof_id_vsig(hw, blk, vsig, t->profile_cookie,
3961 true, chg);
3962 if (status)
3963 return status;
3964 }
3965
3966 *new_vsig = vsig;
3967
3968 return 0;
3969}
3970
3971/**
3972 * ice_find_prof_vsig - find a VSIG with a specific profile handle
3973 * @hw: pointer to the HW struct
3974 * @blk: hardware block
3975 * @hdl: the profile handle of the profile to search for
3976 * @vsig: returns the VSIG with the matching profile
3977 */
3978static bool
3979ice_find_prof_vsig(struct ice_hw *hw, enum ice_block blk, u64 hdl, u16 *vsig)
3980{
3981 struct ice_vsig_prof *t;
3982 struct list_head lst;
3983 int status;
3984
3985 INIT_LIST_HEAD(&lst);
3986
3987 t = kzalloc(sizeof(*t), GFP_KERNEL);
3988 if (!t)
3989 return false;
3990
3991 t->profile_cookie = hdl;
3992 list_add(&t->list, &lst);
3993
3994 status = ice_find_dup_props_vsig(hw, blk, &lst, vsig);
3995
3996 list_del(&t->list);
3997 kfree(t);
3998
3999 return !status;
4000}
4001
4002/**
4003 * ice_add_prof_id_flow - add profile flow
4004 * @hw: pointer to the HW struct
4005 * @blk: hardware block
4006 * @vsi: the VSI to enable with the profile specified by ID
4007 * @hdl: profile handle
4008 *
4009 * Calling this function will update the hardware tables to enable the
4010 * profile indicated by the ID parameter for the VSIs specified in the VSI
4011 * array. Once successfully called, the flow will be enabled.
4012 */
4013int
4014ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
4015{
4016 struct ice_vsig_prof *tmp1, *del1;
4017 struct ice_chs_chg *tmp, *del;
4018 struct list_head union_lst;
4019 struct list_head chg;
4020 int status;
4021 u16 vsig;
4022
4023 INIT_LIST_HEAD(&union_lst);
4024 INIT_LIST_HEAD(&chg);
4025
4026 /* Get profile */
4027 status = ice_get_prof(hw, blk, hdl, &chg);
4028 if (status)
4029 return status;
4030
4031 /* determine if VSI is already part of a VSIG */
4032 status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
4033 if (!status && vsig) {
4034 bool only_vsi;
4035 u16 or_vsig;
4036 u16 ref;
4037
4038 /* found in VSIG */
4039 or_vsig = vsig;
4040
4041 /* make sure that there is no overlap/conflict between the new
4042 * characteristics and the existing ones; we don't support that
4043 * scenario
4044 */
4045 if (ice_has_prof_vsig(hw, blk, vsig, hdl)) {
4046 status = -EEXIST;
4047 goto err_ice_add_prof_id_flow;
4048 }
4049
4050 /* last VSI in the VSIG? */
4051 status = ice_vsig_get_ref(hw, blk, vsig, &ref);
4052 if (status)
4053 goto err_ice_add_prof_id_flow;
4054 only_vsi = (ref == 1);
4055
4056 /* create a union of the current profiles and the one being
4057 * added
4058 */
4059 status = ice_get_profs_vsig(hw, blk, vsig, &union_lst);
4060 if (status)
4061 goto err_ice_add_prof_id_flow;
4062
4063 status = ice_add_prof_to_lst(hw, blk, &union_lst, hdl);
4064 if (status)
4065 goto err_ice_add_prof_id_flow;
4066
4067 /* search for an existing VSIG with an exact charc match */
4068 status = ice_find_dup_props_vsig(hw, blk, &union_lst, &vsig);
4069 if (!status) {
4070 /* move VSI to the VSIG that matches */
4071 status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
4072 if (status)
4073 goto err_ice_add_prof_id_flow;
4074
4075 /* VSI has been moved out of or_vsig. If the or_vsig had
4076 * only that VSI it is now empty and can be removed.
4077 */
4078 if (only_vsi) {
4079 status = ice_rem_vsig(hw, blk, or_vsig, &chg);
4080 if (status)
4081 goto err_ice_add_prof_id_flow;
4082 }
4083 } else if (only_vsi) {
4084 /* If the original VSIG only contains one VSI, then it
4085 * will be the requesting VSI. In this case the VSI is
4086 * not sharing entries and we can simply add the new
4087 * profile to the VSIG.
4088 */
4089 status = ice_add_prof_id_vsig(hw, blk, vsig, hdl, false,
4090 &chg);
4091 if (status)
4092 goto err_ice_add_prof_id_flow;
4093
4094 /* Adjust priorities */
4095 status = ice_adj_prof_priorities(hw, blk, vsig, &chg);
4096 if (status)
4097 goto err_ice_add_prof_id_flow;
4098 } else {
4099 /* No match, so we need a new VSIG */
4100 status = ice_create_vsig_from_lst(hw, blk, vsi,
4101 &union_lst, &vsig,
4102 &chg);
4103 if (status)
4104 goto err_ice_add_prof_id_flow;
4105
4106 /* Adjust priorities */
4107 status = ice_adj_prof_priorities(hw, blk, vsig, &chg);
4108 if (status)
4109 goto err_ice_add_prof_id_flow;
4110 }
4111 } else {
4112 /* need to find or add a VSIG */
4113 /* search for an existing VSIG with an exact charc match */
4114 if (ice_find_prof_vsig(hw, blk, hdl, &vsig)) {
4115 /* found an exact match */
4116 /* add or move VSI to the VSIG that matches */
4117 status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
4118 if (status)
4119 goto err_ice_add_prof_id_flow;
4120 } else {
4121 /* we did not find an exact match */
4122 /* we need to add a VSIG */
4123 status = ice_create_prof_id_vsig(hw, blk, vsi, hdl,
4124 &chg);
4125 if (status)
4126 goto err_ice_add_prof_id_flow;
4127 }
4128 }
4129
4130 /* update hardware */
4131 if (!status)
4132 status = ice_upd_prof_hw(hw, blk, &chg);
4133
4134err_ice_add_prof_id_flow:
4135 list_for_each_entry_safe(del, tmp, &chg, list_entry) {
4136 list_del(&del->list_entry);
4137 devm_kfree(ice_hw_to_dev(hw), del);
4138 }
4139
4140 list_for_each_entry_safe(del1, tmp1, &union_lst, list) {
4141 list_del(&del1->list);
4142 devm_kfree(ice_hw_to_dev(hw), del1);
4143 }
4144
4145 return status;
4146}
4147
4148/**
4149 * ice_flow_assoc_fdir_prof - add an FDIR profile for main/ctrl VSI
4150 * @hw: pointer to the HW struct
4151 * @blk: HW block
4152 * @dest_vsi: dest VSI
4153 * @fdir_vsi: fdir programming VSI
4154 * @hdl: profile handle
4155 *
4156 * Update the hardware tables to enable the FDIR profile indicated by @hdl for
4157 * the VSI specified by @dest_vsi. On success, the flow will be enabled.
4158 *
4159 * Return: 0 on success or negative errno on failure.
4160 */
4161int
4162ice_flow_assoc_fdir_prof(struct ice_hw *hw, enum ice_block blk,
4163 u16 dest_vsi, u16 fdir_vsi, u64 hdl)
4164{
4165 u16 vsi_num;
4166 int status;
4167
4168 if (blk != ICE_BLK_FD)
4169 return -EINVAL;
4170
4171 vsi_num = ice_get_hw_vsi_num(hw, dest_vsi);
4172 status = ice_add_prof_id_flow(hw, blk, vsi_num, hdl);
4173 if (status) {
4174 ice_debug(hw, ICE_DBG_FLOW, "Adding HW profile failed for main VSI flow entry: %d\n",
4175 status);
4176 return status;
4177 }
4178
4179 vsi_num = ice_get_hw_vsi_num(hw, fdir_vsi);
4180 status = ice_add_prof_id_flow(hw, blk, vsi_num, hdl);
4181 if (status) {
4182 ice_debug(hw, ICE_DBG_FLOW, "Adding HW profile failed for ctrl VSI flow entry: %d\n",
4183 status);
4184 goto err;
4185 }
4186
4187 return 0;
4188
4189err:
4190 vsi_num = ice_get_hw_vsi_num(hw, dest_vsi);
4191 ice_rem_prof_id_flow(hw, blk, vsi_num, hdl);
4192
4193 return status;
4194}
4195
4196/**
4197 * ice_rem_prof_from_list - remove a profile from list
4198 * @hw: pointer to the HW struct
4199 * @lst: list to remove the profile from
4200 * @hdl: the profile handle indicating the profile to remove
4201 */
4202static int
4203ice_rem_prof_from_list(struct ice_hw *hw, struct list_head *lst, u64 hdl)
4204{
4205 struct ice_vsig_prof *ent, *tmp;
4206
4207 list_for_each_entry_safe(ent, tmp, lst, list)
4208 if (ent->profile_cookie == hdl) {
4209 list_del(&ent->list);
4210 devm_kfree(ice_hw_to_dev(hw), ent);
4211 return 0;
4212 }
4213
4214 return -ENOENT;
4215}
4216
4217/**
4218 * ice_rem_prof_id_flow - remove flow
4219 * @hw: pointer to the HW struct
4220 * @blk: hardware block
4221 * @vsi: the VSI from which to remove the profile specified by ID
4222 * @hdl: profile tracking handle
4223 *
4224 * Calling this function will update the hardware tables to remove the
4225 * profile indicated by the ID parameter for the VSIs specified in the VSI
4226 * array. Once successfully called, the flow will be disabled.
4227 */
4228int
4229ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
4230{
4231 struct ice_vsig_prof *tmp1, *del1;
4232 struct ice_chs_chg *tmp, *del;
4233 struct list_head chg, copy;
4234 int status;
4235 u16 vsig;
4236
4237 INIT_LIST_HEAD(©);
4238 INIT_LIST_HEAD(&chg);
4239
4240 /* determine if VSI is already part of a VSIG */
4241 status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);
4242 if (!status && vsig) {
4243 bool last_profile;
4244 bool only_vsi;
4245 u16 ref;
4246
4247 /* found in VSIG */
4248 last_profile = ice_vsig_prof_id_count(hw, blk, vsig) == 1;
4249 status = ice_vsig_get_ref(hw, blk, vsig, &ref);
4250 if (status)
4251 goto err_ice_rem_prof_id_flow;
4252 only_vsi = (ref == 1);
4253
4254 if (only_vsi) {
4255 /* If the original VSIG only contains one reference,
4256 * which will be the requesting VSI, then the VSI is not
4257 * sharing entries and we can simply remove the specific
4258 * characteristics from the VSIG.
4259 */
4260
4261 if (last_profile) {
4262 /* If there are no profiles left for this VSIG,
4263 * then simply remove the VSIG.
4264 */
4265 status = ice_rem_vsig(hw, blk, vsig, &chg);
4266 if (status)
4267 goto err_ice_rem_prof_id_flow;
4268 } else {
4269 status = ice_rem_prof_id_vsig(hw, blk, vsig,
4270 hdl, &chg);
4271 if (status)
4272 goto err_ice_rem_prof_id_flow;
4273
4274 /* Adjust priorities */
4275 status = ice_adj_prof_priorities(hw, blk, vsig,
4276 &chg);
4277 if (status)
4278 goto err_ice_rem_prof_id_flow;
4279 }
4280
4281 } else {
4282 /* Make a copy of the VSIG's list of Profiles */
4283 status = ice_get_profs_vsig(hw, blk, vsig, ©);
4284 if (status)
4285 goto err_ice_rem_prof_id_flow;
4286
4287 /* Remove specified profile entry from the list */
4288 status = ice_rem_prof_from_list(hw, ©, hdl);
4289 if (status)
4290 goto err_ice_rem_prof_id_flow;
4291
4292 if (list_empty(©)) {
4293 status = ice_move_vsi(hw, blk, vsi,
4294 ICE_DEFAULT_VSIG, &chg);
4295 if (status)
4296 goto err_ice_rem_prof_id_flow;
4297
4298 } else if (!ice_find_dup_props_vsig(hw, blk, ©,
4299 &vsig)) {
4300 /* found an exact match */
4301 /* add or move VSI to the VSIG that matches */
4302 /* Search for a VSIG with a matching profile
4303 * list
4304 */
4305
4306 /* Found match, move VSI to the matching VSIG */
4307 status = ice_move_vsi(hw, blk, vsi, vsig, &chg);
4308 if (status)
4309 goto err_ice_rem_prof_id_flow;
4310 } else {
4311 /* since no existing VSIG supports this
4312 * characteristic pattern, we need to create a
4313 * new VSIG and TCAM entries
4314 */
4315 status = ice_create_vsig_from_lst(hw, blk, vsi,
4316 ©, &vsig,
4317 &chg);
4318 if (status)
4319 goto err_ice_rem_prof_id_flow;
4320
4321 /* Adjust priorities */
4322 status = ice_adj_prof_priorities(hw, blk, vsig,
4323 &chg);
4324 if (status)
4325 goto err_ice_rem_prof_id_flow;
4326 }
4327 }
4328 } else {
4329 status = -ENOENT;
4330 }
4331
4332 /* update hardware tables */
4333 if (!status)
4334 status = ice_upd_prof_hw(hw, blk, &chg);
4335
4336err_ice_rem_prof_id_flow:
4337 list_for_each_entry_safe(del, tmp, &chg, list_entry) {
4338 list_del(&del->list_entry);
4339 devm_kfree(ice_hw_to_dev(hw), del);
4340 }
4341
4342 list_for_each_entry_safe(del1, tmp1, ©, list) {
4343 list_del(&del1->list);
4344 devm_kfree(ice_hw_to_dev(hw), del1);
4345 }
4346
4347 return status;
4348}
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2019, Intel Corporation. */
3
4#include "ice_common.h"
5#include "ice_flex_pipe.h"
6
7/**
8 * ice_pkg_val_buf
9 * @buf: pointer to the ice buffer
10 *
11 * This helper function validates a buffer's header.
12 */
13static struct ice_buf_hdr *ice_pkg_val_buf(struct ice_buf *buf)
14{
15 struct ice_buf_hdr *hdr;
16 u16 section_count;
17 u16 data_end;
18
19 hdr = (struct ice_buf_hdr *)buf->buf;
20 /* verify data */
21 section_count = le16_to_cpu(hdr->section_count);
22 if (section_count < ICE_MIN_S_COUNT || section_count > ICE_MAX_S_COUNT)
23 return NULL;
24
25 data_end = le16_to_cpu(hdr->data_end);
26 if (data_end < ICE_MIN_S_DATA_END || data_end > ICE_MAX_S_DATA_END)
27 return NULL;
28
29 return hdr;
30}
31
32/**
33 * ice_find_buf_table
34 * @ice_seg: pointer to the ice segment
35 *
36 * Returns the address of the buffer table within the ice segment.
37 */
38static struct ice_buf_table *ice_find_buf_table(struct ice_seg *ice_seg)
39{
40 struct ice_nvm_table *nvms;
41
42 nvms = (struct ice_nvm_table *)
43 (ice_seg->device_table +
44 le32_to_cpu(ice_seg->device_table_count));
45
46 return (__force struct ice_buf_table *)
47 (nvms->vers + le32_to_cpu(nvms->table_count));
48}
49
50/**
51 * ice_pkg_enum_buf
52 * @ice_seg: pointer to the ice segment (or NULL on subsequent calls)
53 * @state: pointer to the enum state
54 *
55 * This function will enumerate all the buffers in the ice segment. The first
56 * call is made with the ice_seg parameter non-NULL; on subsequent calls,
57 * ice_seg is set to NULL which continues the enumeration. When the function
58 * returns a NULL pointer, then the end of the buffers has been reached, or an
59 * unexpected value has been detected (for example an invalid section count or
60 * an invalid buffer end value).
61 */
62static struct ice_buf_hdr *
63ice_pkg_enum_buf(struct ice_seg *ice_seg, struct ice_pkg_enum *state)
64{
65 if (ice_seg) {
66 state->buf_table = ice_find_buf_table(ice_seg);
67 if (!state->buf_table)
68 return NULL;
69
70 state->buf_idx = 0;
71 return ice_pkg_val_buf(state->buf_table->buf_array);
72 }
73
74 if (++state->buf_idx < le32_to_cpu(state->buf_table->buf_count))
75 return ice_pkg_val_buf(state->buf_table->buf_array +
76 state->buf_idx);
77 else
78 return NULL;
79}
80
81/**
82 * ice_pkg_advance_sect
83 * @ice_seg: pointer to the ice segment (or NULL on subsequent calls)
84 * @state: pointer to the enum state
85 *
86 * This helper function will advance the section within the ice segment,
87 * also advancing the buffer if needed.
88 */
89static bool
90ice_pkg_advance_sect(struct ice_seg *ice_seg, struct ice_pkg_enum *state)
91{
92 if (!ice_seg && !state->buf)
93 return false;
94
95 if (!ice_seg && state->buf)
96 if (++state->sect_idx < le16_to_cpu(state->buf->section_count))
97 return true;
98
99 state->buf = ice_pkg_enum_buf(ice_seg, state);
100 if (!state->buf)
101 return false;
102
103 /* start of new buffer, reset section index */
104 state->sect_idx = 0;
105 return true;
106}
107
108/**
109 * ice_pkg_enum_section
110 * @ice_seg: pointer to the ice segment (or NULL on subsequent calls)
111 * @state: pointer to the enum state
112 * @sect_type: section type to enumerate
113 *
114 * This function will enumerate all the sections of a particular type in the
115 * ice segment. The first call is made with the ice_seg parameter non-NULL;
116 * on subsequent calls, ice_seg is set to NULL which continues the enumeration.
117 * When the function returns a NULL pointer, then the end of the matching
118 * sections has been reached.
119 */
120static void *
121ice_pkg_enum_section(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
122 u32 sect_type)
123{
124 u16 offset, size;
125
126 if (ice_seg)
127 state->type = sect_type;
128
129 if (!ice_pkg_advance_sect(ice_seg, state))
130 return NULL;
131
132 /* scan for next matching section */
133 while (state->buf->section_entry[state->sect_idx].type !=
134 cpu_to_le32(state->type))
135 if (!ice_pkg_advance_sect(NULL, state))
136 return NULL;
137
138 /* validate section */
139 offset = le16_to_cpu(state->buf->section_entry[state->sect_idx].offset);
140 if (offset < ICE_MIN_S_OFF || offset > ICE_MAX_S_OFF)
141 return NULL;
142
143 size = le16_to_cpu(state->buf->section_entry[state->sect_idx].size);
144 if (size < ICE_MIN_S_SZ || size > ICE_MAX_S_SZ)
145 return NULL;
146
147 /* make sure the section fits in the buffer */
148 if (offset + size > ICE_PKG_BUF_SIZE)
149 return NULL;
150
151 state->sect_type =
152 le32_to_cpu(state->buf->section_entry[state->sect_idx].type);
153
154 /* calc pointer to this section */
155 state->sect = ((u8 *)state->buf) +
156 le16_to_cpu(state->buf->section_entry[state->sect_idx].offset);
157
158 return state->sect;
159}
160
161/**
162 * ice_acquire_global_cfg_lock
163 * @hw: pointer to the HW structure
164 * @access: access type (read or write)
165 *
166 * This function will request ownership of the global config lock for reading
167 * or writing of the package. When attempting to obtain write access, the
168 * caller must check for the following two return values:
169 *
170 * ICE_SUCCESS - Means the caller has acquired the global config lock
171 * and can perform writing of the package.
172 * ICE_ERR_AQ_NO_WORK - Indicates another driver has already written the
173 * package or has found that no update was necessary; in
174 * this case, the caller can just skip performing any
175 * update of the package.
176 */
177static enum ice_status
178ice_acquire_global_cfg_lock(struct ice_hw *hw,
179 enum ice_aq_res_access_type access)
180{
181 enum ice_status status;
182
183 status = ice_acquire_res(hw, ICE_GLOBAL_CFG_LOCK_RES_ID, access,
184 ICE_GLOBAL_CFG_LOCK_TIMEOUT);
185
186 if (!status)
187 mutex_lock(&ice_global_cfg_lock_sw);
188 else if (status == ICE_ERR_AQ_NO_WORK)
189 ice_debug(hw, ICE_DBG_PKG,
190 "Global config lock: No work to do\n");
191
192 return status;
193}
194
195/**
196 * ice_release_global_cfg_lock
197 * @hw: pointer to the HW structure
198 *
199 * This function will release the global config lock.
200 */
201static void ice_release_global_cfg_lock(struct ice_hw *hw)
202{
203 mutex_unlock(&ice_global_cfg_lock_sw);
204 ice_release_res(hw, ICE_GLOBAL_CFG_LOCK_RES_ID);
205}
206
207/**
208 * ice_aq_download_pkg
209 * @hw: pointer to the hardware structure
210 * @pkg_buf: the package buffer to transfer
211 * @buf_size: the size of the package buffer
212 * @last_buf: last buffer indicator
213 * @error_offset: returns error offset
214 * @error_info: returns error information
215 * @cd: pointer to command details structure or NULL
216 *
217 * Download Package (0x0C40)
218 */
219static enum ice_status
220ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
221 u16 buf_size, bool last_buf, u32 *error_offset,
222 u32 *error_info, struct ice_sq_cd *cd)
223{
224 struct ice_aqc_download_pkg *cmd;
225 struct ice_aq_desc desc;
226 enum ice_status status;
227
228 if (error_offset)
229 *error_offset = 0;
230 if (error_info)
231 *error_info = 0;
232
233 cmd = &desc.params.download_pkg;
234 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_download_pkg);
235 desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);
236
237 if (last_buf)
238 cmd->flags |= ICE_AQC_DOWNLOAD_PKG_LAST_BUF;
239
240 status = ice_aq_send_cmd(hw, &desc, pkg_buf, buf_size, cd);
241 if (status == ICE_ERR_AQ_ERROR) {
242 /* Read error from buffer only when the FW returned an error */
243 struct ice_aqc_download_pkg_resp *resp;
244
245 resp = (struct ice_aqc_download_pkg_resp *)pkg_buf;
246 if (error_offset)
247 *error_offset = le32_to_cpu(resp->error_offset);
248 if (error_info)
249 *error_info = le32_to_cpu(resp->error_info);
250 }
251
252 return status;
253}
254
255/**
256 * ice_find_seg_in_pkg
257 * @hw: pointer to the hardware structure
258 * @seg_type: the segment type to search for (i.e., SEGMENT_TYPE_CPK)
259 * @pkg_hdr: pointer to the package header to be searched
260 *
261 * This function searches a package file for a particular segment type. On
262 * success it returns a pointer to the segment header, otherwise it will
263 * return NULL.
264 */
265static struct ice_generic_seg_hdr *
266ice_find_seg_in_pkg(struct ice_hw *hw, u32 seg_type,
267 struct ice_pkg_hdr *pkg_hdr)
268{
269 u32 i;
270
271 ice_debug(hw, ICE_DBG_PKG, "Package format version: %d.%d.%d.%d\n",
272 pkg_hdr->format_ver.major, pkg_hdr->format_ver.minor,
273 pkg_hdr->format_ver.update, pkg_hdr->format_ver.draft);
274
275 /* Search all package segments for the requested segment type */
276 for (i = 0; i < le32_to_cpu(pkg_hdr->seg_count); i++) {
277 struct ice_generic_seg_hdr *seg;
278
279 seg = (struct ice_generic_seg_hdr *)
280 ((u8 *)pkg_hdr + le32_to_cpu(pkg_hdr->seg_offset[i]));
281
282 if (le32_to_cpu(seg->seg_type) == seg_type)
283 return seg;
284 }
285
286 return NULL;
287}
288
289/**
290 * ice_dwnld_cfg_bufs
291 * @hw: pointer to the hardware structure
292 * @bufs: pointer to an array of buffers
293 * @count: the number of buffers in the array
294 *
295 * Obtains global config lock and downloads the package configuration buffers
296 * to the firmware. Metadata buffers are skipped, and the first metadata buffer
297 * found indicates that the rest of the buffers are all metadata buffers.
298 */
299static enum ice_status
300ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
301{
302 enum ice_status status;
303 struct ice_buf_hdr *bh;
304 u32 offset, info, i;
305
306 if (!bufs || !count)
307 return ICE_ERR_PARAM;
308
309 /* If the first buffer's first section has its metadata bit set
310 * then there are no buffers to be downloaded, and the operation is
311 * considered a success.
312 */
313 bh = (struct ice_buf_hdr *)bufs;
314 if (le32_to_cpu(bh->section_entry[0].type) & ICE_METADATA_BUF)
315 return 0;
316
317 /* reset pkg_dwnld_status in case this function is called in the
318 * reset/rebuild flow
319 */
320 hw->pkg_dwnld_status = ICE_AQ_RC_OK;
321
322 status = ice_acquire_global_cfg_lock(hw, ICE_RES_WRITE);
323 if (status) {
324 if (status == ICE_ERR_AQ_NO_WORK)
325 hw->pkg_dwnld_status = ICE_AQ_RC_EEXIST;
326 else
327 hw->pkg_dwnld_status = hw->adminq.sq_last_status;
328 return status;
329 }
330
331 for (i = 0; i < count; i++) {
332 bool last = ((i + 1) == count);
333
334 if (!last) {
335 /* check next buffer for metadata flag */
336 bh = (struct ice_buf_hdr *)(bufs + i + 1);
337
338 /* A set metadata flag in the next buffer will signal
339 * that the current buffer will be the last buffer
340 * downloaded
341 */
342 if (le16_to_cpu(bh->section_count))
343 if (le32_to_cpu(bh->section_entry[0].type) &
344 ICE_METADATA_BUF)
345 last = true;
346 }
347
348 bh = (struct ice_buf_hdr *)(bufs + i);
349
350 status = ice_aq_download_pkg(hw, bh, ICE_PKG_BUF_SIZE, last,
351 &offset, &info, NULL);
352
353 /* Save AQ status from download package */
354 hw->pkg_dwnld_status = hw->adminq.sq_last_status;
355 if (status) {
356 ice_debug(hw, ICE_DBG_PKG,
357 "Pkg download failed: err %d off %d inf %d\n",
358 status, offset, info);
359
360 break;
361 }
362
363 if (last)
364 break;
365 }
366
367 ice_release_global_cfg_lock(hw);
368
369 return status;
370}
371
372/**
373 * ice_aq_get_pkg_info_list
374 * @hw: pointer to the hardware structure
375 * @pkg_info: the buffer which will receive the information list
376 * @buf_size: the size of the pkg_info information buffer
377 * @cd: pointer to command details structure or NULL
378 *
379 * Get Package Info List (0x0C43)
380 */
381static enum ice_status
382ice_aq_get_pkg_info_list(struct ice_hw *hw,
383 struct ice_aqc_get_pkg_info_resp *pkg_info,
384 u16 buf_size, struct ice_sq_cd *cd)
385{
386 struct ice_aq_desc desc;
387
388 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_pkg_info_list);
389
390 return ice_aq_send_cmd(hw, &desc, pkg_info, buf_size, cd);
391}
392
393/**
394 * ice_download_pkg
395 * @hw: pointer to the hardware structure
396 * @ice_seg: pointer to the segment of the package to be downloaded
397 *
398 * Handles the download of a complete package.
399 */
400static enum ice_status
401ice_download_pkg(struct ice_hw *hw, struct ice_seg *ice_seg)
402{
403 struct ice_buf_table *ice_buf_tbl;
404
405 ice_debug(hw, ICE_DBG_PKG, "Segment version: %d.%d.%d.%d\n",
406 ice_seg->hdr.seg_ver.major, ice_seg->hdr.seg_ver.minor,
407 ice_seg->hdr.seg_ver.update, ice_seg->hdr.seg_ver.draft);
408
409 ice_debug(hw, ICE_DBG_PKG, "Seg: type 0x%X, size %d, name %s\n",
410 le32_to_cpu(ice_seg->hdr.seg_type),
411 le32_to_cpu(ice_seg->hdr.seg_size), ice_seg->hdr.seg_name);
412
413 ice_buf_tbl = ice_find_buf_table(ice_seg);
414
415 ice_debug(hw, ICE_DBG_PKG, "Seg buf count: %d\n",
416 le32_to_cpu(ice_buf_tbl->buf_count));
417
418 return ice_dwnld_cfg_bufs(hw, ice_buf_tbl->buf_array,
419 le32_to_cpu(ice_buf_tbl->buf_count));
420}
421
422/**
423 * ice_init_pkg_info
424 * @hw: pointer to the hardware structure
425 * @pkg_hdr: pointer to the driver's package hdr
426 *
427 * Saves off the package details into the HW structure.
428 */
429static enum ice_status
430ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
431{
432 struct ice_global_metadata_seg *meta_seg;
433 struct ice_generic_seg_hdr *seg_hdr;
434
435 if (!pkg_hdr)
436 return ICE_ERR_PARAM;
437
438 meta_seg = (struct ice_global_metadata_seg *)
439 ice_find_seg_in_pkg(hw, SEGMENT_TYPE_METADATA, pkg_hdr);
440 if (meta_seg) {
441 hw->pkg_ver = meta_seg->pkg_ver;
442 memcpy(hw->pkg_name, meta_seg->pkg_name, sizeof(hw->pkg_name));
443
444 ice_debug(hw, ICE_DBG_PKG, "Pkg: %d.%d.%d.%d, %s\n",
445 meta_seg->pkg_ver.major, meta_seg->pkg_ver.minor,
446 meta_seg->pkg_ver.update, meta_seg->pkg_ver.draft,
447 meta_seg->pkg_name);
448 } else {
449 ice_debug(hw, ICE_DBG_INIT,
450 "Did not find metadata segment in driver package\n");
451 return ICE_ERR_CFG;
452 }
453
454 seg_hdr = ice_find_seg_in_pkg(hw, SEGMENT_TYPE_ICE, pkg_hdr);
455 if (seg_hdr) {
456 hw->ice_pkg_ver = seg_hdr->seg_ver;
457 memcpy(hw->ice_pkg_name, seg_hdr->seg_name,
458 sizeof(hw->ice_pkg_name));
459
460 ice_debug(hw, ICE_DBG_PKG, "Ice Pkg: %d.%d.%d.%d, %s\n",
461 seg_hdr->seg_ver.major, seg_hdr->seg_ver.minor,
462 seg_hdr->seg_ver.update, seg_hdr->seg_ver.draft,
463 seg_hdr->seg_name);
464 } else {
465 ice_debug(hw, ICE_DBG_INIT,
466 "Did not find ice segment in driver package\n");
467 return ICE_ERR_CFG;
468 }
469
470 return 0;
471}
472
473/**
474 * ice_get_pkg_info
475 * @hw: pointer to the hardware structure
476 *
477 * Store details of the package currently loaded in HW into the HW structure.
478 */
479static enum ice_status ice_get_pkg_info(struct ice_hw *hw)
480{
481 struct ice_aqc_get_pkg_info_resp *pkg_info;
482 enum ice_status status;
483 u16 size;
484 u32 i;
485
486 size = sizeof(*pkg_info) + (sizeof(pkg_info->pkg_info[0]) *
487 (ICE_PKG_CNT - 1));
488 pkg_info = kzalloc(size, GFP_KERNEL);
489 if (!pkg_info)
490 return ICE_ERR_NO_MEMORY;
491
492 status = ice_aq_get_pkg_info_list(hw, pkg_info, size, NULL);
493 if (status)
494 goto init_pkg_free_alloc;
495
496 for (i = 0; i < le32_to_cpu(pkg_info->count); i++) {
497#define ICE_PKG_FLAG_COUNT 4
498 char flags[ICE_PKG_FLAG_COUNT + 1] = { 0 };
499 u8 place = 0;
500
501 if (pkg_info->pkg_info[i].is_active) {
502 flags[place++] = 'A';
503 hw->active_pkg_ver = pkg_info->pkg_info[i].ver;
504 memcpy(hw->active_pkg_name,
505 pkg_info->pkg_info[i].name,
506 sizeof(hw->active_pkg_name));
507 hw->active_pkg_in_nvm = pkg_info->pkg_info[i].is_in_nvm;
508 }
509 if (pkg_info->pkg_info[i].is_active_at_boot)
510 flags[place++] = 'B';
511 if (pkg_info->pkg_info[i].is_modified)
512 flags[place++] = 'M';
513 if (pkg_info->pkg_info[i].is_in_nvm)
514 flags[place++] = 'N';
515
516 ice_debug(hw, ICE_DBG_PKG, "Pkg[%d]: %d.%d.%d.%d,%s,%s\n",
517 i, pkg_info->pkg_info[i].ver.major,
518 pkg_info->pkg_info[i].ver.minor,
519 pkg_info->pkg_info[i].ver.update,
520 pkg_info->pkg_info[i].ver.draft,
521 pkg_info->pkg_info[i].name, flags);
522 }
523
524init_pkg_free_alloc:
525 kfree(pkg_info);
526
527 return status;
528}
529
530/**
531 * ice_verify_pkg - verify package
532 * @pkg: pointer to the package buffer
533 * @len: size of the package buffer
534 *
535 * Verifies various attributes of the package file, including length, format
536 * version, and the requirement of at least one segment.
537 */
538static enum ice_status ice_verify_pkg(struct ice_pkg_hdr *pkg, u32 len)
539{
540 u32 seg_count;
541 u32 i;
542
543 if (len < sizeof(*pkg))
544 return ICE_ERR_BUF_TOO_SHORT;
545
546 if (pkg->format_ver.major != ICE_PKG_FMT_VER_MAJ ||
547 pkg->format_ver.minor != ICE_PKG_FMT_VER_MNR ||
548 pkg->format_ver.update != ICE_PKG_FMT_VER_UPD ||
549 pkg->format_ver.draft != ICE_PKG_FMT_VER_DFT)
550 return ICE_ERR_CFG;
551
552 /* pkg must have at least one segment */
553 seg_count = le32_to_cpu(pkg->seg_count);
554 if (seg_count < 1)
555 return ICE_ERR_CFG;
556
557 /* make sure segment array fits in package length */
558 if (len < sizeof(*pkg) + ((seg_count - 1) * sizeof(pkg->seg_offset)))
559 return ICE_ERR_BUF_TOO_SHORT;
560
561 /* all segments must fit within length */
562 for (i = 0; i < seg_count; i++) {
563 u32 off = le32_to_cpu(pkg->seg_offset[i]);
564 struct ice_generic_seg_hdr *seg;
565
566 /* segment header must fit */
567 if (len < off + sizeof(*seg))
568 return ICE_ERR_BUF_TOO_SHORT;
569
570 seg = (struct ice_generic_seg_hdr *)((u8 *)pkg + off);
571
572 /* segment body must fit */
573 if (len < off + le32_to_cpu(seg->seg_size))
574 return ICE_ERR_BUF_TOO_SHORT;
575 }
576
577 return 0;
578}
579
580/**
581 * ice_free_seg - free package segment pointer
582 * @hw: pointer to the hardware structure
583 *
584 * Frees the package segment pointer in the proper manner, depending on if the
585 * segment was allocated or just the passed in pointer was stored.
586 */
587void ice_free_seg(struct ice_hw *hw)
588{
589 if (hw->pkg_copy) {
590 devm_kfree(ice_hw_to_dev(hw), hw->pkg_copy);
591 hw->pkg_copy = NULL;
592 hw->pkg_size = 0;
593 }
594 hw->seg = NULL;
595}
596
597/**
598 * ice_init_pkg_regs - initialize additional package registers
599 * @hw: pointer to the hardware structure
600 */
601static void ice_init_pkg_regs(struct ice_hw *hw)
602{
603#define ICE_SW_BLK_INP_MASK_L 0xFFFFFFFF
604#define ICE_SW_BLK_INP_MASK_H 0x0000FFFF
605#define ICE_SW_BLK_IDX 0
606
607 /* setup Switch block input mask, which is 48-bits in two parts */
608 wr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L);
609 wr32(hw, GL_PREEXT_L2_PMASK1(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_H);
610}
611
612/**
613 * ice_chk_pkg_version - check package version for compatibility with driver
614 * @pkg_ver: pointer to a version structure to check
615 *
616 * Check to make sure that the package about to be downloaded is compatible with
617 * the driver. To be compatible, the major and minor components of the package
618 * version must match our ICE_PKG_SUPP_VER_MAJ and ICE_PKG_SUPP_VER_MNR
619 * definitions.
620 */
621static enum ice_status ice_chk_pkg_version(struct ice_pkg_ver *pkg_ver)
622{
623 if (pkg_ver->major != ICE_PKG_SUPP_VER_MAJ ||
624 pkg_ver->minor != ICE_PKG_SUPP_VER_MNR)
625 return ICE_ERR_NOT_SUPPORTED;
626
627 return 0;
628}
629
630/**
631 * ice_init_pkg - initialize/download package
632 * @hw: pointer to the hardware structure
633 * @buf: pointer to the package buffer
634 * @len: size of the package buffer
635 *
636 * This function initializes a package. The package contains HW tables
637 * required to do packet processing. First, the function extracts package
638 * information such as version. Then it finds the ice configuration segment
639 * within the package; this function then saves a copy of the segment pointer
640 * within the supplied package buffer. Next, the function will cache any hints
641 * from the package, followed by downloading the package itself. Note, that if
642 * a previous PF driver has already downloaded the package successfully, then
643 * the current driver will not have to download the package again.
644 *
645 * The local package contents will be used to query default behavior and to
646 * update specific sections of the HW's version of the package (e.g. to update
647 * the parse graph to understand new protocols).
648 *
649 * This function stores a pointer to the package buffer memory, and it is
650 * expected that the supplied buffer will not be freed immediately. If the
651 * package buffer needs to be freed, such as when read from a file, use
652 * ice_copy_and_init_pkg() instead of directly calling ice_init_pkg() in this
653 * case.
654 */
655enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
656{
657 struct ice_pkg_hdr *pkg;
658 enum ice_status status;
659 struct ice_seg *seg;
660
661 if (!buf || !len)
662 return ICE_ERR_PARAM;
663
664 pkg = (struct ice_pkg_hdr *)buf;
665 status = ice_verify_pkg(pkg, len);
666 if (status) {
667 ice_debug(hw, ICE_DBG_INIT, "failed to verify pkg (err: %d)\n",
668 status);
669 return status;
670 }
671
672 /* initialize package info */
673 status = ice_init_pkg_info(hw, pkg);
674 if (status)
675 return status;
676
677 /* before downloading the package, check package version for
678 * compatibility with driver
679 */
680 status = ice_chk_pkg_version(&hw->pkg_ver);
681 if (status)
682 return status;
683
684 /* find segment in given package */
685 seg = (struct ice_seg *)ice_find_seg_in_pkg(hw, SEGMENT_TYPE_ICE, pkg);
686 if (!seg) {
687 ice_debug(hw, ICE_DBG_INIT, "no ice segment in package.\n");
688 return ICE_ERR_CFG;
689 }
690
691 /* download package */
692 status = ice_download_pkg(hw, seg);
693 if (status == ICE_ERR_AQ_NO_WORK) {
694 ice_debug(hw, ICE_DBG_INIT,
695 "package previously loaded - no work.\n");
696 status = 0;
697 }
698
699 /* Get information on the package currently loaded in HW, then make sure
700 * the driver is compatible with this version.
701 */
702 if (!status) {
703 status = ice_get_pkg_info(hw);
704 if (!status)
705 status = ice_chk_pkg_version(&hw->active_pkg_ver);
706 }
707
708 if (!status) {
709 hw->seg = seg;
710 /* on successful package download update other required
711 * registers to support the package and fill HW tables
712 * with package content.
713 */
714 ice_init_pkg_regs(hw);
715 ice_fill_blk_tbls(hw);
716 } else {
717 ice_debug(hw, ICE_DBG_INIT, "package load failed, %d\n",
718 status);
719 }
720
721 return status;
722}
723
724/**
725 * ice_copy_and_init_pkg - initialize/download a copy of the package
726 * @hw: pointer to the hardware structure
727 * @buf: pointer to the package buffer
728 * @len: size of the package buffer
729 *
730 * This function copies the package buffer, and then calls ice_init_pkg() to
731 * initialize the copied package contents.
732 *
733 * The copying is necessary if the package buffer supplied is constant, or if
734 * the memory may disappear shortly after calling this function.
735 *
736 * If the package buffer resides in the data segment and can be modified, the
737 * caller is free to use ice_init_pkg() instead of ice_copy_and_init_pkg().
738 *
739 * However, if the package buffer needs to be copied first, such as when being
740 * read from a file, the caller should use ice_copy_and_init_pkg().
741 *
742 * This function will first copy the package buffer, before calling
743 * ice_init_pkg(). The caller is free to immediately destroy the original
744 * package buffer, as the new copy will be managed by this function and
745 * related routines.
746 */
747enum ice_status ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len)
748{
749 enum ice_status status;
750 u8 *buf_copy;
751
752 if (!buf || !len)
753 return ICE_ERR_PARAM;
754
755 buf_copy = devm_kmemdup(ice_hw_to_dev(hw), buf, len, GFP_KERNEL);
756
757 status = ice_init_pkg(hw, buf_copy, len);
758 if (status) {
759 /* Free the copy, since we failed to initialize the package */
760 devm_kfree(ice_hw_to_dev(hw), buf_copy);
761 } else {
762 /* Track the copied pkg so we can free it later */
763 hw->pkg_copy = buf_copy;
764 hw->pkg_size = len;
765 }
766
767 return status;
768}
769
770/* PTG Management */
771
772/**
773 * ice_ptg_find_ptype - Search for packet type group using packet type (ptype)
774 * @hw: pointer to the hardware structure
775 * @blk: HW block
776 * @ptype: the ptype to search for
777 * @ptg: pointer to variable that receives the PTG
778 *
779 * This function will search the PTGs for a particular ptype, returning the
780 * PTG ID that contains it through the PTG parameter, with the value of
781 * ICE_DEFAULT_PTG (0) meaning it is part the default PTG.
782 */
783static enum ice_status
784ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg)
785{
786 if (ptype >= ICE_XLT1_CNT || !ptg)
787 return ICE_ERR_PARAM;
788
789 *ptg = hw->blk[blk].xlt1.ptypes[ptype].ptg;
790 return 0;
791}
792
793/**
794 * ice_ptg_alloc_val - Allocates a new packet type group ID by value
795 * @hw: pointer to the hardware structure
796 * @blk: HW block
797 * @ptg: the PTG to allocate
798 *
799 * This function allocates a given packet type group ID specified by the PTG
800 * parameter.
801 */
802static void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg)
803{
804 hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true;
805}
806
807/**
808 * ice_ptg_remove_ptype - Removes ptype from a particular packet type group
809 * @hw: pointer to the hardware structure
810 * @blk: HW block
811 * @ptype: the ptype to remove
812 * @ptg: the PTG to remove the ptype from
813 *
814 * This function will remove the ptype from the specific PTG, and move it to
815 * the default PTG (ICE_DEFAULT_PTG).
816 */
817static enum ice_status
818ice_ptg_remove_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
819{
820 struct ice_ptg_ptype **ch;
821 struct ice_ptg_ptype *p;
822
823 if (ptype > ICE_XLT1_CNT - 1)
824 return ICE_ERR_PARAM;
825
826 if (!hw->blk[blk].xlt1.ptg_tbl[ptg].in_use)
827 return ICE_ERR_DOES_NOT_EXIST;
828
829 /* Should not happen if .in_use is set, bad config */
830 if (!hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype)
831 return ICE_ERR_CFG;
832
833 /* find the ptype within this PTG, and bypass the link over it */
834 p = hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;
835 ch = &hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;
836 while (p) {
837 if (ptype == (p - hw->blk[blk].xlt1.ptypes)) {
838 *ch = p->next_ptype;
839 break;
840 }
841
842 ch = &p->next_ptype;
843 p = p->next_ptype;
844 }
845
846 hw->blk[blk].xlt1.ptypes[ptype].ptg = ICE_DEFAULT_PTG;
847 hw->blk[blk].xlt1.ptypes[ptype].next_ptype = NULL;
848
849 return 0;
850}
851
852/**
853 * ice_ptg_add_mv_ptype - Adds/moves ptype to a particular packet type group
854 * @hw: pointer to the hardware structure
855 * @blk: HW block
856 * @ptype: the ptype to add or move
857 * @ptg: the PTG to add or move the ptype to
858 *
859 * This function will either add or move a ptype to a particular PTG depending
860 * on if the ptype is already part of another group. Note that using a
861 * a destination PTG ID of ICE_DEFAULT_PTG (0) will move the ptype to the
862 * default PTG.
863 */
864static enum ice_status
865ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
866{
867 enum ice_status status;
868 u8 original_ptg;
869
870 if (ptype > ICE_XLT1_CNT - 1)
871 return ICE_ERR_PARAM;
872
873 if (!hw->blk[blk].xlt1.ptg_tbl[ptg].in_use && ptg != ICE_DEFAULT_PTG)
874 return ICE_ERR_DOES_NOT_EXIST;
875
876 status = ice_ptg_find_ptype(hw, blk, ptype, &original_ptg);
877 if (status)
878 return status;
879
880 /* Is ptype already in the correct PTG? */
881 if (original_ptg == ptg)
882 return 0;
883
884 /* Remove from original PTG and move back to the default PTG */
885 if (original_ptg != ICE_DEFAULT_PTG)
886 ice_ptg_remove_ptype(hw, blk, ptype, original_ptg);
887
888 /* Moving to default PTG? Then we're done with this request */
889 if (ptg == ICE_DEFAULT_PTG)
890 return 0;
891
892 /* Add ptype to PTG at beginning of list */
893 hw->blk[blk].xlt1.ptypes[ptype].next_ptype =
894 hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;
895 hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype =
896 &hw->blk[blk].xlt1.ptypes[ptype];
897
898 hw->blk[blk].xlt1.ptypes[ptype].ptg = ptg;
899 hw->blk[blk].xlt1.t[ptype] = ptg;
900
901 return 0;
902}
903
904/* Block / table size info */
905struct ice_blk_size_details {
906 u16 xlt1; /* # XLT1 entries */
907 u16 xlt2; /* # XLT2 entries */
908 u16 prof_tcam; /* # profile ID TCAM entries */
909 u16 prof_id; /* # profile IDs */
910 u8 prof_cdid_bits; /* # CDID one-hot bits used in key */
911 u16 prof_redir; /* # profile redirection entries */
912 u16 es; /* # extraction sequence entries */
913 u16 fvw; /* # field vector words */
914 u8 overwrite; /* overwrite existing entries allowed */
915 u8 reverse; /* reverse FV order */
916};
917
918static const struct ice_blk_size_details blk_sizes[ICE_BLK_COUNT] = {
919 /**
920 * Table Definitions
921 * XLT1 - Number of entries in XLT1 table
922 * XLT2 - Number of entries in XLT2 table
923 * TCAM - Number of entries Profile ID TCAM table
924 * CDID - Control Domain ID of the hardware block
925 * PRED - Number of entries in the Profile Redirection Table
926 * FV - Number of entries in the Field Vector
927 * FVW - Width (in WORDs) of the Field Vector
928 * OVR - Overwrite existing table entries
929 * REV - Reverse FV
930 */
931 /* XLT1 , XLT2 ,TCAM, PID,CDID,PRED, FV, FVW */
932 /* Overwrite , Reverse FV */
933 /* SW */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 256, 0, 256, 256, 48,
934 false, false },
935 /* ACL */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 32,
936 false, false },
937 /* FD */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 24,
938 false, true },
939 /* RSS */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 512, 128, 0, 128, 128, 24,
940 true, true },
941 /* PE */ { ICE_XLT1_CNT, ICE_XLT2_CNT, 64, 32, 0, 32, 32, 24,
942 false, false },
943};
944
945enum ice_sid_all {
946 ICE_SID_XLT1_OFF = 0,
947 ICE_SID_XLT2_OFF,
948 ICE_SID_PR_OFF,
949 ICE_SID_PR_REDIR_OFF,
950 ICE_SID_ES_OFF,
951 ICE_SID_OFF_COUNT,
952};
953
954/* VSIG Management */
955
956/**
957 * ice_vsig_find_vsi - find a VSIG that contains a specified VSI
958 * @hw: pointer to the hardware structure
959 * @blk: HW block
960 * @vsi: VSI of interest
961 * @vsig: pointer to receive the VSI group
962 *
963 * This function will lookup the VSI entry in the XLT2 list and return
964 * the VSI group its associated with.
965 */
966static enum ice_status
967ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
968{
969 if (!vsig || vsi >= ICE_MAX_VSI)
970 return ICE_ERR_PARAM;
971
972 /* As long as there's a default or valid VSIG associated with the input
973 * VSI, the functions returns a success. Any handling of VSIG will be
974 * done by the following add, update or remove functions.
975 */
976 *vsig = hw->blk[blk].xlt2.vsis[vsi].vsig;
977
978 return 0;
979}
980
981/**
982 * ice_vsig_alloc_val - allocate a new VSIG by value
983 * @hw: pointer to the hardware structure
984 * @blk: HW block
985 * @vsig: the VSIG to allocate
986 *
987 * This function will allocate a given VSIG specified by the VSIG parameter.
988 */
989static u16 ice_vsig_alloc_val(struct ice_hw *hw, enum ice_block blk, u16 vsig)
990{
991 u16 idx = vsig & ICE_VSIG_IDX_M;
992
993 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use) {
994 INIT_LIST_HEAD(&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst);
995 hw->blk[blk].xlt2.vsig_tbl[idx].in_use = true;
996 }
997
998 return ICE_VSIG_VALUE(idx, hw->pf_id);
999}
1000
1001/**
1002 * ice_vsig_remove_vsi - remove VSI from VSIG
1003 * @hw: pointer to the hardware structure
1004 * @blk: HW block
1005 * @vsi: VSI to remove
1006 * @vsig: VSI group to remove from
1007 *
1008 * The function will remove the input VSI from its VSI group and move it
1009 * to the DEFAULT_VSIG.
1010 */
1011static enum ice_status
1012ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
1013{
1014 struct ice_vsig_vsi **vsi_head, *vsi_cur, *vsi_tgt;
1015 u16 idx;
1016
1017 idx = vsig & ICE_VSIG_IDX_M;
1018
1019 if (vsi >= ICE_MAX_VSI || idx >= ICE_MAX_VSIGS)
1020 return ICE_ERR_PARAM;
1021
1022 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)
1023 return ICE_ERR_DOES_NOT_EXIST;
1024
1025 /* entry already in default VSIG, don't have to remove */
1026 if (idx == ICE_DEFAULT_VSIG)
1027 return 0;
1028
1029 vsi_head = &hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
1030 if (!(*vsi_head))
1031 return ICE_ERR_CFG;
1032
1033 vsi_tgt = &hw->blk[blk].xlt2.vsis[vsi];
1034 vsi_cur = (*vsi_head);
1035
1036 /* iterate the VSI list, skip over the entry to be removed */
1037 while (vsi_cur) {
1038 if (vsi_tgt == vsi_cur) {
1039 (*vsi_head) = vsi_cur->next_vsi;
1040 break;
1041 }
1042 vsi_head = &vsi_cur->next_vsi;
1043 vsi_cur = vsi_cur->next_vsi;
1044 }
1045
1046 /* verify if VSI was removed from group list */
1047 if (!vsi_cur)
1048 return ICE_ERR_DOES_NOT_EXIST;
1049
1050 vsi_cur->vsig = ICE_DEFAULT_VSIG;
1051 vsi_cur->changed = 1;
1052 vsi_cur->next_vsi = NULL;
1053
1054 return 0;
1055}
1056
1057/**
1058 * ice_vsig_add_mv_vsi - add or move a VSI to a VSI group
1059 * @hw: pointer to the hardware structure
1060 * @blk: HW block
1061 * @vsi: VSI to move
1062 * @vsig: destination VSI group
1063 *
1064 * This function will move or add the input VSI to the target VSIG.
1065 * The function will find the original VSIG the VSI belongs to and
1066 * move the entry to the DEFAULT_VSIG, update the original VSIG and
1067 * then move entry to the new VSIG.
1068 */
1069static enum ice_status
1070ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
1071{
1072 struct ice_vsig_vsi *tmp;
1073 enum ice_status status;
1074 u16 orig_vsig, idx;
1075
1076 idx = vsig & ICE_VSIG_IDX_M;
1077
1078 if (vsi >= ICE_MAX_VSI || idx >= ICE_MAX_VSIGS)
1079 return ICE_ERR_PARAM;
1080
1081 /* if VSIG not in use and VSIG is not default type this VSIG
1082 * doesn't exist.
1083 */
1084 if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use &&
1085 vsig != ICE_DEFAULT_VSIG)
1086 return ICE_ERR_DOES_NOT_EXIST;
1087
1088 status = ice_vsig_find_vsi(hw, blk, vsi, &orig_vsig);
1089 if (status)
1090 return status;
1091
1092 /* no update required if vsigs match */
1093 if (orig_vsig == vsig)
1094 return 0;
1095
1096 if (orig_vsig != ICE_DEFAULT_VSIG) {
1097 /* remove entry from orig_vsig and add to default VSIG */
1098 status = ice_vsig_remove_vsi(hw, blk, vsi, orig_vsig);
1099 if (status)
1100 return status;
1101 }
1102
1103 if (idx == ICE_DEFAULT_VSIG)
1104 return 0;
1105
1106 /* Create VSI entry and add VSIG and prop_mask values */
1107 hw->blk[blk].xlt2.vsis[vsi].vsig = vsig;
1108 hw->blk[blk].xlt2.vsis[vsi].changed = 1;
1109
1110 /* Add new entry to the head of the VSIG list */
1111 tmp = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;
1112 hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi =
1113 &hw->blk[blk].xlt2.vsis[vsi];
1114 hw->blk[blk].xlt2.vsis[vsi].next_vsi = tmp;
1115 hw->blk[blk].xlt2.t[vsi] = vsig;
1116
1117 return 0;
1118}
1119
1120/* Block / table section IDs */
1121static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = {
1122 /* SWITCH */
1123 { ICE_SID_XLT1_SW,
1124 ICE_SID_XLT2_SW,
1125 ICE_SID_PROFID_TCAM_SW,
1126 ICE_SID_PROFID_REDIR_SW,
1127 ICE_SID_FLD_VEC_SW
1128 },
1129
1130 /* ACL */
1131 { ICE_SID_XLT1_ACL,
1132 ICE_SID_XLT2_ACL,
1133 ICE_SID_PROFID_TCAM_ACL,
1134 ICE_SID_PROFID_REDIR_ACL,
1135 ICE_SID_FLD_VEC_ACL
1136 },
1137
1138 /* FD */
1139 { ICE_SID_XLT1_FD,
1140 ICE_SID_XLT2_FD,
1141 ICE_SID_PROFID_TCAM_FD,
1142 ICE_SID_PROFID_REDIR_FD,
1143 ICE_SID_FLD_VEC_FD
1144 },
1145
1146 /* RSS */
1147 { ICE_SID_XLT1_RSS,
1148 ICE_SID_XLT2_RSS,
1149 ICE_SID_PROFID_TCAM_RSS,
1150 ICE_SID_PROFID_REDIR_RSS,
1151 ICE_SID_FLD_VEC_RSS
1152 },
1153
1154 /* PE */
1155 { ICE_SID_XLT1_PE,
1156 ICE_SID_XLT2_PE,
1157 ICE_SID_PROFID_TCAM_PE,
1158 ICE_SID_PROFID_REDIR_PE,
1159 ICE_SID_FLD_VEC_PE
1160 }
1161};
1162
1163/**
1164 * ice_init_sw_xlt1_db - init software XLT1 database from HW tables
1165 * @hw: pointer to the hardware structure
1166 * @blk: the HW block to initialize
1167 */
1168static void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)
1169{
1170 u16 pt;
1171
1172 for (pt = 0; pt < hw->blk[blk].xlt1.count; pt++) {
1173 u8 ptg;
1174
1175 ptg = hw->blk[blk].xlt1.t[pt];
1176 if (ptg != ICE_DEFAULT_PTG) {
1177 ice_ptg_alloc_val(hw, blk, ptg);
1178 ice_ptg_add_mv_ptype(hw, blk, pt, ptg);
1179 }
1180 }
1181}
1182
1183/**
1184 * ice_init_sw_xlt2_db - init software XLT2 database from HW tables
1185 * @hw: pointer to the hardware structure
1186 * @blk: the HW block to initialize
1187 */
1188static void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)
1189{
1190 u16 vsi;
1191
1192 for (vsi = 0; vsi < hw->blk[blk].xlt2.count; vsi++) {
1193 u16 vsig;
1194
1195 vsig = hw->blk[blk].xlt2.t[vsi];
1196 if (vsig) {
1197 ice_vsig_alloc_val(hw, blk, vsig);
1198 ice_vsig_add_mv_vsi(hw, blk, vsi, vsig);
1199 /* no changes at this time, since this has been
1200 * initialized from the original package
1201 */
1202 hw->blk[blk].xlt2.vsis[vsi].changed = 0;
1203 }
1204 }
1205}
1206
1207/**
1208 * ice_init_sw_db - init software database from HW tables
1209 * @hw: pointer to the hardware structure
1210 */
1211static void ice_init_sw_db(struct ice_hw *hw)
1212{
1213 u16 i;
1214
1215 for (i = 0; i < ICE_BLK_COUNT; i++) {
1216 ice_init_sw_xlt1_db(hw, (enum ice_block)i);
1217 ice_init_sw_xlt2_db(hw, (enum ice_block)i);
1218 }
1219}
1220
1221/**
1222 * ice_fill_tbl - Reads content of a single table type into database
1223 * @hw: pointer to the hardware structure
1224 * @block_id: Block ID of the table to copy
1225 * @sid: Section ID of the table to copy
1226 *
1227 * Will attempt to read the entire content of a given table of a single block
1228 * into the driver database. We assume that the buffer will always
1229 * be as large or larger than the data contained in the package. If
1230 * this condition is not met, there is most likely an error in the package
1231 * contents.
1232 */
1233static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)
1234{
1235 u32 dst_len, sect_len, offset = 0;
1236 struct ice_prof_redir_section *pr;
1237 struct ice_prof_id_section *pid;
1238 struct ice_xlt1_section *xlt1;
1239 struct ice_xlt2_section *xlt2;
1240 struct ice_sw_fv_section *es;
1241 struct ice_pkg_enum state;
1242 u8 *src, *dst;
1243 void *sect;
1244
1245 /* if the HW segment pointer is null then the first iteration of
1246 * ice_pkg_enum_section() will fail. In this case the HW tables will
1247 * not be filled and return success.
1248 */
1249 if (!hw->seg) {
1250 ice_debug(hw, ICE_DBG_PKG, "hw->seg is NULL, tables are not filled\n");
1251 return;
1252 }
1253
1254 memset(&state, 0, sizeof(state));
1255
1256 sect = ice_pkg_enum_section(hw->seg, &state, sid);
1257
1258 while (sect) {
1259 switch (sid) {
1260 case ICE_SID_XLT1_SW:
1261 case ICE_SID_XLT1_FD:
1262 case ICE_SID_XLT1_RSS:
1263 case ICE_SID_XLT1_ACL:
1264 case ICE_SID_XLT1_PE:
1265 xlt1 = (struct ice_xlt1_section *)sect;
1266 src = xlt1->value;
1267 sect_len = le16_to_cpu(xlt1->count) *
1268 sizeof(*hw->blk[block_id].xlt1.t);
1269 dst = hw->blk[block_id].xlt1.t;
1270 dst_len = hw->blk[block_id].xlt1.count *
1271 sizeof(*hw->blk[block_id].xlt1.t);
1272 break;
1273 case ICE_SID_XLT2_SW:
1274 case ICE_SID_XLT2_FD:
1275 case ICE_SID_XLT2_RSS:
1276 case ICE_SID_XLT2_ACL:
1277 case ICE_SID_XLT2_PE:
1278 xlt2 = (struct ice_xlt2_section *)sect;
1279 src = (__force u8 *)xlt2->value;
1280 sect_len = le16_to_cpu(xlt2->count) *
1281 sizeof(*hw->blk[block_id].xlt2.t);
1282 dst = (u8 *)hw->blk[block_id].xlt2.t;
1283 dst_len = hw->blk[block_id].xlt2.count *
1284 sizeof(*hw->blk[block_id].xlt2.t);
1285 break;
1286 case ICE_SID_PROFID_TCAM_SW:
1287 case ICE_SID_PROFID_TCAM_FD:
1288 case ICE_SID_PROFID_TCAM_RSS:
1289 case ICE_SID_PROFID_TCAM_ACL:
1290 case ICE_SID_PROFID_TCAM_PE:
1291 pid = (struct ice_prof_id_section *)sect;
1292 src = (u8 *)pid->entry;
1293 sect_len = le16_to_cpu(pid->count) *
1294 sizeof(*hw->blk[block_id].prof.t);
1295 dst = (u8 *)hw->blk[block_id].prof.t;
1296 dst_len = hw->blk[block_id].prof.count *
1297 sizeof(*hw->blk[block_id].prof.t);
1298 break;
1299 case ICE_SID_PROFID_REDIR_SW:
1300 case ICE_SID_PROFID_REDIR_FD:
1301 case ICE_SID_PROFID_REDIR_RSS:
1302 case ICE_SID_PROFID_REDIR_ACL:
1303 case ICE_SID_PROFID_REDIR_PE:
1304 pr = (struct ice_prof_redir_section *)sect;
1305 src = pr->redir_value;
1306 sect_len = le16_to_cpu(pr->count) *
1307 sizeof(*hw->blk[block_id].prof_redir.t);
1308 dst = hw->blk[block_id].prof_redir.t;
1309 dst_len = hw->blk[block_id].prof_redir.count *
1310 sizeof(*hw->blk[block_id].prof_redir.t);
1311 break;
1312 case ICE_SID_FLD_VEC_SW:
1313 case ICE_SID_FLD_VEC_FD:
1314 case ICE_SID_FLD_VEC_RSS:
1315 case ICE_SID_FLD_VEC_ACL:
1316 case ICE_SID_FLD_VEC_PE:
1317 es = (struct ice_sw_fv_section *)sect;
1318 src = (u8 *)es->fv;
1319 sect_len = (u32)(le16_to_cpu(es->count) *
1320 hw->blk[block_id].es.fvw) *
1321 sizeof(*hw->blk[block_id].es.t);
1322 dst = (u8 *)hw->blk[block_id].es.t;
1323 dst_len = (u32)(hw->blk[block_id].es.count *
1324 hw->blk[block_id].es.fvw) *
1325 sizeof(*hw->blk[block_id].es.t);
1326 break;
1327 default:
1328 return;
1329 }
1330
1331 /* if the section offset exceeds destination length, terminate
1332 * table fill.
1333 */
1334 if (offset > dst_len)
1335 return;
1336
1337 /* if the sum of section size and offset exceed destination size
1338 * then we are out of bounds of the HW table size for that PF.
1339 * Changing section length to fill the remaining table space
1340 * of that PF.
1341 */
1342 if ((offset + sect_len) > dst_len)
1343 sect_len = dst_len - offset;
1344
1345 memcpy(dst + offset, src, sect_len);
1346 offset += sect_len;
1347 sect = ice_pkg_enum_section(NULL, &state, sid);
1348 }
1349}
1350
1351/**
1352 * ice_fill_blk_tbls - Read package context for tables
1353 * @hw: pointer to the hardware structure
1354 *
1355 * Reads the current package contents and populates the driver
1356 * database with the data iteratively for all advanced feature
1357 * blocks. Assume that the HW tables have been allocated.
1358 */
1359void ice_fill_blk_tbls(struct ice_hw *hw)
1360{
1361 u8 i;
1362
1363 for (i = 0; i < ICE_BLK_COUNT; i++) {
1364 enum ice_block blk_id = (enum ice_block)i;
1365
1366 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].xlt1.sid);
1367 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].xlt2.sid);
1368 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].prof.sid);
1369 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].prof_redir.sid);
1370 ice_fill_tbl(hw, blk_id, hw->blk[blk_id].es.sid);
1371 }
1372
1373 ice_init_sw_db(hw);
1374}
1375
1376/**
1377 * ice_free_hw_tbls - free hardware table memory
1378 * @hw: pointer to the hardware structure
1379 */
1380void ice_free_hw_tbls(struct ice_hw *hw)
1381{
1382 u8 i;
1383
1384 for (i = 0; i < ICE_BLK_COUNT; i++) {
1385 hw->blk[i].is_list_init = false;
1386
1387 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt1.ptypes);
1388 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt1.ptg_tbl);
1389 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt1.t);
1390 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt2.t);
1391 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt2.vsig_tbl);
1392 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].xlt2.vsis);
1393 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].prof.t);
1394 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].prof_redir.t);
1395 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.t);
1396 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.ref_count);
1397 devm_kfree(ice_hw_to_dev(hw), hw->blk[i].es.written);
1398 }
1399
1400 memset(hw->blk, 0, sizeof(hw->blk));
1401}
1402
1403/**
1404 * ice_clear_hw_tbls - clear HW tables and flow profiles
1405 * @hw: pointer to the hardware structure
1406 */
1407void ice_clear_hw_tbls(struct ice_hw *hw)
1408{
1409 u8 i;
1410
1411 for (i = 0; i < ICE_BLK_COUNT; i++) {
1412 struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;
1413 struct ice_prof_tcam *prof = &hw->blk[i].prof;
1414 struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;
1415 struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;
1416 struct ice_es *es = &hw->blk[i].es;
1417
1418 memset(xlt1->ptypes, 0, xlt1->count * sizeof(*xlt1->ptypes));
1419 memset(xlt1->ptg_tbl, 0,
1420 ICE_MAX_PTGS * sizeof(*xlt1->ptg_tbl));
1421 memset(xlt1->t, 0, xlt1->count * sizeof(*xlt1->t));
1422
1423 memset(xlt2->vsis, 0, xlt2->count * sizeof(*xlt2->vsis));
1424 memset(xlt2->vsig_tbl, 0,
1425 xlt2->count * sizeof(*xlt2->vsig_tbl));
1426 memset(xlt2->t, 0, xlt2->count * sizeof(*xlt2->t));
1427
1428 memset(prof->t, 0, prof->count * sizeof(*prof->t));
1429 memset(prof_redir->t, 0,
1430 prof_redir->count * sizeof(*prof_redir->t));
1431
1432 memset(es->t, 0, es->count * sizeof(*es->t));
1433 memset(es->ref_count, 0, es->count * sizeof(*es->ref_count));
1434 memset(es->written, 0, es->count * sizeof(*es->written));
1435 }
1436}
1437
1438/**
1439 * ice_init_hw_tbls - init hardware table memory
1440 * @hw: pointer to the hardware structure
1441 */
1442enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
1443{
1444 u8 i;
1445
1446 for (i = 0; i < ICE_BLK_COUNT; i++) {
1447 struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;
1448 struct ice_prof_tcam *prof = &hw->blk[i].prof;
1449 struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;
1450 struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;
1451 struct ice_es *es = &hw->blk[i].es;
1452 u16 j;
1453
1454 if (hw->blk[i].is_list_init)
1455 continue;
1456
1457 hw->blk[i].is_list_init = true;
1458
1459 hw->blk[i].overwrite = blk_sizes[i].overwrite;
1460 es->reverse = blk_sizes[i].reverse;
1461
1462 xlt1->sid = ice_blk_sids[i][ICE_SID_XLT1_OFF];
1463 xlt1->count = blk_sizes[i].xlt1;
1464
1465 xlt1->ptypes = devm_kcalloc(ice_hw_to_dev(hw), xlt1->count,
1466 sizeof(*xlt1->ptypes), GFP_KERNEL);
1467
1468 if (!xlt1->ptypes)
1469 goto err;
1470
1471 xlt1->ptg_tbl = devm_kcalloc(ice_hw_to_dev(hw), ICE_MAX_PTGS,
1472 sizeof(*xlt1->ptg_tbl),
1473 GFP_KERNEL);
1474
1475 if (!xlt1->ptg_tbl)
1476 goto err;
1477
1478 xlt1->t = devm_kcalloc(ice_hw_to_dev(hw), xlt1->count,
1479 sizeof(*xlt1->t), GFP_KERNEL);
1480 if (!xlt1->t)
1481 goto err;
1482
1483 xlt2->sid = ice_blk_sids[i][ICE_SID_XLT2_OFF];
1484 xlt2->count = blk_sizes[i].xlt2;
1485
1486 xlt2->vsis = devm_kcalloc(ice_hw_to_dev(hw), xlt2->count,
1487 sizeof(*xlt2->vsis), GFP_KERNEL);
1488
1489 if (!xlt2->vsis)
1490 goto err;
1491
1492 xlt2->vsig_tbl = devm_kcalloc(ice_hw_to_dev(hw), xlt2->count,
1493 sizeof(*xlt2->vsig_tbl),
1494 GFP_KERNEL);
1495 if (!xlt2->vsig_tbl)
1496 goto err;
1497
1498 for (j = 0; j < xlt2->count; j++)
1499 INIT_LIST_HEAD(&xlt2->vsig_tbl[j].prop_lst);
1500
1501 xlt2->t = devm_kcalloc(ice_hw_to_dev(hw), xlt2->count,
1502 sizeof(*xlt2->t), GFP_KERNEL);
1503 if (!xlt2->t)
1504 goto err;
1505
1506 prof->sid = ice_blk_sids[i][ICE_SID_PR_OFF];
1507 prof->count = blk_sizes[i].prof_tcam;
1508 prof->max_prof_id = blk_sizes[i].prof_id;
1509 prof->cdid_bits = blk_sizes[i].prof_cdid_bits;
1510 prof->t = devm_kcalloc(ice_hw_to_dev(hw), prof->count,
1511 sizeof(*prof->t), GFP_KERNEL);
1512
1513 if (!prof->t)
1514 goto err;
1515
1516 prof_redir->sid = ice_blk_sids[i][ICE_SID_PR_REDIR_OFF];
1517 prof_redir->count = blk_sizes[i].prof_redir;
1518 prof_redir->t = devm_kcalloc(ice_hw_to_dev(hw),
1519 prof_redir->count,
1520 sizeof(*prof_redir->t),
1521 GFP_KERNEL);
1522
1523 if (!prof_redir->t)
1524 goto err;
1525
1526 es->sid = ice_blk_sids[i][ICE_SID_ES_OFF];
1527 es->count = blk_sizes[i].es;
1528 es->fvw = blk_sizes[i].fvw;
1529 es->t = devm_kcalloc(ice_hw_to_dev(hw),
1530 (u32)(es->count * es->fvw),
1531 sizeof(*es->t), GFP_KERNEL);
1532 if (!es->t)
1533 goto err;
1534
1535 es->ref_count = devm_kcalloc(ice_hw_to_dev(hw), es->count,
1536 sizeof(*es->ref_count),
1537 GFP_KERNEL);
1538
1539 es->written = devm_kcalloc(ice_hw_to_dev(hw), es->count,
1540 sizeof(*es->written), GFP_KERNEL);
1541 if (!es->ref_count)
1542 goto err;
1543 }
1544 return 0;
1545
1546err:
1547 ice_free_hw_tbls(hw);
1548 return ICE_ERR_NO_MEMORY;
1549}