1/* SPDX-License-Identifier: GPL-2.0 */
   2/* Copyright (c) 2018, Intel Corporation. */
   3
   4#ifndef _ICE_H_
   5#define _ICE_H_
   6
   7#include <linux/types.h>
   8#include <linux/errno.h>
   9#include <linux/kernel.h>
  10#include <linux/module.h>
  11#include <linux/firmware.h>
  12#include <linux/netdevice.h>
  13#include <linux/compiler.h>
  14#include <linux/etherdevice.h>
  15#include <linux/skbuff.h>
  16#include <linux/cpumask.h>
  17#include <linux/rtnetlink.h>
  18#include <linux/if_vlan.h>
  19#include <linux/dma-mapping.h>
  20#include <linux/pci.h>
  21#include <linux/workqueue.h>
  22#include <linux/wait.h>
  23#include <linux/interrupt.h>
  24#include <linux/ethtool.h>
  25#include <linux/timer.h>
  26#include <linux/delay.h>
  27#include <linux/bitmap.h>
  28#include <linux/log2.h>
  29#include <linux/ip.h>
  30#include <linux/sctp.h>
  31#include <linux/ipv6.h>
  32#include <linux/pkt_sched.h>
  33#include <linux/if_bridge.h>
  34#include <linux/ctype.h>
  35#include <linux/linkmode.h>
  36#include <linux/bpf.h>
  37#include <linux/btf.h>
  38#include <linux/auxiliary_bus.h>
  39#include <linux/avf/virtchnl.h>
  40#include <linux/cpu_rmap.h>
  41#include <linux/dim.h>
  42#include <linux/gnss.h>
  43#include <net/pkt_cls.h>
  44#include <net/pkt_sched.h>
  45#include <net/tc_act/tc_mirred.h>
  46#include <net/tc_act/tc_gact.h>
  47#include <net/ip.h>
  48#include <net/devlink.h>
  49#include <net/ipv6.h>
  50#include <net/xdp_sock.h>
  51#include <net/xdp_sock_drv.h>
  52#include <net/geneve.h>
  53#include <net/gre.h>
  54#include <net/udp_tunnel.h>
  55#include <net/vxlan.h>
  56#include <net/gtp.h>
  57#include <linux/ppp_defs.h>
  58#include "ice_devids.h"
  59#include "ice_type.h"
  60#include "ice_txrx.h"
  61#include "ice_dcb.h"
  62#include "ice_switch.h"
  63#include "ice_common.h"
  64#include "ice_flow.h"
  65#include "ice_sched.h"
  66#include "ice_idc_int.h"
  67#include "ice_sriov.h"
  68#include "ice_vf_mbx.h"
  69#include "ice_ptp.h"
  70#include "ice_fdir.h"
  71#include "ice_xsk.h"
  72#include "ice_arfs.h"
  73#include "ice_repr.h"
  74#include "ice_eswitch.h"
  75#include "ice_lag.h"
  76#include "ice_vsi_vlan_ops.h"
  77#include "ice_gnss.h"
  78#include "ice_irq.h"
  79#include "ice_dpll.h"
  80#include "ice_adapter.h"
  81
 
  82#define ICE_BAR0		0
  83#define ICE_REQ_DESC_MULTIPLE	32
  84#define ICE_MIN_NUM_DESC	64
  85#define ICE_MAX_NUM_DESC	8160
  86#define ICE_DFLT_MIN_RX_DESC	512
  87#define ICE_DFLT_NUM_TX_DESC	256
  88#define ICE_DFLT_NUM_RX_DESC	2048
  89
  90#define ICE_DFLT_TRAFFIC_CLASS	BIT(0)
  91#define ICE_INT_NAME_STR_LEN	(IFNAMSIZ + 16)
  92#define ICE_AQ_LEN		192
  93#define ICE_MBXSQ_LEN		64
  94#define ICE_SBQ_LEN		64
  95#define ICE_MIN_LAN_TXRX_MSIX	1
  96#define ICE_MIN_LAN_OICR_MSIX	1
  97#define ICE_MIN_MSIX		(ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
  98#define ICE_FDIR_MSIX		2
  99#define ICE_RDMA_NUM_AEQ_MSIX	4
 100#define ICE_MIN_RDMA_MSIX	2
 101#define ICE_ESWITCH_MSIX	1
 102#define ICE_NO_VSI		0xffff
 103#define ICE_VSI_MAP_CONTIG	0
 104#define ICE_VSI_MAP_SCATTER	1
 105#define ICE_MAX_SCATTER_TXQS	16
 106#define ICE_MAX_SCATTER_RXQS	16
 107#define ICE_Q_WAIT_RETRY_LIMIT	10
 108#define ICE_Q_WAIT_MAX_RETRY	(5 * ICE_Q_WAIT_RETRY_LIMIT)
 109#define ICE_MAX_LG_RSS_QS	256
 
 
 
 110#define ICE_INVAL_Q_INDEX	0xffff
 111
 112#define ICE_MAX_RXQS_PER_TC		256	/* Used when setting VSI context per TC Rx queues */
 113
 114#define ICE_CHNL_START_TC		1
 115
 116#define ICE_MAX_RESET_WAIT		20
 117
 118#define ICE_VSIQF_HKEY_ARRAY_SIZE	((VSIQF_HKEY_MAX_INDEX + 1) *	4)
 119
 120#define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
 121
 122#define ICE_MAX_MTU	(ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
 123
 124#define ICE_MAX_TSO_SIZE 131072
 125
 126#define ICE_UP_TABLE_TRANSLATE(val, i) \
 127		(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
 128		  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
 129
 130#define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
 131#define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
 132#define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
 133#define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
 134
 135/* Minimum BW limit is 500 Kbps for any scheduler node */
 136#define ICE_MIN_BW_LIMIT		500
 137/* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes.
 138 * use it to convert user specified BW limit into Kbps
 139 */
 140#define ICE_BW_KBPS_DIVISOR		125
 141
 142/* Default recipes have priority 4 and below, hence priority values between 5..7
 143 * can be used as filter priority for advanced switch filter (advanced switch
 144 * filters need new recipe to be created for specified extraction sequence
 145 * because default recipe extraction sequence does not represent custom
 146 * extraction)
 147 */
 148#define ICE_SWITCH_FLTR_PRIO_QUEUE	7
 149/* prio 6 is reserved for future use (e.g. switch filter with L3 fields +
 150 * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as
 151 * SYN/FIN/RST))
 152 */
 153#define ICE_SWITCH_FLTR_PRIO_RSVD	6
 154#define ICE_SWITCH_FLTR_PRIO_VSI	5
 155#define ICE_SWITCH_FLTR_PRIO_QGRP	ICE_SWITCH_FLTR_PRIO_VSI
 156
 157/* Macro for each VSI in a PF */
 158#define ice_for_each_vsi(pf, i) \
 159	for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
 160
 161/* Macros for each Tx/Xdp/Rx ring in a VSI */
 162#define ice_for_each_txq(vsi, i) \
 163	for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
 164
 165#define ice_for_each_xdp_txq(vsi, i) \
 166	for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++)
 167
 168#define ice_for_each_rxq(vsi, i) \
 169	for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
 170
 171/* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
 172#define ice_for_each_alloc_txq(vsi, i) \
 173	for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
 174
 175#define ice_for_each_alloc_rxq(vsi, i) \
 176	for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
 177
 178#define ice_for_each_q_vector(vsi, i) \
 179	for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
 180
 181#define ice_for_each_chnl_tc(i)	\
 182	for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++)
 183
 184#define ICE_UCAST_PROMISC_BITS ICE_PROMISC_UCAST_RX
 185
 186#define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_RX | \
 
 
 
 
 187				     ICE_PROMISC_VLAN_RX)
 188
 189#define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
 190
 191#define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
 192				     ICE_PROMISC_MCAST_RX | \
 193				     ICE_PROMISC_VLAN_TX  | \
 194				     ICE_PROMISC_VLAN_RX)
 195
 196#define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
 197
 198#define ice_pf_src_tmr_owned(pf) ((pf)->hw.func_caps.ts_func_info.src_tmr_owned)
 199
 200enum ice_feature {
 201	ICE_F_DSCP,
 202	ICE_F_PHY_RCLK,
 203	ICE_F_SMA_CTRL,
 204	ICE_F_CGU,
 205	ICE_F_GNSS,
 206	ICE_F_ROCE_LAG,
 207	ICE_F_SRIOV_LAG,
 208	ICE_F_MBX_LIMIT,
 209	ICE_F_MAX
 210};
 211
 212DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key);
 213
 214struct ice_channel {
 215	struct list_head list;
 216	u8 type;
 217	u16 sw_id;
 218	u16 base_q;
 219	u16 num_rxq;
 220	u16 num_txq;
 221	u16 vsi_num;
 222	u8 ena_tc;
 223	struct ice_aqc_vsi_props info;
 224	u64 max_tx_rate;
 225	u64 min_tx_rate;
 226	atomic_t num_sb_fltr;
 227	struct ice_vsi *ch_vsi;
 228};
 229
 230struct ice_txq_meta {
 231	u32 q_teid;	/* Tx-scheduler element identifier */
 232	u16 q_id;	/* Entry in VSI's txq_map bitmap */
 233	u16 q_handle;	/* Relative index of Tx queue within TC */
 234	u16 vsi_idx;	/* VSI index that Tx queue belongs to */
 235	u8 tc;		/* TC number that Tx queue belongs to */
 236};
 237
 238struct ice_tc_info {
 239	u16 qoffset;
 240	u16 qcount_tx;
 241	u16 qcount_rx;
 242	u8 netdev_tc;
 243};
 244
 245struct ice_tc_cfg {
 246	u8 numtc; /* Total number of enabled TCs */
 247	u16 ena_tc; /* Tx map */
 248	struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
 249};
 250
 
 
 
 
 
 
 251struct ice_qs_cfg {
 252	struct mutex *qs_mutex;  /* will be assigned to &pf->avail_q_mutex */
 253	unsigned long *pf_map;
 254	unsigned long pf_map_size;
 255	unsigned int q_count;
 256	unsigned int scatter_count;
 257	u16 *vsi_map;
 258	u16 vsi_map_offset;
 259	u8 mapping_mode;
 260};
 261
 262struct ice_sw {
 263	struct ice_pf *pf;
 264	u16 sw_id;		/* switch ID for this switch */
 265	u16 bridge_mode;	/* VEB/VEPA/Port Virtualizer */
 266};
 267
 268enum ice_pf_state {
 269	ICE_TESTING,
 270	ICE_DOWN,
 271	ICE_NEEDS_RESTART,
 272	ICE_PREPARED_FOR_RESET,	/* set by driver when prepared */
 273	ICE_RESET_OICR_RECV,		/* set by driver after rcv reset OICR */
 274	ICE_PFR_REQ,		/* set by driver */
 275	ICE_CORER_REQ,		/* set by driver */
 276	ICE_GLOBR_REQ,		/* set by driver */
 277	ICE_CORER_RECV,		/* set by OICR handler */
 278	ICE_GLOBR_RECV,		/* set by OICR handler */
 279	ICE_EMPR_RECV,		/* set by OICR handler */
 280	ICE_SUSPENDED,		/* set on module remove path */
 281	ICE_RESET_FAILED,		/* set by reset/rebuild */
 282	/* When checking for the PF to be in a nominal operating state, the
 283	 * bits that are grouped at the beginning of the list need to be
 284	 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
 285	 * be checked. If you need to add a bit into consideration for nominal
 286	 * operating state, it must be added before
 287	 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
 288	 * without appropriate consideration.
 289	 */
 290	ICE_STATE_NOMINAL_CHECK_BITS,
 291	ICE_ADMINQ_EVENT_PENDING,
 292	ICE_MAILBOXQ_EVENT_PENDING,
 293	ICE_SIDEBANDQ_EVENT_PENDING,
 294	ICE_MDD_EVENT_PENDING,
 295	ICE_VFLR_EVENT_PENDING,
 296	ICE_FLTR_OVERFLOW_PROMISC,
 297	ICE_VF_DIS,
 298	ICE_CFG_BUSY,
 299	ICE_SERVICE_SCHED,
 300	ICE_SERVICE_DIS,
 301	ICE_FD_FLUSH_REQ,
 302	ICE_OICR_INTR_DIS,		/* Global OICR interrupt disabled */
 303	ICE_MDD_VF_PRINT_PENDING,	/* set when MDD event handle */
 304	ICE_VF_RESETS_DISABLED,	/* disable resets during ice_remove */
 305	ICE_LINK_DEFAULT_OVERRIDE_PENDING,
 306	ICE_PHY_INIT_COMPLETE,
 307	ICE_FD_VF_FLUSH_CTX,		/* set at FD Rx IRQ or timeout */
 308	ICE_AUX_ERR_PENDING,
 309	ICE_STATE_NBITS		/* must be last */
 310};
 311
 312enum ice_vsi_state {
 313	ICE_VSI_DOWN,
 314	ICE_VSI_NEEDS_RESTART,
 315	ICE_VSI_NETDEV_ALLOCD,
 316	ICE_VSI_NETDEV_REGISTERED,
 317	ICE_VSI_UMAC_FLTR_CHANGED,
 318	ICE_VSI_MMAC_FLTR_CHANGED,
 319	ICE_VSI_PROMISC_CHANGED,
 320	ICE_VSI_REBUILD_PENDING,
 321	ICE_VSI_STATE_NBITS		/* must be last */
 322};
 323
 324struct ice_vsi_stats {
 325	struct ice_ring_stats **tx_ring_stats;  /* Tx ring stats array */
 326	struct ice_ring_stats **rx_ring_stats;  /* Rx ring stats array */
 327};
 328
 329/* struct that defines a VSI, associated with a dev */
 330struct ice_vsi {
 331	struct net_device *netdev;
 332	struct ice_sw *vsw;		 /* switch this VSI is on */
 333	struct ice_pf *back;		 /* back pointer to PF */
 334	struct ice_rx_ring **rx_rings;	 /* Rx ring array */
 335	struct ice_tx_ring **tx_rings;	 /* Tx ring array */
 
 336	struct ice_q_vector **q_vectors; /* q_vector array */
 337
 338	irqreturn_t (*irq_handler)(int irq, void *data);
 339
 340	u64 tx_linearize;
 341	DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);
 
 342	unsigned int current_netdev_flags;
 343	u32 tx_restart;
 344	u32 tx_busy;
 345	u32 rx_buf_failed;
 346	u32 rx_page_failed;
 347	u16 num_q_vectors;
 348	/* tell if only dynamic irq allocation is allowed */
 349	bool irq_dyn_alloc;
 350
 351	u16 vsi_num;			/* HW (absolute) index of this VSI */
 352	u16 idx;			/* software index in pf->vsi[] */
 353
 354	u16 num_gfltr;
 355	u16 num_bfltr;
 
 356
 357	/* RSS config */
 358	u16 rss_table_size;	/* HW RSS table size */
 359	u16 rss_size;		/* Allocated RSS queues */
 360	u8 rss_hfunc;		/* User configured hash type */
 361	u8 *rss_hkey_user;	/* User configured hash keys */
 362	u8 *rss_lut_user;	/* User configured lookup table entries */
 363	u8 rss_lut_type;	/* used to configure Get/Set RSS LUT AQ call */
 364
 365	/* aRFS members only allocated for the PF VSI */
 366#define ICE_MAX_ARFS_LIST	1024
 367#define ICE_ARFS_LST_MASK	(ICE_MAX_ARFS_LIST - 1)
 368	struct hlist_head *arfs_fltr_list;
 369	struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
 370	spinlock_t arfs_lock;	/* protects aRFS hash table and filter state */
 371	atomic_t *arfs_last_fltr_id;
 372
 373	struct ice_aqc_vsi_props info;	 /* VSI properties */
 374	struct ice_vsi_vlan_info vlan_info;	/* vlan config to be restored */
 375
 376	/* VSI stats */
 377	struct rtnl_link_stats64 net_stats;
 378	struct rtnl_link_stats64 net_stats_prev;
 379	struct ice_eth_stats eth_stats;
 380	struct ice_eth_stats eth_stats_prev;
 381
 382	struct list_head tmp_sync_list;		/* MAC filters to be synced */
 383	struct list_head tmp_unsync_list;	/* MAC filters to be unsynced */
 384
 385	u8 irqs_ready:1;
 386	u8 current_isup:1;		 /* Sync 'link up' logging */
 387	u8 stat_offsets_loaded:1;
 388	struct ice_vsi_vlan_ops inner_vlan_ops;
 389	struct ice_vsi_vlan_ops outer_vlan_ops;
 390	u16 num_vlan;
 391
 392	/* queue information */
 393	u8 tx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 394	u8 rx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 395	u16 *txq_map;			 /* index in pf->avail_txqs */
 396	u16 *rxq_map;			 /* index in pf->avail_rxqs */
 397	u16 alloc_txq;			 /* Allocated Tx queues */
 398	u16 num_txq;			 /* Used Tx queues */
 399	u16 alloc_rxq;			 /* Allocated Rx queues */
 400	u16 num_rxq;			 /* Used Rx queues */
 401	u16 req_txq;			 /* User requested Tx queues */
 402	u16 req_rxq;			 /* User requested Rx queues */
 403	u16 num_rx_desc;
 404	u16 num_tx_desc;
 405	u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];
 406	struct ice_tc_cfg tc_cfg;
 407	struct bpf_prog *xdp_prog;
 408	struct ice_tx_ring **xdp_rings;	 /* XDP ring array */
 409	u16 num_xdp_txq;		 /* Used XDP queues */
 410	u8 xdp_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
 411	struct mutex xdp_state_lock;
 412
 413	struct net_device **target_netdevs;
 414
 415	struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */
 416
 417	/* Channel Specific Fields */
 418	struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC];
 419	u16 cnt_q_avail;
 420	u16 next_base_q;	/* next queue to be used for channel setup */
 421	struct list_head ch_list;
 422	u16 num_chnl_rxq;
 423	u16 num_chnl_txq;
 424	u16 ch_rss_size;
 425	u16 num_chnl_fltr;
 426	/* store away rss size info before configuring ADQ channels so that,
 427	 * it can be used after tc-qdisc delete, to get back RSS setting as
 428	 * they were before
 429	 */
 430	u16 orig_rss_size;
 431	/* this keeps tracks of all enabled TC with and without DCB
 432	 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue
 433	 * information
 434	 */
 435	u8 all_numtc;
 436	u16 all_enatc;
 437
 438	/* store away TC info, to be used for rebuild logic */
 439	u8 old_numtc;
 440	u16 old_ena_tc;
 441
 442	/* setup back reference, to which aggregator node this VSI
 443	 * corresponds to
 444	 */
 445	struct ice_agg_node *agg_node;
 446
 447	struct_group_tagged(ice_vsi_cfg_params, params,
 448		struct ice_port_info *port_info; /* back pointer to port_info */
 449		struct ice_channel *ch; /* VSI's channel structure, may be NULL */
 450		union {
 451			/* VF associated with this VSI, may be NULL */
 452			struct ice_vf *vf;
 453			/* SF associated with this VSI, may be NULL */
 454			struct ice_dynamic_port *sf;
 455		};
 456		u32 flags; /* VSI flags used for rebuild and configuration */
 457		enum ice_vsi_type type; /* the type of the VSI */
 458	);
 459} ____cacheline_internodealigned_in_smp;
 460
 461/* struct that defines an interrupt vector */
 462struct ice_q_vector {
 463	struct ice_vsi *vsi;
 464
 465	u16 v_idx;			/* index in the vsi->q_vector array. */
 466	u16 reg_idx;			/* PF relative register index */
 467	u8 num_ring_rx;			/* total number of Rx rings in vector */
 468	u8 num_ring_tx;			/* total number of Tx rings in vector */
 469	u8 wb_on_itr:1;			/* if true, WB on ITR is enabled */
 470	/* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
 471	 * value to the device
 472	 */
 473	u8 intrl;
 474
 475	struct napi_struct napi;
 476
 477	struct ice_ring_container rx;
 478	struct ice_ring_container tx;
 479
 480	cpumask_t affinity_mask;
 481	struct irq_affinity_notify affinity_notify;
 482
 483	struct ice_channel *ch;
 484
 485	char name[ICE_INT_NAME_STR_LEN];
 486
 487	u16 total_events;	/* net_dim(): number of interrupts processed */
 488	u16 vf_reg_idx;		/* VF relative register index */
 489	struct msi_map irq;
 490} ____cacheline_internodealigned_in_smp;
 491
 492enum ice_pf_flags {
 493	ICE_FLAG_FLTR_SYNC,
 494	ICE_FLAG_RDMA_ENA,
 495	ICE_FLAG_RSS_ENA,
 496	ICE_FLAG_SRIOV_ENA,
 497	ICE_FLAG_SRIOV_CAPABLE,
 498	ICE_FLAG_DCB_CAPABLE,
 499	ICE_FLAG_DCB_ENA,
 500	ICE_FLAG_FD_ENA,
 501	ICE_FLAG_PTP_SUPPORTED,		/* PTP is supported by NVM */
 502	ICE_FLAG_ADV_FEATURES,
 503	ICE_FLAG_TC_MQPRIO,		/* support for Multi queue TC */
 504	ICE_FLAG_CLS_FLOWER,
 505	ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
 506	ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
 507	ICE_FLAG_NO_MEDIA,
 508	ICE_FLAG_FW_LLDP_AGENT,
 509	ICE_FLAG_MOD_POWER_UNSUPPORTED,
 510	ICE_FLAG_PHY_FW_LOAD_FAILED,
 511	ICE_FLAG_ETHTOOL_CTXT,		/* set when ethtool holds RTNL lock */
 512	ICE_FLAG_LEGACY_RX,
 513	ICE_FLAG_VF_TRUE_PROMISC_ENA,
 514	ICE_FLAG_MDD_AUTO_RESET_VF,
 515	ICE_FLAG_VF_VLAN_PRUNING,
 516	ICE_FLAG_LINK_LENIENT_MODE_ENA,
 517	ICE_FLAG_PLUG_AUX_DEV,
 518	ICE_FLAG_UNPLUG_AUX_DEV,
 519	ICE_FLAG_MTU_CHANGED,
 520	ICE_FLAG_GNSS,			/* GNSS successfully initialized */
 521	ICE_FLAG_DPLL,			/* SyncE/PTP dplls initialized */
 522	ICE_PF_FLAGS_NBITS		/* must be last */
 523};
 524
 525enum ice_misc_thread_tasks {
 526	ICE_MISC_THREAD_TX_TSTAMP,
 527	ICE_MISC_THREAD_NBITS		/* must be last */
 528};
 529
 530struct ice_eswitch {
 531	struct ice_vsi *uplink_vsi;
 532	struct ice_esw_br_offloads *br_offloads;
 533	struct xarray reprs;
 534	bool is_running;
 535};
 536
 537struct ice_agg_node {
 538	u32 agg_id;
 539#define ICE_MAX_VSIS_IN_AGG_NODE	64
 540	u32 num_vsis;
 541	u8 valid;
 542};
 543
 544struct ice_pf {
 545	struct pci_dev *pdev;
 546	struct ice_adapter *adapter;
 547
 548	struct devlink_region *nvm_region;
 549	struct devlink_region *sram_region;
 550	struct devlink_region *devcaps_region;
 551
 552	/* devlink port data */
 553	struct devlink_port devlink_port;
 554
 555	/* OS reserved IRQ details */
 556	struct msix_entry *msix_entries;
 557	struct ice_irq_tracker irq_tracker;
 558	/* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
 559	 * number of MSIX vectors needed for all SR-IOV VFs from the number of
 560	 * MSIX vectors allowed on this PF.
 561	 */
 562	u16 sriov_base_vector;
 563	unsigned long *sriov_irq_bm;	/* bitmap to track irq usage */
 564	u16 sriov_irq_size;		/* size of the irq_bm bitmap */
 565
 566	u16 ctrl_vsi_idx;		/* control VSI index in pf->vsi array */
 567
 568	struct ice_vsi **vsi;		/* VSIs created by the driver */
 569	struct ice_vsi_stats **vsi_stats;
 570	struct ice_sw *first_sw;	/* first switch created by firmware */
 571	u16 eswitch_mode;		/* current mode of eswitch */
 572	struct dentry *ice_debugfs_pf;
 573	struct dentry *ice_debugfs_pf_fwlog;
 574	/* keep track of all the dentrys for FW log modules */
 575	struct dentry **ice_debugfs_pf_fwlog_modules;
 576	struct ice_vfs vfs;
 577	DECLARE_BITMAP(features, ICE_F_MAX);
 578	DECLARE_BITMAP(state, ICE_STATE_NBITS);
 579	DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
 580	DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS);
 581	unsigned long *avail_txqs;	/* bitmap to track PF Tx queue usage */
 582	unsigned long *avail_rxqs;	/* bitmap to track PF Rx queue usage */
 583	unsigned long serv_tmr_period;
 584	unsigned long serv_tmr_prev;
 585	struct timer_list serv_tmr;
 586	struct work_struct serv_task;
 587	struct mutex avail_q_mutex;	/* protects access to avail_[rx|tx]qs */
 588	struct mutex sw_mutex;		/* lock for protecting VSI alloc flow */
 589	struct mutex tc_mutex;		/* lock to protect TC changes */
 590	struct mutex adev_mutex;	/* lock to protect aux device access */
 591	struct mutex lag_mutex;		/* protect ice_lag struct in PF */
 592	u32 msg_enable;
 593	struct ice_ptp ptp;
 594	struct gnss_serial *gnss_serial;
 595	struct gnss_device *gnss_dev;
 596	u16 num_rdma_msix;		/* Total MSIX vectors for RDMA driver */
 597	u16 rdma_base_vector;
 598
 599	/* spinlock to protect the AdminQ wait list */
 600	spinlock_t aq_wait_lock;
 601	struct hlist_head aq_wait_list;
 602	wait_queue_head_t aq_wait_queue;
 603	bool fw_emp_reset_disabled;
 604
 605	wait_queue_head_t reset_wait_queue;
 606
 607	u32 hw_csum_rx_error;
 608	u32 hw_rx_eipe_error;
 609	u32 oicr_err_reg;
 610	struct msi_map oicr_irq;	/* Other interrupt cause MSIX vector */
 611	struct msi_map ll_ts_irq;	/* LL_TS interrupt MSIX vector */
 612	u16 max_pf_txqs;	/* Total Tx queues PF wide */
 613	u16 max_pf_rxqs;	/* Total Rx queues PF wide */
 614	u16 num_lan_msix;	/* Total MSIX vectors for base driver */
 615	u16 num_lan_tx;		/* num LAN Tx queues setup */
 616	u16 num_lan_rx;		/* num LAN Rx queues setup */
 617	u16 next_vsi;		/* Next free slot in pf->vsi[] - 0-based! */
 618	u16 num_alloc_vsi;
 619	u16 corer_count;	/* Core reset count */
 620	u16 globr_count;	/* Global reset count */
 621	u16 empr_count;		/* EMP reset count */
 622	u16 pfr_count;		/* PF reset count */
 623
 624	u8 wol_ena : 1;		/* software state of WoL */
 625	u32 wakeup_reason;	/* last wakeup reason */
 626	struct ice_hw_port_stats stats;
 627	struct ice_hw_port_stats stats_prev;
 628	struct ice_hw hw;
 629	u8 stat_prev_loaded:1; /* has previous stats been loaded */
 630	u8 rdma_mode;
 631	u16 dcbx_cap;
 
 632	u32 tx_timeout_count;
 633	unsigned long tx_timeout_last_recovery;
 634	u32 tx_timeout_recovery_level;
 635	char int_name[ICE_INT_NAME_STR_LEN];
 636	char int_name_ll_ts[ICE_INT_NAME_STR_LEN];
 637	struct auxiliary_device *adev;
 638	int aux_idx;
 639	u32 sw_int_count;
 640	/* count of tc_flower filters specific to channel (aka where filter
 641	 * action is "hw_tc <tc_num>")
 642	 */
 643	u16 num_dmac_chnl_fltrs;
 644	struct hlist_head tc_flower_fltr_list;
 645
 646	u64 supported_rxdids;
 647
 648	__le64 nvm_phy_type_lo; /* NVM PHY type low */
 649	__le64 nvm_phy_type_hi; /* NVM PHY type high */
 650	struct ice_link_default_override_tlv link_dflt_override;
 651	struct ice_lag *lag; /* Link Aggregation information */
 652
 653	struct ice_eswitch eswitch;
 654	struct ice_esw_br_port *br_port;
 655
 656	struct xarray dyn_ports;
 657	struct xarray sf_nums;
 658
 659#define ICE_INVALID_AGG_NODE_ID		0
 660#define ICE_PF_AGG_NODE_ID_START	1
 661#define ICE_MAX_PF_AGG_NODES		32
 662	struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];
 663#define ICE_VF_AGG_NODE_ID_START	65
 664#define ICE_MAX_VF_AGG_NODES		32
 665	struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
 666	struct ice_dplls dplls;
 667	struct device *hwmon_dev;
 668
 669	u8 num_quanta_prof_used;
 670};
 671
 672extern struct workqueue_struct *ice_lag_wq;
 673
 674struct ice_netdev_priv {
 675	struct ice_vsi *vsi;
 676	struct ice_repr *repr;
 677	/* indirect block callbacks on registered higher level devices
 678	 * (e.g. tunnel devices)
 679	 *
 680	 * tc_indr_block_cb_priv_list is used to look up indirect callback
 681	 * private data
 682	 */
 683	struct list_head tc_indr_block_priv_list;
 684};
 685
 686/**
 687 * ice_vector_ch_enabled
 688 * @qv: pointer to q_vector, can be NULL
 689 *
 690 * This function returns true if vector is channel enabled otherwise false
 691 */
 692static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv)
 693{
 694	return !!qv->ch; /* Enable it to run with TC */
 695}
 696
 697/**
 698 * ice_ptp_pf_handles_tx_interrupt - Check if PF handles Tx interrupt
 699 * @pf: Board private structure
 700 *
 701 * Return true if this PF should respond to the Tx timestamp interrupt
 702 * indication in the miscellaneous OICR interrupt handler.
 703 */
 704static inline bool ice_ptp_pf_handles_tx_interrupt(struct ice_pf *pf)
 705{
 706	return pf->ptp.tx_interrupt_mode != ICE_PTP_TX_INTERRUPT_NONE;
 707}
 708
 709/**
 710 * ice_irq_dynamic_ena - Enable default interrupt generation settings
 711 * @hw: pointer to HW struct
 712 * @vsi: pointer to VSI struct, can be NULL
 713 * @q_vector: pointer to q_vector, can be NULL
 714 */
 715static inline void
 716ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
 717		    struct ice_q_vector *q_vector)
 718{
 719	u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
 720				((struct ice_pf *)hw->back)->oicr_irq.index;
 721	int itr = ICE_ITR_NONE;
 722	u32 val;
 723
 724	/* clear the PBA here, as this function is meant to clean out all
 725	 * previous interrupts and enable the interrupt
 726	 */
 727	val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
 728	      (itr << GLINT_DYN_CTL_ITR_INDX_S);
 729	if (vsi)
 730		if (test_bit(ICE_VSI_DOWN, vsi->state))
 731			return;
 732	wr32(hw, GLINT_DYN_CTL(vector), val);
 733}
 734
 735/**
 736 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
 737 * @netdev: pointer to the netdev struct
 738 */
 739static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
 740{
 741	struct ice_netdev_priv *np = netdev_priv(netdev);
 742
 743	return np->vsi->back;
 744}
 745
 746static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
 747{
 748	return !!READ_ONCE(vsi->xdp_prog);
 749}
 750
 751static inline void ice_set_ring_xdp(struct ice_tx_ring *ring)
 752{
 753	ring->flags |= ICE_TX_FLAGS_RING_XDP;
 754}
 755
 756/**
 757 * ice_get_xp_from_qid - get ZC XSK buffer pool bound to a queue ID
 758 * @vsi: pointer to VSI
 759 * @qid: index of a queue to look at XSK buff pool presence
 760 *
 761 * Return: A pointer to xsk_buff_pool structure if there is a buffer pool
 762 * attached and configured as zero-copy, NULL otherwise.
 763 */
 764static inline struct xsk_buff_pool *ice_get_xp_from_qid(struct ice_vsi *vsi,
 765							u16 qid)
 766{
 767	struct xsk_buff_pool *pool = xsk_get_pool_from_qid(vsi->netdev, qid);
 768
 769	if (!ice_is_xdp_ena_vsi(vsi))
 770		return NULL;
 771
 772	return (pool && pool->dev) ? pool : NULL;
 773}
 774
 775/**
 776 * ice_rx_xsk_pool - assign XSK buff pool to Rx ring
 777 * @ring: Rx ring to use
 778 *
 779 * Sets XSK buff pool pointer on Rx ring.
 780 */
 781static inline void ice_rx_xsk_pool(struct ice_rx_ring *ring)
 782{
 783	struct ice_vsi *vsi = ring->vsi;
 784	u16 qid = ring->q_index;
 785
 786	WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid));
 787}
 788
 789/**
 790 * ice_tx_xsk_pool - assign XSK buff pool to XDP ring
 791 * @vsi: pointer to VSI
 792 * @qid: index of a queue to look at XSK buff pool presence
 793 *
 794 * Sets XSK buff pool pointer on XDP ring.
 795 *
 796 * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided
 797 * queue id. Reason for doing so is that queue vectors might have assigned more
 798 * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring
 799 * carries a pointer to one of these XDP rings for its own purposes, such as
 800 * handling XDP_TX action, therefore we can piggyback here on the
 801 * rx_ring->xdp_ring assignment that was done during XDP rings initialization.
 802 */
 803static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid)
 804{
 805	struct ice_tx_ring *ring;
 806
 807	ring = vsi->rx_rings[qid]->xdp_ring;
 808	if (!ring)
 809		return;
 810
 811	WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid));
 812}
 813
 814/**
 815 * ice_get_main_vsi - Get the PF VSI
 816 * @pf: PF instance
 817 *
 818 * returns pf->vsi[0], which by definition is the PF VSI
 819 */
 820static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
 821{
 822	if (pf->vsi)
 823		return pf->vsi[0];
 824
 825	return NULL;
 826}
 827
 828/**
 829 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv.
 830 * @np: private netdev structure
 831 */
 832static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np)
 833{
 834	/* In case of port representor return source port VSI. */
 835	if (np->repr)
 836		return np->repr->src_vsi;
 837	else
 838		return np->vsi;
 839}
 840
 841/**
 842 * ice_get_ctrl_vsi - Get the control VSI
 843 * @pf: PF instance
 844 */
 845static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
 846{
 847	/* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
 848	if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
 849		return NULL;
 850
 851	return pf->vsi[pf->ctrl_vsi_idx];
 852}
 853
 854/**
 855 * ice_find_vsi - Find the VSI from VSI ID
 856 * @pf: The PF pointer to search in
 857 * @vsi_num: The VSI ID to search for
 858 */
 859static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num)
 860{
 861	int i;
 862
 863	ice_for_each_vsi(pf, i)
 864		if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num)
 865			return  pf->vsi[i];
 866	return NULL;
 867}
 868
 869/**
 870 * ice_is_switchdev_running - check if switchdev is configured
 871 * @pf: pointer to PF structure
 872 *
 873 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV
 874 * and switchdev is configured, false otherwise.
 875 */
 876static inline bool ice_is_switchdev_running(struct ice_pf *pf)
 877{
 878	return pf->eswitch.is_running;
 879}
 880
 881#define ICE_FD_STAT_CTR_BLOCK_COUNT	256
 882#define ICE_FD_STAT_PF_IDX(base_idx) \
 883			((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
 884#define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
 885#define ICE_FD_STAT_CH			1
 886#define ICE_FD_CH_STAT_IDX(base_idx) \
 887			(ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH)
 888
 889/**
 890 * ice_is_adq_active - any active ADQs
 891 * @pf: pointer to PF
 892 *
 893 * This function returns true if there are any ADQs configured (which is
 894 * determined by looking at VSI type (which should be VSI_PF), numtc, and
 895 * TC_MQPRIO flag) otherwise return false
 896 */
 897static inline bool ice_is_adq_active(struct ice_pf *pf)
 898{
 899	struct ice_vsi *vsi;
 900
 901	vsi = ice_get_main_vsi(pf);
 902	if (!vsi)
 903		return false;
 904
 905	/* is ADQ configured */
 906	if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC &&
 907	    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
 908		return true;
 909
 910	return false;
 911}
 912
 913void ice_debugfs_fwlog_init(struct ice_pf *pf);
 914void ice_debugfs_pf_deinit(struct ice_pf *pf);
 915void ice_debugfs_init(void);
 916void ice_debugfs_exit(void);
 917void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module);
 918
 919bool netif_is_ice(const struct net_device *dev);
 920int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
 921int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
 922int ice_vsi_open_ctrl(struct ice_vsi *vsi);
 923int ice_vsi_open(struct ice_vsi *vsi);
 924void ice_set_ethtool_ops(struct net_device *netdev);
 925void ice_set_ethtool_repr_ops(struct net_device *netdev);
 926void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
 927void ice_set_ethtool_sf_ops(struct net_device *netdev);
 928u16 ice_get_avail_txq_count(struct ice_pf *pf);
 929u16 ice_get_avail_rxq_count(struct ice_pf *pf);
 930int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked);
 931void ice_update_vsi_stats(struct ice_vsi *vsi);
 932void ice_update_pf_stats(struct ice_pf *pf);
 933void
 934ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp,
 935			     struct ice_q_stats stats, u64 *pkts, u64 *bytes);
 936int ice_up(struct ice_vsi *vsi);
 937int ice_down(struct ice_vsi *vsi);
 938int ice_down_up(struct ice_vsi *vsi);
 939int ice_vsi_cfg_lan(struct ice_vsi *vsi);
 940struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
 941
 942enum ice_xdp_cfg {
 943	ICE_XDP_CFG_FULL,	/* Fully apply new config in .ndo_bpf() */
 944	ICE_XDP_CFG_PART,	/* Save/use part of config in VSI rebuild */
 945};
 946
 947int ice_vsi_determine_xdp_res(struct ice_vsi *vsi);
 948int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog,
 949			  enum ice_xdp_cfg cfg_type);
 950int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type);
 951void ice_map_xdp_rings(struct ice_vsi *vsi);
 952int
 953ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
 954	     u32 flags);
 955int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
 956int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
 957int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);
 958int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);
 959int ice_set_rss_hfunc(struct ice_vsi *vsi, u8 hfunc);
 960void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
 961int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
 962void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
 963int ice_plug_aux_dev(struct ice_pf *pf);
 964void ice_unplug_aux_dev(struct ice_pf *pf);
 965int ice_init_rdma(struct ice_pf *pf);
 966void ice_deinit_rdma(struct ice_pf *pf);
 967const char *ice_aq_str(enum ice_aq_err aq_err);
 968bool ice_is_wol_supported(struct ice_hw *hw);
 969void ice_fdir_del_all_fltrs(struct ice_vsi *vsi);
 970int
 971ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
 972		    bool is_tun);
 973void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
 974int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
 975int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
 976int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
 977int
 978ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
 979		      u32 *rule_locs);
 980void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx);
 981void ice_fdir_release_flows(struct ice_hw *hw);
 982void ice_fdir_replay_flows(struct ice_hw *hw);
 983void ice_fdir_replay_fltrs(struct ice_pf *pf);
 984int ice_fdir_create_dflt_rules(struct ice_pf *pf);
 985
 986enum ice_aq_task_state {
 987	ICE_AQ_TASK_NOT_PREPARED,
 988	ICE_AQ_TASK_WAITING,
 989	ICE_AQ_TASK_COMPLETE,
 990	ICE_AQ_TASK_CANCELED,
 991};
 992
 993struct ice_aq_task {
 994	struct hlist_node entry;
 995	struct ice_rq_event_info event;
 996	enum ice_aq_task_state state;
 997	u16 opcode;
 998};
 999
1000void ice_aq_prep_for_event(struct ice_pf *pf, struct ice_aq_task *task,
1001			   u16 opcode);
1002int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task,
1003			  unsigned long timeout);
1004int ice_open(struct net_device *netdev);
1005int ice_open_internal(struct net_device *netdev);
1006int ice_stop(struct net_device *netdev);
1007void ice_service_task_schedule(struct ice_pf *pf);
1008int ice_load(struct ice_pf *pf);
1009void ice_unload(struct ice_pf *pf);
1010void ice_adv_lnk_speed_maps_init(void);
1011int ice_init_dev(struct ice_pf *pf);
1012void ice_deinit_dev(struct ice_pf *pf);
1013int ice_change_mtu(struct net_device *netdev, int new_mtu);
1014void ice_tx_timeout(struct net_device *netdev, unsigned int txqueue);
1015int ice_xdp(struct net_device *dev, struct netdev_bpf *xdp);
1016void ice_set_netdev_features(struct net_device *netdev);
1017int ice_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid);
1018int ice_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid);
1019void ice_get_stats64(struct net_device *netdev,
1020		     struct rtnl_link_stats64 *stats);
1021
1022/**
1023 * ice_set_rdma_cap - enable RDMA support
1024 * @pf: PF struct
1025 */
1026static inline void ice_set_rdma_cap(struct ice_pf *pf)
1027{
1028	if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
1029		set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
1030		set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
1031	}
1032}
1033
1034/**
1035 * ice_clear_rdma_cap - disable RDMA support
1036 * @pf: PF struct
1037 */
1038static inline void ice_clear_rdma_cap(struct ice_pf *pf)
1039{
1040	/* defer unplug to service task to avoid RTNL lock and
1041	 * clear PLUG bit so that pending plugs don't interfere
1042	 */
1043	clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
1044	set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags);
1045	clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
1046}
1047
1048static inline enum ice_phy_model ice_get_phy_model(const struct ice_hw *hw)
1049{
1050	return hw->ptp.phy_model;
1051}
1052
1053extern const struct xdp_metadata_ops ice_xdp_md_ops;
1054#endif /* _ICE_H_ */