1# SPDX-License-Identifier: GPL-2.0
 2#
 3# Generic HWSPINLOCK framework
 4#
 5
 6menuconfig HWSPINLOCK
 7	bool "Hardware Spinlock drivers"
 8
 9if HWSPINLOCK
10
11config HWSPINLOCK_OMAP
12	tristate "OMAP Hardware Spinlock device"
13	depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX || ARCH_K3 || COMPILE_TEST
 
14	help
15	  Say y here to support the OMAP Hardware Spinlock device (firstly
16	  introduced in OMAP4).
17
18	  If unsure, say N.
19
20config HWSPINLOCK_QCOM
21	tristate "Qualcomm Hardware Spinlock device"
22	depends on ARCH_QCOM || COMPILE_TEST
 
23	select MFD_SYSCON
24	help
25	  Say y here to support the Qualcomm Hardware Mutex functionality, which
26	  provides a synchronisation mechanism for the various processors on
27	  the SoC.
28
29	  If unsure, say N.
30
 
 
 
 
 
 
 
 
 
 
 
 
31config HWSPINLOCK_SPRD
32	tristate "SPRD Hardware Spinlock device"
33	depends on ARCH_SPRD || COMPILE_TEST
 
34	help
35	  Say y here to support the SPRD Hardware Spinlock device.
36
37	  If unsure, say N.
38
39config HWSPINLOCK_STM32
40	tristate "STM32 Hardware Spinlock device"
41	depends on MACH_STM32MP157 || COMPILE_TEST
 
42	help
43	  Say y here to support the STM32 Hardware Spinlock device.
44
45	  If unsure, say N.
46
47config HWSPINLOCK_SUN6I
48	tristate "SUN6I Hardware Spinlock device"
49	depends on ARCH_SUNXI || COMPILE_TEST
50	help
51	  Say y here to support the SUN6I Hardware Spinlock device which can be
52	  found in most of the sun6i compatible Allwinner SoCs.
53
54	  If unsure, say N.
55
56config HSEM_U8500
57	tristate "STE Hardware Semaphore functionality"
58	depends on ARCH_U8500 || COMPILE_TEST
 
59	help
60	  Say y here to support the STE Hardware Semaphore functionality, which
61	  provides a synchronisation mechanism for the various processor on the
62	  SoC.
63
64	  If unsure, say N.
65
66endif # HWSPINLOCK

 1# SPDX-License-Identifier: GPL-2.0
 2#
 3# Generic HWSPINLOCK framework
 4#
 5
 6menuconfig HWSPINLOCK
 7	bool "Hardware Spinlock drivers"
 8
 
 
 9config HWSPINLOCK_OMAP
10	tristate "OMAP Hardware Spinlock device"
11	depends on HWSPINLOCK
12	depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX || ARCH_K3
13	help
14	  Say y here to support the OMAP Hardware Spinlock device (firstly
15	  introduced in OMAP4).
16
17	  If unsure, say N.
18
19config HWSPINLOCK_QCOM
20	tristate "Qualcomm Hardware Spinlock device"
21	depends on HWSPINLOCK
22	depends on ARCH_QCOM
23	select MFD_SYSCON
24	help
25	  Say y here to support the Qualcomm Hardware Mutex functionality, which
26	  provides a synchronisation mechanism for the various processors on
27	  the SoC.
28
29	  If unsure, say N.
30
31config HWSPINLOCK_SIRF
32	tristate "SIRF Hardware Spinlock device"
33	depends on HWSPINLOCK
34	depends on ARCH_SIRF
35	help
36	  Say y here to support the SIRF Hardware Spinlock device, which
37	  provides a synchronisation mechanism for the various processors
38	  on the SoC.
39
40	  It's safe to say n here if you're not interested in SIRF hardware
41	  spinlock or just want a bare minimum kernel.
42
43config HWSPINLOCK_SPRD
44	tristate "SPRD Hardware Spinlock device"
45	depends on ARCH_SPRD
46	depends on HWSPINLOCK
47	help
48	  Say y here to support the SPRD Hardware Spinlock device.
49
50	  If unsure, say N.
51
52config HWSPINLOCK_STM32
53	tristate "STM32 Hardware Spinlock device"
54	depends on MACH_STM32MP157
55	depends on HWSPINLOCK
56	help
57	  Say y here to support the STM32 Hardware Spinlock device.
58
59	  If unsure, say N.
60
 
 
 
 
 
 
 
 
 
61config HSEM_U8500
62	tristate "STE Hardware Semaphore functionality"
63	depends on HWSPINLOCK
64	depends on ARCH_U8500
65	help
66	  Say y here to support the STE Hardware Semaphore functionality, which
67	  provides a synchronisation mechanism for the various processor on the
68	  SoC.
69
70	  If unsure, say N.