Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright © 2006-2011 Intel Corporation
4 *
5 * Authors:
6 * Eric Anholt <eric@anholt.net>
7 * Dave Airlie <airlied@linux.ie>
8 * Jesse Barnes <jesse.barnes@intel.com>
9 */
10
11#include <linux/dmi.h>
12#include <linux/i2c.h>
13#include <linux/pm_runtime.h>
14
15#include <drm/drm_crtc_helper.h>
16#include <drm/drm_modeset_helper_vtables.h>
17#include <drm/drm_simple_kms_helper.h>
18
19#include "cdv_device.h"
20#include "intel_bios.h"
21#include "power.h"
22#include "psb_drv.h"
23#include "psb_intel_drv.h"
24#include "psb_intel_reg.h"
25
26/*
27 * LVDS I2C backlight control macros
28 */
29#define BRIGHTNESS_MAX_LEVEL 100
30#define BRIGHTNESS_MASK 0xFF
31#define BLC_I2C_TYPE 0x01
32#define BLC_PWM_TYPT 0x02
33
34#define BLC_POLARITY_NORMAL 0
35#define BLC_POLARITY_INVERSE 1
36
37#define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
38#define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
39#define PSB_BLC_PWM_PRECISION_FACTOR (10)
40#define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
41#define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
42
43struct cdv_intel_lvds_priv {
44 /**
45 * Saved LVDO output states
46 */
47 uint32_t savePP_ON;
48 uint32_t savePP_OFF;
49 uint32_t saveLVDS;
50 uint32_t savePP_CONTROL;
51 uint32_t savePP_CYCLE;
52 uint32_t savePFIT_CONTROL;
53 uint32_t savePFIT_PGM_RATIOS;
54 uint32_t saveBLC_PWM_CTL;
55};
56
57/*
58 * Returns the maximum level of the backlight duty cycle field.
59 */
60static u32 cdv_intel_lvds_get_max_backlight(struct drm_device *dev)
61{
62 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
63 u32 retval;
64
65 if (gma_power_begin(dev, false)) {
66 retval = ((REG_READ(BLC_PWM_CTL) &
67 BACKLIGHT_MODULATION_FREQ_MASK) >>
68 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
69
70 gma_power_end(dev);
71 } else
72 retval = ((dev_priv->regs.saveBLC_PWM_CTL &
73 BACKLIGHT_MODULATION_FREQ_MASK) >>
74 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
75
76 return retval;
77}
78
79/*
80 * Sets the backlight level.
81 *
82 * level backlight level, from 0 to cdv_intel_lvds_get_max_backlight().
83 */
84static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level)
85{
86 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
87 u32 blc_pwm_ctl;
88
89 if (gma_power_begin(dev, false)) {
90 blc_pwm_ctl =
91 REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
92 REG_WRITE(BLC_PWM_CTL,
93 (blc_pwm_ctl |
94 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
95 gma_power_end(dev);
96 } else {
97 blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
98 ~BACKLIGHT_DUTY_CYCLE_MASK;
99 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
100 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
101 }
102}
103
104/*
105 * Sets the power state for the panel.
106 */
107static void cdv_intel_lvds_set_power(struct drm_device *dev,
108 struct drm_encoder *encoder, bool on)
109{
110 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
111 u32 pp_status;
112
113 if (!gma_power_begin(dev, true))
114 return;
115
116 if (on) {
117 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
118 POWER_TARGET_ON);
119 do {
120 pp_status = REG_READ(PP_STATUS);
121 } while ((pp_status & PP_ON) == 0);
122
123 cdv_intel_lvds_set_backlight(dev,
124 dev_priv->mode_dev.backlight_duty_cycle);
125 } else {
126 cdv_intel_lvds_set_backlight(dev, 0);
127
128 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
129 ~POWER_TARGET_ON);
130 do {
131 pp_status = REG_READ(PP_STATUS);
132 } while (pp_status & PP_ON);
133 }
134 gma_power_end(dev);
135}
136
137static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
138{
139 struct drm_device *dev = encoder->dev;
140 if (mode == DRM_MODE_DPMS_ON)
141 cdv_intel_lvds_set_power(dev, encoder, true);
142 else
143 cdv_intel_lvds_set_power(dev, encoder, false);
144 /* XXX: We never power down the LVDS pairs. */
145}
146
147static void cdv_intel_lvds_save(struct drm_connector *connector)
148{
149}
150
151static void cdv_intel_lvds_restore(struct drm_connector *connector)
152{
153}
154
155static enum drm_mode_status cdv_intel_lvds_mode_valid(struct drm_connector *connector,
156 struct drm_display_mode *mode)
157{
158 struct drm_device *dev = connector->dev;
159 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
160 struct drm_display_mode *fixed_mode =
161 dev_priv->mode_dev.panel_fixed_mode;
162
163 /* just in case */
164 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
165 return MODE_NO_DBLESCAN;
166
167 /* just in case */
168 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
169 return MODE_NO_INTERLACE;
170
171 if (fixed_mode) {
172 if (mode->hdisplay > fixed_mode->hdisplay)
173 return MODE_PANEL;
174 if (mode->vdisplay > fixed_mode->vdisplay)
175 return MODE_PANEL;
176 }
177 return MODE_OK;
178}
179
180static bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder,
181 const struct drm_display_mode *mode,
182 struct drm_display_mode *adjusted_mode)
183{
184 struct drm_device *dev = encoder->dev;
185 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
186 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
187 struct drm_encoder *tmp_encoder;
188 struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
189
190 /* Should never happen!! */
191 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
192 head) {
193 if (tmp_encoder != encoder
194 && tmp_encoder->crtc == encoder->crtc) {
195 pr_err("Can't enable LVDS and another encoder on the same pipe\n");
196 return false;
197 }
198 }
199
200 /*
201 * If we have timings from the BIOS for the panel, put them in
202 * to the adjusted mode. The CRTC will be set up for this mode,
203 * with the panel scaling set up to source from the H/VDisplay
204 * of the original mode.
205 */
206 if (panel_fixed_mode != NULL) {
207 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
208 adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
209 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
210 adjusted_mode->htotal = panel_fixed_mode->htotal;
211 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
212 adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
213 adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
214 adjusted_mode->vtotal = panel_fixed_mode->vtotal;
215 adjusted_mode->clock = panel_fixed_mode->clock;
216 drm_mode_set_crtcinfo(adjusted_mode,
217 CRTC_INTERLACE_HALVE_V);
218 }
219
220 /*
221 * XXX: It would be nice to support lower refresh rates on the
222 * panels to reduce power consumption, and perhaps match the
223 * user's requested refresh rate.
224 */
225
226 return true;
227}
228
229static void cdv_intel_lvds_prepare(struct drm_encoder *encoder)
230{
231 struct drm_device *dev = encoder->dev;
232 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
233 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
234
235 if (!gma_power_begin(dev, true))
236 return;
237
238 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
239 mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
240 BACKLIGHT_DUTY_CYCLE_MASK);
241
242 cdv_intel_lvds_set_power(dev, encoder, false);
243
244 gma_power_end(dev);
245}
246
247static void cdv_intel_lvds_commit(struct drm_encoder *encoder)
248{
249 struct drm_device *dev = encoder->dev;
250 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
251 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
252
253 if (mode_dev->backlight_duty_cycle == 0)
254 mode_dev->backlight_duty_cycle =
255 cdv_intel_lvds_get_max_backlight(dev);
256
257 cdv_intel_lvds_set_power(dev, encoder, true);
258}
259
260static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
261 struct drm_display_mode *mode,
262 struct drm_display_mode *adjusted_mode)
263{
264 struct drm_device *dev = encoder->dev;
265 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
266 struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
267 u32 pfit_control;
268
269 /*
270 * The LVDS pin pair will already have been turned on in the
271 * cdv_intel_crtc_mode_set since it has a large impact on the DPLL
272 * settings.
273 */
274
275 /*
276 * Enable automatic panel scaling so that non-native modes fill the
277 * screen. Should be enabled before the pipe is enabled, according to
278 * register description and PRM.
279 */
280 if (mode->hdisplay != adjusted_mode->hdisplay ||
281 mode->vdisplay != adjusted_mode->vdisplay)
282 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
283 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
284 HORIZ_INTERP_BILINEAR);
285 else
286 pfit_control = 0;
287
288 pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
289
290 if (dev_priv->lvds_dither)
291 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
292
293 REG_WRITE(PFIT_CONTROL, pfit_control);
294}
295
296/*
297 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
298 */
299static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
300{
301 struct drm_device *dev = connector->dev;
302 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
303 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
304 int ret;
305
306 ret = psb_intel_ddc_get_modes(connector, connector->ddc);
307
308 if (ret)
309 return ret;
310
311 if (mode_dev->panel_fixed_mode != NULL) {
312 struct drm_display_mode *mode =
313 drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
314 if (!mode)
315 return 0;
316
317 drm_mode_probed_add(connector, mode);
318 return 1;
319 }
320
321 return 0;
322}
323
324static void cdv_intel_lvds_destroy(struct drm_connector *connector)
325{
326 struct gma_connector *gma_connector = to_gma_connector(connector);
327 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
328
329 gma_i2c_destroy(to_gma_i2c_chan(connector->ddc));
330 gma_i2c_destroy(gma_encoder->i2c_bus);
331 drm_connector_cleanup(connector);
332 kfree(gma_connector);
333}
334
335static int cdv_intel_lvds_set_property(struct drm_connector *connector,
336 struct drm_property *property,
337 uint64_t value)
338{
339 struct drm_encoder *encoder = connector->encoder;
340
341 if (!strcmp(property->name, "scaling mode") && encoder) {
342 struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
343 uint64_t curValue;
344
345 if (!crtc)
346 return -1;
347
348 switch (value) {
349 case DRM_MODE_SCALE_FULLSCREEN:
350 break;
351 case DRM_MODE_SCALE_NO_SCALE:
352 break;
353 case DRM_MODE_SCALE_ASPECT:
354 break;
355 default:
356 return -1;
357 }
358
359 if (drm_object_property_get_value(&connector->base,
360 property,
361 &curValue))
362 return -1;
363
364 if (curValue == value)
365 return 0;
366
367 if (drm_object_property_set_value(&connector->base,
368 property,
369 value))
370 return -1;
371
372 if (crtc->saved_mode.hdisplay != 0 &&
373 crtc->saved_mode.vdisplay != 0) {
374 if (!drm_crtc_helper_set_mode(encoder->crtc,
375 &crtc->saved_mode,
376 encoder->crtc->x,
377 encoder->crtc->y,
378 encoder->crtc->primary->fb))
379 return -1;
380 }
381 } else if (!strcmp(property->name, "backlight") && encoder) {
382 if (drm_object_property_set_value(&connector->base,
383 property,
384 value))
385 return -1;
386 else
387 gma_backlight_set(encoder->dev, value);
388 } else if (!strcmp(property->name, "DPMS") && encoder) {
389 const struct drm_encoder_helper_funcs *helpers =
390 encoder->helper_private;
391 helpers->dpms(encoder, value);
392 }
393 return 0;
394}
395
396static const struct drm_encoder_helper_funcs
397 cdv_intel_lvds_helper_funcs = {
398 .dpms = cdv_intel_lvds_encoder_dpms,
399 .mode_fixup = cdv_intel_lvds_mode_fixup,
400 .prepare = cdv_intel_lvds_prepare,
401 .mode_set = cdv_intel_lvds_mode_set,
402 .commit = cdv_intel_lvds_commit,
403};
404
405static const struct drm_connector_helper_funcs
406 cdv_intel_lvds_connector_helper_funcs = {
407 .get_modes = cdv_intel_lvds_get_modes,
408 .mode_valid = cdv_intel_lvds_mode_valid,
409 .best_encoder = gma_best_encoder,
410};
411
412static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
413 .dpms = drm_helper_connector_dpms,
414 .fill_modes = drm_helper_probe_single_connector_modes,
415 .set_property = cdv_intel_lvds_set_property,
416 .destroy = cdv_intel_lvds_destroy,
417};
418
419/*
420 * Enumerate the child dev array parsed from VBT to check whether
421 * the LVDS is present.
422 * If it is present, return 1.
423 * If it is not present, return false.
424 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
425 */
426static bool lvds_is_present_in_vbt(struct drm_device *dev,
427 u8 *i2c_pin)
428{
429 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
430 int i;
431
432 if (!dev_priv->child_dev_num)
433 return true;
434
435 for (i = 0; i < dev_priv->child_dev_num; i++) {
436 struct child_device_config *child = dev_priv->child_dev + i;
437
438 /* If the device type is not LFP, continue.
439 * We have to check both the new identifiers as well as the
440 * old for compatibility with some BIOSes.
441 */
442 if (child->device_type != DEVICE_TYPE_INT_LFP &&
443 child->device_type != DEVICE_TYPE_LFP)
444 continue;
445
446 if (child->i2c_pin)
447 *i2c_pin = child->i2c_pin;
448
449 /* However, we cannot trust the BIOS writers to populate
450 * the VBT correctly. Since LVDS requires additional
451 * information from AIM blocks, a non-zero addin offset is
452 * a good indicator that the LVDS is actually present.
453 */
454 if (child->addin_offset)
455 return true;
456
457 /* But even then some BIOS writers perform some black magic
458 * and instantiate the device without reference to any
459 * additional data. Trust that if the VBT was written into
460 * the OpRegion then they have validated the LVDS's existence.
461 */
462 if (dev_priv->opregion.vbt)
463 return true;
464 }
465
466 return false;
467}
468
469/**
470 * cdv_intel_lvds_init - setup LVDS connectors on this device
471 * @dev: drm device
472 * @mode_dev: PSB mode device
473 *
474 * Create the connector, register the LVDS DDC bus, and try to figure out what
475 * modes we can display on the LVDS panel (if present).
476 */
477void cdv_intel_lvds_init(struct drm_device *dev,
478 struct psb_intel_mode_device *mode_dev)
479{
480 struct gma_encoder *gma_encoder;
481 struct gma_connector *gma_connector;
482 struct cdv_intel_lvds_priv *lvds_priv;
483 struct drm_connector *connector;
484 struct drm_encoder *encoder;
485 struct drm_display_mode *scan;
486 struct drm_crtc *crtc;
487 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
488 struct gma_i2c_chan *ddc_bus;
489 u32 lvds;
490 int pipe;
491 int ret;
492 u8 pin;
493
494 if (!dev_priv->lvds_enabled_in_vbt)
495 return;
496
497 pin = GMBUS_PORT_PANEL;
498 if (!lvds_is_present_in_vbt(dev, &pin)) {
499 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
500 return;
501 }
502
503 gma_encoder = kzalloc(sizeof(struct gma_encoder),
504 GFP_KERNEL);
505 if (!gma_encoder)
506 return;
507
508 gma_connector = kzalloc(sizeof(struct gma_connector),
509 GFP_KERNEL);
510 if (!gma_connector)
511 goto err_free_encoder;
512
513 lvds_priv = kzalloc(sizeof(struct cdv_intel_lvds_priv), GFP_KERNEL);
514 if (!lvds_priv)
515 goto err_free_connector;
516
517 gma_encoder->dev_priv = lvds_priv;
518
519 connector = &gma_connector->base;
520 gma_connector->save = cdv_intel_lvds_save;
521 gma_connector->restore = cdv_intel_lvds_restore;
522 encoder = &gma_encoder->base;
523
524 /* Set up the DDC bus. */
525 ddc_bus = gma_i2c_create(dev, GPIOC, "LVDSDDC_C");
526 if (!ddc_bus) {
527 dev_printk(KERN_ERR, dev->dev,
528 "DDC bus registration " "failed.\n");
529 goto err_free_lvds_priv;
530 }
531
532 ret = drm_connector_init_with_ddc(dev, connector,
533 &cdv_intel_lvds_connector_funcs,
534 DRM_MODE_CONNECTOR_LVDS,
535 &ddc_bus->base);
536 if (ret)
537 goto err_destroy_ddc;
538
539 ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_LVDS);
540 if (ret)
541 goto err_connector_cleanup;
542
543 gma_connector_attach_encoder(gma_connector, gma_encoder);
544 gma_encoder->type = INTEL_OUTPUT_LVDS;
545
546 drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
547 drm_connector_helper_add(connector,
548 &cdv_intel_lvds_connector_helper_funcs);
549 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
550 connector->interlace_allowed = false;
551 connector->doublescan_allowed = false;
552
553 /*Attach connector properties*/
554 drm_object_attach_property(&connector->base,
555 dev->mode_config.scaling_mode_property,
556 DRM_MODE_SCALE_FULLSCREEN);
557 drm_object_attach_property(&connector->base,
558 dev_priv->backlight_property,
559 BRIGHTNESS_MAX_LEVEL);
560
561 /**
562 * Set up I2C bus
563 * FIXME: distroy i2c_bus when exit
564 */
565 gma_encoder->i2c_bus = gma_i2c_create(dev, GPIOB, "LVDSBLC_B");
566 if (!gma_encoder->i2c_bus) {
567 dev_printk(KERN_ERR,
568 dev->dev, "I2C bus registration failed.\n");
569 goto err_encoder_cleanup;
570 }
571 gma_encoder->i2c_bus->target_addr = 0x2C;
572 dev_priv->lvds_i2c_bus = gma_encoder->i2c_bus;
573
574 /*
575 * LVDS discovery:
576 * 1) check for EDID on DDC
577 * 2) check for VBT data
578 * 3) check to see if LVDS is already on
579 * if none of the above, no panel
580 * 4) make sure lid is open
581 * if closed, act like it's not there for now
582 */
583
584 /*
585 * Attempt to get the fixed panel mode from DDC. Assume that the
586 * preferred mode is the right one.
587 */
588 mutex_lock(&dev->mode_config.mutex);
589 psb_intel_ddc_get_modes(connector, &ddc_bus->base);
590
591 list_for_each_entry(scan, &connector->probed_modes, head) {
592 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
593 mode_dev->panel_fixed_mode =
594 drm_mode_duplicate(dev, scan);
595 goto out; /* FIXME: check for quirks */
596 }
597 }
598
599 /* Failed to get EDID, what about VBT? do we need this?*/
600 if (dev_priv->lfp_lvds_vbt_mode) {
601 mode_dev->panel_fixed_mode =
602 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
603 if (mode_dev->panel_fixed_mode) {
604 mode_dev->panel_fixed_mode->type |=
605 DRM_MODE_TYPE_PREFERRED;
606 goto out; /* FIXME: check for quirks */
607 }
608 }
609 /*
610 * If we didn't get EDID, try checking if the panel is already turned
611 * on. If so, assume that whatever is currently programmed is the
612 * correct mode.
613 */
614 lvds = REG_READ(LVDS);
615 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
616 crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
617
618 if (crtc && (lvds & LVDS_PORT_EN)) {
619 mode_dev->panel_fixed_mode =
620 cdv_intel_crtc_mode_get(dev, crtc);
621 if (mode_dev->panel_fixed_mode) {
622 mode_dev->panel_fixed_mode->type |=
623 DRM_MODE_TYPE_PREFERRED;
624 goto out; /* FIXME: check for quirks */
625 }
626 }
627
628 /* If we still don't have a mode after all that, give up. */
629 if (!mode_dev->panel_fixed_mode) {
630 DRM_DEBUG
631 ("Found no modes on the lvds, ignoring the LVDS\n");
632 goto err_unlock;
633 }
634
635 /* setup PWM */
636 {
637 u32 pwm;
638
639 pwm = REG_READ(BLC_PWM_CTL2);
640 if (pipe == 1)
641 pwm |= PWM_PIPE_B;
642 else
643 pwm &= ~PWM_PIPE_B;
644 pwm |= PWM_ENABLE;
645 REG_WRITE(BLC_PWM_CTL2, pwm);
646 }
647
648out:
649 mutex_unlock(&dev->mode_config.mutex);
650 return;
651
652err_unlock:
653 mutex_unlock(&dev->mode_config.mutex);
654 gma_i2c_destroy(gma_encoder->i2c_bus);
655err_encoder_cleanup:
656 drm_encoder_cleanup(encoder);
657err_connector_cleanup:
658 drm_connector_cleanup(connector);
659err_destroy_ddc:
660 gma_i2c_destroy(ddc_bus);
661err_free_lvds_priv:
662 kfree(lvds_priv);
663err_free_connector:
664 kfree(gma_connector);
665err_free_encoder:
666 kfree(gma_encoder);
667}
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright © 2006-2011 Intel Corporation
4 *
5 * Authors:
6 * Eric Anholt <eric@anholt.net>
7 * Dave Airlie <airlied@linux.ie>
8 * Jesse Barnes <jesse.barnes@intel.com>
9 */
10
11#include <linux/dmi.h>
12#include <linux/i2c.h>
13#include <linux/pm_runtime.h>
14
15#include "cdv_device.h"
16#include "intel_bios.h"
17#include "power.h"
18#include "psb_drv.h"
19#include "psb_intel_drv.h"
20#include "psb_intel_reg.h"
21
22/**
23 * LVDS I2C backlight control macros
24 */
25#define BRIGHTNESS_MAX_LEVEL 100
26#define BRIGHTNESS_MASK 0xFF
27#define BLC_I2C_TYPE 0x01
28#define BLC_PWM_TYPT 0x02
29
30#define BLC_POLARITY_NORMAL 0
31#define BLC_POLARITY_INVERSE 1
32
33#define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
34#define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
35#define PSB_BLC_PWM_PRECISION_FACTOR (10)
36#define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
37#define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
38
39struct cdv_intel_lvds_priv {
40 /**
41 * Saved LVDO output states
42 */
43 uint32_t savePP_ON;
44 uint32_t savePP_OFF;
45 uint32_t saveLVDS;
46 uint32_t savePP_CONTROL;
47 uint32_t savePP_CYCLE;
48 uint32_t savePFIT_CONTROL;
49 uint32_t savePFIT_PGM_RATIOS;
50 uint32_t saveBLC_PWM_CTL;
51};
52
53/*
54 * Returns the maximum level of the backlight duty cycle field.
55 */
56static u32 cdv_intel_lvds_get_max_backlight(struct drm_device *dev)
57{
58 struct drm_psb_private *dev_priv = dev->dev_private;
59 u32 retval;
60
61 if (gma_power_begin(dev, false)) {
62 retval = ((REG_READ(BLC_PWM_CTL) &
63 BACKLIGHT_MODULATION_FREQ_MASK) >>
64 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
65
66 gma_power_end(dev);
67 } else
68 retval = ((dev_priv->regs.saveBLC_PWM_CTL &
69 BACKLIGHT_MODULATION_FREQ_MASK) >>
70 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
71
72 return retval;
73}
74
75#if 0
76/*
77 * Set LVDS backlight level by I2C command
78 */
79static int cdv_lvds_i2c_set_brightness(struct drm_device *dev,
80 unsigned int level)
81{
82 struct drm_psb_private *dev_priv = dev->dev_private;
83 struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
84 u8 out_buf[2];
85 unsigned int blc_i2c_brightness;
86
87 struct i2c_msg msgs[] = {
88 {
89 .addr = lvds_i2c_bus->slave_addr,
90 .flags = 0,
91 .len = 2,
92 .buf = out_buf,
93 }
94 };
95
96 blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
97 BRIGHTNESS_MASK /
98 BRIGHTNESS_MAX_LEVEL);
99
100 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
101 blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
102
103 out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
104 out_buf[1] = (u8)blc_i2c_brightness;
105
106 if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1)
107 return 0;
108
109 DRM_ERROR("I2C transfer error\n");
110 return -1;
111}
112
113
114static int cdv_lvds_pwm_set_brightness(struct drm_device *dev, int level)
115{
116 struct drm_psb_private *dev_priv = dev->dev_private;
117
118 u32 max_pwm_blc;
119 u32 blc_pwm_duty_cycle;
120
121 max_pwm_blc = cdv_intel_lvds_get_max_backlight(dev);
122
123 /*BLC_PWM_CTL Should be initiated while backlight device init*/
124 BUG_ON((max_pwm_blc & PSB_BLC_MAX_PWM_REG_FREQ) == 0);
125
126 blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
127
128 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
129 blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
130
131 blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
132 REG_WRITE(BLC_PWM_CTL,
133 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
134 (blc_pwm_duty_cycle));
135
136 return 0;
137}
138
139/*
140 * Set LVDS backlight level either by I2C or PWM
141 */
142void cdv_intel_lvds_set_brightness(struct drm_device *dev, int level)
143{
144 struct drm_psb_private *dev_priv = dev->dev_private;
145
146 if (!dev_priv->lvds_bl) {
147 DRM_ERROR("NO LVDS Backlight Info\n");
148 return;
149 }
150
151 if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
152 cdv_lvds_i2c_set_brightness(dev, level);
153 else
154 cdv_lvds_pwm_set_brightness(dev, level);
155}
156#endif
157
158/**
159 * Sets the backlight level.
160 *
161 * level backlight level, from 0 to cdv_intel_lvds_get_max_backlight().
162 */
163static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level)
164{
165 struct drm_psb_private *dev_priv = dev->dev_private;
166 u32 blc_pwm_ctl;
167
168 if (gma_power_begin(dev, false)) {
169 blc_pwm_ctl =
170 REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
171 REG_WRITE(BLC_PWM_CTL,
172 (blc_pwm_ctl |
173 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
174 gma_power_end(dev);
175 } else {
176 blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
177 ~BACKLIGHT_DUTY_CYCLE_MASK;
178 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
179 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
180 }
181}
182
183/**
184 * Sets the power state for the panel.
185 */
186static void cdv_intel_lvds_set_power(struct drm_device *dev,
187 struct drm_encoder *encoder, bool on)
188{
189 struct drm_psb_private *dev_priv = dev->dev_private;
190 u32 pp_status;
191
192 if (!gma_power_begin(dev, true))
193 return;
194
195 if (on) {
196 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
197 POWER_TARGET_ON);
198 do {
199 pp_status = REG_READ(PP_STATUS);
200 } while ((pp_status & PP_ON) == 0);
201
202 cdv_intel_lvds_set_backlight(dev,
203 dev_priv->mode_dev.backlight_duty_cycle);
204 } else {
205 cdv_intel_lvds_set_backlight(dev, 0);
206
207 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
208 ~POWER_TARGET_ON);
209 do {
210 pp_status = REG_READ(PP_STATUS);
211 } while (pp_status & PP_ON);
212 }
213 gma_power_end(dev);
214}
215
216static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
217{
218 struct drm_device *dev = encoder->dev;
219 if (mode == DRM_MODE_DPMS_ON)
220 cdv_intel_lvds_set_power(dev, encoder, true);
221 else
222 cdv_intel_lvds_set_power(dev, encoder, false);
223 /* XXX: We never power down the LVDS pairs. */
224}
225
226static void cdv_intel_lvds_save(struct drm_connector *connector)
227{
228}
229
230static void cdv_intel_lvds_restore(struct drm_connector *connector)
231{
232}
233
234static enum drm_mode_status cdv_intel_lvds_mode_valid(struct drm_connector *connector,
235 struct drm_display_mode *mode)
236{
237 struct drm_device *dev = connector->dev;
238 struct drm_psb_private *dev_priv = dev->dev_private;
239 struct drm_display_mode *fixed_mode =
240 dev_priv->mode_dev.panel_fixed_mode;
241
242 /* just in case */
243 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
244 return MODE_NO_DBLESCAN;
245
246 /* just in case */
247 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
248 return MODE_NO_INTERLACE;
249
250 if (fixed_mode) {
251 if (mode->hdisplay > fixed_mode->hdisplay)
252 return MODE_PANEL;
253 if (mode->vdisplay > fixed_mode->vdisplay)
254 return MODE_PANEL;
255 }
256 return MODE_OK;
257}
258
259static bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder,
260 const struct drm_display_mode *mode,
261 struct drm_display_mode *adjusted_mode)
262{
263 struct drm_device *dev = encoder->dev;
264 struct drm_psb_private *dev_priv = dev->dev_private;
265 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
266 struct drm_encoder *tmp_encoder;
267 struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
268
269 /* Should never happen!! */
270 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
271 head) {
272 if (tmp_encoder != encoder
273 && tmp_encoder->crtc == encoder->crtc) {
274 pr_err("Can't enable LVDS and another encoder on the same pipe\n");
275 return false;
276 }
277 }
278
279 /*
280 * If we have timings from the BIOS for the panel, put them in
281 * to the adjusted mode. The CRTC will be set up for this mode,
282 * with the panel scaling set up to source from the H/VDisplay
283 * of the original mode.
284 */
285 if (panel_fixed_mode != NULL) {
286 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
287 adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
288 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
289 adjusted_mode->htotal = panel_fixed_mode->htotal;
290 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
291 adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
292 adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
293 adjusted_mode->vtotal = panel_fixed_mode->vtotal;
294 adjusted_mode->clock = panel_fixed_mode->clock;
295 drm_mode_set_crtcinfo(adjusted_mode,
296 CRTC_INTERLACE_HALVE_V);
297 }
298
299 /*
300 * XXX: It would be nice to support lower refresh rates on the
301 * panels to reduce power consumption, and perhaps match the
302 * user's requested refresh rate.
303 */
304
305 return true;
306}
307
308static void cdv_intel_lvds_prepare(struct drm_encoder *encoder)
309{
310 struct drm_device *dev = encoder->dev;
311 struct drm_psb_private *dev_priv = dev->dev_private;
312 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
313
314 if (!gma_power_begin(dev, true))
315 return;
316
317 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
318 mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
319 BACKLIGHT_DUTY_CYCLE_MASK);
320
321 cdv_intel_lvds_set_power(dev, encoder, false);
322
323 gma_power_end(dev);
324}
325
326static void cdv_intel_lvds_commit(struct drm_encoder *encoder)
327{
328 struct drm_device *dev = encoder->dev;
329 struct drm_psb_private *dev_priv = dev->dev_private;
330 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
331
332 if (mode_dev->backlight_duty_cycle == 0)
333 mode_dev->backlight_duty_cycle =
334 cdv_intel_lvds_get_max_backlight(dev);
335
336 cdv_intel_lvds_set_power(dev, encoder, true);
337}
338
339static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
340 struct drm_display_mode *mode,
341 struct drm_display_mode *adjusted_mode)
342{
343 struct drm_device *dev = encoder->dev;
344 struct drm_psb_private *dev_priv = dev->dev_private;
345 struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
346 u32 pfit_control;
347
348 /*
349 * The LVDS pin pair will already have been turned on in the
350 * cdv_intel_crtc_mode_set since it has a large impact on the DPLL
351 * settings.
352 */
353
354 /*
355 * Enable automatic panel scaling so that non-native modes fill the
356 * screen. Should be enabled before the pipe is enabled, according to
357 * register description and PRM.
358 */
359 if (mode->hdisplay != adjusted_mode->hdisplay ||
360 mode->vdisplay != adjusted_mode->vdisplay)
361 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
362 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
363 HORIZ_INTERP_BILINEAR);
364 else
365 pfit_control = 0;
366
367 pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
368
369 if (dev_priv->lvds_dither)
370 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
371
372 REG_WRITE(PFIT_CONTROL, pfit_control);
373}
374
375/**
376 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
377 */
378static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
379{
380 struct drm_device *dev = connector->dev;
381 struct drm_psb_private *dev_priv = dev->dev_private;
382 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
383 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
384 int ret;
385
386 ret = psb_intel_ddc_get_modes(connector, &gma_encoder->i2c_bus->adapter);
387
388 if (ret)
389 return ret;
390
391 if (mode_dev->panel_fixed_mode != NULL) {
392 struct drm_display_mode *mode =
393 drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
394 drm_mode_probed_add(connector, mode);
395 return 1;
396 }
397
398 return 0;
399}
400
401/**
402 * cdv_intel_lvds_destroy - unregister and free LVDS structures
403 * @connector: connector to free
404 *
405 * Unregister the DDC bus for this connector then free the driver private
406 * structure.
407 */
408static void cdv_intel_lvds_destroy(struct drm_connector *connector)
409{
410 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
411
412 psb_intel_i2c_destroy(gma_encoder->i2c_bus);
413 drm_connector_unregister(connector);
414 drm_connector_cleanup(connector);
415 kfree(connector);
416}
417
418static int cdv_intel_lvds_set_property(struct drm_connector *connector,
419 struct drm_property *property,
420 uint64_t value)
421{
422 struct drm_encoder *encoder = connector->encoder;
423
424 if (!strcmp(property->name, "scaling mode") && encoder) {
425 struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
426 uint64_t curValue;
427
428 if (!crtc)
429 return -1;
430
431 switch (value) {
432 case DRM_MODE_SCALE_FULLSCREEN:
433 break;
434 case DRM_MODE_SCALE_NO_SCALE:
435 break;
436 case DRM_MODE_SCALE_ASPECT:
437 break;
438 default:
439 return -1;
440 }
441
442 if (drm_object_property_get_value(&connector->base,
443 property,
444 &curValue))
445 return -1;
446
447 if (curValue == value)
448 return 0;
449
450 if (drm_object_property_set_value(&connector->base,
451 property,
452 value))
453 return -1;
454
455 if (crtc->saved_mode.hdisplay != 0 &&
456 crtc->saved_mode.vdisplay != 0) {
457 if (!drm_crtc_helper_set_mode(encoder->crtc,
458 &crtc->saved_mode,
459 encoder->crtc->x,
460 encoder->crtc->y,
461 encoder->crtc->primary->fb))
462 return -1;
463 }
464 } else if (!strcmp(property->name, "backlight") && encoder) {
465 if (drm_object_property_set_value(&connector->base,
466 property,
467 value))
468 return -1;
469 else
470 gma_backlight_set(encoder->dev, value);
471 } else if (!strcmp(property->name, "DPMS") && encoder) {
472 const struct drm_encoder_helper_funcs *helpers =
473 encoder->helper_private;
474 helpers->dpms(encoder, value);
475 }
476 return 0;
477}
478
479static const struct drm_encoder_helper_funcs
480 cdv_intel_lvds_helper_funcs = {
481 .dpms = cdv_intel_lvds_encoder_dpms,
482 .mode_fixup = cdv_intel_lvds_mode_fixup,
483 .prepare = cdv_intel_lvds_prepare,
484 .mode_set = cdv_intel_lvds_mode_set,
485 .commit = cdv_intel_lvds_commit,
486};
487
488static const struct drm_connector_helper_funcs
489 cdv_intel_lvds_connector_helper_funcs = {
490 .get_modes = cdv_intel_lvds_get_modes,
491 .mode_valid = cdv_intel_lvds_mode_valid,
492 .best_encoder = gma_best_encoder,
493};
494
495static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
496 .dpms = drm_helper_connector_dpms,
497 .fill_modes = drm_helper_probe_single_connector_modes,
498 .set_property = cdv_intel_lvds_set_property,
499 .destroy = cdv_intel_lvds_destroy,
500};
501
502
503static void cdv_intel_lvds_enc_destroy(struct drm_encoder *encoder)
504{
505 drm_encoder_cleanup(encoder);
506}
507
508static const struct drm_encoder_funcs cdv_intel_lvds_enc_funcs = {
509 .destroy = cdv_intel_lvds_enc_destroy,
510};
511
512/*
513 * Enumerate the child dev array parsed from VBT to check whether
514 * the LVDS is present.
515 * If it is present, return 1.
516 * If it is not present, return false.
517 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
518 */
519static bool lvds_is_present_in_vbt(struct drm_device *dev,
520 u8 *i2c_pin)
521{
522 struct drm_psb_private *dev_priv = dev->dev_private;
523 int i;
524
525 if (!dev_priv->child_dev_num)
526 return true;
527
528 for (i = 0; i < dev_priv->child_dev_num; i++) {
529 struct child_device_config *child = dev_priv->child_dev + i;
530
531 /* If the device type is not LFP, continue.
532 * We have to check both the new identifiers as well as the
533 * old for compatibility with some BIOSes.
534 */
535 if (child->device_type != DEVICE_TYPE_INT_LFP &&
536 child->device_type != DEVICE_TYPE_LFP)
537 continue;
538
539 if (child->i2c_pin)
540 *i2c_pin = child->i2c_pin;
541
542 /* However, we cannot trust the BIOS writers to populate
543 * the VBT correctly. Since LVDS requires additional
544 * information from AIM blocks, a non-zero addin offset is
545 * a good indicator that the LVDS is actually present.
546 */
547 if (child->addin_offset)
548 return true;
549
550 /* But even then some BIOS writers perform some black magic
551 * and instantiate the device without reference to any
552 * additional data. Trust that if the VBT was written into
553 * the OpRegion then they have validated the LVDS's existence.
554 */
555 if (dev_priv->opregion.vbt)
556 return true;
557 }
558
559 return false;
560}
561
562/**
563 * cdv_intel_lvds_init - setup LVDS connectors on this device
564 * @dev: drm device
565 *
566 * Create the connector, register the LVDS DDC bus, and try to figure out what
567 * modes we can display on the LVDS panel (if present).
568 */
569void cdv_intel_lvds_init(struct drm_device *dev,
570 struct psb_intel_mode_device *mode_dev)
571{
572 struct gma_encoder *gma_encoder;
573 struct gma_connector *gma_connector;
574 struct cdv_intel_lvds_priv *lvds_priv;
575 struct drm_connector *connector;
576 struct drm_encoder *encoder;
577 struct drm_display_mode *scan;
578 struct drm_crtc *crtc;
579 struct drm_psb_private *dev_priv = dev->dev_private;
580 u32 lvds;
581 int pipe;
582 u8 pin;
583
584 if (!dev_priv->lvds_enabled_in_vbt)
585 return;
586
587 pin = GMBUS_PORT_PANEL;
588 if (!lvds_is_present_in_vbt(dev, &pin)) {
589 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
590 return;
591 }
592
593 gma_encoder = kzalloc(sizeof(struct gma_encoder),
594 GFP_KERNEL);
595 if (!gma_encoder)
596 return;
597
598 gma_connector = kzalloc(sizeof(struct gma_connector),
599 GFP_KERNEL);
600 if (!gma_connector)
601 goto failed_connector;
602
603 lvds_priv = kzalloc(sizeof(struct cdv_intel_lvds_priv), GFP_KERNEL);
604 if (!lvds_priv)
605 goto failed_lvds_priv;
606
607 gma_encoder->dev_priv = lvds_priv;
608
609 connector = &gma_connector->base;
610 gma_connector->save = cdv_intel_lvds_save;
611 gma_connector->restore = cdv_intel_lvds_restore;
612 encoder = &gma_encoder->base;
613
614
615 drm_connector_init(dev, connector,
616 &cdv_intel_lvds_connector_funcs,
617 DRM_MODE_CONNECTOR_LVDS);
618
619 drm_encoder_init(dev, encoder,
620 &cdv_intel_lvds_enc_funcs,
621 DRM_MODE_ENCODER_LVDS, NULL);
622
623
624 gma_connector_attach_encoder(gma_connector, gma_encoder);
625 gma_encoder->type = INTEL_OUTPUT_LVDS;
626
627 drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
628 drm_connector_helper_add(connector,
629 &cdv_intel_lvds_connector_helper_funcs);
630 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
631 connector->interlace_allowed = false;
632 connector->doublescan_allowed = false;
633
634 /*Attach connector properties*/
635 drm_object_attach_property(&connector->base,
636 dev->mode_config.scaling_mode_property,
637 DRM_MODE_SCALE_FULLSCREEN);
638 drm_object_attach_property(&connector->base,
639 dev_priv->backlight_property,
640 BRIGHTNESS_MAX_LEVEL);
641
642 /**
643 * Set up I2C bus
644 * FIXME: distroy i2c_bus when exit
645 */
646 gma_encoder->i2c_bus = psb_intel_i2c_create(dev,
647 GPIOB,
648 "LVDSBLC_B");
649 if (!gma_encoder->i2c_bus) {
650 dev_printk(KERN_ERR,
651 &dev->pdev->dev, "I2C bus registration failed.\n");
652 goto failed_blc_i2c;
653 }
654 gma_encoder->i2c_bus->slave_addr = 0x2C;
655 dev_priv->lvds_i2c_bus = gma_encoder->i2c_bus;
656
657 /*
658 * LVDS discovery:
659 * 1) check for EDID on DDC
660 * 2) check for VBT data
661 * 3) check to see if LVDS is already on
662 * if none of the above, no panel
663 * 4) make sure lid is open
664 * if closed, act like it's not there for now
665 */
666
667 /* Set up the DDC bus. */
668 gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
669 GPIOC,
670 "LVDSDDC_C");
671 if (!gma_encoder->ddc_bus) {
672 dev_printk(KERN_ERR, &dev->pdev->dev,
673 "DDC bus registration " "failed.\n");
674 goto failed_ddc;
675 }
676
677 /*
678 * Attempt to get the fixed panel mode from DDC. Assume that the
679 * preferred mode is the right one.
680 */
681 mutex_lock(&dev->mode_config.mutex);
682 psb_intel_ddc_get_modes(connector,
683 &gma_encoder->ddc_bus->adapter);
684 list_for_each_entry(scan, &connector->probed_modes, head) {
685 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
686 mode_dev->panel_fixed_mode =
687 drm_mode_duplicate(dev, scan);
688 goto out; /* FIXME: check for quirks */
689 }
690 }
691
692 /* Failed to get EDID, what about VBT? do we need this?*/
693 if (dev_priv->lfp_lvds_vbt_mode) {
694 mode_dev->panel_fixed_mode =
695 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
696 if (mode_dev->panel_fixed_mode) {
697 mode_dev->panel_fixed_mode->type |=
698 DRM_MODE_TYPE_PREFERRED;
699 goto out; /* FIXME: check for quirks */
700 }
701 }
702 /*
703 * If we didn't get EDID, try checking if the panel is already turned
704 * on. If so, assume that whatever is currently programmed is the
705 * correct mode.
706 */
707 lvds = REG_READ(LVDS);
708 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
709 crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
710
711 if (crtc && (lvds & LVDS_PORT_EN)) {
712 mode_dev->panel_fixed_mode =
713 cdv_intel_crtc_mode_get(dev, crtc);
714 if (mode_dev->panel_fixed_mode) {
715 mode_dev->panel_fixed_mode->type |=
716 DRM_MODE_TYPE_PREFERRED;
717 goto out; /* FIXME: check for quirks */
718 }
719 }
720
721 /* If we still don't have a mode after all that, give up. */
722 if (!mode_dev->panel_fixed_mode) {
723 DRM_DEBUG
724 ("Found no modes on the lvds, ignoring the LVDS\n");
725 goto failed_find;
726 }
727
728 /* setup PWM */
729 {
730 u32 pwm;
731
732 pwm = REG_READ(BLC_PWM_CTL2);
733 if (pipe == 1)
734 pwm |= PWM_PIPE_B;
735 else
736 pwm &= ~PWM_PIPE_B;
737 pwm |= PWM_ENABLE;
738 REG_WRITE(BLC_PWM_CTL2, pwm);
739 }
740
741out:
742 mutex_unlock(&dev->mode_config.mutex);
743 drm_connector_register(connector);
744 return;
745
746failed_find:
747 mutex_unlock(&dev->mode_config.mutex);
748 pr_err("Failed find\n");
749 psb_intel_i2c_destroy(gma_encoder->ddc_bus);
750failed_ddc:
751 pr_err("Failed DDC\n");
752 psb_intel_i2c_destroy(gma_encoder->i2c_bus);
753failed_blc_i2c:
754 pr_err("Failed BLC\n");
755 drm_encoder_cleanup(encoder);
756 drm_connector_cleanup(connector);
757 kfree(lvds_priv);
758failed_lvds_priv:
759 kfree(gma_connector);
760failed_connector:
761 kfree(gma_encoder);
762}