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1# SPDX-License-Identifier: GPL-2.0-only
2
3menuconfig CRYPTO_HW
4 bool "Hardware crypto devices"
5 default y
6 help
7 Say Y here to get to see options for hardware crypto devices and
8 processors. This option alone does not add any kernel code.
9
10 If you say N, all options in this submenu will be skipped and disabled.
11
12if CRYPTO_HW
13
14source "drivers/crypto/allwinner/Kconfig"
15
16config CRYPTO_DEV_PADLOCK
17 tristate "Support for VIA PadLock ACE"
18 depends on X86 && !UML
19 help
20 Some VIA processors come with an integrated crypto engine
21 (so called VIA PadLock ACE, Advanced Cryptography Engine)
22 that provides instructions for very fast cryptographic
23 operations with supported algorithms.
24
25 The instructions are used only when the CPU supports them.
26 Otherwise software encryption is used.
27
28config CRYPTO_DEV_PADLOCK_AES
29 tristate "PadLock driver for AES algorithm"
30 depends on CRYPTO_DEV_PADLOCK
31 select CRYPTO_SKCIPHER
32 select CRYPTO_LIB_AES
33 help
34 Use VIA PadLock for AES algorithm.
35
36 Available in VIA C3 and newer CPUs.
37
38 If unsure say M. The compiled module will be
39 called padlock-aes.
40
41config CRYPTO_DEV_PADLOCK_SHA
42 tristate "PadLock driver for SHA1 and SHA256 algorithms"
43 depends on CRYPTO_DEV_PADLOCK
44 select CRYPTO_HASH
45 select CRYPTO_SHA1
46 select CRYPTO_SHA256
47 help
48 Use VIA PadLock for SHA1/SHA256 algorithms.
49
50 Available in VIA C7 and newer processors.
51
52 If unsure say M. The compiled module will be
53 called padlock-sha.
54
55config CRYPTO_DEV_GEODE
56 tristate "Support for the Geode LX AES engine"
57 depends on X86_32 && PCI
58 select CRYPTO_ALGAPI
59 select CRYPTO_SKCIPHER
60 help
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
62 engine for the CryptoAPI AES algorithm.
63
64 To compile this driver as a module, choose M here: the module
65 will be called geode-aes.
66
67config ZCRYPT
68 tristate "Support for s390 cryptographic adapters"
69 depends on S390
70 depends on AP
71 select HW_RANDOM
72 help
73 Select this option if you want to enable support for
74 s390 cryptographic adapters like Crypto Express 4 up
75 to 8 in Coprocessor (CEXxC), EP11 Coprocessor (CEXxP)
76 or Accelerator (CEXxA) mode.
77
78config PKEY
79 tristate "Kernel API for protected key handling"
80 depends on S390
81 help
82 With this option enabled the pkey kernel modules provide an API
83 for creation and handling of protected keys. Other parts of the
84 kernel or userspace applications may use these functions.
85
86 The protected key support is distributed into:
87 - A pkey base and API kernel module (pkey.ko) which offers the
88 infrastructure for the pkey handler kernel modules, the ioctl
89 and the sysfs API and the in-kernel API to the crypto cipher
90 implementations using protected key.
91 - A pkey pckmo kernel module (pkey-pckmo.ko) which is automatically
92 loaded when pckmo support (that is generation of protected keys
93 from clear key values) is available.
94 - A pkey CCA kernel module (pkey-cca.ko) which is automatically
95 loaded when a CEX crypto card is available.
96 - A pkey EP11 kernel module (pkey-ep11.ko) which is automatically
97 loaded when a CEX crypto card is available.
98 - A pkey UV kernel module (pkey-uv.ko) which is automatically
99 loaded when the Ultravisor feature is available within a
100 protected execution environment.
101
102 Select this option if you want to enable the kernel and userspace
103 API for protected key handling.
104
105config PKEY_CCA
106 tristate "PKEY CCA support handler"
107 depends on PKEY
108 depends on ZCRYPT
109 help
110 This is the CCA support handler for deriving protected keys
111 from CCA (secure) keys. Also this handler provides an alternate
112 way to make protected keys from clear key values.
113
114 The PKEY CCA support handler needs a Crypto Express card (CEX)
115 in CCA mode.
116
117 If you have selected the PKEY option then you should also enable
118 this option unless you are sure you never need to derive protected
119 keys from CCA key material.
120
121config PKEY_EP11
122 tristate "PKEY EP11 support handler"
123 depends on PKEY
124 depends on ZCRYPT
125 help
126 This is the EP11 support handler for deriving protected keys
127 from EP11 (secure) keys. Also this handler provides an alternate
128 way to make protected keys from clear key values.
129
130 The PKEY EP11 support handler needs a Crypto Express card (CEX)
131 in EP11 mode.
132
133 If you have selected the PKEY option then you should also enable
134 this option unless you are sure you never need to derive protected
135 keys from EP11 key material.
136
137config PKEY_PCKMO
138 tristate "PKEY PCKMO support handler"
139 depends on PKEY
140 help
141 This is the PCKMO support handler for deriving protected keys
142 from clear key values via invoking the PCKMO instruction.
143
144 The PCKMO instruction can be enabled and disabled in the crypto
145 settings at the LPAR profile. This handler checks for availability
146 during initialization and if build as a kernel module unloads
147 itself if PCKMO is disabled.
148
149 The PCKMO way of deriving protected keys from clear key material
150 is especially used during self test of protected key ciphers like
151 PAES but the CCA and EP11 handler provide alternate ways to
152 generate protected keys from clear key values.
153
154 If you have selected the PKEY option then you should also enable
155 this option unless you are sure you never need to derive protected
156 keys from clear key values directly via PCKMO.
157
158config PKEY_UV
159 tristate "PKEY UV support handler"
160 depends on PKEY
161 depends on S390_UV_UAPI
162 help
163 This is the PKEY Ultravisor support handler for deriving protected
164 keys from secrets stored within the Ultravisor (UV).
165
166 This module works together with the UV device and supports the
167 retrieval of protected keys from secrets stored within the
168 UV firmware layer. This service is only available within
169 a protected execution guest and thus this module will fail upon
170 modprobe if no protected execution environment is detected.
171
172 Enable this option if you intend to run this kernel with an KVM
173 guest with protected execution and you want to use UV retrievable
174 secrets via PKEY API.
175
176config CRYPTO_PAES_S390
177 tristate "PAES cipher algorithms"
178 depends on S390
179 depends on ZCRYPT
180 depends on PKEY
181 select CRYPTO_ALGAPI
182 select CRYPTO_SKCIPHER
183 help
184 This is the s390 hardware accelerated implementation of the
185 AES cipher algorithms for use with protected key.
186
187 Select this option if you want to use the paes cipher
188 for example to use protected key encrypted devices.
189
190config S390_PRNG
191 tristate "Pseudo random number generator device driver"
192 depends on S390
193 default "m"
194 help
195 Select this option if you want to use the s390 pseudo random number
196 generator. The PRNG is part of the cryptographic processor functions
197 and uses triple-DES to generate secure random numbers like the
198 ANSI X9.17 standard. User-space programs access the
199 pseudo-random-number device through the char device /dev/prandom.
200
201 It is available as of z9.
202
203config CRYPTO_DEV_NIAGARA2
204 tristate "Niagara2 Stream Processing Unit driver"
205 select CRYPTO_LIB_DES
206 select CRYPTO_SKCIPHER
207 select CRYPTO_HASH
208 select CRYPTO_MD5
209 select CRYPTO_SHA1
210 select CRYPTO_SHA256
211 depends on SPARC64
212 help
213 Each core of a Niagara2 processor contains a Stream
214 Processing Unit, which itself contains several cryptographic
215 sub-units. One set provides the Modular Arithmetic Unit,
216 used for SSL offload. The other set provides the Cipher
217 Group, which can perform encryption, decryption, hashing,
218 checksumming, and raw copies.
219
220config CRYPTO_DEV_SL3516
221 tristate "Storlink SL3516 crypto offloader"
222 depends on ARCH_GEMINI || COMPILE_TEST
223 depends on HAS_IOMEM && PM
224 select CRYPTO_SKCIPHER
225 select CRYPTO_ENGINE
226 select CRYPTO_ECB
227 select CRYPTO_AES
228 select HW_RANDOM
229 help
230 This option allows you to have support for SL3516 crypto offloader.
231
232config CRYPTO_DEV_SL3516_DEBUG
233 bool "Enable SL3516 stats"
234 depends on CRYPTO_DEV_SL3516
235 depends on DEBUG_FS
236 help
237 Say y to enable SL3516 debug stats.
238 This will create /sys/kernel/debug/sl3516/stats for displaying
239 the number of requests per algorithm and other internal stats.
240
241config CRYPTO_DEV_HIFN_795X
242 tristate "Driver HIFN 795x crypto accelerator chips"
243 select CRYPTO_LIB_DES
244 select CRYPTO_SKCIPHER
245 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
246 depends on PCI
247 depends on !ARCH_DMA_ADDR_T_64BIT
248 help
249 This option allows you to have support for HIFN 795x crypto adapters.
250
251config CRYPTO_DEV_HIFN_795X_RNG
252 bool "HIFN 795x random number generator"
253 depends on CRYPTO_DEV_HIFN_795X
254 help
255 Select this option if you want to enable the random number generator
256 on the HIFN 795x crypto adapters.
257
258source "drivers/crypto/caam/Kconfig"
259
260config CRYPTO_DEV_TALITOS
261 tristate "Talitos Freescale Security Engine (SEC)"
262 select CRYPTO_AEAD
263 select CRYPTO_AUTHENC
264 select CRYPTO_SKCIPHER
265 select CRYPTO_HASH
266 select CRYPTO_LIB_DES
267 select HW_RANDOM
268 depends on FSL_SOC
269 help
270 Say 'Y' here to use the Freescale Security Engine (SEC)
271 to offload cryptographic algorithm computation.
272
273 The Freescale SEC is present on PowerQUICC 'E' processors, such
274 as the MPC8349E and MPC8548E.
275
276 To compile this driver as a module, choose M here: the module
277 will be called talitos.
278
279config CRYPTO_DEV_TALITOS1
280 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
281 depends on CRYPTO_DEV_TALITOS
282 depends on PPC_8xx || PPC_82xx
283 default y
284 help
285 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
286 found on MPC82xx or the Freescale Security Engine (SEC Lite)
287 version 1.2 found on MPC8xx
288
289config CRYPTO_DEV_TALITOS2
290 bool "SEC2+ (SEC version 2.0 or upper)"
291 depends on CRYPTO_DEV_TALITOS
292 default y if !PPC_8xx
293 help
294 Say 'Y' here to use the Freescale Security Engine (SEC)
295 version 2 and following as found on MPC83xx, MPC85xx, etc ...
296
297config CRYPTO_DEV_PPC4XX
298 tristate "Driver AMCC PPC4xx crypto accelerator"
299 depends on PPC && 4xx
300 select CRYPTO_HASH
301 select CRYPTO_AEAD
302 select CRYPTO_AES
303 select CRYPTO_LIB_AES
304 select CRYPTO_CCM
305 select CRYPTO_CTR
306 select CRYPTO_GCM
307 select CRYPTO_SKCIPHER
308 help
309 This option allows you to have support for AMCC crypto acceleration.
310
311config HW_RANDOM_PPC4XX
312 bool "PowerPC 4xx generic true random number generator support"
313 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y
314 default y
315 help
316 This option provides the kernel-side support for the TRNG hardware
317 found in the security function of some PowerPC 4xx SoCs.
318
319config CRYPTO_DEV_OMAP
320 tristate "Support for OMAP crypto HW accelerators"
321 depends on ARCH_OMAP2PLUS
322 help
323 OMAP processors have various crypto HW accelerators. Select this if
324 you want to use the OMAP modules for any of the crypto algorithms.
325
326if CRYPTO_DEV_OMAP
327
328config CRYPTO_DEV_OMAP_SHAM
329 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
330 depends on ARCH_OMAP2PLUS
331 select CRYPTO_ENGINE
332 select CRYPTO_SHA1
333 select CRYPTO_MD5
334 select CRYPTO_SHA256
335 select CRYPTO_SHA512
336 select CRYPTO_HMAC
337 help
338 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
339 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
340
341config CRYPTO_DEV_OMAP_AES
342 tristate "Support for OMAP AES hw engine"
343 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
344 select CRYPTO_AES
345 select CRYPTO_SKCIPHER
346 select CRYPTO_ENGINE
347 select CRYPTO_CBC
348 select CRYPTO_ECB
349 select CRYPTO_CTR
350 select CRYPTO_AEAD
351 help
352 OMAP processors have AES module accelerator. Select this if you
353 want to use the OMAP module for AES algorithms.
354
355config CRYPTO_DEV_OMAP_DES
356 tristate "Support for OMAP DES/3DES hw engine"
357 depends on ARCH_OMAP2PLUS
358 select CRYPTO_LIB_DES
359 select CRYPTO_SKCIPHER
360 select CRYPTO_ENGINE
361 help
362 OMAP processors have DES/3DES module accelerator. Select this if you
363 want to use the OMAP module for DES and 3DES algorithms. Currently
364 the ECB and CBC modes of operation are supported by the driver. Also
365 accesses made on unaligned boundaries are supported.
366
367endif # CRYPTO_DEV_OMAP
368
369config CRYPTO_DEV_SAHARA
370 tristate "Support for SAHARA crypto accelerator"
371 depends on ARCH_MXC && OF
372 select CRYPTO_SKCIPHER
373 select CRYPTO_AES
374 select CRYPTO_ECB
375 select CRYPTO_ENGINE
376 help
377 This option enables support for the SAHARA HW crypto accelerator
378 found in some Freescale i.MX chips.
379
380config CRYPTO_DEV_EXYNOS_RNG
381 tristate "Exynos HW pseudo random number generator support"
382 depends on ARCH_EXYNOS || COMPILE_TEST
383 depends on HAS_IOMEM
384 select CRYPTO_RNG
385 help
386 This driver provides kernel-side support through the
387 cryptographic API for the pseudo random number generator hardware
388 found on Exynos SoCs.
389
390 To compile this driver as a module, choose M here: the
391 module will be called exynos-rng.
392
393 If unsure, say Y.
394
395config CRYPTO_DEV_S5P
396 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
397 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
398 depends on HAS_IOMEM
399 select CRYPTO_AES
400 select CRYPTO_SKCIPHER
401 help
402 This option allows you to have support for S5P crypto acceleration.
403 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
404 algorithms execution.
405
406config CRYPTO_DEV_EXYNOS_HASH
407 bool "Support for Samsung Exynos HASH accelerator"
408 depends on CRYPTO_DEV_S5P
409 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
410 select CRYPTO_SHA1
411 select CRYPTO_MD5
412 select CRYPTO_SHA256
413 help
414 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
415 This will select software SHA1, MD5 and SHA256 as they are
416 needed for small and zero-size messages.
417 HASH algorithms will be disabled if EXYNOS_RNG
418 is enabled due to hw conflict.
419
420config CRYPTO_DEV_NX
421 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
422 depends on PPC64
423 help
424 This enables support for the NX hardware cryptographic accelerator
425 coprocessor that is in IBM PowerPC P7+ or later processors. This
426 does not actually enable any drivers, it only allows you to select
427 which acceleration type (encryption and/or compression) to enable.
428
429if CRYPTO_DEV_NX
430 source "drivers/crypto/nx/Kconfig"
431endif
432
433config CRYPTO_DEV_ATMEL_AUTHENC
434 bool "Support for Atmel IPSEC/SSL hw accelerator"
435 depends on ARCH_AT91 || COMPILE_TEST
436 depends on CRYPTO_DEV_ATMEL_AES
437 help
438 Some Atmel processors can combine the AES and SHA hw accelerators
439 to enhance support of IPSEC/SSL.
440 Select this if you want to use the Atmel modules for
441 authenc(hmac(shaX),Y(cbc)) algorithms.
442
443config CRYPTO_DEV_ATMEL_AES
444 tristate "Support for Atmel AES hw accelerator"
445 depends on ARCH_AT91 || COMPILE_TEST
446 select CRYPTO_AES
447 select CRYPTO_AEAD
448 select CRYPTO_SKCIPHER
449 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
450 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
451 help
452 Some Atmel processors have AES hw accelerator.
453 Select this if you want to use the Atmel module for
454 AES algorithms.
455
456 To compile this driver as a module, choose M here: the module
457 will be called atmel-aes.
458
459config CRYPTO_DEV_ATMEL_TDES
460 tristate "Support for Atmel DES/TDES hw accelerator"
461 depends on ARCH_AT91 || COMPILE_TEST
462 select CRYPTO_LIB_DES
463 select CRYPTO_SKCIPHER
464 help
465 Some Atmel processors have DES/TDES hw accelerator.
466 Select this if you want to use the Atmel module for
467 DES/TDES algorithms.
468
469 To compile this driver as a module, choose M here: the module
470 will be called atmel-tdes.
471
472config CRYPTO_DEV_ATMEL_SHA
473 tristate "Support for Atmel SHA hw accelerator"
474 depends on ARCH_AT91 || COMPILE_TEST
475 select CRYPTO_HASH
476 help
477 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
478 hw accelerator.
479 Select this if you want to use the Atmel module for
480 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
481
482 To compile this driver as a module, choose M here: the module
483 will be called atmel-sha.
484
485config CRYPTO_DEV_ATMEL_I2C
486 tristate
487 select BITREVERSE
488
489config CRYPTO_DEV_ATMEL_ECC
490 tristate "Support for Microchip / Atmel ECC hw accelerator"
491 depends on I2C
492 select CRYPTO_DEV_ATMEL_I2C
493 select CRYPTO_ECDH
494 select CRC16
495 help
496 Microhip / Atmel ECC hw accelerator.
497 Select this if you want to use the Microchip / Atmel module for
498 ECDH algorithm.
499
500 To compile this driver as a module, choose M here: the module
501 will be called atmel-ecc.
502
503config CRYPTO_DEV_ATMEL_SHA204A
504 tristate "Support for Microchip / Atmel SHA accelerator and RNG"
505 depends on I2C
506 select CRYPTO_DEV_ATMEL_I2C
507 select HW_RANDOM
508 select CRC16
509 help
510 Microhip / Atmel SHA accelerator and RNG.
511 Select this if you want to use the Microchip / Atmel SHA204A
512 module as a random number generator. (Other functions of the
513 chip are currently not exposed by this driver)
514
515 To compile this driver as a module, choose M here: the module
516 will be called atmel-sha204a.
517
518config CRYPTO_DEV_CCP
519 bool "Support for AMD Secure Processor"
520 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
521 help
522 The AMD Secure Processor provides support for the Cryptographic Coprocessor
523 (CCP) and the Platform Security Processor (PSP) devices.
524
525if CRYPTO_DEV_CCP
526 source "drivers/crypto/ccp/Kconfig"
527endif
528
529config CRYPTO_DEV_MXS_DCP
530 tristate "Support for Freescale MXS DCP"
531 depends on (ARCH_MXS || ARCH_MXC)
532 select STMP_DEVICE
533 select CRYPTO_CBC
534 select CRYPTO_ECB
535 select CRYPTO_AES
536 select CRYPTO_SKCIPHER
537 select CRYPTO_HASH
538 help
539 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
540 co-processor on the die.
541
542 To compile this driver as a module, choose M here: the module
543 will be called mxs-dcp.
544
545source "drivers/crypto/cavium/cpt/Kconfig"
546source "drivers/crypto/cavium/nitrox/Kconfig"
547source "drivers/crypto/marvell/Kconfig"
548source "drivers/crypto/intel/Kconfig"
549
550config CRYPTO_DEV_CAVIUM_ZIP
551 tristate "Cavium ZIP driver"
552 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
553 help
554 Select this option if you want to enable compression/decompression
555 acceleration on Cavium's ARM based SoCs
556
557config CRYPTO_DEV_QCE
558 tristate "Qualcomm crypto engine accelerator"
559 depends on ARCH_QCOM || COMPILE_TEST
560 depends on HAS_IOMEM
561 help
562 This driver supports Qualcomm crypto engine accelerator
563 hardware. To compile this driver as a module, choose M here. The
564 module will be called qcrypto.
565
566config CRYPTO_DEV_QCE_SKCIPHER
567 bool
568 depends on CRYPTO_DEV_QCE
569 select CRYPTO_AES
570 select CRYPTO_LIB_DES
571 select CRYPTO_ECB
572 select CRYPTO_CBC
573 select CRYPTO_XTS
574 select CRYPTO_CTR
575 select CRYPTO_SKCIPHER
576
577config CRYPTO_DEV_QCE_SHA
578 bool
579 depends on CRYPTO_DEV_QCE
580 select CRYPTO_SHA1
581 select CRYPTO_SHA256
582
583config CRYPTO_DEV_QCE_AEAD
584 bool
585 depends on CRYPTO_DEV_QCE
586 select CRYPTO_AUTHENC
587 select CRYPTO_LIB_DES
588
589choice
590 prompt "Algorithms enabled for QCE acceleration"
591 default CRYPTO_DEV_QCE_ENABLE_ALL
592 depends on CRYPTO_DEV_QCE
593 help
594 This option allows to choose whether to build support for all algorithms
595 (default), hashes-only, or skciphers-only.
596
597 The QCE engine does not appear to scale as well as the CPU to handle
598 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
599 QCE handles only 2 requests in parallel.
600
601 Ipsec throughput seems to improve when disabling either family of
602 algorithms, sharing the load with the CPU. Enabling skciphers-only
603 appears to work best.
604
605 config CRYPTO_DEV_QCE_ENABLE_ALL
606 bool "All supported algorithms"
607 select CRYPTO_DEV_QCE_SKCIPHER
608 select CRYPTO_DEV_QCE_SHA
609 select CRYPTO_DEV_QCE_AEAD
610 help
611 Enable all supported algorithms:
612 - AES (CBC, CTR, ECB, XTS)
613 - 3DES (CBC, ECB)
614 - DES (CBC, ECB)
615 - SHA1, HMAC-SHA1
616 - SHA256, HMAC-SHA256
617
618 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
619 bool "Symmetric-key ciphers only"
620 select CRYPTO_DEV_QCE_SKCIPHER
621 help
622 Enable symmetric-key ciphers only:
623 - AES (CBC, CTR, ECB, XTS)
624 - 3DES (ECB, CBC)
625 - DES (ECB, CBC)
626
627 config CRYPTO_DEV_QCE_ENABLE_SHA
628 bool "Hash/HMAC only"
629 select CRYPTO_DEV_QCE_SHA
630 help
631 Enable hashes/HMAC algorithms only:
632 - SHA1, HMAC-SHA1
633 - SHA256, HMAC-SHA256
634
635 config CRYPTO_DEV_QCE_ENABLE_AEAD
636 bool "AEAD algorithms only"
637 select CRYPTO_DEV_QCE_AEAD
638 help
639 Enable AEAD algorithms only:
640 - authenc()
641 - ccm(aes)
642 - rfc4309(ccm(aes))
643endchoice
644
645config CRYPTO_DEV_QCE_SW_MAX_LEN
646 int "Default maximum request size to use software for AES"
647 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
648 default 512
649 help
650 This sets the default maximum request size to perform AES requests
651 using software instead of the crypto engine. It can be changed by
652 setting the aes_sw_max_len parameter.
653
654 Small blocks are processed faster in software than hardware.
655 Considering the 256-bit ciphers, software is 2-3 times faster than
656 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
657 With 128-bit keys, the break-even point would be around 1024-bytes.
658
659 The default is set a little lower, to 512 bytes, to balance the
660 cost in CPU usage. The minimum recommended setting is 16-bytes
661 (1 AES block), since AES-GCM will fail if you set it lower.
662 Setting this to zero will send all requests to the hardware.
663
664 Note that 192-bit keys are not supported by the hardware and are
665 always processed by the software fallback, and all DES requests
666 are done by the hardware.
667
668config CRYPTO_DEV_QCOM_RNG
669 tristate "Qualcomm Random Number Generator Driver"
670 depends on ARCH_QCOM || COMPILE_TEST
671 depends on HW_RANDOM
672 select CRYPTO_RNG
673 help
674 This driver provides support for the Random Number
675 Generator hardware found on Qualcomm SoCs.
676
677 To compile this driver as a module, choose M here. The
678 module will be called qcom-rng. If unsure, say N.
679
680#config CRYPTO_DEV_VMX
681# bool "Support for VMX cryptographic acceleration instructions"
682# depends on PPC64 && VSX
683# help
684# Support for VMX cryptographic acceleration instructions.
685#
686#source "drivers/crypto/vmx/Kconfig"
687
688config CRYPTO_DEV_IMGTEC_HASH
689 tristate "Imagination Technologies hardware hash accelerator"
690 depends on MIPS || COMPILE_TEST
691 select CRYPTO_MD5
692 select CRYPTO_SHA1
693 select CRYPTO_SHA256
694 select CRYPTO_HASH
695 help
696 This driver interfaces with the Imagination Technologies
697 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
698 hashing algorithms.
699
700config CRYPTO_DEV_ROCKCHIP
701 tristate "Rockchip's Cryptographic Engine driver"
702 depends on OF && ARCH_ROCKCHIP
703 depends on PM
704 select CRYPTO_ECB
705 select CRYPTO_CBC
706 select CRYPTO_DES
707 select CRYPTO_AES
708 select CRYPTO_ENGINE
709 select CRYPTO_LIB_DES
710 select CRYPTO_MD5
711 select CRYPTO_SHA1
712 select CRYPTO_SHA256
713 select CRYPTO_HASH
714 select CRYPTO_SKCIPHER
715
716 help
717 This driver interfaces with the hardware crypto accelerator.
718 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
719
720config CRYPTO_DEV_ROCKCHIP_DEBUG
721 bool "Enable Rockchip crypto stats"
722 depends on CRYPTO_DEV_ROCKCHIP
723 depends on DEBUG_FS
724 help
725 Say y to enable Rockchip crypto debug stats.
726 This will create /sys/kernel/debug/rk3288_crypto/stats for displaying
727 the number of requests per algorithm and other internal stats.
728
729config CRYPTO_DEV_TEGRA
730 tristate "Enable Tegra Security Engine"
731 depends on TEGRA_HOST1X
732 select CRYPTO_ENGINE
733
734 help
735 Select this to enable Tegra Security Engine which accelerates various
736 AES encryption/decryption and HASH algorithms.
737
738config CRYPTO_DEV_ZYNQMP_AES
739 tristate "Support for Xilinx ZynqMP AES hw accelerator"
740 depends on ZYNQMP_FIRMWARE || COMPILE_TEST
741 select CRYPTO_AES
742 select CRYPTO_ENGINE
743 select CRYPTO_AEAD
744 help
745 Xilinx ZynqMP has AES-GCM engine used for symmetric key
746 encryption and decryption. This driver interfaces with AES hw
747 accelerator. Select this if you want to use the ZynqMP module
748 for AES algorithms.
749
750config CRYPTO_DEV_ZYNQMP_SHA3
751 tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator"
752 depends on ZYNQMP_FIRMWARE || COMPILE_TEST
753 select CRYPTO_SHA3
754 help
755 Xilinx ZynqMP has SHA3 engine used for secure hash calculation.
756 This driver interfaces with SHA3 hardware engine.
757 Select this if you want to use the ZynqMP module
758 for SHA3 hash computation.
759
760source "drivers/crypto/chelsio/Kconfig"
761
762source "drivers/crypto/virtio/Kconfig"
763
764config CRYPTO_DEV_BCM_SPU
765 tristate "Broadcom symmetric crypto/hash acceleration support"
766 depends on ARCH_BCM_IPROC
767 depends on MAILBOX
768 default m
769 select CRYPTO_AUTHENC
770 select CRYPTO_LIB_DES
771 select CRYPTO_MD5
772 select CRYPTO_SHA1
773 select CRYPTO_SHA256
774 select CRYPTO_SHA512
775 help
776 This driver provides support for Broadcom crypto acceleration using the
777 Secure Processing Unit (SPU). The SPU driver registers skcipher,
778 ahash, and aead algorithms with the kernel cryptographic API.
779
780source "drivers/crypto/stm32/Kconfig"
781
782config CRYPTO_DEV_SAFEXCEL
783 tristate "Inside Secure's SafeXcel cryptographic engine driver"
784 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
785 select CRYPTO_LIB_AES
786 select CRYPTO_AUTHENC
787 select CRYPTO_SKCIPHER
788 select CRYPTO_LIB_DES
789 select CRYPTO_HASH
790 select CRYPTO_HMAC
791 select CRYPTO_MD5
792 select CRYPTO_SHA1
793 select CRYPTO_SHA256
794 select CRYPTO_SHA512
795 select CRYPTO_CHACHA20POLY1305
796 select CRYPTO_SHA3
797 help
798 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
799 engines designed by Inside Secure. It currently accelerates DES, 3DES and
800 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
801 SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
802 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
803
804config CRYPTO_DEV_ARTPEC6
805 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
806 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
807 depends on OF
808 select CRYPTO_AEAD
809 select CRYPTO_AES
810 select CRYPTO_ALGAPI
811 select CRYPTO_SKCIPHER
812 select CRYPTO_CTR
813 select CRYPTO_HASH
814 select CRYPTO_SHA1
815 select CRYPTO_SHA256
816 select CRYPTO_SHA512
817 help
818 Enables the driver for the on-chip crypto accelerator
819 of Axis ARTPEC SoCs.
820
821 To compile this driver as a module, choose M here.
822
823config CRYPTO_DEV_CCREE
824 tristate "Support for ARM TrustZone CryptoCell family of security processors"
825 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
826 depends on HAS_IOMEM
827 select CRYPTO_HASH
828 select CRYPTO_SKCIPHER
829 select CRYPTO_LIB_DES
830 select CRYPTO_AEAD
831 select CRYPTO_AUTHENC
832 select CRYPTO_SHA1
833 select CRYPTO_MD5
834 select CRYPTO_SHA256
835 select CRYPTO_SHA512
836 select CRYPTO_HMAC
837 select CRYPTO_AES
838 select CRYPTO_CBC
839 select CRYPTO_ECB
840 select CRYPTO_CTR
841 select CRYPTO_XTS
842 select CRYPTO_SM4_GENERIC
843 select CRYPTO_SM3_GENERIC
844 help
845 Say 'Y' to enable a driver for the REE interface of the Arm
846 TrustZone CryptoCell family of processors. Currently the
847 CryptoCell 713, 703, 712, 710 and 630 are supported.
848 Choose this if you wish to use hardware acceleration of
849 cryptographic operations on the system REE.
850 If unsure say Y.
851
852source "drivers/crypto/hisilicon/Kconfig"
853
854source "drivers/crypto/amlogic/Kconfig"
855
856config CRYPTO_DEV_SA2UL
857 tristate "Support for TI security accelerator"
858 depends on ARCH_K3 || COMPILE_TEST
859 select CRYPTO_AES
860 select CRYPTO_ALGAPI
861 select CRYPTO_AUTHENC
862 select CRYPTO_DES
863 select CRYPTO_SHA1
864 select CRYPTO_SHA256
865 select CRYPTO_SHA512
866 select HW_RANDOM
867 select SG_SPLIT
868 help
869 K3 devices include a security accelerator engine that may be
870 used for crypto offload. Select this if you want to use hardware
871 acceleration for cryptographic algorithms on these devices.
872
873source "drivers/crypto/aspeed/Kconfig"
874source "drivers/crypto/starfive/Kconfig"
875
876endif # CRYPTO_HW
1# SPDX-License-Identifier: GPL-2.0-only
2
3menuconfig CRYPTO_HW
4 bool "Hardware crypto devices"
5 default y
6 ---help---
7 Say Y here to get to see options for hardware crypto devices and
8 processors. This option alone does not add any kernel code.
9
10 If you say N, all options in this submenu will be skipped and disabled.
11
12if CRYPTO_HW
13
14config CRYPTO_DEV_PADLOCK
15 tristate "Support for VIA PadLock ACE"
16 depends on X86 && !UML
17 help
18 Some VIA processors come with an integrated crypto engine
19 (so called VIA PadLock ACE, Advanced Cryptography Engine)
20 that provides instructions for very fast cryptographic
21 operations with supported algorithms.
22
23 The instructions are used only when the CPU supports them.
24 Otherwise software encryption is used.
25
26config CRYPTO_DEV_PADLOCK_AES
27 tristate "PadLock driver for AES algorithm"
28 depends on CRYPTO_DEV_PADLOCK
29 select CRYPTO_BLKCIPHER
30 select CRYPTO_LIB_AES
31 help
32 Use VIA PadLock for AES algorithm.
33
34 Available in VIA C3 and newer CPUs.
35
36 If unsure say M. The compiled module will be
37 called padlock-aes.
38
39config CRYPTO_DEV_PADLOCK_SHA
40 tristate "PadLock driver for SHA1 and SHA256 algorithms"
41 depends on CRYPTO_DEV_PADLOCK
42 select CRYPTO_HASH
43 select CRYPTO_SHA1
44 select CRYPTO_SHA256
45 help
46 Use VIA PadLock for SHA1/SHA256 algorithms.
47
48 Available in VIA C7 and newer processors.
49
50 If unsure say M. The compiled module will be
51 called padlock-sha.
52
53config CRYPTO_DEV_GEODE
54 tristate "Support for the Geode LX AES engine"
55 depends on X86_32 && PCI
56 select CRYPTO_ALGAPI
57 select CRYPTO_BLKCIPHER
58 help
59 Say 'Y' here to use the AMD Geode LX processor on-board AES
60 engine for the CryptoAPI AES algorithm.
61
62 To compile this driver as a module, choose M here: the module
63 will be called geode-aes.
64
65config ZCRYPT
66 tristate "Support for s390 cryptographic adapters"
67 depends on S390
68 select HW_RANDOM
69 help
70 Select this option if you want to enable support for
71 s390 cryptographic adapters like:
72 + PCI-X Cryptographic Coprocessor (PCIXCC)
73 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
74 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
75 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
76
77config ZCRYPT_MULTIDEVNODES
78 bool "Support for multiple zcrypt device nodes"
79 default y
80 depends on S390
81 depends on ZCRYPT
82 help
83 With this option enabled the zcrypt device driver can
84 provide multiple devices nodes in /dev. Each device
85 node can get customized to limit access and narrow
86 down the use of the available crypto hardware.
87
88config PKEY
89 tristate "Kernel API for protected key handling"
90 depends on S390
91 depends on ZCRYPT
92 help
93 With this option enabled the pkey kernel module provides an API
94 for creation and handling of protected keys. Other parts of the
95 kernel or userspace applications may use these functions.
96
97 Select this option if you want to enable the kernel and userspace
98 API for proteced key handling.
99
100 Please note that creation of protected keys from secure keys
101 requires to have at least one CEX card in coprocessor mode
102 available at runtime.
103
104config CRYPTO_PAES_S390
105 tristate "PAES cipher algorithms"
106 depends on S390
107 depends on ZCRYPT
108 depends on PKEY
109 select CRYPTO_ALGAPI
110 select CRYPTO_BLKCIPHER
111 help
112 This is the s390 hardware accelerated implementation of the
113 AES cipher algorithms for use with protected key.
114
115 Select this option if you want to use the paes cipher
116 for example to use protected key encrypted devices.
117
118config CRYPTO_SHA1_S390
119 tristate "SHA1 digest algorithm"
120 depends on S390
121 select CRYPTO_HASH
122 help
123 This is the s390 hardware accelerated implementation of the
124 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
125
126 It is available as of z990.
127
128config CRYPTO_SHA256_S390
129 tristate "SHA256 digest algorithm"
130 depends on S390
131 select CRYPTO_HASH
132 help
133 This is the s390 hardware accelerated implementation of the
134 SHA256 secure hash standard (DFIPS 180-2).
135
136 It is available as of z9.
137
138config CRYPTO_SHA512_S390
139 tristate "SHA384 and SHA512 digest algorithm"
140 depends on S390
141 select CRYPTO_HASH
142 help
143 This is the s390 hardware accelerated implementation of the
144 SHA512 secure hash standard.
145
146 It is available as of z10.
147
148config CRYPTO_SHA3_256_S390
149 tristate "SHA3_224 and SHA3_256 digest algorithm"
150 depends on S390
151 select CRYPTO_HASH
152 help
153 This is the s390 hardware accelerated implementation of the
154 SHA3_256 secure hash standard.
155
156 It is available as of z14.
157
158config CRYPTO_SHA3_512_S390
159 tristate "SHA3_384 and SHA3_512 digest algorithm"
160 depends on S390
161 select CRYPTO_HASH
162 help
163 This is the s390 hardware accelerated implementation of the
164 SHA3_512 secure hash standard.
165
166 It is available as of z14.
167
168config CRYPTO_DES_S390
169 tristate "DES and Triple DES cipher algorithms"
170 depends on S390
171 select CRYPTO_ALGAPI
172 select CRYPTO_BLKCIPHER
173 select CRYPTO_LIB_DES
174 help
175 This is the s390 hardware accelerated implementation of the
176 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
177
178 As of z990 the ECB and CBC mode are hardware accelerated.
179 As of z196 the CTR mode is hardware accelerated.
180
181config CRYPTO_AES_S390
182 tristate "AES cipher algorithms"
183 depends on S390
184 select CRYPTO_ALGAPI
185 select CRYPTO_BLKCIPHER
186 help
187 This is the s390 hardware accelerated implementation of the
188 AES cipher algorithms (FIPS-197).
189
190 As of z9 the ECB and CBC modes are hardware accelerated
191 for 128 bit keys.
192 As of z10 the ECB and CBC modes are hardware accelerated
193 for all AES key sizes.
194 As of z196 the CTR mode is hardware accelerated for all AES
195 key sizes and XTS mode is hardware accelerated for 256 and
196 512 bit keys.
197
198config S390_PRNG
199 tristate "Pseudo random number generator device driver"
200 depends on S390
201 default "m"
202 help
203 Select this option if you want to use the s390 pseudo random number
204 generator. The PRNG is part of the cryptographic processor functions
205 and uses triple-DES to generate secure random numbers like the
206 ANSI X9.17 standard. User-space programs access the
207 pseudo-random-number device through the char device /dev/prandom.
208
209 It is available as of z9.
210
211config CRYPTO_GHASH_S390
212 tristate "GHASH hash function"
213 depends on S390
214 select CRYPTO_HASH
215 help
216 This is the s390 hardware accelerated implementation of GHASH,
217 the hash function used in GCM (Galois/Counter mode).
218
219 It is available as of z196.
220
221config CRYPTO_CRC32_S390
222 tristate "CRC-32 algorithms"
223 depends on S390
224 select CRYPTO_HASH
225 select CRC32
226 help
227 Select this option if you want to use hardware accelerated
228 implementations of CRC algorithms. With this option, you
229 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
230 and CRC-32C (Castagnoli).
231
232 It is available with IBM z13 or later.
233
234config CRYPTO_DEV_MARVELL_CESA
235 tristate "Marvell's Cryptographic Engine driver"
236 depends on PLAT_ORION || ARCH_MVEBU
237 select CRYPTO_LIB_AES
238 select CRYPTO_LIB_DES
239 select CRYPTO_BLKCIPHER
240 select CRYPTO_HASH
241 select SRAM
242 help
243 This driver allows you to utilize the Cryptographic Engines and
244 Security Accelerator (CESA) which can be found on MVEBU and ORION
245 platforms.
246 This driver supports CPU offload through DMA transfers.
247
248config CRYPTO_DEV_NIAGARA2
249 tristate "Niagara2 Stream Processing Unit driver"
250 select CRYPTO_LIB_DES
251 select CRYPTO_BLKCIPHER
252 select CRYPTO_HASH
253 select CRYPTO_MD5
254 select CRYPTO_SHA1
255 select CRYPTO_SHA256
256 depends on SPARC64
257 help
258 Each core of a Niagara2 processor contains a Stream
259 Processing Unit, which itself contains several cryptographic
260 sub-units. One set provides the Modular Arithmetic Unit,
261 used for SSL offload. The other set provides the Cipher
262 Group, which can perform encryption, decryption, hashing,
263 checksumming, and raw copies.
264
265config CRYPTO_DEV_HIFN_795X
266 tristate "Driver HIFN 795x crypto accelerator chips"
267 select CRYPTO_LIB_DES
268 select CRYPTO_BLKCIPHER
269 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
270 depends on PCI
271 depends on !ARCH_DMA_ADDR_T_64BIT
272 help
273 This option allows you to have support for HIFN 795x crypto adapters.
274
275config CRYPTO_DEV_HIFN_795X_RNG
276 bool "HIFN 795x random number generator"
277 depends on CRYPTO_DEV_HIFN_795X
278 help
279 Select this option if you want to enable the random number generator
280 on the HIFN 795x crypto adapters.
281
282source "drivers/crypto/caam/Kconfig"
283
284config CRYPTO_DEV_TALITOS
285 tristate "Talitos Freescale Security Engine (SEC)"
286 select CRYPTO_AEAD
287 select CRYPTO_AUTHENC
288 select CRYPTO_BLKCIPHER
289 select CRYPTO_HASH
290 select HW_RANDOM
291 depends on FSL_SOC
292 help
293 Say 'Y' here to use the Freescale Security Engine (SEC)
294 to offload cryptographic algorithm computation.
295
296 The Freescale SEC is present on PowerQUICC 'E' processors, such
297 as the MPC8349E and MPC8548E.
298
299 To compile this driver as a module, choose M here: the module
300 will be called talitos.
301
302config CRYPTO_DEV_TALITOS1
303 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
304 depends on CRYPTO_DEV_TALITOS
305 depends on PPC_8xx || PPC_82xx
306 default y
307 help
308 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
309 found on MPC82xx or the Freescale Security Engine (SEC Lite)
310 version 1.2 found on MPC8xx
311
312config CRYPTO_DEV_TALITOS2
313 bool "SEC2+ (SEC version 2.0 or upper)"
314 depends on CRYPTO_DEV_TALITOS
315 default y if !PPC_8xx
316 help
317 Say 'Y' here to use the Freescale Security Engine (SEC)
318 version 2 and following as found on MPC83xx, MPC85xx, etc ...
319
320config CRYPTO_DEV_IXP4XX
321 tristate "Driver for IXP4xx crypto hardware acceleration"
322 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
323 select CRYPTO_LIB_DES
324 select CRYPTO_AEAD
325 select CRYPTO_AUTHENC
326 select CRYPTO_BLKCIPHER
327 help
328 Driver for the IXP4xx NPE crypto engine.
329
330config CRYPTO_DEV_PPC4XX
331 tristate "Driver AMCC PPC4xx crypto accelerator"
332 depends on PPC && 4xx
333 select CRYPTO_HASH
334 select CRYPTO_AEAD
335 select CRYPTO_LIB_AES
336 select CRYPTO_CCM
337 select CRYPTO_CTR
338 select CRYPTO_GCM
339 select CRYPTO_BLKCIPHER
340 help
341 This option allows you to have support for AMCC crypto acceleration.
342
343config HW_RANDOM_PPC4XX
344 bool "PowerPC 4xx generic true random number generator support"
345 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
346 default y
347 ---help---
348 This option provides the kernel-side support for the TRNG hardware
349 found in the security function of some PowerPC 4xx SoCs.
350
351config CRYPTO_DEV_OMAP
352 tristate "Support for OMAP crypto HW accelerators"
353 depends on ARCH_OMAP2PLUS
354 help
355 OMAP processors have various crypto HW accelerators. Select this if
356 you want to use the OMAP modules for any of the crypto algorithms.
357
358if CRYPTO_DEV_OMAP
359
360config CRYPTO_DEV_OMAP_SHAM
361 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
362 depends on ARCH_OMAP2PLUS
363 select CRYPTO_SHA1
364 select CRYPTO_MD5
365 select CRYPTO_SHA256
366 select CRYPTO_SHA512
367 select CRYPTO_HMAC
368 help
369 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
370 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
371
372config CRYPTO_DEV_OMAP_AES
373 tristate "Support for OMAP AES hw engine"
374 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
375 select CRYPTO_AES
376 select CRYPTO_BLKCIPHER
377 select CRYPTO_ENGINE
378 select CRYPTO_CBC
379 select CRYPTO_ECB
380 select CRYPTO_CTR
381 select CRYPTO_AEAD
382 help
383 OMAP processors have AES module accelerator. Select this if you
384 want to use the OMAP module for AES algorithms.
385
386config CRYPTO_DEV_OMAP_DES
387 tristate "Support for OMAP DES/3DES hw engine"
388 depends on ARCH_OMAP2PLUS
389 select CRYPTO_LIB_DES
390 select CRYPTO_BLKCIPHER
391 select CRYPTO_ENGINE
392 help
393 OMAP processors have DES/3DES module accelerator. Select this if you
394 want to use the OMAP module for DES and 3DES algorithms. Currently
395 the ECB and CBC modes of operation are supported by the driver. Also
396 accesses made on unaligned boundaries are supported.
397
398endif # CRYPTO_DEV_OMAP
399
400config CRYPTO_DEV_PICOXCELL
401 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
402 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
403 select CRYPTO_AEAD
404 select CRYPTO_AES
405 select CRYPTO_AUTHENC
406 select CRYPTO_BLKCIPHER
407 select CRYPTO_LIB_DES
408 select CRYPTO_CBC
409 select CRYPTO_ECB
410 select CRYPTO_SEQIV
411 help
412 This option enables support for the hardware offload engines in the
413 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
414 and for 3gpp Layer 2 ciphering support.
415
416 Saying m here will build a module named picoxcell_crypto.
417
418config CRYPTO_DEV_SAHARA
419 tristate "Support for SAHARA crypto accelerator"
420 depends on ARCH_MXC && OF
421 select CRYPTO_BLKCIPHER
422 select CRYPTO_AES
423 select CRYPTO_ECB
424 help
425 This option enables support for the SAHARA HW crypto accelerator
426 found in some Freescale i.MX chips.
427
428config CRYPTO_DEV_EXYNOS_RNG
429 tristate "EXYNOS HW pseudo random number generator support"
430 depends on ARCH_EXYNOS || COMPILE_TEST
431 depends on HAS_IOMEM
432 select CRYPTO_RNG
433 ---help---
434 This driver provides kernel-side support through the
435 cryptographic API for the pseudo random number generator hardware
436 found on Exynos SoCs.
437
438 To compile this driver as a module, choose M here: the
439 module will be called exynos-rng.
440
441 If unsure, say Y.
442
443config CRYPTO_DEV_S5P
444 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
445 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
446 depends on HAS_IOMEM
447 select CRYPTO_AES
448 select CRYPTO_BLKCIPHER
449 help
450 This option allows you to have support for S5P crypto acceleration.
451 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
452 algorithms execution.
453
454config CRYPTO_DEV_EXYNOS_HASH
455 bool "Support for Samsung Exynos HASH accelerator"
456 depends on CRYPTO_DEV_S5P
457 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
458 select CRYPTO_SHA1
459 select CRYPTO_MD5
460 select CRYPTO_SHA256
461 help
462 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
463 This will select software SHA1, MD5 and SHA256 as they are
464 needed for small and zero-size messages.
465 HASH algorithms will be disabled if EXYNOS_RNG
466 is enabled due to hw conflict.
467
468config CRYPTO_DEV_NX
469 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
470 depends on PPC64
471 help
472 This enables support for the NX hardware cryptographic accelerator
473 coprocessor that is in IBM PowerPC P7+ or later processors. This
474 does not actually enable any drivers, it only allows you to select
475 which acceleration type (encryption and/or compression) to enable.
476
477if CRYPTO_DEV_NX
478 source "drivers/crypto/nx/Kconfig"
479endif
480
481config CRYPTO_DEV_UX500
482 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
483 depends on ARCH_U8500
484 help
485 Driver for ST-Ericsson UX500 crypto engine.
486
487if CRYPTO_DEV_UX500
488 source "drivers/crypto/ux500/Kconfig"
489endif # if CRYPTO_DEV_UX500
490
491config CRYPTO_DEV_ATMEL_AUTHENC
492 tristate "Support for Atmel IPSEC/SSL hw accelerator"
493 depends on ARCH_AT91 || COMPILE_TEST
494 select CRYPTO_AUTHENC
495 select CRYPTO_DEV_ATMEL_AES
496 select CRYPTO_DEV_ATMEL_SHA
497 help
498 Some Atmel processors can combine the AES and SHA hw accelerators
499 to enhance support of IPSEC/SSL.
500 Select this if you want to use the Atmel modules for
501 authenc(hmac(shaX),Y(cbc)) algorithms.
502
503config CRYPTO_DEV_ATMEL_AES
504 tristate "Support for Atmel AES hw accelerator"
505 depends on ARCH_AT91 || COMPILE_TEST
506 select CRYPTO_AES
507 select CRYPTO_AEAD
508 select CRYPTO_BLKCIPHER
509 help
510 Some Atmel processors have AES hw accelerator.
511 Select this if you want to use the Atmel module for
512 AES algorithms.
513
514 To compile this driver as a module, choose M here: the module
515 will be called atmel-aes.
516
517config CRYPTO_DEV_ATMEL_TDES
518 tristate "Support for Atmel DES/TDES hw accelerator"
519 depends on ARCH_AT91 || COMPILE_TEST
520 select CRYPTO_LIB_DES
521 select CRYPTO_BLKCIPHER
522 help
523 Some Atmel processors have DES/TDES hw accelerator.
524 Select this if you want to use the Atmel module for
525 DES/TDES algorithms.
526
527 To compile this driver as a module, choose M here: the module
528 will be called atmel-tdes.
529
530config CRYPTO_DEV_ATMEL_SHA
531 tristate "Support for Atmel SHA hw accelerator"
532 depends on ARCH_AT91 || COMPILE_TEST
533 select CRYPTO_HASH
534 help
535 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
536 hw accelerator.
537 Select this if you want to use the Atmel module for
538 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
539
540 To compile this driver as a module, choose M here: the module
541 will be called atmel-sha.
542
543config CRYPTO_DEV_ATMEL_I2C
544 tristate
545
546config CRYPTO_DEV_ATMEL_ECC
547 tristate "Support for Microchip / Atmel ECC hw accelerator"
548 depends on I2C
549 select CRYPTO_DEV_ATMEL_I2C
550 select CRYPTO_ECDH
551 select CRC16
552 help
553 Microhip / Atmel ECC hw accelerator.
554 Select this if you want to use the Microchip / Atmel module for
555 ECDH algorithm.
556
557 To compile this driver as a module, choose M here: the module
558 will be called atmel-ecc.
559
560config CRYPTO_DEV_ATMEL_SHA204A
561 tristate "Support for Microchip / Atmel SHA accelerator and RNG"
562 depends on I2C
563 select CRYPTO_DEV_ATMEL_I2C
564 select HW_RANDOM
565 select CRC16
566 help
567 Microhip / Atmel SHA accelerator and RNG.
568 Select this if you want to use the Microchip / Atmel SHA204A
569 module as a random number generator. (Other functions of the
570 chip are currently not exposed by this driver)
571
572 To compile this driver as a module, choose M here: the module
573 will be called atmel-sha204a.
574
575config CRYPTO_DEV_CCP
576 bool "Support for AMD Secure Processor"
577 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
578 help
579 The AMD Secure Processor provides support for the Cryptographic Coprocessor
580 (CCP) and the Platform Security Processor (PSP) devices.
581
582if CRYPTO_DEV_CCP
583 source "drivers/crypto/ccp/Kconfig"
584endif
585
586config CRYPTO_DEV_MXS_DCP
587 tristate "Support for Freescale MXS DCP"
588 depends on (ARCH_MXS || ARCH_MXC)
589 select STMP_DEVICE
590 select CRYPTO_CBC
591 select CRYPTO_ECB
592 select CRYPTO_AES
593 select CRYPTO_BLKCIPHER
594 select CRYPTO_HASH
595 help
596 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
597 co-processor on the die.
598
599 To compile this driver as a module, choose M here: the module
600 will be called mxs-dcp.
601
602source "drivers/crypto/qat/Kconfig"
603source "drivers/crypto/cavium/cpt/Kconfig"
604source "drivers/crypto/cavium/nitrox/Kconfig"
605
606config CRYPTO_DEV_CAVIUM_ZIP
607 tristate "Cavium ZIP driver"
608 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
609 ---help---
610 Select this option if you want to enable compression/decompression
611 acceleration on Cavium's ARM based SoCs
612
613config CRYPTO_DEV_QCE
614 tristate "Qualcomm crypto engine accelerator"
615 depends on ARCH_QCOM || COMPILE_TEST
616 depends on HAS_IOMEM
617 select CRYPTO_AES
618 select CRYPTO_LIB_DES
619 select CRYPTO_ECB
620 select CRYPTO_CBC
621 select CRYPTO_XTS
622 select CRYPTO_CTR
623 select CRYPTO_BLKCIPHER
624 help
625 This driver supports Qualcomm crypto engine accelerator
626 hardware. To compile this driver as a module, choose M here. The
627 module will be called qcrypto.
628
629config CRYPTO_DEV_QCOM_RNG
630 tristate "Qualcomm Random Number Generator Driver"
631 depends on ARCH_QCOM || COMPILE_TEST
632 select CRYPTO_RNG
633 help
634 This driver provides support for the Random Number
635 Generator hardware found on Qualcomm SoCs.
636
637 To compile this driver as a module, choose M here. The
638 module will be called qcom-rng. If unsure, say N.
639
640config CRYPTO_DEV_VMX
641 bool "Support for VMX cryptographic acceleration instructions"
642 depends on PPC64 && VSX
643 help
644 Support for VMX cryptographic acceleration instructions.
645
646source "drivers/crypto/vmx/Kconfig"
647
648config CRYPTO_DEV_IMGTEC_HASH
649 tristate "Imagination Technologies hardware hash accelerator"
650 depends on MIPS || COMPILE_TEST
651 select CRYPTO_MD5
652 select CRYPTO_SHA1
653 select CRYPTO_SHA256
654 select CRYPTO_HASH
655 help
656 This driver interfaces with the Imagination Technologies
657 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
658 hashing algorithms.
659
660config CRYPTO_DEV_SUN4I_SS
661 tristate "Support for Allwinner Security System cryptographic accelerator"
662 depends on ARCH_SUNXI && !64BIT
663 select CRYPTO_MD5
664 select CRYPTO_SHA1
665 select CRYPTO_AES
666 select CRYPTO_LIB_DES
667 select CRYPTO_BLKCIPHER
668 help
669 Some Allwinner SoC have a crypto accelerator named
670 Security System. Select this if you want to use it.
671 The Security System handle AES/DES/3DES ciphers in CBC mode
672 and SHA1 and MD5 hash algorithms.
673
674 To compile this driver as a module, choose M here: the module
675 will be called sun4i-ss.
676
677config CRYPTO_DEV_SUN4I_SS_PRNG
678 bool "Support for Allwinner Security System PRNG"
679 depends on CRYPTO_DEV_SUN4I_SS
680 select CRYPTO_RNG
681 help
682 Select this option if you want to provide kernel-side support for
683 the Pseudo-Random Number Generator found in the Security System.
684
685config CRYPTO_DEV_ROCKCHIP
686 tristate "Rockchip's Cryptographic Engine driver"
687 depends on OF && ARCH_ROCKCHIP
688 select CRYPTO_AES
689 select CRYPTO_LIB_DES
690 select CRYPTO_MD5
691 select CRYPTO_SHA1
692 select CRYPTO_SHA256
693 select CRYPTO_HASH
694 select CRYPTO_BLKCIPHER
695
696 help
697 This driver interfaces with the hardware crypto accelerator.
698 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
699
700config CRYPTO_DEV_MEDIATEK
701 tristate "MediaTek's EIP97 Cryptographic Engine driver"
702 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
703 select CRYPTO_AES
704 select CRYPTO_AEAD
705 select CRYPTO_BLKCIPHER
706 select CRYPTO_CTR
707 select CRYPTO_SHA1
708 select CRYPTO_SHA256
709 select CRYPTO_SHA512
710 select CRYPTO_HMAC
711 help
712 This driver allows you to utilize the hardware crypto accelerator
713 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
714 Select this if you want to use it for AES/SHA1/SHA2 algorithms.
715
716source "drivers/crypto/chelsio/Kconfig"
717
718source "drivers/crypto/virtio/Kconfig"
719
720config CRYPTO_DEV_BCM_SPU
721 tristate "Broadcom symmetric crypto/hash acceleration support"
722 depends on ARCH_BCM_IPROC
723 depends on MAILBOX
724 default m
725 select CRYPTO_AUTHENC
726 select CRYPTO_LIB_DES
727 select CRYPTO_MD5
728 select CRYPTO_SHA1
729 select CRYPTO_SHA256
730 select CRYPTO_SHA512
731 help
732 This driver provides support for Broadcom crypto acceleration using the
733 Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
734 ahash, and aead algorithms with the kernel cryptographic API.
735
736source "drivers/crypto/stm32/Kconfig"
737
738config CRYPTO_DEV_SAFEXCEL
739 tristate "Inside Secure's SafeXcel cryptographic engine driver"
740 depends on OF || PCI || COMPILE_TEST
741 select CRYPTO_LIB_AES
742 select CRYPTO_AUTHENC
743 select CRYPTO_BLKCIPHER
744 select CRYPTO_LIB_DES
745 select CRYPTO_HASH
746 select CRYPTO_HMAC
747 select CRYPTO_MD5
748 select CRYPTO_SHA1
749 select CRYPTO_SHA256
750 select CRYPTO_SHA512
751 help
752 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
753 engines designed by Inside Secure. It currently accelerates DES, 3DES and
754 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
755 SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
756 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
757
758config CRYPTO_DEV_ARTPEC6
759 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
760 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
761 depends on OF
762 select CRYPTO_AEAD
763 select CRYPTO_AES
764 select CRYPTO_ALGAPI
765 select CRYPTO_BLKCIPHER
766 select CRYPTO_CTR
767 select CRYPTO_HASH
768 select CRYPTO_SHA1
769 select CRYPTO_SHA256
770 select CRYPTO_SHA512
771 help
772 Enables the driver for the on-chip crypto accelerator
773 of Axis ARTPEC SoCs.
774
775 To compile this driver as a module, choose M here.
776
777config CRYPTO_DEV_CCREE
778 tristate "Support for ARM TrustZone CryptoCell family of security processors"
779 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
780 default n
781 select CRYPTO_HASH
782 select CRYPTO_BLKCIPHER
783 select CRYPTO_LIB_DES
784 select CRYPTO_AEAD
785 select CRYPTO_AUTHENC
786 select CRYPTO_SHA1
787 select CRYPTO_MD5
788 select CRYPTO_SHA256
789 select CRYPTO_SHA512
790 select CRYPTO_HMAC
791 select CRYPTO_AES
792 select CRYPTO_CBC
793 select CRYPTO_ECB
794 select CRYPTO_CTR
795 select CRYPTO_XTS
796 select CRYPTO_SM4
797 select CRYPTO_SM3
798 help
799 Say 'Y' to enable a driver for the REE interface of the Arm
800 TrustZone CryptoCell family of processors. Currently the
801 CryptoCell 713, 703, 712, 710 and 630 are supported.
802 Choose this if you wish to use hardware acceleration of
803 cryptographic operations on the system REE.
804 If unsure say Y.
805
806source "drivers/crypto/hisilicon/Kconfig"
807
808endif # CRYPTO_HW