Loading...
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - https://www.ti.com
4 *
5 * Authors:
6 * Jyri Sarha <jsarha@ti.com>
7 * Sergej Sawazki <ce3a@gmx.de>
8 *
9 * Gpio controlled clock implementation
10 */
11
12#include <linux/clk-provider.h>
13#include <linux/export.h>
14#include <linux/slab.h>
15#include <linux/gpio/consumer.h>
16#include <linux/err.h>
17#include <linux/device.h>
18#include <linux/of.h>
19#include <linux/platform_device.h>
20#include <linux/regulator/consumer.h>
21
22/**
23 * DOC: basic gpio gated clock which can be enabled and disabled
24 * with gpio output
25 * Traits of this clock:
26 * prepare - clk_(un)prepare are functional and control a gpio that can sleep
27 * enable - clk_enable and clk_disable are functional & control
28 * non-sleeping gpio
29 * rate - inherits rate from parent. No clk_set_rate support
30 * parent - fixed parent. No clk_set_parent support
31 */
32
33/**
34 * struct clk_gpio - gpio gated clock
35 *
36 * @hw: handle between common and hardware-specific interfaces
37 * @gpiod: gpio descriptor
38 *
39 * Clock with a gpio control for enabling and disabling the parent clock
40 * or switching between two parents by asserting or deasserting the gpio.
41 *
42 * Implements .enable, .disable and .is_enabled or
43 * .get_parent, .set_parent and .determine_rate depending on which clk_ops
44 * is used.
45 */
46struct clk_gpio {
47 struct clk_hw hw;
48 struct gpio_desc *gpiod;
49};
50
51#define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw)
52
53static int clk_gpio_gate_enable(struct clk_hw *hw)
54{
55 struct clk_gpio *clk = to_clk_gpio(hw);
56
57 gpiod_set_value(clk->gpiod, 1);
58
59 return 0;
60}
61
62static void clk_gpio_gate_disable(struct clk_hw *hw)
63{
64 struct clk_gpio *clk = to_clk_gpio(hw);
65
66 gpiod_set_value(clk->gpiod, 0);
67}
68
69static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
70{
71 struct clk_gpio *clk = to_clk_gpio(hw);
72
73 return gpiod_get_value(clk->gpiod);
74}
75
76static const struct clk_ops clk_gpio_gate_ops = {
77 .enable = clk_gpio_gate_enable,
78 .disable = clk_gpio_gate_disable,
79 .is_enabled = clk_gpio_gate_is_enabled,
80};
81
82static int clk_sleeping_gpio_gate_prepare(struct clk_hw *hw)
83{
84 struct clk_gpio *clk = to_clk_gpio(hw);
85
86 gpiod_set_value_cansleep(clk->gpiod, 1);
87
88 return 0;
89}
90
91static void clk_sleeping_gpio_gate_unprepare(struct clk_hw *hw)
92{
93 struct clk_gpio *clk = to_clk_gpio(hw);
94
95 gpiod_set_value_cansleep(clk->gpiod, 0);
96}
97
98static int clk_sleeping_gpio_gate_is_prepared(struct clk_hw *hw)
99{
100 struct clk_gpio *clk = to_clk_gpio(hw);
101
102 return gpiod_get_value_cansleep(clk->gpiod);
103}
104
105static const struct clk_ops clk_sleeping_gpio_gate_ops = {
106 .prepare = clk_sleeping_gpio_gate_prepare,
107 .unprepare = clk_sleeping_gpio_gate_unprepare,
108 .is_prepared = clk_sleeping_gpio_gate_is_prepared,
109};
110
111/**
112 * DOC: basic clock multiplexer which can be controlled with a gpio output
113 * Traits of this clock:
114 * prepare - clk_prepare only ensures that parents are prepared
115 * rate - rate is only affected by parent switching. No clk_set_rate support
116 * parent - parent is adjustable through clk_set_parent
117 */
118
119static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
120{
121 struct clk_gpio *clk = to_clk_gpio(hw);
122
123 return gpiod_get_value_cansleep(clk->gpiod);
124}
125
126static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
127{
128 struct clk_gpio *clk = to_clk_gpio(hw);
129
130 gpiod_set_value_cansleep(clk->gpiod, index);
131
132 return 0;
133}
134
135static const struct clk_ops clk_gpio_mux_ops = {
136 .get_parent = clk_gpio_mux_get_parent,
137 .set_parent = clk_gpio_mux_set_parent,
138 .determine_rate = __clk_mux_determine_rate,
139};
140
141static struct clk_hw *clk_register_gpio(struct device *dev, u8 num_parents,
142 struct gpio_desc *gpiod,
143 const struct clk_ops *clk_gpio_ops)
144{
145 struct clk_gpio *clk_gpio;
146 struct clk_hw *hw;
147 struct clk_init_data init = {};
148 int err;
149 const struct clk_parent_data gpio_parent_data[] = {
150 { .index = 0 },
151 { .index = 1 },
152 };
153
154 clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
155 if (!clk_gpio)
156 return ERR_PTR(-ENOMEM);
157
158 init.name = dev->of_node->name;
159 init.ops = clk_gpio_ops;
160 init.parent_data = gpio_parent_data;
161 init.num_parents = num_parents;
162 init.flags = CLK_SET_RATE_PARENT;
163
164 clk_gpio->gpiod = gpiod;
165 clk_gpio->hw.init = &init;
166
167 hw = &clk_gpio->hw;
168 err = devm_clk_hw_register(dev, hw);
169 if (err)
170 return ERR_PTR(err);
171
172 return hw;
173}
174
175static struct clk_hw *clk_hw_register_gpio_gate(struct device *dev,
176 int num_parents,
177 struct gpio_desc *gpiod)
178{
179 const struct clk_ops *ops;
180
181 if (gpiod_cansleep(gpiod))
182 ops = &clk_sleeping_gpio_gate_ops;
183 else
184 ops = &clk_gpio_gate_ops;
185
186 return clk_register_gpio(dev, num_parents, gpiod, ops);
187}
188
189static struct clk_hw *clk_hw_register_gpio_mux(struct device *dev,
190 struct gpio_desc *gpiod)
191{
192 return clk_register_gpio(dev, 2, gpiod, &clk_gpio_mux_ops);
193}
194
195static int gpio_clk_driver_probe(struct platform_device *pdev)
196{
197 struct device *dev = &pdev->dev;
198 struct device_node *node = dev->of_node;
199 const char *gpio_name;
200 unsigned int num_parents;
201 struct gpio_desc *gpiod;
202 struct clk_hw *hw;
203 bool is_mux;
204
205 is_mux = of_device_is_compatible(node, "gpio-mux-clock");
206
207 num_parents = of_clk_get_parent_count(node);
208 if (is_mux && num_parents != 2) {
209 dev_err(dev, "mux-clock must have 2 parents\n");
210 return -EINVAL;
211 }
212
213 gpio_name = is_mux ? "select" : "enable";
214 gpiod = devm_gpiod_get(dev, gpio_name, GPIOD_OUT_LOW);
215 if (IS_ERR(gpiod))
216 return dev_err_probe(dev, PTR_ERR(gpiod),
217 "Can't get '%s' named GPIO property\n", gpio_name);
218
219 if (is_mux)
220 hw = clk_hw_register_gpio_mux(dev, gpiod);
221 else
222 hw = clk_hw_register_gpio_gate(dev, num_parents, gpiod);
223 if (IS_ERR(hw))
224 return PTR_ERR(hw);
225
226 return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
227}
228
229static const struct of_device_id gpio_clk_match_table[] = {
230 { .compatible = "gpio-mux-clock" },
231 { .compatible = "gpio-gate-clock" },
232 { }
233};
234
235static struct platform_driver gpio_clk_driver = {
236 .probe = gpio_clk_driver_probe,
237 .driver = {
238 .name = "gpio-clk",
239 .of_match_table = gpio_clk_match_table,
240 },
241};
242builtin_platform_driver(gpio_clk_driver);
243
244/**
245 * DOC: gated fixed clock, controlled with a gpio output and a regulator
246 * Traits of this clock:
247 * prepare - clk_prepare and clk_unprepare are function & control regulator
248 * optionally a gpio that can sleep
249 * enable - clk_enable and clk_disable are functional & control gpio
250 * rate - rate is fixed and set on clock registration
251 * parent - fixed clock is a root clock and has no parent
252 */
253
254/**
255 * struct clk_gated_fixed - Gateable fixed rate clock
256 * @clk_gpio: instance of clk_gpio for gate-gpio
257 * @supply: supply regulator
258 * @rate: fixed rate
259 */
260struct clk_gated_fixed {
261 struct clk_gpio clk_gpio;
262 struct regulator *supply;
263 unsigned long rate;
264};
265
266#define to_clk_gated_fixed(_clk_gpio) container_of(_clk_gpio, struct clk_gated_fixed, clk_gpio)
267
268static unsigned long clk_gated_fixed_recalc_rate(struct clk_hw *hw,
269 unsigned long parent_rate)
270{
271 return to_clk_gated_fixed(to_clk_gpio(hw))->rate;
272}
273
274static int clk_gated_fixed_prepare(struct clk_hw *hw)
275{
276 struct clk_gated_fixed *clk = to_clk_gated_fixed(to_clk_gpio(hw));
277
278 if (!clk->supply)
279 return 0;
280
281 return regulator_enable(clk->supply);
282}
283
284static void clk_gated_fixed_unprepare(struct clk_hw *hw)
285{
286 struct clk_gated_fixed *clk = to_clk_gated_fixed(to_clk_gpio(hw));
287
288 if (!clk->supply)
289 return;
290
291 regulator_disable(clk->supply);
292}
293
294static int clk_gated_fixed_is_prepared(struct clk_hw *hw)
295{
296 struct clk_gated_fixed *clk = to_clk_gated_fixed(to_clk_gpio(hw));
297
298 if (!clk->supply)
299 return true;
300
301 return regulator_is_enabled(clk->supply);
302}
303
304/*
305 * Fixed gated clock with non-sleeping gpio.
306 *
307 * Prepare operation turns on the supply regulator
308 * and the enable operation switches the enable-gpio.
309 */
310static const struct clk_ops clk_gated_fixed_ops = {
311 .prepare = clk_gated_fixed_prepare,
312 .unprepare = clk_gated_fixed_unprepare,
313 .is_prepared = clk_gated_fixed_is_prepared,
314 .enable = clk_gpio_gate_enable,
315 .disable = clk_gpio_gate_disable,
316 .is_enabled = clk_gpio_gate_is_enabled,
317 .recalc_rate = clk_gated_fixed_recalc_rate,
318};
319
320static int clk_sleeping_gated_fixed_prepare(struct clk_hw *hw)
321{
322 int ret;
323
324 ret = clk_gated_fixed_prepare(hw);
325 if (ret)
326 return ret;
327
328 ret = clk_sleeping_gpio_gate_prepare(hw);
329 if (ret)
330 clk_gated_fixed_unprepare(hw);
331
332 return ret;
333}
334
335static void clk_sleeping_gated_fixed_unprepare(struct clk_hw *hw)
336{
337 clk_gated_fixed_unprepare(hw);
338 clk_sleeping_gpio_gate_unprepare(hw);
339}
340
341/*
342 * Fixed gated clock with non-sleeping gpio.
343 *
344 * Enabling the supply regulator and switching the enable-gpio happens
345 * both in the prepare step.
346 * is_prepared only needs to check the gpio state, as toggling the
347 * gpio is the last step when preparing.
348 */
349static const struct clk_ops clk_sleeping_gated_fixed_ops = {
350 .prepare = clk_sleeping_gated_fixed_prepare,
351 .unprepare = clk_sleeping_gated_fixed_unprepare,
352 .is_prepared = clk_sleeping_gpio_gate_is_prepared,
353 .recalc_rate = clk_gated_fixed_recalc_rate,
354};
355
356static int clk_gated_fixed_probe(struct platform_device *pdev)
357{
358 struct device *dev = &pdev->dev;
359 struct clk_gated_fixed *clk;
360 const struct clk_ops *ops;
361 const char *clk_name;
362 u32 rate;
363 int ret;
364
365 clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL);
366 if (!clk)
367 return -ENOMEM;
368
369 ret = device_property_read_u32(dev, "clock-frequency", &rate);
370 if (ret)
371 return dev_err_probe(dev, ret, "Failed to get clock-frequency\n");
372 clk->rate = rate;
373
374 ret = device_property_read_string(dev, "clock-output-names", &clk_name);
375 if (ret)
376 clk_name = fwnode_get_name(dev->fwnode);
377
378 clk->supply = devm_regulator_get_optional(dev, "vdd");
379 if (IS_ERR(clk->supply)) {
380 if (PTR_ERR(clk->supply) != -ENODEV)
381 return dev_err_probe(dev, PTR_ERR(clk->supply),
382 "Failed to get regulator\n");
383 clk->supply = NULL;
384 }
385
386 clk->clk_gpio.gpiod = devm_gpiod_get_optional(dev, "enable",
387 GPIOD_OUT_LOW);
388 if (IS_ERR(clk->clk_gpio.gpiod))
389 return dev_err_probe(dev, PTR_ERR(clk->clk_gpio.gpiod),
390 "Failed to get gpio\n");
391
392 if (gpiod_cansleep(clk->clk_gpio.gpiod))
393 ops = &clk_sleeping_gated_fixed_ops;
394 else
395 ops = &clk_gated_fixed_ops;
396
397 clk->clk_gpio.hw.init = CLK_HW_INIT_NO_PARENT(clk_name, ops, 0);
398
399 /* register the clock */
400 ret = devm_clk_hw_register(dev, &clk->clk_gpio.hw);
401 if (ret)
402 return dev_err_probe(dev, ret,
403 "Failed to register clock\n");
404
405 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
406 &clk->clk_gpio.hw);
407 if (ret)
408 return dev_err_probe(dev, ret,
409 "Failed to register clock provider\n");
410
411 return 0;
412}
413
414static const struct of_device_id gated_fixed_clk_match_table[] = {
415 { .compatible = "gated-fixed-clock" },
416 { /* sentinel */ }
417};
418
419static struct platform_driver gated_fixed_clk_driver = {
420 .probe = clk_gated_fixed_probe,
421 .driver = {
422 .name = "gated-fixed-clk",
423 .of_match_table = gated_fixed_clk_match_table,
424 },
425};
426builtin_platform_driver(gated_fixed_clk_driver);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
4 *
5 * Authors:
6 * Jyri Sarha <jsarha@ti.com>
7 * Sergej Sawazki <ce3a@gmx.de>
8 *
9 * Gpio controlled clock implementation
10 */
11
12#include <linux/clk-provider.h>
13#include <linux/export.h>
14#include <linux/slab.h>
15#include <linux/gpio/consumer.h>
16#include <linux/err.h>
17#include <linux/device.h>
18#include <linux/platform_device.h>
19#include <linux/of_device.h>
20
21/**
22 * DOC: basic gpio gated clock which can be enabled and disabled
23 * with gpio output
24 * Traits of this clock:
25 * prepare - clk_(un)prepare only ensures parent is (un)prepared
26 * enable - clk_enable and clk_disable are functional & control gpio
27 * rate - inherits rate from parent. No clk_set_rate support
28 * parent - fixed parent. No clk_set_parent support
29 */
30
31static int clk_gpio_gate_enable(struct clk_hw *hw)
32{
33 struct clk_gpio *clk = to_clk_gpio(hw);
34
35 gpiod_set_value(clk->gpiod, 1);
36
37 return 0;
38}
39
40static void clk_gpio_gate_disable(struct clk_hw *hw)
41{
42 struct clk_gpio *clk = to_clk_gpio(hw);
43
44 gpiod_set_value(clk->gpiod, 0);
45}
46
47static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
48{
49 struct clk_gpio *clk = to_clk_gpio(hw);
50
51 return gpiod_get_value(clk->gpiod);
52}
53
54const struct clk_ops clk_gpio_gate_ops = {
55 .enable = clk_gpio_gate_enable,
56 .disable = clk_gpio_gate_disable,
57 .is_enabled = clk_gpio_gate_is_enabled,
58};
59EXPORT_SYMBOL_GPL(clk_gpio_gate_ops);
60
61static int clk_sleeping_gpio_gate_prepare(struct clk_hw *hw)
62{
63 struct clk_gpio *clk = to_clk_gpio(hw);
64
65 gpiod_set_value_cansleep(clk->gpiod, 1);
66
67 return 0;
68}
69
70static void clk_sleeping_gpio_gate_unprepare(struct clk_hw *hw)
71{
72 struct clk_gpio *clk = to_clk_gpio(hw);
73
74 gpiod_set_value_cansleep(clk->gpiod, 0);
75}
76
77static int clk_sleeping_gpio_gate_is_prepared(struct clk_hw *hw)
78{
79 struct clk_gpio *clk = to_clk_gpio(hw);
80
81 return gpiod_get_value_cansleep(clk->gpiod);
82}
83
84static const struct clk_ops clk_sleeping_gpio_gate_ops = {
85 .prepare = clk_sleeping_gpio_gate_prepare,
86 .unprepare = clk_sleeping_gpio_gate_unprepare,
87 .is_prepared = clk_sleeping_gpio_gate_is_prepared,
88};
89
90/**
91 * DOC: basic clock multiplexer which can be controlled with a gpio output
92 * Traits of this clock:
93 * prepare - clk_prepare only ensures that parents are prepared
94 * rate - rate is only affected by parent switching. No clk_set_rate support
95 * parent - parent is adjustable through clk_set_parent
96 */
97
98static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
99{
100 struct clk_gpio *clk = to_clk_gpio(hw);
101
102 return gpiod_get_value_cansleep(clk->gpiod);
103}
104
105static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
106{
107 struct clk_gpio *clk = to_clk_gpio(hw);
108
109 gpiod_set_value_cansleep(clk->gpiod, index);
110
111 return 0;
112}
113
114const struct clk_ops clk_gpio_mux_ops = {
115 .get_parent = clk_gpio_mux_get_parent,
116 .set_parent = clk_gpio_mux_set_parent,
117 .determine_rate = __clk_mux_determine_rate,
118};
119EXPORT_SYMBOL_GPL(clk_gpio_mux_ops);
120
121static struct clk_hw *clk_register_gpio(struct device *dev, const char *name,
122 const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
123 unsigned long flags, const struct clk_ops *clk_gpio_ops)
124{
125 struct clk_gpio *clk_gpio;
126 struct clk_hw *hw;
127 struct clk_init_data init = {};
128 int err;
129
130 if (dev)
131 clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
132 else
133 clk_gpio = kzalloc(sizeof(*clk_gpio), GFP_KERNEL);
134
135 if (!clk_gpio)
136 return ERR_PTR(-ENOMEM);
137
138 init.name = name;
139 init.ops = clk_gpio_ops;
140 init.flags = flags;
141 init.parent_names = parent_names;
142 init.num_parents = num_parents;
143
144 clk_gpio->gpiod = gpiod;
145 clk_gpio->hw.init = &init;
146
147 hw = &clk_gpio->hw;
148 if (dev)
149 err = devm_clk_hw_register(dev, hw);
150 else
151 err = clk_hw_register(NULL, hw);
152
153 if (!err)
154 return hw;
155
156 if (!dev) {
157 kfree(clk_gpio);
158 }
159
160 return ERR_PTR(err);
161}
162
163/**
164 * clk_hw_register_gpio_gate - register a gpio clock gate with the clock
165 * framework
166 * @dev: device that is registering this clock
167 * @name: name of this clock
168 * @parent_name: name of this clock's parent
169 * @gpiod: gpio descriptor to gate this clock
170 * @flags: clock flags
171 */
172struct clk_hw *clk_hw_register_gpio_gate(struct device *dev, const char *name,
173 const char *parent_name, struct gpio_desc *gpiod,
174 unsigned long flags)
175{
176 const struct clk_ops *ops;
177
178 if (gpiod_cansleep(gpiod))
179 ops = &clk_sleeping_gpio_gate_ops;
180 else
181 ops = &clk_gpio_gate_ops;
182
183 return clk_register_gpio(dev, name,
184 (parent_name ? &parent_name : NULL),
185 (parent_name ? 1 : 0), gpiod, flags, ops);
186}
187EXPORT_SYMBOL_GPL(clk_hw_register_gpio_gate);
188
189struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
190 const char *parent_name, struct gpio_desc *gpiod,
191 unsigned long flags)
192{
193 struct clk_hw *hw;
194
195 hw = clk_hw_register_gpio_gate(dev, name, parent_name, gpiod, flags);
196 if (IS_ERR(hw))
197 return ERR_CAST(hw);
198 return hw->clk;
199}
200EXPORT_SYMBOL_GPL(clk_register_gpio_gate);
201
202/**
203 * clk_hw_register_gpio_mux - register a gpio clock mux with the clock framework
204 * @dev: device that is registering this clock
205 * @name: name of this clock
206 * @parent_names: names of this clock's parents
207 * @num_parents: number of parents listed in @parent_names
208 * @gpiod: gpio descriptor to gate this clock
209 * @flags: clock flags
210 */
211struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, const char *name,
212 const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
213 unsigned long flags)
214{
215 if (num_parents != 2) {
216 pr_err("mux-clock %s must have 2 parents\n", name);
217 return ERR_PTR(-EINVAL);
218 }
219
220 return clk_register_gpio(dev, name, parent_names, num_parents,
221 gpiod, flags, &clk_gpio_mux_ops);
222}
223EXPORT_SYMBOL_GPL(clk_hw_register_gpio_mux);
224
225struct clk *clk_register_gpio_mux(struct device *dev, const char *name,
226 const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
227 unsigned long flags)
228{
229 struct clk_hw *hw;
230
231 hw = clk_hw_register_gpio_mux(dev, name, parent_names, num_parents,
232 gpiod, flags);
233 if (IS_ERR(hw))
234 return ERR_CAST(hw);
235 return hw->clk;
236}
237EXPORT_SYMBOL_GPL(clk_register_gpio_mux);
238
239static int gpio_clk_driver_probe(struct platform_device *pdev)
240{
241 struct device_node *node = pdev->dev.of_node;
242 const char **parent_names, *gpio_name;
243 unsigned int num_parents;
244 struct gpio_desc *gpiod;
245 struct clk *clk;
246 bool is_mux;
247 int ret;
248
249 num_parents = of_clk_get_parent_count(node);
250 if (num_parents) {
251 parent_names = devm_kcalloc(&pdev->dev, num_parents,
252 sizeof(char *), GFP_KERNEL);
253 if (!parent_names)
254 return -ENOMEM;
255
256 of_clk_parent_fill(node, parent_names, num_parents);
257 } else {
258 parent_names = NULL;
259 }
260
261 is_mux = of_device_is_compatible(node, "gpio-mux-clock");
262
263 gpio_name = is_mux ? "select" : "enable";
264 gpiod = devm_gpiod_get(&pdev->dev, gpio_name, GPIOD_OUT_LOW);
265 if (IS_ERR(gpiod)) {
266 ret = PTR_ERR(gpiod);
267 if (ret == -EPROBE_DEFER)
268 pr_debug("%pOFn: %s: GPIOs not yet available, retry later\n",
269 node, __func__);
270 else
271 pr_err("%pOFn: %s: Can't get '%s' named GPIO property\n",
272 node, __func__,
273 gpio_name);
274 return ret;
275 }
276
277 if (is_mux)
278 clk = clk_register_gpio_mux(&pdev->dev, node->name,
279 parent_names, num_parents, gpiod, 0);
280 else
281 clk = clk_register_gpio_gate(&pdev->dev, node->name,
282 parent_names ? parent_names[0] : NULL, gpiod,
283 0);
284 if (IS_ERR(clk))
285 return PTR_ERR(clk);
286
287 return of_clk_add_provider(node, of_clk_src_simple_get, clk);
288}
289
290static const struct of_device_id gpio_clk_match_table[] = {
291 { .compatible = "gpio-mux-clock" },
292 { .compatible = "gpio-gate-clock" },
293 { }
294};
295
296static struct platform_driver gpio_clk_driver = {
297 .probe = gpio_clk_driver_probe,
298 .driver = {
299 .name = "gpio-clk",
300 .of_match_table = gpio_clk_match_table,
301 },
302};
303builtin_platform_driver(gpio_clk_driver);