1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 *  linux/arch/arm/mach-mmp/pxa168.c
  4 *
  5 *  Code specific to PXA168
  6 */
  7#include <linux/module.h>
  8#include <linux/kernel.h>
  9#include <linux/init.h>
 10#include <linux/list.h>
 11#include <linux/io.h>
 12#include <linux/clk.h>
 13#include <linux/clk/mmp.h>
 14#include <linux/platform_device.h>
 15#include <linux/platform_data/mv_usb.h>
 16#include <linux/dma-mapping.h>
 17
 18#include <asm/mach/time.h>
 19#include <asm/system_misc.h>
 20
 21#include "addr-map.h"
 22#include "clock.h"
 23#include "common.h"
 24#include "cputype.h"
 25#include "devices.h"
 26#include "irqs.h"
 27#include "mfp.h"
 28#include "pxa168.h"
 29#include "regs-apbc.h"
 30#include "regs-apmu.h"
 31#include "regs-usb.h"
 32
 33#define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)
 34
 35static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
 36{
 37	MFP_ADDR_X(GPIO0,   GPIO36,  0x04c),
 38	MFP_ADDR_X(GPIO37,  GPIO55,  0x000),
 39	MFP_ADDR_X(GPIO56,  GPIO123, 0x0e0),
 40	MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
 41
 42	MFP_ADDR_END,
 43};
 44
 45void __init pxa168_init_irq(void)
 46{
 47	icu_init_irq();
 48}
 49
 50static int __init pxa168_init(void)
 51{
 52	if (cpu_is_pxa168()) {
 53		mfp_init_base(MFPR_VIRT_BASE);
 54		mfp_init_addr(pxa168_mfp_addr_map);
 55		pxa168_clk_init(APB_PHYS_BASE + 0x50000,
 56				AXI_PHYS_BASE + 0x82800,
 57				APB_PHYS_BASE + 0x15000);
 58	}
 59
 60	return 0;
 61}
 62postcore_initcall(pxa168_init);
 63
 64/* system timer - clock enabled, 3.25MHz */
 65#define TIMER_CLK_RST	(APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
 66#define APBC_TIMERS	APBC_REG(0x34)
 67
 68void __init pxa168_timer_init(void)
 69{
 70	/* this is early, we have to initialize the CCU registers by
 71	 * ourselves instead of using clk_* API. Clock rate is defined
 72	 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
 73	 */
 74	__raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
 75
 76	/* 3.25MHz, bus/functional clock enabled, release reset */
 77	__raw_writel(TIMER_CLK_RST, APBC_TIMERS);
 78
 79	mmp_timer_init(IRQ_PXA168_TIMER1, 3250000);
 80}
 81
 82void pxa168_clear_keypad_wakeup(void)
 83{
 84	uint32_t val;
 85	uint32_t mask = APMU_PXA168_KP_WAKE_CLR;
 86
 87	/* wake event clear is needed in order to clear keypad interrupt */
 88	val = __raw_readl(APMU_WAKE_CLR);
 89	__raw_writel(val |  mask, APMU_WAKE_CLR);
 90}
 91
 92/* on-chip devices */
 93PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
 94PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
 95PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
 96PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
 97PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
 98PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
 99PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
100PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
101PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
102PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
103PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
104PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
105PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
106PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
107PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
108PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
109PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
110PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
111
112struct resource pxa168_resource_gpio[] = {
113	{
114		.start	= 0xd4019000,
115		.end	= 0xd4019fff,
116		.flags	= IORESOURCE_MEM,
117	}, {
118		.start	= IRQ_PXA168_GPIOX,
119		.end	= IRQ_PXA168_GPIOX,
120		.name	= "gpio_mux",
121		.flags	= IORESOURCE_IRQ,
122	},
123};
124
125struct platform_device pxa168_device_gpio = {
126	.name		= "mmp-gpio",
127	.id		= -1,
128	.num_resources	= ARRAY_SIZE(pxa168_resource_gpio),
129	.resource	= pxa168_resource_gpio,
130};
131
132struct resource pxa168_usb_host_resources[] = {
133	/* USB Host conroller register base */
134	[0] = {
135		.start	= PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET,
136		.end	= PXA168_U2H_REGBASE + USB_REG_RANGE,
137		.flags	= IORESOURCE_MEM,
138		.name	= "capregs",
139	},
140	/* USB PHY register base */
141	[1] = {
142		.start	= PXA168_U2H_PHYBASE,
143		.end	= PXA168_U2H_PHYBASE + USB_PHY_RANGE,
144		.flags	= IORESOURCE_MEM,
145		.name	= "phyregs",
146	},
147	[2] = {
148		.start	= IRQ_PXA168_USB2,
149		.end	= IRQ_PXA168_USB2,
150		.flags	= IORESOURCE_IRQ,
151	},
152};
153
154static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
155struct platform_device pxa168_device_usb_host = {
156	.name = "pxa-sph",
157	.id   = -1,
158	.dev  = {
159		.dma_mask = &pxa168_usb_host_dmamask,
160		.coherent_dma_mask = DMA_BIT_MASK(32),
161	},
162
163	.num_resources = ARRAY_SIZE(pxa168_usb_host_resources),
164	.resource      = pxa168_usb_host_resources,
165};
166
167int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata)
168{
169	pxa168_device_usb_host.dev.platform_data = pdata;
170	return platform_device_register(&pxa168_device_usb_host);
171}
172
173void pxa168_restart(enum reboot_mode mode, const char *cmd)
174{
175	soft_restart(0xffff0000);
176}