1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 *  Copyright (C) 2003-2005 SAN People
 4 *
 5 * Debugging macro include header
 6*/
 7
 8#define AT91_DBGU_SR		(0x14)	/* Status Register */
 9#define AT91_DBGU_THR		(0x1c)	/* Transmitter Holding Register */
10#define AT91_DBGU_TXRDY		(1 << 1)	/* Transmitter Ready */
11#define AT91_DBGU_TXEMPTY	(1 << 9)	/* Transmitter Empty */
12
13	.macro	addruart, rp, rv, tmp
14	ldr	\rp, =CONFIG_DEBUG_UART_PHYS		@ System peripherals (phys address)
15	ldr	\rv, =CONFIG_DEBUG_UART_VIRT		@ System peripherals (virt address)
16	.endm
17
18	.macro	senduart,rd,rx
19	strb	\rd, [\rx, #(AT91_DBGU_THR)]		@ Write to Transmitter Holding Register
20	.endm
21
22	.macro	waituarttxrdy,rd,rx
231001:	ldr	\rd, [\rx, #(AT91_DBGU_SR)]		@ Read Status Register
24	tst	\rd, #AT91_DBGU_TXRDY			@ DBGU_TXRDY = 1 when ready to transmit
25	beq	1001b
26	.endm
27
28	.macro	waituartcts,rd,rx
29	.endm
30
31	.macro	busyuart,rd,rx
321001:	ldr	\rd, [\rx, #(AT91_DBGU_SR)]		@ Read Status Register
33	tst	\rd, #AT91_DBGU_TXEMPTY			@ DBGU_TXEMPTY = 1 when transmission complete
34	beq	1001b
35	.endm
36

 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 *  Copyright (C) 2003-2005 SAN People
 4 *
 5 * Debugging macro include header
 6*/
 7
 8#define AT91_DBGU_SR		(0x14)	/* Status Register */
 9#define AT91_DBGU_THR		(0x1c)	/* Transmitter Holding Register */
10#define AT91_DBGU_TXRDY		(1 << 1)	/* Transmitter Ready */
11#define AT91_DBGU_TXEMPTY	(1 << 9)	/* Transmitter Empty */
12
13	.macro	addruart, rp, rv, tmp
14	ldr	\rp, =CONFIG_DEBUG_UART_PHYS		@ System peripherals (phys address)
15	ldr	\rv, =CONFIG_DEBUG_UART_VIRT		@ System peripherals (virt address)
16	.endm
17
18	.macro	senduart,rd,rx
19	strb	\rd, [\rx, #(AT91_DBGU_THR)]		@ Write to Transmitter Holding Register
20	.endm
21
22	.macro	waituart,rd,rx
231001:	ldr	\rd, [\rx, #(AT91_DBGU_SR)]		@ Read Status Register
24	tst	\rd, #AT91_DBGU_TXRDY			@ DBGU_TXRDY = 1 when ready to transmit
25	beq	1001b
 
 
 
26	.endm
27
28	.macro	busyuart,rd,rx
291001:	ldr	\rd, [\rx, #(AT91_DBGU_SR)]		@ Read Status Register
30	tst	\rd, #AT91_DBGU_TXEMPTY			@ DBGU_TXEMPTY = 1 when transmission complete
31	beq	1001b
32	.endm
33