Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * cht_bsw_rt5672.c - ASoc Machine driver for Intel Cherryview-based platforms
4 * Cherrytrail and Braswell, with RT5672 codec.
5 *
6 * Copyright (C) 2014 Intel Corp
7 * Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
8 * Mengdong Lin <mengdong.lin@intel.com>
9 */
10
11#include <linux/gpio/consumer.h>
12#include <linux/input.h>
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/slab.h>
16#include <linux/clk.h>
17#include <sound/pcm.h>
18#include <sound/pcm_params.h>
19#include <sound/soc.h>
20#include <sound/jack.h>
21#include <sound/soc-acpi.h>
22#include "../../codecs/rt5670.h"
23#include "../atom/sst-atom-controls.h"
24#include "../common/soc-intel-quirks.h"
25
26
27/* The platform clock #3 outputs 19.2Mhz clock to codec as I2S MCLK */
28#define CHT_PLAT_CLK_3_HZ 19200000
29#define CHT_CODEC_DAI "rt5670-aif1"
30
31struct cht_mc_private {
32 struct snd_soc_jack headset;
33 char codec_name[SND_ACPI_I2C_ID_LEN];
34 struct clk *mclk;
35 bool use_ssp0;
36};
37
38/* Headset jack detection DAPM pins */
39static struct snd_soc_jack_pin cht_bsw_headset_pins[] = {
40 {
41 .pin = "Headset Mic",
42 .mask = SND_JACK_MICROPHONE,
43 },
44 {
45 .pin = "Headphone",
46 .mask = SND_JACK_HEADPHONE,
47 },
48};
49
50static int platform_clock_control(struct snd_soc_dapm_widget *w,
51 struct snd_kcontrol *k, int event)
52{
53 struct snd_soc_dapm_context *dapm = w->dapm;
54 struct snd_soc_card *card = dapm->card;
55 struct snd_soc_dai *codec_dai;
56 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
57 int ret;
58
59 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
60 if (!codec_dai) {
61 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
62 return -EIO;
63 }
64
65 if (SND_SOC_DAPM_EVENT_ON(event)) {
66 if (ctx->mclk) {
67 ret = clk_prepare_enable(ctx->mclk);
68 if (ret < 0) {
69 dev_err(card->dev,
70 "could not configure MCLK state");
71 return ret;
72 }
73 }
74
75 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
76 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
77 CHT_PLAT_CLK_3_HZ, 48000 * 512);
78 if (ret < 0) {
79 dev_err(card->dev, "can't set codec pll: %d\n", ret);
80 return ret;
81 }
82
83 /* set codec sysclk source to PLL */
84 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
85 48000 * 512, SND_SOC_CLOCK_IN);
86 if (ret < 0) {
87 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
88 return ret;
89 }
90 } else {
91 /* Set codec sysclk source to its internal clock because codec
92 * PLL will be off when idle and MCLK will also be off by ACPI
93 * when codec is runtime suspended. Codec needs clock for jack
94 * detection and button press.
95 */
96 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_RCCLK,
97 48000 * 512, SND_SOC_CLOCK_IN);
98 if (ret < 0) {
99 dev_err(card->dev, "failed to set codec sysclk: %d\n", ret);
100 return ret;
101 }
102
103 if (ctx->mclk)
104 clk_disable_unprepare(ctx->mclk);
105 }
106 return 0;
107}
108
109static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
110 SND_SOC_DAPM_HP("Headphone", NULL),
111 SND_SOC_DAPM_MIC("Headset Mic", NULL),
112 SND_SOC_DAPM_MIC("Int Mic", NULL),
113 SND_SOC_DAPM_SPK("Ext Spk", NULL),
114 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
115 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
116 SND_SOC_DAPM_POST_PMD),
117};
118
119static const struct snd_soc_dapm_route cht_audio_map[] = {
120 {"IN1P", NULL, "Headset Mic"},
121 {"IN1N", NULL, "Headset Mic"},
122 {"DMIC L1", NULL, "Int Mic"},
123 {"DMIC R1", NULL, "Int Mic"},
124 {"Headphone", NULL, "HPOL"},
125 {"Headphone", NULL, "HPOR"},
126 {"Ext Spk", NULL, "SPOLP"},
127 {"Ext Spk", NULL, "SPOLN"},
128 {"Ext Spk", NULL, "SPORP"},
129 {"Ext Spk", NULL, "SPORN"},
130 {"Headphone", NULL, "Platform Clock"},
131 {"Headset Mic", NULL, "Platform Clock"},
132 {"Int Mic", NULL, "Platform Clock"},
133 {"Ext Spk", NULL, "Platform Clock"},
134};
135
136static const struct snd_soc_dapm_route cht_audio_ssp0_map[] = {
137 {"AIF1 Playback", NULL, "ssp0 Tx"},
138 {"ssp0 Tx", NULL, "modem_out"},
139 {"modem_in", NULL, "ssp0 Rx"},
140 {"ssp0 Rx", NULL, "AIF1 Capture"},
141};
142
143static const struct snd_soc_dapm_route cht_audio_ssp2_map[] = {
144 {"AIF1 Playback", NULL, "ssp2 Tx"},
145 {"ssp2 Tx", NULL, "codec_out0"},
146 {"ssp2 Tx", NULL, "codec_out1"},
147 {"codec_in0", NULL, "ssp2 Rx"},
148 {"codec_in1", NULL, "ssp2 Rx"},
149 {"ssp2 Rx", NULL, "AIF1 Capture"},
150};
151
152static const struct snd_kcontrol_new cht_mc_controls[] = {
153 SOC_DAPM_PIN_SWITCH("Headphone"),
154 SOC_DAPM_PIN_SWITCH("Headset Mic"),
155 SOC_DAPM_PIN_SWITCH("Int Mic"),
156 SOC_DAPM_PIN_SWITCH("Ext Spk"),
157};
158
159static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
160 struct snd_pcm_hw_params *params)
161{
162 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
163 struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);
164 int ret;
165
166 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
167 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
168 CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
169 if (ret < 0) {
170 dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
171 return ret;
172 }
173
174 /* set codec sysclk source to PLL */
175 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
176 params_rate(params) * 512,
177 SND_SOC_CLOCK_IN);
178 if (ret < 0) {
179 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
180 return ret;
181 }
182 return 0;
183}
184
185static const struct acpi_gpio_params headset_gpios = { 0, 0, false };
186
187static const struct acpi_gpio_mapping cht_rt5672_gpios[] = {
188 { "headset-gpios", &headset_gpios, 1 },
189 {},
190};
191
192static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
193{
194 int ret;
195 struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(runtime, 0);
196 struct snd_soc_component *component = codec_dai->component;
197 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
198
199 if (devm_acpi_dev_add_driver_gpios(component->dev, cht_rt5672_gpios))
200 dev_warn(runtime->dev, "Unable to add GPIO mapping table\n");
201
202 /* Select codec ASRC clock source to track I2S1 clock, because codec
203 * is in slave mode and 100fs I2S format (BCLK = 100 * LRCLK) cannot
204 * be supported by RT5672. Otherwise, ASRC will be disabled and cause
205 * noise.
206 */
207 rt5670_sel_asrc_clk_src(component,
208 RT5670_DA_STEREO_FILTER
209 | RT5670_DA_MONO_L_FILTER
210 | RT5670_DA_MONO_R_FILTER
211 | RT5670_AD_STEREO_FILTER
212 | RT5670_AD_MONO_L_FILTER
213 | RT5670_AD_MONO_R_FILTER,
214 RT5670_CLK_SEL_I2S1_ASRC);
215
216 if (ctx->use_ssp0) {
217 ret = snd_soc_dapm_add_routes(&runtime->card->dapm,
218 cht_audio_ssp0_map,
219 ARRAY_SIZE(cht_audio_ssp0_map));
220 } else {
221 ret = snd_soc_dapm_add_routes(&runtime->card->dapm,
222 cht_audio_ssp2_map,
223 ARRAY_SIZE(cht_audio_ssp2_map));
224 }
225 if (ret)
226 return ret;
227
228 ret = snd_soc_card_jack_new_pins(runtime->card, "Headset",
229 SND_JACK_HEADSET | SND_JACK_BTN_0 |
230 SND_JACK_BTN_1 | SND_JACK_BTN_2,
231 &ctx->headset,
232 cht_bsw_headset_pins,
233 ARRAY_SIZE(cht_bsw_headset_pins));
234 if (ret)
235 return ret;
236
237 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
238 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
239 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
240
241 rt5670_set_jack_detect(component, &ctx->headset);
242 if (ctx->mclk) {
243 /*
244 * The firmware might enable the clock at
245 * boot (this information may or may not
246 * be reflected in the enable clock register).
247 * To change the rate we must disable the clock
248 * first to cover these cases. Due to common
249 * clock framework restrictions that do not allow
250 * to disable a clock that has not been enabled,
251 * we need to enable the clock first.
252 */
253 ret = clk_prepare_enable(ctx->mclk);
254 if (!ret)
255 clk_disable_unprepare(ctx->mclk);
256
257 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
258
259 if (ret) {
260 dev_err(runtime->dev, "unable to set MCLK rate\n");
261 return ret;
262 }
263 }
264 return 0;
265}
266
267static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
268 struct snd_pcm_hw_params *params)
269{
270 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(rtd->card);
271 struct snd_interval *rate = hw_param_interval(params,
272 SNDRV_PCM_HW_PARAM_RATE);
273 struct snd_interval *channels = hw_param_interval(params,
274 SNDRV_PCM_HW_PARAM_CHANNELS);
275 int ret, bits;
276
277 /* The DSP will convert the FE rate to 48k, stereo, 24bits */
278 rate->min = rate->max = 48000;
279 channels->min = channels->max = 2;
280
281 if (ctx->use_ssp0) {
282 /* set SSP0 to 16-bit */
283 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
284 bits = 16;
285 } else {
286 /* set SSP2 to 24-bit */
287 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
288 bits = 24;
289 }
290
291 /*
292 * The default mode for the cpu-dai is TDM 4 slot. The default mode
293 * for the codec-dai is I2S. So we need to either set the cpu-dai to
294 * I2S mode to match the codec-dai, or set the codec-dai to TDM 4 slot
295 * (or program both to yet another mode).
296 * One board, the Lenovo Miix 2 10, uses not 1 but 2 codecs connected
297 * to SSP2. The second piggy-backed, output-only codec is inside the
298 * keyboard-dock (which has extra speakers). Unlike the main rt5672
299 * codec, we cannot configure this codec, it is hard coded to use
300 * 2 channel 24 bit I2S. For this to work we must use I2S mode on this
301 * board. Since we only support 2 channels anyways, there is no need
302 * for TDM on any cht-bsw-rt5672 designs. So we use I2S 2ch everywhere.
303 */
304 ret = snd_soc_dai_set_fmt(snd_soc_rtd_to_cpu(rtd, 0),
305 SND_SOC_DAIFMT_I2S |
306 SND_SOC_DAIFMT_NB_NF |
307 SND_SOC_DAIFMT_BP_FP);
308 if (ret < 0) {
309 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
310 return ret;
311 }
312
313 ret = snd_soc_dai_set_tdm_slot(snd_soc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, bits);
314 if (ret < 0) {
315 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
316 return ret;
317 }
318
319 return 0;
320}
321
322static int cht_aif1_startup(struct snd_pcm_substream *substream)
323{
324 return snd_pcm_hw_constraint_single(substream->runtime,
325 SNDRV_PCM_HW_PARAM_RATE, 48000);
326}
327
328static const struct snd_soc_ops cht_aif1_ops = {
329 .startup = cht_aif1_startup,
330};
331
332static const struct snd_soc_ops cht_be_ssp2_ops = {
333 .hw_params = cht_aif1_hw_params,
334};
335
336SND_SOC_DAILINK_DEF(dummy,
337 DAILINK_COMP_ARRAY(COMP_DUMMY()));
338
339SND_SOC_DAILINK_DEF(media,
340 DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai")));
341
342SND_SOC_DAILINK_DEF(deepbuffer,
343 DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai")));
344
345SND_SOC_DAILINK_DEF(ssp2_port,
346 DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port")));
347SND_SOC_DAILINK_DEF(ssp2_codec,
348 DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5670:00",
349 "rt5670-aif1")));
350
351SND_SOC_DAILINK_DEF(platform,
352 DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform")));
353
354static struct snd_soc_dai_link cht_dailink[] = {
355 /* Front End DAI links */
356 [MERR_DPCM_AUDIO] = {
357 .name = "Audio Port",
358 .stream_name = "Audio",
359 .nonatomic = true,
360 .dynamic = 1,
361 .ops = &cht_aif1_ops,
362 SND_SOC_DAILINK_REG(media, dummy, platform),
363 },
364 [MERR_DPCM_DEEP_BUFFER] = {
365 .name = "Deep-Buffer Audio Port",
366 .stream_name = "Deep-Buffer Audio",
367 .nonatomic = true,
368 .dynamic = 1,
369 .playback_only = 1,
370 .ops = &cht_aif1_ops,
371 SND_SOC_DAILINK_REG(deepbuffer, dummy, platform),
372 },
373
374 /* Back End DAI links */
375 {
376 /* SSP2 - Codec */
377 .name = "SSP2-Codec",
378 .id = 0,
379 .no_pcm = 1,
380 .init = cht_codec_init,
381 .be_hw_params_fixup = cht_codec_fixup,
382 .ops = &cht_be_ssp2_ops,
383 SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform),
384 },
385};
386
387static int cht_suspend_pre(struct snd_soc_card *card)
388{
389 struct snd_soc_component *component;
390 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
391
392 for_each_card_components(card, component) {
393 if (!strncmp(component->name,
394 ctx->codec_name, sizeof(ctx->codec_name))) {
395
396 dev_dbg(component->dev, "disabling jack detect before going to suspend.\n");
397 rt5670_jack_suspend(component);
398 break;
399 }
400 }
401 return 0;
402}
403
404static int cht_resume_post(struct snd_soc_card *card)
405{
406 struct snd_soc_component *component;
407 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
408
409 for_each_card_components(card, component) {
410 if (!strncmp(component->name,
411 ctx->codec_name, sizeof(ctx->codec_name))) {
412
413 dev_dbg(component->dev, "enabling jack detect for resume.\n");
414 rt5670_jack_resume(component);
415 break;
416 }
417 }
418
419 return 0;
420}
421
422/* use space before codec name to simplify card ID, and simplify driver name */
423#define SOF_CARD_NAME "bytcht rt5672" /* card name will be 'sof-bytcht rt5672' */
424#define SOF_DRIVER_NAME "SOF"
425
426#define CARD_NAME "cht-bsw-rt5672"
427#define DRIVER_NAME NULL /* card name will be used for driver name */
428
429/* SoC card */
430static struct snd_soc_card snd_soc_card_cht = {
431 .owner = THIS_MODULE,
432 .dai_link = cht_dailink,
433 .num_links = ARRAY_SIZE(cht_dailink),
434 .dapm_widgets = cht_dapm_widgets,
435 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
436 .dapm_routes = cht_audio_map,
437 .num_dapm_routes = ARRAY_SIZE(cht_audio_map),
438 .controls = cht_mc_controls,
439 .num_controls = ARRAY_SIZE(cht_mc_controls),
440 .suspend_pre = cht_suspend_pre,
441 .resume_post = cht_resume_post,
442};
443
444#define RT5672_I2C_DEFAULT "i2c-10EC5670:00"
445
446static int snd_cht_mc_probe(struct platform_device *pdev)
447{
448 int ret_val = 0;
449 struct cht_mc_private *drv;
450 struct snd_soc_acpi_mach *mach = pdev->dev.platform_data;
451 const char *platform_name;
452 struct acpi_device *adev;
453 bool sof_parent;
454 int dai_index = 0;
455 int i;
456
457 drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
458 if (!drv)
459 return -ENOMEM;
460
461 strcpy(drv->codec_name, RT5672_I2C_DEFAULT);
462
463 /* find index of codec dai */
464 for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) {
465 if (cht_dailink[i].num_codecs &&
466 !strcmp(cht_dailink[i].codecs->name, RT5672_I2C_DEFAULT)) {
467 dai_index = i;
468 break;
469 }
470 }
471
472 /* fixup codec name based on HID */
473 adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1);
474 if (adev) {
475 snprintf(drv->codec_name, sizeof(drv->codec_name),
476 "i2c-%s", acpi_dev_name(adev));
477 cht_dailink[dai_index].codecs->name = drv->codec_name;
478 } else {
479 dev_err(&pdev->dev, "Error cannot find '%s' dev\n", mach->id);
480 return -ENOENT;
481 }
482
483 acpi_dev_put(adev);
484
485 /* Use SSP0 on Bay Trail CR devices */
486 if (soc_intel_is_byt() && mach->mach_params.acpi_ipc_irq_index == 0) {
487 cht_dailink[dai_index].cpus->dai_name = "ssp0-port";
488 drv->use_ssp0 = true;
489 }
490
491 /* override platform name, if required */
492 snd_soc_card_cht.dev = &pdev->dev;
493 platform_name = mach->mach_params.platform;
494
495 ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht,
496 platform_name);
497 if (ret_val)
498 return ret_val;
499
500 snd_soc_card_cht.components = rt5670_components();
501
502 drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
503 if (IS_ERR(drv->mclk)) {
504 dev_err(&pdev->dev,
505 "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
506 PTR_ERR(drv->mclk));
507 return PTR_ERR(drv->mclk);
508 }
509 snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
510
511 sof_parent = snd_soc_acpi_sof_parent(&pdev->dev);
512
513 /* set card and driver name */
514 if (sof_parent) {
515 snd_soc_card_cht.name = SOF_CARD_NAME;
516 snd_soc_card_cht.driver_name = SOF_DRIVER_NAME;
517 } else {
518 snd_soc_card_cht.name = CARD_NAME;
519 snd_soc_card_cht.driver_name = DRIVER_NAME;
520 }
521
522 /* set pm ops */
523 if (sof_parent)
524 pdev->dev.driver->pm = &snd_soc_pm_ops;
525
526 /* register the soc card */
527 ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
528 if (ret_val) {
529 dev_err(&pdev->dev,
530 "snd_soc_register_card failed %d\n", ret_val);
531 return ret_val;
532 }
533 platform_set_drvdata(pdev, &snd_soc_card_cht);
534 return ret_val;
535}
536
537static struct platform_driver snd_cht_mc_driver = {
538 .driver = {
539 .name = "cht-bsw-rt5672",
540 },
541 .probe = snd_cht_mc_probe,
542};
543
544module_platform_driver(snd_cht_mc_driver);
545
546MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
547MODULE_AUTHOR("Subhransu S. Prusty, Mengdong Lin");
548MODULE_LICENSE("GPL v2");
549MODULE_ALIAS("platform:cht-bsw-rt5672");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * cht_bsw_rt5672.c - ASoc Machine driver for Intel Cherryview-based platforms
4 * Cherrytrail and Braswell, with RT5672 codec.
5 *
6 * Copyright (C) 2014 Intel Corp
7 * Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
8 * Mengdong Lin <mengdong.lin@intel.com>
9 */
10
11#include <linux/gpio/consumer.h>
12#include <linux/input.h>
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/slab.h>
16#include <linux/clk.h>
17#include <sound/pcm.h>
18#include <sound/pcm_params.h>
19#include <sound/soc.h>
20#include <sound/jack.h>
21#include <sound/soc-acpi.h>
22#include "../../codecs/rt5670.h"
23#include "../atom/sst-atom-controls.h"
24
25
26/* The platform clock #3 outputs 19.2Mhz clock to codec as I2S MCLK */
27#define CHT_PLAT_CLK_3_HZ 19200000
28#define CHT_CODEC_DAI "rt5670-aif1"
29
30struct cht_mc_private {
31 struct snd_soc_jack headset;
32 char codec_name[SND_ACPI_I2C_ID_LEN];
33 struct clk *mclk;
34};
35
36/* Headset jack detection DAPM pins */
37static struct snd_soc_jack_pin cht_bsw_headset_pins[] = {
38 {
39 .pin = "Headset Mic",
40 .mask = SND_JACK_MICROPHONE,
41 },
42 {
43 .pin = "Headphone",
44 .mask = SND_JACK_HEADPHONE,
45 },
46};
47
48static int platform_clock_control(struct snd_soc_dapm_widget *w,
49 struct snd_kcontrol *k, int event)
50{
51 struct snd_soc_dapm_context *dapm = w->dapm;
52 struct snd_soc_card *card = dapm->card;
53 struct snd_soc_dai *codec_dai;
54 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
55 int ret;
56
57 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
58 if (!codec_dai) {
59 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
60 return -EIO;
61 }
62
63 if (SND_SOC_DAPM_EVENT_ON(event)) {
64 if (ctx->mclk) {
65 ret = clk_prepare_enable(ctx->mclk);
66 if (ret < 0) {
67 dev_err(card->dev,
68 "could not configure MCLK state");
69 return ret;
70 }
71 }
72
73 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
74 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
75 CHT_PLAT_CLK_3_HZ, 48000 * 512);
76 if (ret < 0) {
77 dev_err(card->dev, "can't set codec pll: %d\n", ret);
78 return ret;
79 }
80
81 /* set codec sysclk source to PLL */
82 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
83 48000 * 512, SND_SOC_CLOCK_IN);
84 if (ret < 0) {
85 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
86 return ret;
87 }
88 } else {
89 /* Set codec sysclk source to its internal clock because codec
90 * PLL will be off when idle and MCLK will also be off by ACPI
91 * when codec is runtime suspended. Codec needs clock for jack
92 * detection and button press.
93 */
94 snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_RCCLK,
95 48000 * 512, SND_SOC_CLOCK_IN);
96
97 if (ctx->mclk)
98 clk_disable_unprepare(ctx->mclk);
99 }
100 return 0;
101}
102
103static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
104 SND_SOC_DAPM_HP("Headphone", NULL),
105 SND_SOC_DAPM_MIC("Headset Mic", NULL),
106 SND_SOC_DAPM_MIC("Int Mic", NULL),
107 SND_SOC_DAPM_SPK("Ext Spk", NULL),
108 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
109 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
110 SND_SOC_DAPM_POST_PMD),
111};
112
113static const struct snd_soc_dapm_route cht_audio_map[] = {
114 {"IN1P", NULL, "Headset Mic"},
115 {"IN1N", NULL, "Headset Mic"},
116 {"DMIC L1", NULL, "Int Mic"},
117 {"DMIC R1", NULL, "Int Mic"},
118 {"Headphone", NULL, "HPOL"},
119 {"Headphone", NULL, "HPOR"},
120 {"Ext Spk", NULL, "SPOLP"},
121 {"Ext Spk", NULL, "SPOLN"},
122 {"Ext Spk", NULL, "SPORP"},
123 {"Ext Spk", NULL, "SPORN"},
124 {"AIF1 Playback", NULL, "ssp2 Tx"},
125 {"ssp2 Tx", NULL, "codec_out0"},
126 {"ssp2 Tx", NULL, "codec_out1"},
127 {"codec_in0", NULL, "ssp2 Rx"},
128 {"codec_in1", NULL, "ssp2 Rx"},
129 {"ssp2 Rx", NULL, "AIF1 Capture"},
130 {"Headphone", NULL, "Platform Clock"},
131 {"Headset Mic", NULL, "Platform Clock"},
132 {"Int Mic", NULL, "Platform Clock"},
133 {"Ext Spk", NULL, "Platform Clock"},
134};
135
136static const struct snd_kcontrol_new cht_mc_controls[] = {
137 SOC_DAPM_PIN_SWITCH("Headphone"),
138 SOC_DAPM_PIN_SWITCH("Headset Mic"),
139 SOC_DAPM_PIN_SWITCH("Int Mic"),
140 SOC_DAPM_PIN_SWITCH("Ext Spk"),
141};
142
143static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
144 struct snd_pcm_hw_params *params)
145{
146 struct snd_soc_pcm_runtime *rtd = substream->private_data;
147 struct snd_soc_dai *codec_dai = rtd->codec_dai;
148 int ret;
149
150 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
151 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
152 CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
153 if (ret < 0) {
154 dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
155 return ret;
156 }
157
158 /* set codec sysclk source to PLL */
159 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
160 params_rate(params) * 512,
161 SND_SOC_CLOCK_IN);
162 if (ret < 0) {
163 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
164 return ret;
165 }
166 return 0;
167}
168
169static const struct acpi_gpio_params headset_gpios = { 0, 0, false };
170
171static const struct acpi_gpio_mapping cht_rt5672_gpios[] = {
172 { "headset-gpios", &headset_gpios, 1 },
173 {},
174};
175
176static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
177{
178 int ret;
179 struct snd_soc_dai *codec_dai = runtime->codec_dai;
180 struct snd_soc_component *component = codec_dai->component;
181 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
182
183 if (devm_acpi_dev_add_driver_gpios(component->dev, cht_rt5672_gpios))
184 dev_warn(runtime->dev, "Unable to add GPIO mapping table\n");
185
186 /* Select codec ASRC clock source to track I2S1 clock, because codec
187 * is in slave mode and 100fs I2S format (BCLK = 100 * LRCLK) cannot
188 * be supported by RT5672. Otherwise, ASRC will be disabled and cause
189 * noise.
190 */
191 rt5670_sel_asrc_clk_src(component,
192 RT5670_DA_STEREO_FILTER
193 | RT5670_DA_MONO_L_FILTER
194 | RT5670_DA_MONO_R_FILTER
195 | RT5670_AD_STEREO_FILTER
196 | RT5670_AD_MONO_L_FILTER
197 | RT5670_AD_MONO_R_FILTER,
198 RT5670_CLK_SEL_I2S1_ASRC);
199
200 ret = snd_soc_card_jack_new(runtime->card, "Headset",
201 SND_JACK_HEADSET | SND_JACK_BTN_0 |
202 SND_JACK_BTN_1 | SND_JACK_BTN_2,
203 &ctx->headset,
204 cht_bsw_headset_pins,
205 ARRAY_SIZE(cht_bsw_headset_pins));
206 if (ret)
207 return ret;
208
209 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
210 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
211 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
212
213 rt5670_set_jack_detect(component, &ctx->headset);
214 if (ctx->mclk) {
215 /*
216 * The firmware might enable the clock at
217 * boot (this information may or may not
218 * be reflected in the enable clock register).
219 * To change the rate we must disable the clock
220 * first to cover these cases. Due to common
221 * clock framework restrictions that do not allow
222 * to disable a clock that has not been enabled,
223 * we need to enable the clock first.
224 */
225 ret = clk_prepare_enable(ctx->mclk);
226 if (!ret)
227 clk_disable_unprepare(ctx->mclk);
228
229 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
230
231 if (ret) {
232 dev_err(runtime->dev, "unable to set MCLK rate\n");
233 return ret;
234 }
235 }
236 return 0;
237}
238
239static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
240 struct snd_pcm_hw_params *params)
241{
242 struct snd_interval *rate = hw_param_interval(params,
243 SNDRV_PCM_HW_PARAM_RATE);
244 struct snd_interval *channels = hw_param_interval(params,
245 SNDRV_PCM_HW_PARAM_CHANNELS);
246 int ret;
247
248 /* The DSP will covert the FE rate to 48k, stereo, 24bits */
249 rate->min = rate->max = 48000;
250 channels->min = channels->max = 2;
251
252 /* set SSP2 to 24-bit */
253 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
254
255 /*
256 * Default mode for SSP configuration is TDM 4 slot
257 */
258 ret = snd_soc_dai_set_fmt(rtd->codec_dai,
259 SND_SOC_DAIFMT_DSP_B |
260 SND_SOC_DAIFMT_IB_NF |
261 SND_SOC_DAIFMT_CBS_CFS);
262 if (ret < 0) {
263 dev_err(rtd->dev, "can't set format to TDM %d\n", ret);
264 return ret;
265 }
266
267 /* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */
268 ret = snd_soc_dai_set_tdm_slot(rtd->codec_dai, 0xF, 0xF, 4, 24);
269 if (ret < 0) {
270 dev_err(rtd->dev, "can't set codec TDM slot %d\n", ret);
271 return ret;
272 }
273
274 return 0;
275}
276
277static int cht_aif1_startup(struct snd_pcm_substream *substream)
278{
279 return snd_pcm_hw_constraint_single(substream->runtime,
280 SNDRV_PCM_HW_PARAM_RATE, 48000);
281}
282
283static const struct snd_soc_ops cht_aif1_ops = {
284 .startup = cht_aif1_startup,
285};
286
287static const struct snd_soc_ops cht_be_ssp2_ops = {
288 .hw_params = cht_aif1_hw_params,
289};
290
291SND_SOC_DAILINK_DEF(dummy,
292 DAILINK_COMP_ARRAY(COMP_DUMMY()));
293
294SND_SOC_DAILINK_DEF(media,
295 DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai")));
296
297SND_SOC_DAILINK_DEF(deepbuffer,
298 DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai")));
299
300SND_SOC_DAILINK_DEF(ssp2_port,
301 DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port")));
302SND_SOC_DAILINK_DEF(ssp2_codec,
303 DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5670:00",
304 "rt5670-aif1")));
305
306SND_SOC_DAILINK_DEF(platform,
307 DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform")));
308
309static struct snd_soc_dai_link cht_dailink[] = {
310 /* Front End DAI links */
311 [MERR_DPCM_AUDIO] = {
312 .name = "Audio Port",
313 .stream_name = "Audio",
314 .nonatomic = true,
315 .dynamic = 1,
316 .dpcm_playback = 1,
317 .dpcm_capture = 1,
318 .ops = &cht_aif1_ops,
319 SND_SOC_DAILINK_REG(media, dummy, platform),
320 },
321 [MERR_DPCM_DEEP_BUFFER] = {
322 .name = "Deep-Buffer Audio Port",
323 .stream_name = "Deep-Buffer Audio",
324 .nonatomic = true,
325 .dynamic = 1,
326 .dpcm_playback = 1,
327 .ops = &cht_aif1_ops,
328 SND_SOC_DAILINK_REG(deepbuffer, dummy, platform),
329 },
330
331 /* Back End DAI links */
332 {
333 /* SSP2 - Codec */
334 .name = "SSP2-Codec",
335 .id = 0,
336 .no_pcm = 1,
337 .nonatomic = true,
338 .init = cht_codec_init,
339 .be_hw_params_fixup = cht_codec_fixup,
340 .dpcm_playback = 1,
341 .dpcm_capture = 1,
342 .ops = &cht_be_ssp2_ops,
343 SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform),
344 },
345};
346
347static int cht_suspend_pre(struct snd_soc_card *card)
348{
349 struct snd_soc_component *component;
350 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
351
352 for_each_card_components(card, component) {
353 if (!strncmp(component->name,
354 ctx->codec_name, sizeof(ctx->codec_name))) {
355
356 dev_dbg(component->dev, "disabling jack detect before going to suspend.\n");
357 rt5670_jack_suspend(component);
358 break;
359 }
360 }
361 return 0;
362}
363
364static int cht_resume_post(struct snd_soc_card *card)
365{
366 struct snd_soc_component *component;
367 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
368
369 for_each_card_components(card, component) {
370 if (!strncmp(component->name,
371 ctx->codec_name, sizeof(ctx->codec_name))) {
372
373 dev_dbg(component->dev, "enabling jack detect for resume.\n");
374 rt5670_jack_resume(component);
375 break;
376 }
377 }
378
379 return 0;
380}
381
382/* SoC card */
383static struct snd_soc_card snd_soc_card_cht = {
384 .name = "cht-bsw-rt5672",
385 .owner = THIS_MODULE,
386 .dai_link = cht_dailink,
387 .num_links = ARRAY_SIZE(cht_dailink),
388 .dapm_widgets = cht_dapm_widgets,
389 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
390 .dapm_routes = cht_audio_map,
391 .num_dapm_routes = ARRAY_SIZE(cht_audio_map),
392 .controls = cht_mc_controls,
393 .num_controls = ARRAY_SIZE(cht_mc_controls),
394 .suspend_pre = cht_suspend_pre,
395 .resume_post = cht_resume_post,
396};
397
398#define RT5672_I2C_DEFAULT "i2c-10EC5670:00"
399
400static int snd_cht_mc_probe(struct platform_device *pdev)
401{
402 int ret_val = 0;
403 struct cht_mc_private *drv;
404 struct snd_soc_acpi_mach *mach = pdev->dev.platform_data;
405 const char *platform_name;
406 struct acpi_device *adev;
407 int i;
408
409 drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
410 if (!drv)
411 return -ENOMEM;
412
413 strcpy(drv->codec_name, RT5672_I2C_DEFAULT);
414
415 /* fixup codec name based on HID */
416 adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1);
417 if (adev) {
418 snprintf(drv->codec_name, sizeof(drv->codec_name),
419 "i2c-%s", acpi_dev_name(adev));
420 put_device(&adev->dev);
421 for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) {
422 if (!strcmp(cht_dailink[i].codecs->name,
423 RT5672_I2C_DEFAULT)) {
424 cht_dailink[i].codecs->name = drv->codec_name;
425 break;
426 }
427 }
428 }
429
430 /* override plaform name, if required */
431 snd_soc_card_cht.dev = &pdev->dev;
432 platform_name = mach->mach_params.platform;
433
434 ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht,
435 platform_name);
436 if (ret_val)
437 return ret_val;
438
439 drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
440 if (IS_ERR(drv->mclk)) {
441 dev_err(&pdev->dev,
442 "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
443 PTR_ERR(drv->mclk));
444 return PTR_ERR(drv->mclk);
445 }
446 snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
447
448 /* register the soc card */
449 ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
450 if (ret_val) {
451 dev_err(&pdev->dev,
452 "snd_soc_register_card failed %d\n", ret_val);
453 return ret_val;
454 }
455 platform_set_drvdata(pdev, &snd_soc_card_cht);
456 return ret_val;
457}
458
459static struct platform_driver snd_cht_mc_driver = {
460 .driver = {
461 .name = "cht-bsw-rt5672",
462 },
463 .probe = snd_cht_mc_probe,
464};
465
466module_platform_driver(snd_cht_mc_driver);
467
468MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
469MODULE_AUTHOR("Subhransu S. Prusty, Mengdong Lin");
470MODULE_LICENSE("GPL v2");
471MODULE_ALIAS("platform:cht-bsw-rt5672");