Loading...
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright IBM Corp. 2007
4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
5 * Frank Pavlic <fpavlic@de.ibm.com>,
6 * Thomas Spatzier <tspat@de.ibm.com>,
7 * Frank Blaschka <frank.blaschka@de.ibm.com>
8 */
9
10#ifndef __QETH_CORE_H__
11#define __QETH_CORE_H__
12
13#include <linux/completion.h>
14#include <linux/debugfs.h>
15#include <linux/if.h>
16#include <linux/if_arp.h>
17#include <linux/etherdevice.h>
18#include <linux/if_vlan.h>
19#include <linux/ctype.h>
20#include <linux/in6.h>
21#include <linux/bitops.h>
22#include <linux/seq_file.h>
23#include <linux/hashtable.h>
24#include <linux/ip.h>
25#include <linux/rcupdate.h>
26#include <linux/refcount.h>
27#include <linux/timer.h>
28#include <linux/types.h>
29#include <linux/wait.h>
30#include <linux/workqueue.h>
31
32#include <net/dst.h>
33#include <net/ip6_fib.h>
34#include <net/ipv6.h>
35#include <net/if_inet6.h>
36#include <net/addrconf.h>
37#include <net/route.h>
38#include <net/sch_generic.h>
39#include <net/tcp.h>
40
41#include <asm/debug.h>
42#include <asm/qdio.h>
43#include <asm/ccwdev.h>
44#include <asm/ccwgroup.h>
45#include <asm/sysinfo.h>
46
47#include <uapi/linux/if_link.h>
48
49#include "qeth_core_mpc.h"
50
51/**
52 * Debug Facility stuff
53 */
54enum qeth_dbf_names {
55 QETH_DBF_SETUP,
56 QETH_DBF_MSG,
57 QETH_DBF_CTRL,
58 QETH_DBF_INFOS /* must be last element */
59};
60
61struct qeth_dbf_info {
62 char name[DEBUG_MAX_NAME_LEN];
63 int pages;
64 int areas;
65 int len;
66 int level;
67 struct debug_view *view;
68 debug_info_t *id;
69};
70
71#define QETH_DBF_CTRL_LEN 256U
72
73#define QETH_DBF_TEXT(name, level, text) \
74 debug_text_event(qeth_dbf[QETH_DBF_##name].id, level, text)
75
76#define QETH_DBF_HEX(name, level, addr, len) \
77 debug_event(qeth_dbf[QETH_DBF_##name].id, level, (void *)(addr), len)
78
79#define QETH_DBF_MESSAGE(level, text...) \
80 debug_sprintf_event(qeth_dbf[QETH_DBF_MSG].id, level, text)
81
82#define QETH_DBF_TEXT_(name, level, text...) \
83 qeth_dbf_longtext(qeth_dbf[QETH_DBF_##name].id, level, text)
84
85#define QETH_CARD_TEXT(card, level, text) \
86 debug_text_event(card->debug, level, text)
87
88#define QETH_CARD_HEX(card, level, addr, len) \
89 debug_event(card->debug, level, (void *)(addr), len)
90
91#define QETH_CARD_MESSAGE(card, text...) \
92 debug_sprintf_event(card->debug, level, text)
93
94#define QETH_CARD_TEXT_(card, level, text...) \
95 qeth_dbf_longtext(card->debug, level, text)
96
97#define SENSE_COMMAND_REJECT_BYTE 0
98#define SENSE_COMMAND_REJECT_FLAG 0x80
99#define SENSE_RESETTING_EVENT_BYTE 1
100#define SENSE_RESETTING_EVENT_FLAG 0x80
101
102static inline u32 qeth_get_device_id(struct ccw_device *cdev)
103{
104 struct ccw_dev_id dev_id;
105 u32 id;
106
107 ccw_device_get_id(cdev, &dev_id);
108 id = dev_id.devno;
109 id |= (u32) (dev_id.ssid << 16);
110
111 return id;
112}
113
114/*
115 * Common IO related definitions
116 */
117#define CARD_RDEV(card) card->read.ccwdev
118#define CARD_WDEV(card) card->write.ccwdev
119#define CARD_DDEV(card) card->data.ccwdev
120#define CARD_BUS_ID(card) dev_name(&card->gdev->dev)
121#define CARD_RDEV_ID(card) dev_name(&card->read.ccwdev->dev)
122#define CARD_WDEV_ID(card) dev_name(&card->write.ccwdev->dev)
123#define CARD_DDEV_ID(card) dev_name(&card->data.ccwdev->dev)
124#define CCW_DEVID(cdev) (qeth_get_device_id(cdev))
125#define CARD_DEVID(card) (CCW_DEVID(CARD_RDEV(card)))
126
127/* Routing stuff */
128struct qeth_routing_info {
129 enum qeth_routing_types type;
130};
131
132/* SETBRIDGEPORT stuff */
133enum qeth_sbp_roles {
134 QETH_SBP_ROLE_NONE = 0,
135 QETH_SBP_ROLE_PRIMARY = 1,
136 QETH_SBP_ROLE_SECONDARY = 2,
137};
138
139enum qeth_sbp_states {
140 QETH_SBP_STATE_INACTIVE = 0,
141 QETH_SBP_STATE_STANDBY = 1,
142 QETH_SBP_STATE_ACTIVE = 2,
143};
144
145#define QETH_SBP_HOST_NOTIFICATION 1
146
147struct qeth_sbp_info {
148 __u32 supported_funcs;
149 enum qeth_sbp_roles role;
150 __u32 hostnotification:1;
151 __u32 reflect_promisc:1;
152 __u32 reflect_promisc_primary:1;
153};
154
155struct qeth_vnicc_info {
156 /* supported/currently configured VNICCs; updated in IPA exchanges */
157 u32 sup_chars;
158 u32 cur_chars;
159 /* supported commands: bitmasks which VNICCs support respective cmd */
160 u32 set_char_sup;
161 u32 getset_timeout_sup;
162 /* timeout value for the learning characteristic */
163 u32 learning_timeout;
164 /* characteristics wanted/configured by user */
165 u32 wanted_chars;
166 /* has user explicitly enabled rx_bcast while online? */
167 bool rx_bcast_enabled;
168};
169
170#define QETH_IDX_FUNC_LEVEL_OSD 0x0101
171#define QETH_IDX_FUNC_LEVEL_IQD 0x4108
172
173#define QETH_BUFSIZE 4096
174#define CCW_CMD_WRITE 0x01
175#define CCW_CMD_READ 0x02
176
177/**
178 * some more defs
179 */
180#define QETH_TX_TIMEOUT (100 * HZ)
181#define QETH_RCD_TIMEOUT (60 * HZ)
182#define QETH_RECLAIM_WORK_TIME HZ
183#define QETH_MAX_PORTNO 15
184
185/*****************************************************************************/
186/* QDIO queue and buffer handling */
187/*****************************************************************************/
188#define QETH_MAX_OUT_QUEUES 4
189#define QETH_IQD_MIN_TXQ 2 /* One for ucast, one for mcast. */
190#define QETH_IQD_MCAST_TXQ 0
191#define QETH_IQD_MIN_UCAST_TXQ 1
192
193#define QETH_MAX_IN_QUEUES 2
194#define QETH_RX_COPYBREAK (PAGE_SIZE >> 1)
195#define QETH_IN_BUF_SIZE_DEFAULT 65536
196#define QETH_IN_BUF_COUNT_DEFAULT 64
197#define QETH_IN_BUF_COUNT_HSDEFAULT 128
198#define QETH_IN_BUF_COUNT_MIN 8U
199#define QETH_IN_BUF_COUNT_MAX 128U
200#define QETH_MAX_BUFFER_ELEMENTS(card) ((card)->qdio.in_buf_size >> 12)
201#define QETH_IN_BUF_REQUEUE_THRESHOLD(card) \
202 ((card)->qdio.in_buf_pool.buf_count / 2)
203
204/* buffers we have to be behind before we get a PCI */
205#define QETH_PCI_THRESHOLD_A(card) ((card)->qdio.in_buf_pool.buf_count+1)
206/*enqueued free buffers left before we get a PCI*/
207#define QETH_PCI_THRESHOLD_B(card) 0
208/*not used unless the microcode gets patched*/
209#define QETH_PCI_TIMER_VALUE(card) 3
210
211/* priority queing */
212#define QETH_PRIOQ_DEFAULT QETH_NO_PRIO_QUEUEING
213#define QETH_DEFAULT_QUEUE 2
214#define QETH_NO_PRIO_QUEUEING 0
215#define QETH_PRIO_Q_ING_PREC 1
216#define QETH_PRIO_Q_ING_TOS 2
217#define QETH_PRIO_Q_ING_SKB 3
218#define QETH_PRIO_Q_ING_VLAN 4
219#define QETH_PRIO_Q_ING_FIXED 5
220
221/* Packing */
222#define QETH_LOW_WATERMARK_PACK 2
223#define QETH_HIGH_WATERMARK_PACK 5
224#define QETH_WATERMARK_PACK_FUZZ 1
225
226struct qeth_hdr_layer3 {
227 __u8 id;
228 __u8 flags;
229 __u16 inbound_checksum; /*TSO:__u16 seqno */
230 __u32 token; /*TSO: __u32 reserved */
231 __u16 length;
232 __u8 vlan_prio;
233 __u8 ext_flags;
234 __u16 vlan_id;
235 __u16 frame_offset;
236 union {
237 /* TX: */
238 struct in6_addr addr;
239 /* RX: */
240 struct rx {
241 u8 res1[2];
242 u8 src_mac[6];
243 u8 res2[4];
244 u16 vlan_id;
245 u8 res3[2];
246 } rx;
247 } next_hop;
248};
249
250struct qeth_hdr_layer2 {
251 __u8 id;
252 __u8 flags[3];
253 __u8 port_no;
254 __u8 hdr_length;
255 __u16 pkt_length;
256 __u16 seq_no;
257 __u16 vlan_id;
258 __u32 reserved;
259 __u8 reserved2[16];
260} __attribute__ ((packed));
261
262struct qeth_hdr {
263 union {
264 struct qeth_hdr_layer2 l2;
265 struct qeth_hdr_layer3 l3;
266 } hdr;
267} __attribute__ ((packed));
268
269#define QETH_QIB_PQUE_ORDER_RR 0
270#define QETH_QIB_PQUE_UNITS_SBAL 2
271#define QETH_QIB_PQUE_PRIO_DEFAULT 4
272
273struct qeth_qib_parms {
274 char pcit_magic[4];
275 u32 pcit_a;
276 u32 pcit_b;
277 u32 pcit_c;
278 char blkt_magic[4];
279 u32 blkt_total;
280 u32 blkt_inter_packet;
281 u32 blkt_inter_packet_jumbo;
282 char pque_magic[4];
283 u8 pque_order;
284 u8 pque_units;
285 u16 reserved;
286 u32 pque_priority[4];
287};
288
289/*TCP Segmentation Offload header*/
290struct qeth_hdr_ext_tso {
291 __u16 hdr_tot_len;
292 __u8 imb_hdr_no;
293 __u8 reserved;
294 __u8 hdr_type;
295 __u8 hdr_version;
296 __u16 hdr_len;
297 __u32 payload_len;
298 __u16 mss;
299 __u16 dg_hdr_len;
300 __u8 padding[16];
301} __attribute__ ((packed));
302
303struct qeth_hdr_tso {
304 struct qeth_hdr hdr; /*hdr->hdr.l3.xxx*/
305 struct qeth_hdr_ext_tso ext;
306} __attribute__ ((packed));
307
308
309/* flags for qeth_hdr.flags */
310#define QETH_HDR_PASSTHRU 0x10
311#define QETH_HDR_IPV6 0x80
312#define QETH_HDR_CAST_MASK 0x07
313enum qeth_cast_flags {
314 QETH_CAST_UNICAST = 0x06,
315 QETH_CAST_MULTICAST = 0x04,
316 QETH_CAST_BROADCAST = 0x05,
317 QETH_CAST_ANYCAST = 0x07,
318 QETH_CAST_NOCAST = 0x00,
319};
320
321enum qeth_layer2_frame_flags {
322 QETH_LAYER2_FLAG_MULTICAST = 0x01,
323 QETH_LAYER2_FLAG_BROADCAST = 0x02,
324 QETH_LAYER2_FLAG_UNICAST = 0x04,
325 QETH_LAYER2_FLAG_VLAN = 0x10,
326};
327
328enum qeth_header_ids {
329 QETH_HEADER_TYPE_LAYER3 = 0x01,
330 QETH_HEADER_TYPE_LAYER2 = 0x02,
331 QETH_HEADER_TYPE_L3_TSO = 0x03,
332 QETH_HEADER_TYPE_L2_TSO = 0x06,
333 QETH_HEADER_MASK_INVAL = 0x80,
334};
335/* flags for qeth_hdr.ext_flags */
336#define QETH_HDR_EXT_VLAN_FRAME 0x01
337#define QETH_HDR_EXT_TOKEN_ID 0x02
338#define QETH_HDR_EXT_INCLUDE_VLAN_TAG 0x04
339#define QETH_HDR_EXT_SRC_MAC_ADDR 0x08
340#define QETH_HDR_EXT_CSUM_HDR_REQ 0x10
341#define QETH_HDR_EXT_CSUM_TRANSP_REQ 0x20
342#define QETH_HDR_EXT_UDP 0x40 /*bit off for TCP*/
343
344static inline bool qeth_l2_same_vlan(struct qeth_hdr_layer2 *h1,
345 struct qeth_hdr_layer2 *h2)
346{
347 return !((h1->flags[2] ^ h2->flags[2]) & QETH_LAYER2_FLAG_VLAN) &&
348 h1->vlan_id == h2->vlan_id;
349}
350
351static inline bool qeth_l3_iqd_same_vlan(struct qeth_hdr_layer3 *h1,
352 struct qeth_hdr_layer3 *h2)
353{
354 return !((h1->ext_flags ^ h2->ext_flags) & QETH_HDR_EXT_VLAN_FRAME) &&
355 h1->vlan_id == h2->vlan_id;
356}
357
358static inline bool qeth_l3_same_next_hop(struct qeth_hdr_layer3 *h1,
359 struct qeth_hdr_layer3 *h2)
360{
361 return !((h1->flags ^ h2->flags) & QETH_HDR_IPV6) &&
362 ipv6_addr_equal(&h1->next_hop.addr, &h2->next_hop.addr);
363}
364
365struct qeth_local_addr {
366 struct hlist_node hnode;
367 struct rcu_head rcu;
368 struct in6_addr addr;
369};
370
371enum qeth_qdio_info_states {
372 QETH_QDIO_UNINITIALIZED,
373 QETH_QDIO_ALLOCATED,
374 QETH_QDIO_ESTABLISHED,
375 QETH_QDIO_CLEANING
376};
377
378struct qeth_buffer_pool_entry {
379 struct list_head list;
380 struct list_head init_list;
381 struct page *elements[QDIO_MAX_ELEMENTS_PER_BUFFER];
382};
383
384struct qeth_qdio_buffer_pool {
385 struct list_head entry_list;
386 int buf_count;
387};
388
389struct qeth_qdio_buffer {
390 struct qdio_buffer *buffer;
391 /* the buffer pool entry currently associated to this buffer */
392 struct qeth_buffer_pool_entry *pool_entry;
393 struct sk_buff *rx_skb;
394};
395
396struct qeth_qdio_q {
397 struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q];
398 struct qeth_qdio_buffer bufs[QDIO_MAX_BUFFERS_PER_Q];
399 int next_buf_to_init;
400};
401
402enum qeth_qdio_out_buffer_state {
403 /* Owned by driver, in order to be filled. */
404 QETH_QDIO_BUF_EMPTY,
405 /* Filled by driver; owned by hardware in order to be sent. */
406 QETH_QDIO_BUF_PRIMED,
407};
408
409enum qeth_qaob_state {
410 QETH_QAOB_ISSUED,
411 QETH_QAOB_PENDING,
412 QETH_QAOB_DONE,
413};
414
415struct qeth_qaob_priv1 {
416 unsigned int state;
417 u8 queue_no;
418};
419
420struct qeth_qdio_out_buffer {
421 struct qdio_buffer *buffer;
422 atomic_t state;
423 int next_element_to_fill;
424 unsigned int frames;
425 unsigned int bytes;
426 struct sk_buff_head skb_list;
427 DECLARE_BITMAP(from_kmem_cache, QDIO_MAX_ELEMENTS_PER_BUFFER);
428
429 struct list_head list_entry;
430 struct qaob *aob;
431};
432
433struct qeth_card;
434
435#define QETH_CARD_STAT_ADD(_c, _stat, _val) ((_c)->stats._stat += (_val))
436#define QETH_CARD_STAT_INC(_c, _stat) QETH_CARD_STAT_ADD(_c, _stat, 1)
437
438#define QETH_TXQ_STAT_ADD(_q, _stat, _val) ((_q)->stats._stat += (_val))
439#define QETH_TXQ_STAT_INC(_q, _stat) QETH_TXQ_STAT_ADD(_q, _stat, 1)
440
441struct qeth_card_stats {
442 u64 rx_bufs;
443 u64 rx_skb_csum;
444 u64 rx_sg_skbs;
445 u64 rx_sg_frags;
446 u64 rx_sg_alloc_page;
447
448 u64 rx_dropped_nomem;
449 u64 rx_dropped_notsupp;
450 u64 rx_dropped_runt;
451
452 /* rtnl_link_stats64 */
453 u64 rx_packets;
454 u64 rx_bytes;
455 u64 rx_multicast;
456 u64 rx_length_errors;
457 u64 rx_frame_errors;
458 u64 rx_fifo_errors;
459};
460
461struct qeth_out_q_stats {
462 u64 bufs;
463 u64 bufs_pack;
464 u64 buf_elements;
465 u64 skbs_pack;
466 u64 skbs_sg;
467 u64 skbs_csum;
468 u64 skbs_tso;
469 u64 skbs_linearized;
470 u64 skbs_linearized_fail;
471 u64 tso_bytes;
472 u64 packing_mode_switch;
473 u64 stopped;
474 u64 doorbell;
475 u64 coal_frames;
476 u64 completion_irq;
477 u64 completion_yield;
478 u64 completion_timer;
479
480 /* rtnl_link_stats64 */
481 u64 tx_packets;
482 u64 tx_bytes;
483 u64 tx_errors;
484 u64 tx_dropped;
485};
486
487#define QETH_TX_MAX_COALESCED_FRAMES 1
488#define QETH_TX_COALESCE_USECS 25
489#define QETH_TX_TIMER_USECS 500
490
491struct qeth_qdio_out_q {
492 struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q];
493 struct qeth_qdio_out_buffer *bufs[QDIO_MAX_BUFFERS_PER_Q];
494 struct list_head pending_bufs;
495 struct qeth_out_q_stats stats;
496 spinlock_t lock;
497 unsigned int priority;
498 u8 next_buf_to_fill;
499 u8 max_elements;
500 u8 queue_no;
501 u8 do_pack;
502 struct qeth_card *card;
503 /*
504 * number of buffers that are currently filled (PRIMED)
505 * -> these buffers are hardware-owned
506 */
507 atomic_t used_buffers;
508 /* indicates whether PCI flag must be set (or if one is outstanding) */
509 atomic_t set_pci_flags_count;
510 struct napi_struct napi;
511 struct timer_list timer;
512 struct qeth_hdr *prev_hdr;
513 unsigned int coalesced_frames;
514 u8 bulk_start;
515 u8 bulk_count;
516 u8 bulk_max;
517
518 unsigned int coalesce_usecs;
519 unsigned int max_coalesced_frames;
520 unsigned int rescan_usecs;
521};
522
523#define qeth_for_each_output_queue(card, q, i) \
524 for (i = 0; i < card->qdio.no_out_queues && \
525 (q = card->qdio.out_qs[i]); i++)
526
527#define qeth_napi_to_out_queue(n) container_of(n, struct qeth_qdio_out_q, napi)
528
529static inline void qeth_tx_arm_timer(struct qeth_qdio_out_q *queue,
530 unsigned long usecs)
531{
532 timer_reduce(&queue->timer, usecs_to_jiffies(usecs) + jiffies);
533}
534
535static inline bool qeth_out_queue_is_full(struct qeth_qdio_out_q *queue)
536{
537 return atomic_read(&queue->used_buffers) >= QDIO_MAX_BUFFERS_PER_Q;
538}
539
540static inline bool qeth_out_queue_is_empty(struct qeth_qdio_out_q *queue)
541{
542 return atomic_read(&queue->used_buffers) == 0;
543}
544
545struct qeth_qdio_info {
546 atomic_t state;
547 /* input */
548 struct qeth_qdio_q *in_q;
549 struct qeth_qdio_q *c_q;
550 struct qeth_qdio_buffer_pool in_buf_pool;
551 struct qeth_qdio_buffer_pool init_pool;
552 int in_buf_size;
553
554 /* output */
555 unsigned int no_out_queues;
556 struct qeth_qdio_out_q *out_qs[QETH_MAX_OUT_QUEUES];
557
558 /* priority queueing */
559 int do_prio_queueing;
560 int default_out_queue;
561};
562
563/**
564 * channel state machine
565 */
566enum qeth_channel_states {
567 CH_STATE_UP,
568 CH_STATE_DOWN,
569 CH_STATE_HALTED,
570 CH_STATE_STOPPED,
571};
572/**
573 * card state machine
574 */
575enum qeth_card_states {
576 CARD_STATE_DOWN,
577 CARD_STATE_SOFTSETUP,
578};
579
580/**
581 * Protocol versions
582 */
583enum qeth_prot_versions {
584 QETH_PROT_NONE = 0x0000,
585 QETH_PROT_IPV4 = 0x0004,
586 QETH_PROT_IPV6 = 0x0006,
587};
588
589enum qeth_cq {
590 QETH_CQ_DISABLED = 0,
591 QETH_CQ_ENABLED = 1,
592 QETH_CQ_NOTAVAILABLE = 2,
593};
594
595struct qeth_ipato {
596 bool enabled;
597 bool invert4;
598 bool invert6;
599 struct list_head entries;
600};
601
602struct qeth_channel {
603 struct ccw_device *ccwdev;
604 struct qeth_cmd_buffer *active_cmd;
605 enum qeth_channel_states state;
606};
607
608struct qeth_reply {
609 int (*callback)(struct qeth_card *card, struct qeth_reply *reply,
610 unsigned long data);
611 void *param;
612};
613
614struct qeth_cmd_buffer {
615 struct list_head list_entry;
616 struct completion done;
617 spinlock_t lock;
618 unsigned int length;
619 refcount_t ref_count;
620 struct qeth_channel *channel;
621 struct qeth_reply reply;
622 long timeout;
623 unsigned char *data;
624 void (*finalize)(struct qeth_card *card, struct qeth_cmd_buffer *iob);
625 bool (*match)(struct qeth_cmd_buffer *iob,
626 struct qeth_cmd_buffer *reply);
627 void (*callback)(struct qeth_card *card, struct qeth_cmd_buffer *iob,
628 unsigned int data_length);
629 int rc;
630};
631
632static inline void qeth_get_cmd(struct qeth_cmd_buffer *iob)
633{
634 refcount_inc(&iob->ref_count);
635}
636
637static inline struct qeth_ipa_cmd *__ipa_reply(struct qeth_cmd_buffer *iob)
638{
639 if (!IS_IPA(iob->data))
640 return NULL;
641
642 return (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
643}
644
645static inline struct qeth_ipa_cmd *__ipa_cmd(struct qeth_cmd_buffer *iob)
646{
647 return (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
648}
649
650static inline struct ccw1 *__ccw_from_cmd(struct qeth_cmd_buffer *iob)
651{
652 return (struct ccw1 *)(iob->data + ALIGN(iob->length, 8));
653}
654
655/**
656 * OSA card related definitions
657 */
658struct qeth_token {
659 __u32 issuer_rm_w;
660 __u32 issuer_rm_r;
661 __u32 cm_filter_w;
662 __u32 cm_filter_r;
663 __u32 cm_connection_w;
664 __u32 cm_connection_r;
665 __u32 ulp_filter_w;
666 __u32 ulp_filter_r;
667 __u32 ulp_connection_w;
668 __u32 ulp_connection_r;
669};
670
671struct qeth_seqno {
672 __u32 trans_hdr;
673 __u32 pdu_hdr;
674 __u32 pdu_hdr_ack;
675 __u16 ipa;
676};
677
678struct qeth_card_blkt {
679 int time_total;
680 int inter_packet;
681 int inter_packet_jumbo;
682};
683
684enum qeth_pnso_mode {
685 QETH_PNSO_NONE,
686 QETH_PNSO_BRIDGEPORT,
687 QETH_PNSO_ADDR_INFO,
688};
689
690enum qeth_link_mode {
691 QETH_LINK_MODE_UNKNOWN,
692 QETH_LINK_MODE_FIBRE_SHORT,
693 QETH_LINK_MODE_FIBRE_LONG,
694};
695
696struct qeth_link_info {
697 u32 speed;
698 u8 duplex;
699 u8 port;
700 enum qeth_link_mode link_mode;
701};
702
703#define QETH_BROADCAST_WITH_ECHO 0x01
704#define QETH_BROADCAST_WITHOUT_ECHO 0x02
705struct qeth_card_info {
706 unsigned short unit_addr2;
707 unsigned short cula;
708 __u16 func_level;
709 char mcl_level[QETH_MCL_LENGTH + 1];
710 /* doubleword below corresponds to net_if_token */
711 u16 ddev_devno;
712 u8 cssid;
713 u8 iid;
714 u8 ssid;
715 u8 chpid;
716 u16 chid;
717 u8 ids_valid:1; /* cssid,iid,chid */
718 u8 dev_addr_is_registered:1;
719 u8 promisc_mode:1;
720 u8 use_v1_blkt:1;
721 u8 is_vm_nic:1;
722 /* no bitfield, we take a pointer on these two: */
723 u8 has_lp2lp_cso_v6;
724 u8 has_lp2lp_cso_v4;
725 enum qeth_pnso_mode pnso_mode;
726 enum qeth_card_types type;
727 enum qeth_link_types link_type;
728 int broadcast_capable;
729 bool layer_enforced;
730 struct qeth_card_blkt blkt;
731 __u32 diagass_support;
732 __u32 hwtrap;
733 struct qeth_link_info link_info;
734};
735
736enum qeth_discipline_id {
737 QETH_DISCIPLINE_UNDETERMINED = -1,
738 QETH_DISCIPLINE_LAYER3 = 0,
739 QETH_DISCIPLINE_LAYER2 = 1,
740};
741
742struct qeth_card_options {
743 struct qeth_ipa_caps ipa4;
744 struct qeth_ipa_caps ipa6;
745 struct qeth_routing_info route4;
746 struct qeth_routing_info route6;
747 struct qeth_ipa_caps adp; /* Adapter parameters */
748 struct qeth_sbp_info sbp; /* SETBRIDGEPORT options */
749 struct qeth_vnicc_info vnicc; /* VNICC options */
750 enum qeth_discipline_id layer;
751 enum qeth_ipa_isolation_modes isolation;
752 int sniffer;
753 enum qeth_cq cq;
754 char hsuid[9];
755};
756
757#define IS_LAYER2(card) ((card)->options.layer == QETH_DISCIPLINE_LAYER2)
758#define IS_LAYER3(card) ((card)->options.layer == QETH_DISCIPLINE_LAYER3)
759
760/*
761 * thread bits for qeth_card thread masks
762 */
763enum qeth_threads {
764 QETH_RECOVER_THREAD = 1,
765};
766
767struct qeth_discipline {
768 int (*setup) (struct ccwgroup_device *);
769 void (*remove) (struct ccwgroup_device *);
770 int (*set_online)(struct qeth_card *card, bool carrier_ok);
771 void (*set_offline)(struct qeth_card *card);
772 int (*control_event_handler)(struct qeth_card *card,
773 struct qeth_ipa_cmd *cmd);
774};
775
776enum qeth_addr_disposition {
777 QETH_DISP_ADDR_DELETE = 0,
778 QETH_DISP_ADDR_DO_NOTHING = 1,
779 QETH_DISP_ADDR_ADD = 2,
780};
781
782struct qeth_rx {
783 int b_count;
784 int b_index;
785 u8 buf_element;
786 int e_offset;
787 int qdio_err;
788 u8 bufs_refill;
789};
790
791struct qeth_switch_info {
792 __u32 capabilities;
793 __u32 settings;
794};
795
796struct qeth_priv {
797 unsigned int rx_copybreak;
798 unsigned int tx_wanted_queues;
799 u32 brport_hw_features;
800 u32 brport_features;
801};
802
803struct qeth_card {
804 enum qeth_card_states state;
805 spinlock_t lock;
806 struct ccwgroup_device *gdev;
807 struct qeth_cmd_buffer *read_cmd;
808 struct qeth_channel read;
809 struct qeth_channel write;
810 struct qeth_channel data;
811
812 struct net_device *dev;
813 struct dentry *debugfs;
814 struct qeth_card_stats stats;
815 struct qeth_card_info info;
816 struct qeth_token token;
817 struct qeth_seqno seqno;
818 struct qeth_card_options options;
819
820 struct workqueue_struct *event_wq;
821 struct workqueue_struct *cmd_wq;
822 wait_queue_head_t wait_q;
823
824 struct mutex ip_lock;
825 /* protected by ip_lock: */
826 DECLARE_HASHTABLE(ip_htable, 4);
827 struct qeth_ipato ipato;
828
829 DECLARE_HASHTABLE(local_addrs4, 4);
830 DECLARE_HASHTABLE(local_addrs6, 4);
831 spinlock_t local_addrs4_lock;
832 spinlock_t local_addrs6_lock;
833 DECLARE_HASHTABLE(rx_mode_addrs, 4);
834 struct work_struct rx_mode_work;
835 struct work_struct kernel_thread_starter;
836 spinlock_t thread_mask_lock;
837 unsigned long thread_start_mask;
838 unsigned long thread_allowed_mask;
839 unsigned long thread_running_mask;
840 struct list_head cmd_waiter_list;
841 /* QDIO buffer handling */
842 struct qeth_qdio_info qdio;
843 int read_or_write_problem;
844 const struct qeth_discipline *discipline;
845 atomic_t force_alloc_skb;
846 struct service_level qeth_service_level;
847 struct qdio_ssqd_desc ssqd;
848 debug_info_t *debug;
849 struct mutex sbp_lock;
850 struct mutex conf_mutex;
851 struct mutex discipline_mutex;
852 struct napi_struct napi;
853 struct qeth_rx rx;
854 struct delayed_work buffer_reclaim_work;
855};
856
857static inline bool qeth_card_hw_is_reachable(struct qeth_card *card)
858{
859 return card->state == CARD_STATE_SOFTSETUP;
860}
861
862static inline bool qeth_use_tx_irqs(struct qeth_card *card)
863{
864 return !IS_IQD(card);
865}
866
867static inline void qeth_unlock_channel(struct qeth_card *card,
868 struct qeth_channel *channel)
869{
870 xchg(&channel->active_cmd, NULL);
871 wake_up(&card->wait_q);
872}
873
874static inline bool qeth_trylock_channel(struct qeth_channel *channel,
875 struct qeth_cmd_buffer *cmd)
876{
877 return cmpxchg(&channel->active_cmd, NULL, cmd) == NULL;
878}
879
880struct qeth_trap_id {
881 __u16 lparnr;
882 char vmname[8];
883 __u8 chpid;
884 __u8 ssid;
885 __u16 devno;
886} __packed;
887
888static inline bool qeth_uses_tx_prio_queueing(struct qeth_card *card)
889{
890 return card->qdio.do_prio_queueing != QETH_NO_PRIO_QUEUEING;
891}
892
893static inline unsigned int qeth_tx_actual_queues(struct qeth_card *card)
894{
895 struct qeth_priv *priv = netdev_priv(card->dev);
896
897 if (qeth_uses_tx_prio_queueing(card))
898 return min(card->dev->num_tx_queues, card->qdio.no_out_queues);
899
900 return min(priv->tx_wanted_queues, card->qdio.no_out_queues);
901}
902
903static inline u16 qeth_iqd_translate_txq(struct net_device *dev, u16 txq)
904{
905 if (txq == QETH_IQD_MCAST_TXQ)
906 return dev->num_tx_queues - 1;
907 if (txq == dev->num_tx_queues - 1)
908 return QETH_IQD_MCAST_TXQ;
909 return txq;
910}
911
912static inline bool qeth_iqd_is_mcast_queue(struct qeth_card *card,
913 struct qeth_qdio_out_q *queue)
914{
915 return qeth_iqd_translate_txq(card->dev, queue->queue_no) ==
916 QETH_IQD_MCAST_TXQ;
917}
918
919static inline void qeth_scrub_qdio_buffer(struct qdio_buffer *buf,
920 unsigned int elements)
921{
922 unsigned int i;
923
924 for (i = 0; i < elements; i++)
925 memset(&buf->element[i], 0, sizeof(struct qdio_buffer_element));
926 buf->element[14].sflags = 0;
927 buf->element[15].sflags = 0;
928}
929
930/**
931 * qeth_get_elements_for_range() - find number of SBALEs to cover range.
932 * @start: Start of the address range.
933 * @end: Address after the end of the range.
934 *
935 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
936 * the specified address range.
937 */
938static inline int qeth_get_elements_for_range(addr_t start, addr_t end)
939{
940 return PFN_UP(end) - PFN_DOWN(start);
941}
942
943static inline int qeth_get_ether_cast_type(struct sk_buff *skb)
944{
945 u8 *addr = eth_hdr(skb)->h_dest;
946
947 if (is_multicast_ether_addr(addr))
948 return is_broadcast_ether_addr(addr) ? RTN_BROADCAST :
949 RTN_MULTICAST;
950 return RTN_UNICAST;
951}
952
953static inline struct dst_entry *qeth_dst_check_rcu(struct sk_buff *skb,
954 __be16 proto)
955{
956 struct dst_entry *dst = skb_dst(skb);
957 struct rt6_info *rt;
958
959 rt = dst_rt6_info(dst);
960 if (dst) {
961 if (proto == htons(ETH_P_IPV6))
962 dst = dst_check(dst, rt6_get_cookie(rt));
963 else
964 dst = dst_check(dst, 0);
965 }
966
967 return dst;
968}
969
970static inline __be32 qeth_next_hop_v4_rcu(struct sk_buff *skb,
971 struct dst_entry *dst)
972{
973 return (dst) ? rt_nexthop(dst_rtable(dst), ip_hdr(skb)->daddr) :
974 ip_hdr(skb)->daddr;
975}
976
977static inline struct in6_addr *qeth_next_hop_v6_rcu(struct sk_buff *skb,
978 struct dst_entry *dst)
979{
980 struct rt6_info *rt = dst_rt6_info(dst);
981
982 if (rt && !ipv6_addr_any(&rt->rt6i_gateway))
983 return &rt->rt6i_gateway;
984 else
985 return &ipv6_hdr(skb)->daddr;
986}
987
988static inline void qeth_tx_csum(struct sk_buff *skb, u8 *flags, __be16 proto)
989{
990 *flags |= QETH_HDR_EXT_CSUM_TRANSP_REQ;
991 if ((proto == htons(ETH_P_IP) && ip_hdr(skb)->protocol == IPPROTO_UDP) ||
992 (proto == htons(ETH_P_IPV6) && ipv6_hdr(skb)->nexthdr == IPPROTO_UDP))
993 *flags |= QETH_HDR_EXT_UDP;
994}
995
996static inline void qeth_put_buffer_pool_entry(struct qeth_card *card,
997 struct qeth_buffer_pool_entry *entry)
998{
999 list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
1000}
1001
1002static inline int qeth_is_diagass_supported(struct qeth_card *card,
1003 enum qeth_diags_cmds cmd)
1004{
1005 return card->info.diagass_support & (__u32)cmd;
1006}
1007
1008int qeth_send_simple_setassparms_prot(struct qeth_card *card,
1009 enum qeth_ipa_funcs ipa_func,
1010 u16 cmd_code, u32 *data,
1011 enum qeth_prot_versions prot);
1012/* IPv4 variant */
1013static inline int qeth_send_simple_setassparms(struct qeth_card *card,
1014 enum qeth_ipa_funcs ipa_func,
1015 u16 cmd_code, u32 *data)
1016{
1017 return qeth_send_simple_setassparms_prot(card, ipa_func, cmd_code,
1018 data, QETH_PROT_IPV4);
1019}
1020
1021static inline int qeth_send_simple_setassparms_v6(struct qeth_card *card,
1022 enum qeth_ipa_funcs ipa_func,
1023 u16 cmd_code, u32 *data)
1024{
1025 return qeth_send_simple_setassparms_prot(card, ipa_func, cmd_code,
1026 data, QETH_PROT_IPV6);
1027}
1028
1029extern const struct qeth_discipline qeth_l2_discipline;
1030extern const struct qeth_discipline qeth_l3_discipline;
1031extern const struct ethtool_ops qeth_ethtool_ops;
1032extern const struct attribute_group *qeth_dev_groups[];
1033
1034const char *qeth_get_cardname_short(struct qeth_card *);
1035int qeth_resize_buffer_pool(struct qeth_card *card, unsigned int count);
1036int qeth_setup_discipline(struct qeth_card *card, enum qeth_discipline_id disc);
1037void qeth_remove_discipline(struct qeth_card *card);
1038
1039/* exports for qeth discipline device drivers */
1040extern struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS];
1041
1042struct net_device *qeth_clone_netdev(struct net_device *orig);
1043void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
1044 int clear_start_mask);
1045int qeth_threads_running(struct qeth_card *, unsigned long);
1046int qeth_set_offline(struct qeth_card *card, const struct qeth_discipline *disc,
1047 bool resetting);
1048
1049int qeth_send_ipa_cmd(struct qeth_card *, struct qeth_cmd_buffer *,
1050 int (*reply_cb)
1051 (struct qeth_card *, struct qeth_reply *, unsigned long),
1052 void *);
1053struct qeth_cmd_buffer *qeth_ipa_alloc_cmd(struct qeth_card *card,
1054 enum qeth_ipa_cmds cmd_code,
1055 enum qeth_prot_versions prot,
1056 unsigned int data_length);
1057struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
1058 enum qeth_ipa_funcs ipa_func,
1059 u16 cmd_code,
1060 unsigned int data_length,
1061 enum qeth_prot_versions prot);
1062struct qeth_cmd_buffer *qeth_get_diag_cmd(struct qeth_card *card,
1063 enum qeth_diags_cmds sub_cmd,
1064 unsigned int data_length);
1065
1066int qeth_schedule_recovery(struct qeth_card *card);
1067int qeth_poll(struct napi_struct *napi, int budget);
1068void qeth_setadp_promisc_mode(struct qeth_card *card, bool enable);
1069int qeth_setadpparms_change_macaddr(struct qeth_card *);
1070void qeth_tx_timeout(struct net_device *, unsigned int txqueue);
1071int qeth_query_switch_attributes(struct qeth_card *card,
1072 struct qeth_switch_info *sw_info);
1073int qeth_query_card_info(struct qeth_card *card,
1074 struct qeth_link_info *link_info);
1075int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
1076 enum qeth_ipa_isolation_modes mode);
1077
1078int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
1079int qeth_siocdevprivate(struct net_device *dev, struct ifreq *rq,
1080 void __user *data, int cmd);
1081__printf(3, 4)
1082void qeth_dbf_longtext(debug_info_t *id, int level, char *text, ...);
1083int qeth_configure_cq(struct qeth_card *, enum qeth_cq);
1084int qeth_hw_trap(struct qeth_card *, enum qeth_diags_trap_action);
1085int qeth_setassparms_cb(struct qeth_card *, struct qeth_reply *, unsigned long);
1086int qeth_set_features(struct net_device *, netdev_features_t);
1087void qeth_enable_hw_features(struct net_device *dev);
1088netdev_features_t qeth_fix_features(struct net_device *, netdev_features_t);
1089netdev_features_t qeth_features_check(struct sk_buff *skb,
1090 struct net_device *dev,
1091 netdev_features_t features);
1092void qeth_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats);
1093int qeth_set_real_num_tx_queues(struct qeth_card *card, unsigned int count);
1094u16 qeth_iqd_select_queue(struct net_device *dev, struct sk_buff *skb,
1095 u8 cast_type, struct net_device *sb_dev);
1096u16 qeth_osa_select_queue(struct net_device *dev, struct sk_buff *skb,
1097 struct net_device *sb_dev);
1098int qeth_open(struct net_device *dev);
1099int qeth_stop(struct net_device *dev);
1100
1101int qeth_vm_request_mac(struct qeth_card *card);
1102int qeth_xmit(struct qeth_card *card, struct sk_buff *skb,
1103 struct qeth_qdio_out_q *queue, __be16 proto,
1104 void (*fill_header)(struct qeth_qdio_out_q *queue,
1105 struct qeth_hdr *hdr, struct sk_buff *skb,
1106 __be16 proto, unsigned int data_len));
1107
1108#endif /* __QETH_CORE_H__ */
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright IBM Corp. 2007
4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
5 * Frank Pavlic <fpavlic@de.ibm.com>,
6 * Thomas Spatzier <tspat@de.ibm.com>,
7 * Frank Blaschka <frank.blaschka@de.ibm.com>
8 */
9
10#ifndef __QETH_CORE_H__
11#define __QETH_CORE_H__
12
13#include <linux/completion.h>
14#include <linux/if.h>
15#include <linux/if_arp.h>
16#include <linux/etherdevice.h>
17#include <linux/if_vlan.h>
18#include <linux/ctype.h>
19#include <linux/in6.h>
20#include <linux/bitops.h>
21#include <linux/seq_file.h>
22#include <linux/hashtable.h>
23#include <linux/ip.h>
24#include <linux/refcount.h>
25#include <linux/timer.h>
26#include <linux/wait.h>
27#include <linux/workqueue.h>
28
29#include <net/dst.h>
30#include <net/ip6_fib.h>
31#include <net/ipv6.h>
32#include <net/if_inet6.h>
33#include <net/addrconf.h>
34#include <net/sch_generic.h>
35#include <net/tcp.h>
36
37#include <asm/debug.h>
38#include <asm/qdio.h>
39#include <asm/ccwdev.h>
40#include <asm/ccwgroup.h>
41#include <asm/sysinfo.h>
42
43#include <uapi/linux/if_link.h>
44
45#include "qeth_core_mpc.h"
46
47/**
48 * Debug Facility stuff
49 */
50enum qeth_dbf_names {
51 QETH_DBF_SETUP,
52 QETH_DBF_MSG,
53 QETH_DBF_CTRL,
54 QETH_DBF_INFOS /* must be last element */
55};
56
57struct qeth_dbf_info {
58 char name[DEBUG_MAX_NAME_LEN];
59 int pages;
60 int areas;
61 int len;
62 int level;
63 struct debug_view *view;
64 debug_info_t *id;
65};
66
67#define QETH_DBF_CTRL_LEN 256U
68
69#define QETH_DBF_TEXT(name, level, text) \
70 debug_text_event(qeth_dbf[QETH_DBF_##name].id, level, text)
71
72#define QETH_DBF_HEX(name, level, addr, len) \
73 debug_event(qeth_dbf[QETH_DBF_##name].id, level, (void *)(addr), len)
74
75#define QETH_DBF_MESSAGE(level, text...) \
76 debug_sprintf_event(qeth_dbf[QETH_DBF_MSG].id, level, text)
77
78#define QETH_DBF_TEXT_(name, level, text...) \
79 qeth_dbf_longtext(qeth_dbf[QETH_DBF_##name].id, level, text)
80
81#define QETH_CARD_TEXT(card, level, text) \
82 debug_text_event(card->debug, level, text)
83
84#define QETH_CARD_HEX(card, level, addr, len) \
85 debug_event(card->debug, level, (void *)(addr), len)
86
87#define QETH_CARD_MESSAGE(card, text...) \
88 debug_sprintf_event(card->debug, level, text)
89
90#define QETH_CARD_TEXT_(card, level, text...) \
91 qeth_dbf_longtext(card->debug, level, text)
92
93#define SENSE_COMMAND_REJECT_BYTE 0
94#define SENSE_COMMAND_REJECT_FLAG 0x80
95#define SENSE_RESETTING_EVENT_BYTE 1
96#define SENSE_RESETTING_EVENT_FLAG 0x80
97
98static inline u32 qeth_get_device_id(struct ccw_device *cdev)
99{
100 struct ccw_dev_id dev_id;
101 u32 id;
102
103 ccw_device_get_id(cdev, &dev_id);
104 id = dev_id.devno;
105 id |= (u32) (dev_id.ssid << 16);
106
107 return id;
108}
109
110/*
111 * Common IO related definitions
112 */
113#define CARD_RDEV(card) card->read.ccwdev
114#define CARD_WDEV(card) card->write.ccwdev
115#define CARD_DDEV(card) card->data.ccwdev
116#define CARD_BUS_ID(card) dev_name(&card->gdev->dev)
117#define CARD_RDEV_ID(card) dev_name(&card->read.ccwdev->dev)
118#define CARD_WDEV_ID(card) dev_name(&card->write.ccwdev->dev)
119#define CARD_DDEV_ID(card) dev_name(&card->data.ccwdev->dev)
120#define CCW_DEVID(cdev) (qeth_get_device_id(cdev))
121#define CARD_DEVID(card) (CCW_DEVID(CARD_RDEV(card)))
122
123/* Routing stuff */
124struct qeth_routing_info {
125 enum qeth_routing_types type;
126};
127
128/* IPA stuff */
129struct qeth_ipa_info {
130 __u32 supported_funcs;
131 __u32 enabled_funcs;
132};
133
134/* SETBRIDGEPORT stuff */
135enum qeth_sbp_roles {
136 QETH_SBP_ROLE_NONE = 0,
137 QETH_SBP_ROLE_PRIMARY = 1,
138 QETH_SBP_ROLE_SECONDARY = 2,
139};
140
141enum qeth_sbp_states {
142 QETH_SBP_STATE_INACTIVE = 0,
143 QETH_SBP_STATE_STANDBY = 1,
144 QETH_SBP_STATE_ACTIVE = 2,
145};
146
147#define QETH_SBP_HOST_NOTIFICATION 1
148
149struct qeth_sbp_info {
150 __u32 supported_funcs;
151 enum qeth_sbp_roles role;
152 __u32 hostnotification:1;
153 __u32 reflect_promisc:1;
154 __u32 reflect_promisc_primary:1;
155};
156
157struct qeth_vnicc_info {
158 /* supported/currently configured VNICCs; updated in IPA exchanges */
159 u32 sup_chars;
160 u32 cur_chars;
161 /* supported commands: bitmasks which VNICCs support respective cmd */
162 u32 set_char_sup;
163 u32 getset_timeout_sup;
164 /* timeout value for the learning characteristic */
165 u32 learning_timeout;
166 /* characteristics wanted/configured by user */
167 u32 wanted_chars;
168 /* has user explicitly enabled rx_bcast while online? */
169 bool rx_bcast_enabled;
170};
171
172static inline int qeth_is_adp_supported(struct qeth_ipa_info *ipa,
173 enum qeth_ipa_setadp_cmd func)
174{
175 return (ipa->supported_funcs & func);
176}
177
178static inline int qeth_is_ipa_supported(struct qeth_ipa_info *ipa,
179 enum qeth_ipa_funcs func)
180{
181 return (ipa->supported_funcs & func);
182}
183
184static inline int qeth_is_ipa_enabled(struct qeth_ipa_info *ipa,
185 enum qeth_ipa_funcs func)
186{
187 return (ipa->supported_funcs & ipa->enabled_funcs & func);
188}
189
190#define qeth_adp_supported(c, f) \
191 qeth_is_adp_supported(&c->options.adp, f)
192#define qeth_is_supported(c, f) \
193 qeth_is_ipa_supported(&c->options.ipa4, f)
194#define qeth_is_enabled(c, f) \
195 qeth_is_ipa_enabled(&c->options.ipa4, f)
196#define qeth_is_supported6(c, f) \
197 qeth_is_ipa_supported(&c->options.ipa6, f)
198#define qeth_is_enabled6(c, f) \
199 qeth_is_ipa_enabled(&c->options.ipa6, f)
200#define qeth_is_ipafunc_supported(c, prot, f) \
201 ((prot == QETH_PROT_IPV6) ? \
202 qeth_is_supported6(c, f) : qeth_is_supported(c, f))
203#define qeth_is_ipafunc_enabled(c, prot, f) \
204 ((prot == QETH_PROT_IPV6) ? \
205 qeth_is_enabled6(c, f) : qeth_is_enabled(c, f))
206
207#define QETH_IDX_FUNC_LEVEL_OSD 0x0101
208#define QETH_IDX_FUNC_LEVEL_IQD 0x4108
209
210#define QETH_BUFSIZE 4096
211#define CCW_CMD_WRITE 0x01
212#define CCW_CMD_READ 0x02
213
214/**
215 * some more defs
216 */
217#define QETH_TX_TIMEOUT 100 * HZ
218#define QETH_RCD_TIMEOUT 60 * HZ
219#define QETH_RECLAIM_WORK_TIME HZ
220#define QETH_MAX_PORTNO 15
221
222/*IPv6 address autoconfiguration stuff*/
223#define UNIQUE_ID_IF_CREATE_ADDR_FAILED 0xfffe
224#define UNIQUE_ID_NOT_BY_CARD 0x10000
225
226/*****************************************************************************/
227/* QDIO queue and buffer handling */
228/*****************************************************************************/
229#define QETH_MAX_QUEUES 4
230#define QETH_IQD_MIN_TXQ 2 /* One for ucast, one for mcast. */
231#define QETH_IQD_MCAST_TXQ 0
232#define QETH_IQD_MIN_UCAST_TXQ 1
233#define QETH_IN_BUF_SIZE_DEFAULT 65536
234#define QETH_IN_BUF_COUNT_DEFAULT 64
235#define QETH_IN_BUF_COUNT_HSDEFAULT 128
236#define QETH_IN_BUF_COUNT_MIN 8
237#define QETH_IN_BUF_COUNT_MAX 128
238#define QETH_MAX_BUFFER_ELEMENTS(card) ((card)->qdio.in_buf_size >> 12)
239#define QETH_IN_BUF_REQUEUE_THRESHOLD(card) \
240 ((card)->qdio.in_buf_pool.buf_count / 2)
241
242/* buffers we have to be behind before we get a PCI */
243#define QETH_PCI_THRESHOLD_A(card) ((card)->qdio.in_buf_pool.buf_count+1)
244/*enqueued free buffers left before we get a PCI*/
245#define QETH_PCI_THRESHOLD_B(card) 0
246/*not used unless the microcode gets patched*/
247#define QETH_PCI_TIMER_VALUE(card) 3
248
249/* priority queing */
250#define QETH_PRIOQ_DEFAULT QETH_NO_PRIO_QUEUEING
251#define QETH_DEFAULT_QUEUE 2
252#define QETH_NO_PRIO_QUEUEING 0
253#define QETH_PRIO_Q_ING_PREC 1
254#define QETH_PRIO_Q_ING_TOS 2
255#define QETH_PRIO_Q_ING_SKB 3
256#define QETH_PRIO_Q_ING_VLAN 4
257
258/* Packing */
259#define QETH_LOW_WATERMARK_PACK 2
260#define QETH_HIGH_WATERMARK_PACK 5
261#define QETH_WATERMARK_PACK_FUZZ 1
262
263/* large receive scatter gather copy break */
264#define QETH_RX_SG_CB (PAGE_SIZE >> 1)
265#define QETH_RX_PULL_LEN 256
266
267struct qeth_hdr_layer3 {
268 __u8 id;
269 __u8 flags;
270 __u16 inbound_checksum; /*TSO:__u16 seqno */
271 __u32 token; /*TSO: __u32 reserved */
272 __u16 length;
273 __u8 vlan_prio;
274 __u8 ext_flags;
275 __u16 vlan_id;
276 __u16 frame_offset;
277 union {
278 /* TX: */
279 struct in6_addr ipv6_addr;
280 struct ipv4 {
281 u8 res[12];
282 u32 addr;
283 } ipv4;
284 /* RX: */
285 struct rx {
286 u8 res1[2];
287 u8 src_mac[6];
288 u8 res2[4];
289 u16 vlan_id;
290 u8 res3[2];
291 } rx;
292 } next_hop;
293};
294
295struct qeth_hdr_layer2 {
296 __u8 id;
297 __u8 flags[3];
298 __u8 port_no;
299 __u8 hdr_length;
300 __u16 pkt_length;
301 __u16 seq_no;
302 __u16 vlan_id;
303 __u32 reserved;
304 __u8 reserved2[16];
305} __attribute__ ((packed));
306
307struct qeth_hdr_osn {
308 __u8 id;
309 __u8 reserved;
310 __u16 seq_no;
311 __u16 reserved2;
312 __u16 control_flags;
313 __u16 pdu_length;
314 __u8 reserved3[18];
315 __u32 ccid;
316} __attribute__ ((packed));
317
318struct qeth_hdr {
319 union {
320 struct qeth_hdr_layer2 l2;
321 struct qeth_hdr_layer3 l3;
322 struct qeth_hdr_osn osn;
323 } hdr;
324} __attribute__ ((packed));
325
326/*TCP Segmentation Offload header*/
327struct qeth_hdr_ext_tso {
328 __u16 hdr_tot_len;
329 __u8 imb_hdr_no;
330 __u8 reserved;
331 __u8 hdr_type;
332 __u8 hdr_version;
333 __u16 hdr_len;
334 __u32 payload_len;
335 __u16 mss;
336 __u16 dg_hdr_len;
337 __u8 padding[16];
338} __attribute__ ((packed));
339
340struct qeth_hdr_tso {
341 struct qeth_hdr hdr; /*hdr->hdr.l3.xxx*/
342 struct qeth_hdr_ext_tso ext;
343} __attribute__ ((packed));
344
345
346/* flags for qeth_hdr.flags */
347#define QETH_HDR_PASSTHRU 0x10
348#define QETH_HDR_IPV6 0x80
349#define QETH_HDR_CAST_MASK 0x07
350enum qeth_cast_flags {
351 QETH_CAST_UNICAST = 0x06,
352 QETH_CAST_MULTICAST = 0x04,
353 QETH_CAST_BROADCAST = 0x05,
354 QETH_CAST_ANYCAST = 0x07,
355 QETH_CAST_NOCAST = 0x00,
356};
357
358enum qeth_layer2_frame_flags {
359 QETH_LAYER2_FLAG_MULTICAST = 0x01,
360 QETH_LAYER2_FLAG_BROADCAST = 0x02,
361 QETH_LAYER2_FLAG_UNICAST = 0x04,
362 QETH_LAYER2_FLAG_VLAN = 0x10,
363};
364
365enum qeth_header_ids {
366 QETH_HEADER_TYPE_LAYER3 = 0x01,
367 QETH_HEADER_TYPE_LAYER2 = 0x02,
368 QETH_HEADER_TYPE_L3_TSO = 0x03,
369 QETH_HEADER_TYPE_OSN = 0x04,
370 QETH_HEADER_TYPE_L2_TSO = 0x06,
371};
372/* flags for qeth_hdr.ext_flags */
373#define QETH_HDR_EXT_VLAN_FRAME 0x01
374#define QETH_HDR_EXT_TOKEN_ID 0x02
375#define QETH_HDR_EXT_INCLUDE_VLAN_TAG 0x04
376#define QETH_HDR_EXT_SRC_MAC_ADDR 0x08
377#define QETH_HDR_EXT_CSUM_HDR_REQ 0x10
378#define QETH_HDR_EXT_CSUM_TRANSP_REQ 0x20
379#define QETH_HDR_EXT_UDP 0x40 /*bit off for TCP*/
380
381static inline bool qeth_l2_same_vlan(struct qeth_hdr_layer2 *h1,
382 struct qeth_hdr_layer2 *h2)
383{
384 return !((h1->flags[2] ^ h2->flags[2]) & QETH_LAYER2_FLAG_VLAN) &&
385 h1->vlan_id == h2->vlan_id;
386}
387
388static inline bool qeth_l3_iqd_same_vlan(struct qeth_hdr_layer3 *h1,
389 struct qeth_hdr_layer3 *h2)
390{
391 return !((h1->ext_flags ^ h2->ext_flags) & QETH_HDR_EXT_VLAN_FRAME) &&
392 h1->vlan_id == h2->vlan_id;
393}
394
395static inline bool qeth_l3_same_next_hop(struct qeth_hdr_layer3 *h1,
396 struct qeth_hdr_layer3 *h2)
397{
398 return !((h1->flags ^ h2->flags) & QETH_HDR_IPV6) &&
399 ipv6_addr_equal(&h1->next_hop.ipv6_addr,
400 &h2->next_hop.ipv6_addr);
401}
402
403enum qeth_qdio_info_states {
404 QETH_QDIO_UNINITIALIZED,
405 QETH_QDIO_ALLOCATED,
406 QETH_QDIO_ESTABLISHED,
407 QETH_QDIO_CLEANING
408};
409
410struct qeth_buffer_pool_entry {
411 struct list_head list;
412 struct list_head init_list;
413 void *elements[QDIO_MAX_ELEMENTS_PER_BUFFER];
414};
415
416struct qeth_qdio_buffer_pool {
417 struct list_head entry_list;
418 int buf_count;
419};
420
421struct qeth_qdio_buffer {
422 struct qdio_buffer *buffer;
423 /* the buffer pool entry currently associated to this buffer */
424 struct qeth_buffer_pool_entry *pool_entry;
425 struct sk_buff *rx_skb;
426};
427
428struct qeth_qdio_q {
429 struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q];
430 struct qeth_qdio_buffer bufs[QDIO_MAX_BUFFERS_PER_Q];
431 int next_buf_to_init;
432};
433
434enum qeth_qdio_out_buffer_state {
435 /* Owned by driver, in order to be filled. */
436 QETH_QDIO_BUF_EMPTY,
437 /* Filled by driver; owned by hardware in order to be sent. */
438 QETH_QDIO_BUF_PRIMED,
439 /* Identified to be pending in TPQ. */
440 QETH_QDIO_BUF_PENDING,
441 /* Found in completion queue. */
442 QETH_QDIO_BUF_IN_CQ,
443 /* Handled via transfer pending / completion queue. */
444 QETH_QDIO_BUF_HANDLED_DELAYED,
445};
446
447struct qeth_qdio_out_buffer {
448 struct qdio_buffer *buffer;
449 atomic_t state;
450 int next_element_to_fill;
451 unsigned int bytes;
452 struct sk_buff_head skb_list;
453 int is_header[QDIO_MAX_ELEMENTS_PER_BUFFER];
454
455 struct qeth_qdio_out_q *q;
456 struct qeth_qdio_out_buffer *next_pending;
457};
458
459struct qeth_card;
460
461enum qeth_out_q_states {
462 QETH_OUT_Q_UNLOCKED,
463 QETH_OUT_Q_LOCKED,
464 QETH_OUT_Q_LOCKED_FLUSH,
465};
466
467#define QETH_CARD_STAT_ADD(_c, _stat, _val) ((_c)->stats._stat += (_val))
468#define QETH_CARD_STAT_INC(_c, _stat) QETH_CARD_STAT_ADD(_c, _stat, 1)
469
470#define QETH_TXQ_STAT_ADD(_q, _stat, _val) ((_q)->stats._stat += (_val))
471#define QETH_TXQ_STAT_INC(_q, _stat) QETH_TXQ_STAT_ADD(_q, _stat, 1)
472
473struct qeth_card_stats {
474 u64 rx_bufs;
475 u64 rx_skb_csum;
476 u64 rx_sg_skbs;
477 u64 rx_sg_frags;
478 u64 rx_sg_alloc_page;
479
480 /* rtnl_link_stats64 */
481 u64 rx_packets;
482 u64 rx_bytes;
483 u64 rx_errors;
484 u64 rx_dropped;
485 u64 rx_multicast;
486};
487
488struct qeth_out_q_stats {
489 u64 bufs;
490 u64 bufs_pack;
491 u64 buf_elements;
492 u64 skbs_pack;
493 u64 skbs_sg;
494 u64 skbs_csum;
495 u64 skbs_tso;
496 u64 skbs_linearized;
497 u64 skbs_linearized_fail;
498 u64 tso_bytes;
499 u64 packing_mode_switch;
500 u64 stopped;
501 u64 completion_yield;
502 u64 completion_timer;
503
504 /* rtnl_link_stats64 */
505 u64 tx_packets;
506 u64 tx_bytes;
507 u64 tx_errors;
508 u64 tx_dropped;
509};
510
511#define QETH_TX_TIMER_USECS 500
512
513struct qeth_qdio_out_q {
514 struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q];
515 struct qeth_qdio_out_buffer *bufs[QDIO_MAX_BUFFERS_PER_Q];
516 struct qdio_outbuf_state *bufstates; /* convenience pointer */
517 struct qeth_out_q_stats stats;
518 u8 next_buf_to_fill;
519 u8 max_elements;
520 u8 queue_no;
521 u8 do_pack;
522 struct qeth_card *card;
523 atomic_t state;
524 /*
525 * number of buffers that are currently filled (PRIMED)
526 * -> these buffers are hardware-owned
527 */
528 atomic_t used_buffers;
529 /* indicates whether PCI flag must be set (or if one is outstanding) */
530 atomic_t set_pci_flags_count;
531 struct napi_struct napi;
532 struct timer_list timer;
533 struct qeth_hdr *prev_hdr;
534 u8 bulk_start;
535};
536
537#define qeth_for_each_output_queue(card, q, i) \
538 for (i = 0; i < card->qdio.no_out_queues && \
539 (q = card->qdio.out_qs[i]); i++)
540
541#define qeth_napi_to_out_queue(n) container_of(n, struct qeth_qdio_out_q, napi)
542
543static inline void qeth_tx_arm_timer(struct qeth_qdio_out_q *queue)
544{
545 if (timer_pending(&queue->timer))
546 return;
547 mod_timer(&queue->timer, usecs_to_jiffies(QETH_TX_TIMER_USECS) +
548 jiffies);
549}
550
551static inline bool qeth_out_queue_is_full(struct qeth_qdio_out_q *queue)
552{
553 return atomic_read(&queue->used_buffers) >= QDIO_MAX_BUFFERS_PER_Q;
554}
555
556static inline bool qeth_out_queue_is_empty(struct qeth_qdio_out_q *queue)
557{
558 return atomic_read(&queue->used_buffers) == 0;
559}
560
561struct qeth_qdio_info {
562 atomic_t state;
563 /* input */
564 int no_in_queues;
565 struct qeth_qdio_q *in_q;
566 struct qeth_qdio_q *c_q;
567 struct qeth_qdio_buffer_pool in_buf_pool;
568 struct qeth_qdio_buffer_pool init_pool;
569 int in_buf_size;
570
571 /* output */
572 int no_out_queues;
573 struct qeth_qdio_out_q *out_qs[QETH_MAX_QUEUES];
574 struct qdio_outbuf_state *out_bufstates;
575
576 /* priority queueing */
577 int do_prio_queueing;
578 int default_out_queue;
579};
580
581/**
582 * channel state machine
583 */
584enum qeth_channel_states {
585 CH_STATE_UP,
586 CH_STATE_DOWN,
587 CH_STATE_HALTED,
588 CH_STATE_STOPPED,
589};
590/**
591 * card state machine
592 */
593enum qeth_card_states {
594 CARD_STATE_DOWN,
595 CARD_STATE_HARDSETUP,
596 CARD_STATE_SOFTSETUP,
597};
598
599/**
600 * Protocol versions
601 */
602enum qeth_prot_versions {
603 QETH_PROT_NONE = 0x0000,
604 QETH_PROT_IPV4 = 0x0004,
605 QETH_PROT_IPV6 = 0x0006,
606};
607
608enum qeth_cq {
609 QETH_CQ_DISABLED = 0,
610 QETH_CQ_ENABLED = 1,
611 QETH_CQ_NOTAVAILABLE = 2,
612};
613
614struct qeth_ipato {
615 bool enabled;
616 bool invert4;
617 bool invert6;
618 struct list_head entries;
619};
620
621struct qeth_channel {
622 struct ccw_device *ccwdev;
623 enum qeth_channel_states state;
624 atomic_t irq_pending;
625};
626
627struct qeth_reply {
628 int (*callback)(struct qeth_card *card, struct qeth_reply *reply,
629 unsigned long data);
630 void *param;
631};
632
633struct qeth_cmd_buffer {
634 struct list_head list;
635 struct completion done;
636 spinlock_t lock;
637 unsigned int length;
638 refcount_t ref_count;
639 struct qeth_channel *channel;
640 struct qeth_reply reply;
641 long timeout;
642 unsigned char *data;
643 void (*finalize)(struct qeth_card *card, struct qeth_cmd_buffer *iob);
644 void (*callback)(struct qeth_card *card, struct qeth_cmd_buffer *iob,
645 unsigned int data_length);
646 int rc;
647};
648
649static inline void qeth_get_cmd(struct qeth_cmd_buffer *iob)
650{
651 refcount_inc(&iob->ref_count);
652}
653
654static inline struct qeth_ipa_cmd *__ipa_cmd(struct qeth_cmd_buffer *iob)
655{
656 return (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
657}
658
659static inline struct ccw1 *__ccw_from_cmd(struct qeth_cmd_buffer *iob)
660{
661 return (struct ccw1 *)(iob->data + ALIGN(iob->length, 8));
662}
663
664static inline bool qeth_trylock_channel(struct qeth_channel *channel)
665{
666 return atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0;
667}
668
669/**
670 * OSA card related definitions
671 */
672struct qeth_token {
673 __u32 issuer_rm_w;
674 __u32 issuer_rm_r;
675 __u32 cm_filter_w;
676 __u32 cm_filter_r;
677 __u32 cm_connection_w;
678 __u32 cm_connection_r;
679 __u32 ulp_filter_w;
680 __u32 ulp_filter_r;
681 __u32 ulp_connection_w;
682 __u32 ulp_connection_r;
683};
684
685struct qeth_seqno {
686 __u32 trans_hdr;
687 __u32 pdu_hdr;
688 __u32 pdu_hdr_ack;
689 __u16 ipa;
690};
691
692struct qeth_card_blkt {
693 int time_total;
694 int inter_packet;
695 int inter_packet_jumbo;
696};
697
698#define QETH_BROADCAST_WITH_ECHO 0x01
699#define QETH_BROADCAST_WITHOUT_ECHO 0x02
700#define QETH_LAYER2_MAC_REGISTERED 0x02
701struct qeth_card_info {
702 unsigned short unit_addr2;
703 unsigned short cula;
704 u8 chpid;
705 __u16 func_level;
706 char mcl_level[QETH_MCL_LENGTH + 1];
707 u8 open_when_online:1;
708 u8 promisc_mode:1;
709 u8 use_v1_blkt:1;
710 u8 is_vm_nic:1;
711 int mac_bits;
712 enum qeth_card_types type;
713 enum qeth_link_types link_type;
714 int broadcast_capable;
715 int unique_id;
716 bool layer_enforced;
717 struct qeth_card_blkt blkt;
718 __u32 diagass_support;
719 __u32 hwtrap;
720};
721
722enum qeth_discipline_id {
723 QETH_DISCIPLINE_UNDETERMINED = -1,
724 QETH_DISCIPLINE_LAYER3 = 0,
725 QETH_DISCIPLINE_LAYER2 = 1,
726};
727
728struct qeth_card_options {
729 struct qeth_routing_info route4;
730 struct qeth_ipa_info ipa4;
731 struct qeth_ipa_info adp; /*Adapter parameters*/
732 struct qeth_routing_info route6;
733 struct qeth_ipa_info ipa6;
734 struct qeth_sbp_info sbp; /* SETBRIDGEPORT options */
735 struct qeth_vnicc_info vnicc; /* VNICC options */
736 int fake_broadcast;
737 enum qeth_discipline_id layer;
738 int rx_sg_cb;
739 enum qeth_ipa_isolation_modes isolation;
740 enum qeth_ipa_isolation_modes prev_isolation;
741 int sniffer;
742 enum qeth_cq cq;
743 char hsuid[9];
744};
745
746#define IS_LAYER2(card) ((card)->options.layer == QETH_DISCIPLINE_LAYER2)
747#define IS_LAYER3(card) ((card)->options.layer == QETH_DISCIPLINE_LAYER3)
748
749/*
750 * thread bits for qeth_card thread masks
751 */
752enum qeth_threads {
753 QETH_RECOVER_THREAD = 1,
754};
755
756struct qeth_osn_info {
757 int (*assist_cb)(struct net_device *dev, void *data);
758 int (*data_cb)(struct sk_buff *skb);
759};
760
761struct qeth_discipline {
762 const struct device_type *devtype;
763 int (*process_rx_buffer)(struct qeth_card *card, int budget, int *done);
764 int (*recover)(void *ptr);
765 int (*setup) (struct ccwgroup_device *);
766 void (*remove) (struct ccwgroup_device *);
767 int (*set_online) (struct ccwgroup_device *);
768 int (*set_offline) (struct ccwgroup_device *);
769 int (*do_ioctl)(struct net_device *dev, struct ifreq *rq, int cmd);
770 int (*control_event_handler)(struct qeth_card *card,
771 struct qeth_ipa_cmd *cmd);
772};
773
774enum qeth_addr_disposition {
775 QETH_DISP_ADDR_DELETE = 0,
776 QETH_DISP_ADDR_DO_NOTHING = 1,
777 QETH_DISP_ADDR_ADD = 2,
778};
779
780struct qeth_rx {
781 int b_count;
782 int b_index;
783 struct qdio_buffer_element *b_element;
784 int e_offset;
785 int qdio_err;
786};
787
788struct carrier_info {
789 __u8 card_type;
790 __u16 port_mode;
791 __u32 port_speed;
792};
793
794struct qeth_switch_info {
795 __u32 capabilities;
796 __u32 settings;
797};
798
799#define QETH_NAPI_WEIGHT NAPI_POLL_WEIGHT
800
801struct qeth_card {
802 enum qeth_card_states state;
803 spinlock_t lock;
804 struct ccwgroup_device *gdev;
805 struct qeth_cmd_buffer *read_cmd;
806 struct qeth_channel read;
807 struct qeth_channel write;
808 struct qeth_channel data;
809
810 struct net_device *dev;
811 struct qeth_card_stats stats;
812 struct qeth_card_info info;
813 struct qeth_token token;
814 struct qeth_seqno seqno;
815 struct qeth_card_options options;
816
817 struct workqueue_struct *event_wq;
818 struct workqueue_struct *cmd_wq;
819 wait_queue_head_t wait_q;
820 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
821 DECLARE_HASHTABLE(mac_htable, 4);
822 DECLARE_HASHTABLE(ip_htable, 4);
823 struct mutex ip_lock;
824 DECLARE_HASHTABLE(ip_mc_htable, 4);
825 struct work_struct rx_mode_work;
826 struct work_struct kernel_thread_starter;
827 spinlock_t thread_mask_lock;
828 unsigned long thread_start_mask;
829 unsigned long thread_allowed_mask;
830 unsigned long thread_running_mask;
831 struct qeth_ipato ipato;
832 struct list_head cmd_waiter_list;
833 /* QDIO buffer handling */
834 struct qeth_qdio_info qdio;
835 int read_or_write_problem;
836 struct qeth_osn_info osn_info;
837 struct qeth_discipline *discipline;
838 atomic_t force_alloc_skb;
839 struct service_level qeth_service_level;
840 struct qdio_ssqd_desc ssqd;
841 debug_info_t *debug;
842 struct mutex sbp_lock;
843 struct mutex conf_mutex;
844 struct mutex discipline_mutex;
845 struct napi_struct napi;
846 struct qeth_rx rx;
847 struct delayed_work buffer_reclaim_work;
848 int reclaim_index;
849 struct work_struct close_dev_work;
850};
851
852static inline bool qeth_card_hw_is_reachable(struct qeth_card *card)
853{
854 return card->state == CARD_STATE_SOFTSETUP;
855}
856
857struct qeth_trap_id {
858 __u16 lparnr;
859 char vmname[8];
860 __u8 chpid;
861 __u8 ssid;
862 __u16 devno;
863} __packed;
864
865/*some helper functions*/
866#define QETH_CARD_IFNAME(card) (((card)->dev)? (card)->dev->name : "")
867
868static inline bool qeth_netdev_is_registered(struct net_device *dev)
869{
870 return dev->netdev_ops != NULL;
871}
872
873static inline u16 qeth_iqd_translate_txq(struct net_device *dev, u16 txq)
874{
875 if (txq == QETH_IQD_MCAST_TXQ)
876 return dev->num_tx_queues - 1;
877 if (txq == dev->num_tx_queues - 1)
878 return QETH_IQD_MCAST_TXQ;
879 return txq;
880}
881
882static inline void qeth_scrub_qdio_buffer(struct qdio_buffer *buf,
883 unsigned int elements)
884{
885 unsigned int i;
886
887 for (i = 0; i < elements; i++)
888 memset(&buf->element[i], 0, sizeof(struct qdio_buffer_element));
889 buf->element[14].sflags = 0;
890 buf->element[15].sflags = 0;
891}
892
893/**
894 * qeth_get_elements_for_range() - find number of SBALEs to cover range.
895 * @start: Start of the address range.
896 * @end: Address after the end of the range.
897 *
898 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
899 * the specified address range.
900 */
901static inline int qeth_get_elements_for_range(addr_t start, addr_t end)
902{
903 return PFN_UP(end) - PFN_DOWN(start);
904}
905
906static inline int qeth_get_ip_version(struct sk_buff *skb)
907{
908 struct vlan_ethhdr *veth = vlan_eth_hdr(skb);
909 __be16 prot = veth->h_vlan_proto;
910
911 if (prot == htons(ETH_P_8021Q))
912 prot = veth->h_vlan_encapsulated_proto;
913
914 switch (prot) {
915 case htons(ETH_P_IPV6):
916 return 6;
917 case htons(ETH_P_IP):
918 return 4;
919 default:
920 return 0;
921 }
922}
923
924static inline int qeth_get_ether_cast_type(struct sk_buff *skb)
925{
926 u8 *addr = eth_hdr(skb)->h_dest;
927
928 if (is_multicast_ether_addr(addr))
929 return is_broadcast_ether_addr(addr) ? RTN_BROADCAST :
930 RTN_MULTICAST;
931 return RTN_UNICAST;
932}
933
934static inline struct dst_entry *qeth_dst_check_rcu(struct sk_buff *skb, int ipv)
935{
936 struct dst_entry *dst = skb_dst(skb);
937 struct rt6_info *rt;
938
939 rt = (struct rt6_info *) dst;
940 if (dst)
941 dst = dst_check(dst, (ipv == 6) ? rt6_get_cookie(rt) : 0);
942 return dst;
943}
944
945static inline void qeth_rx_csum(struct qeth_card *card, struct sk_buff *skb,
946 u8 flags)
947{
948 if ((card->dev->features & NETIF_F_RXCSUM) &&
949 (flags & QETH_HDR_EXT_CSUM_TRANSP_REQ)) {
950 skb->ip_summed = CHECKSUM_UNNECESSARY;
951 QETH_CARD_STAT_INC(card, rx_skb_csum);
952 } else {
953 skb->ip_summed = CHECKSUM_NONE;
954 }
955}
956
957static inline void qeth_tx_csum(struct sk_buff *skb, u8 *flags, int ipv)
958{
959 *flags |= QETH_HDR_EXT_CSUM_TRANSP_REQ;
960 if ((ipv == 4 && ip_hdr(skb)->protocol == IPPROTO_UDP) ||
961 (ipv == 6 && ipv6_hdr(skb)->nexthdr == IPPROTO_UDP))
962 *flags |= QETH_HDR_EXT_UDP;
963}
964
965static inline void qeth_put_buffer_pool_entry(struct qeth_card *card,
966 struct qeth_buffer_pool_entry *entry)
967{
968 list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
969}
970
971static inline int qeth_is_diagass_supported(struct qeth_card *card,
972 enum qeth_diags_cmds cmd)
973{
974 return card->info.diagass_support & (__u32)cmd;
975}
976
977int qeth_send_simple_setassparms_prot(struct qeth_card *card,
978 enum qeth_ipa_funcs ipa_func,
979 u16 cmd_code, u32 *data,
980 enum qeth_prot_versions prot);
981/* IPv4 variant */
982static inline int qeth_send_simple_setassparms(struct qeth_card *card,
983 enum qeth_ipa_funcs ipa_func,
984 u16 cmd_code, u32 *data)
985{
986 return qeth_send_simple_setassparms_prot(card, ipa_func, cmd_code,
987 data, QETH_PROT_IPV4);
988}
989
990static inline int qeth_send_simple_setassparms_v6(struct qeth_card *card,
991 enum qeth_ipa_funcs ipa_func,
992 u16 cmd_code, u32 *data)
993{
994 return qeth_send_simple_setassparms_prot(card, ipa_func, cmd_code,
995 data, QETH_PROT_IPV6);
996}
997
998int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb);
999
1000extern struct qeth_discipline qeth_l2_discipline;
1001extern struct qeth_discipline qeth_l3_discipline;
1002extern const struct ethtool_ops qeth_ethtool_ops;
1003extern const struct ethtool_ops qeth_osn_ethtool_ops;
1004extern const struct attribute_group *qeth_generic_attr_groups[];
1005extern const struct attribute_group *qeth_osn_attr_groups[];
1006extern const struct attribute_group qeth_device_attr_group;
1007extern const struct attribute_group qeth_device_blkt_group;
1008extern const struct device_type qeth_generic_devtype;
1009
1010const char *qeth_get_cardname_short(struct qeth_card *);
1011int qeth_realloc_buffer_pool(struct qeth_card *, int);
1012int qeth_core_load_discipline(struct qeth_card *, enum qeth_discipline_id);
1013void qeth_core_free_discipline(struct qeth_card *);
1014
1015/* exports for qeth discipline device drivers */
1016extern struct kmem_cache *qeth_core_header_cache;
1017extern struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS];
1018
1019struct net_device *qeth_clone_netdev(struct net_device *orig);
1020struct qeth_card *qeth_get_card_by_busid(char *bus_id);
1021void qeth_set_allowed_threads(struct qeth_card *, unsigned long , int);
1022int qeth_threads_running(struct qeth_card *, unsigned long);
1023int qeth_do_run_thread(struct qeth_card *, unsigned long);
1024void qeth_clear_thread_start_bit(struct qeth_card *, unsigned long);
1025void qeth_clear_thread_running_bit(struct qeth_card *, unsigned long);
1026int qeth_core_hardsetup_card(struct qeth_card *card, bool *carrier_ok);
1027void qeth_print_status_message(struct qeth_card *);
1028int qeth_init_qdio_queues(struct qeth_card *);
1029int qeth_send_ipa_cmd(struct qeth_card *, struct qeth_cmd_buffer *,
1030 int (*reply_cb)
1031 (struct qeth_card *, struct qeth_reply *, unsigned long),
1032 void *);
1033struct qeth_cmd_buffer *qeth_ipa_alloc_cmd(struct qeth_card *card,
1034 enum qeth_ipa_cmds cmd_code,
1035 enum qeth_prot_versions prot,
1036 unsigned int data_length);
1037struct qeth_cmd_buffer *qeth_alloc_cmd(struct qeth_channel *channel,
1038 unsigned int length, unsigned int ccws,
1039 long timeout);
1040struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
1041 enum qeth_ipa_funcs ipa_func,
1042 u16 cmd_code,
1043 unsigned int data_length,
1044 enum qeth_prot_versions prot);
1045struct qeth_cmd_buffer *qeth_get_diag_cmd(struct qeth_card *card,
1046 enum qeth_diags_cmds sub_cmd,
1047 unsigned int data_length);
1048void qeth_notify_cmd(struct qeth_cmd_buffer *iob, int reason);
1049void qeth_put_cmd(struct qeth_cmd_buffer *iob);
1050
1051struct sk_buff *qeth_core_get_next_skb(struct qeth_card *,
1052 struct qeth_qdio_buffer *, struct qdio_buffer_element **, int *,
1053 struct qeth_hdr **);
1054void qeth_schedule_recovery(struct qeth_card *);
1055int qeth_poll(struct napi_struct *napi, int budget);
1056void qeth_clear_ipacmd_list(struct qeth_card *);
1057int qeth_qdio_clear_card(struct qeth_card *, int);
1058void qeth_clear_working_pool_list(struct qeth_card *);
1059void qeth_drain_output_queues(struct qeth_card *card);
1060void qeth_setadp_promisc_mode(struct qeth_card *card, bool enable);
1061int qeth_setadpparms_change_macaddr(struct qeth_card *);
1062void qeth_tx_timeout(struct net_device *);
1063void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
1064 u16 cmd_length);
1065int qeth_query_switch_attributes(struct qeth_card *card,
1066 struct qeth_switch_info *sw_info);
1067int qeth_query_card_info(struct qeth_card *card,
1068 struct carrier_info *carrier_info);
1069unsigned int qeth_count_elements(struct sk_buff *skb, unsigned int data_offset);
1070int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
1071 struct sk_buff *skb, struct qeth_hdr *hdr,
1072 unsigned int offset, unsigned int hd_len,
1073 int elements_needed);
1074int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
1075void qeth_dbf_longtext(debug_info_t *id, int level, char *text, ...);
1076int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback);
1077int qeth_configure_cq(struct qeth_card *, enum qeth_cq);
1078int qeth_hw_trap(struct qeth_card *, enum qeth_diags_trap_action);
1079void qeth_trace_features(struct qeth_card *);
1080int qeth_setassparms_cb(struct qeth_card *, struct qeth_reply *, unsigned long);
1081int qeth_set_features(struct net_device *, netdev_features_t);
1082void qeth_enable_hw_features(struct net_device *dev);
1083netdev_features_t qeth_fix_features(struct net_device *, netdev_features_t);
1084netdev_features_t qeth_features_check(struct sk_buff *skb,
1085 struct net_device *dev,
1086 netdev_features_t features);
1087void qeth_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats);
1088u16 qeth_iqd_select_queue(struct net_device *dev, struct sk_buff *skb,
1089 u8 cast_type, struct net_device *sb_dev);
1090int qeth_open(struct net_device *dev);
1091int qeth_stop(struct net_device *dev);
1092
1093int qeth_vm_request_mac(struct qeth_card *card);
1094int qeth_xmit(struct qeth_card *card, struct sk_buff *skb,
1095 struct qeth_qdio_out_q *queue, int ipv,
1096 void (*fill_header)(struct qeth_qdio_out_q *queue,
1097 struct qeth_hdr *hdr, struct sk_buff *skb,
1098 int ipv, unsigned int data_len));
1099
1100/* exports for OSN */
1101int qeth_osn_assist(struct net_device *, void *, int);
1102int qeth_osn_register(unsigned char *read_dev_no, struct net_device **,
1103 int (*assist_cb)(struct net_device *, void *),
1104 int (*data_cb)(struct sk_buff *));
1105void qeth_osn_deregister(struct net_device *);
1106
1107#endif /* __QETH_CORE_H__ */