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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
4 *
5 * Copyright (C) 2011-2013 ASIX
6 */
7
8#include <linux/module.h>
9#include <linux/etherdevice.h>
10#include <linux/mii.h>
11#include <linux/usb.h>
12#include <linux/crc32.h>
13#include <linux/usb/usbnet.h>
14#include <uapi/linux/mdio.h>
15#include <linux/mdio.h>
16
17#define AX88179_PHY_ID 0x03
18#define AX_EEPROM_LEN 0x100
19#define AX88179_EEPROM_MAGIC 0x17900b95
20#define AX_MCAST_FLTSIZE 8
21#define AX_MAX_MCAST 64
22#define AX_INT_PPLS_LINK ((u32)BIT(16))
23#define AX_RXHDR_L4_TYPE_MASK 0x1c
24#define AX_RXHDR_L4_TYPE_UDP 4
25#define AX_RXHDR_L4_TYPE_TCP 16
26#define AX_RXHDR_L3CSUM_ERR 2
27#define AX_RXHDR_L4CSUM_ERR 1
28#define AX_RXHDR_CRC_ERR ((u32)BIT(29))
29#define AX_RXHDR_DROP_ERR ((u32)BIT(31))
30#define AX_ACCESS_MAC 0x01
31#define AX_ACCESS_PHY 0x02
32#define AX_ACCESS_EEPROM 0x04
33#define AX_ACCESS_EFUS 0x05
34#define AX_RELOAD_EEPROM_EFUSE 0x06
35#define AX_PAUSE_WATERLVL_HIGH 0x54
36#define AX_PAUSE_WATERLVL_LOW 0x55
37
38#define PHYSICAL_LINK_STATUS 0x02
39 #define AX_USB_SS 0x04
40 #define AX_USB_HS 0x02
41
42#define GENERAL_STATUS 0x03
43/* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 */
44 #define AX_SECLD 0x04
45
46#define AX_SROM_ADDR 0x07
47#define AX_SROM_CMD 0x0a
48 #define EEP_RD 0x04
49 #define EEP_BUSY 0x10
50
51#define AX_SROM_DATA_LOW 0x08
52#define AX_SROM_DATA_HIGH 0x09
53
54#define AX_RX_CTL 0x0b
55 #define AX_RX_CTL_DROPCRCERR 0x0100
56 #define AX_RX_CTL_IPE 0x0200
57 #define AX_RX_CTL_START 0x0080
58 #define AX_RX_CTL_AP 0x0020
59 #define AX_RX_CTL_AM 0x0010
60 #define AX_RX_CTL_AB 0x0008
61 #define AX_RX_CTL_AMALL 0x0002
62 #define AX_RX_CTL_PRO 0x0001
63 #define AX_RX_CTL_STOP 0x0000
64
65#define AX_NODE_ID 0x10
66#define AX_MULFLTARY 0x16
67
68#define AX_MEDIUM_STATUS_MODE 0x22
69 #define AX_MEDIUM_GIGAMODE 0x01
70 #define AX_MEDIUM_FULL_DUPLEX 0x02
71 #define AX_MEDIUM_EN_125MHZ 0x08
72 #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
73 #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
74 #define AX_MEDIUM_RECEIVE_EN 0x100
75 #define AX_MEDIUM_PS 0x200
76 #define AX_MEDIUM_JUMBO_EN 0x8040
77
78#define AX_MONITOR_MOD 0x24
79 #define AX_MONITOR_MODE_RWLC 0x02
80 #define AX_MONITOR_MODE_RWMP 0x04
81 #define AX_MONITOR_MODE_PMEPOL 0x20
82 #define AX_MONITOR_MODE_PMETYPE 0x40
83
84#define AX_GPIO_CTRL 0x25
85 #define AX_GPIO_CTRL_GPIO3EN 0x80
86 #define AX_GPIO_CTRL_GPIO2EN 0x40
87 #define AX_GPIO_CTRL_GPIO1EN 0x20
88
89#define AX_PHYPWR_RSTCTL 0x26
90 #define AX_PHYPWR_RSTCTL_BZ 0x0010
91 #define AX_PHYPWR_RSTCTL_IPRL 0x0020
92 #define AX_PHYPWR_RSTCTL_AT 0x1000
93
94#define AX_RX_BULKIN_QCTRL 0x2e
95#define AX_CLK_SELECT 0x33
96 #define AX_CLK_SELECT_BCS 0x01
97 #define AX_CLK_SELECT_ACS 0x02
98 #define AX_CLK_SELECT_ULR 0x08
99
100#define AX_RXCOE_CTL 0x34
101 #define AX_RXCOE_IP 0x01
102 #define AX_RXCOE_TCP 0x02
103 #define AX_RXCOE_UDP 0x04
104 #define AX_RXCOE_TCPV6 0x20
105 #define AX_RXCOE_UDPV6 0x40
106
107#define AX_TXCOE_CTL 0x35
108 #define AX_TXCOE_IP 0x01
109 #define AX_TXCOE_TCP 0x02
110 #define AX_TXCOE_UDP 0x04
111 #define AX_TXCOE_TCPV6 0x20
112 #define AX_TXCOE_UDPV6 0x40
113
114#define AX_LEDCTRL 0x73
115
116#define GMII_PHY_PHYSR 0x11
117 #define GMII_PHY_PHYSR_SMASK 0xc000
118 #define GMII_PHY_PHYSR_GIGA 0x8000
119 #define GMII_PHY_PHYSR_100 0x4000
120 #define GMII_PHY_PHYSR_FULL 0x2000
121 #define GMII_PHY_PHYSR_LINK 0x400
122
123#define GMII_LED_ACT 0x1a
124 #define GMII_LED_ACTIVE_MASK 0xff8f
125 #define GMII_LED0_ACTIVE BIT(4)
126 #define GMII_LED1_ACTIVE BIT(5)
127 #define GMII_LED2_ACTIVE BIT(6)
128
129#define GMII_LED_LINK 0x1c
130 #define GMII_LED_LINK_MASK 0xf888
131 #define GMII_LED0_LINK_10 BIT(0)
132 #define GMII_LED0_LINK_100 BIT(1)
133 #define GMII_LED0_LINK_1000 BIT(2)
134 #define GMII_LED1_LINK_10 BIT(4)
135 #define GMII_LED1_LINK_100 BIT(5)
136 #define GMII_LED1_LINK_1000 BIT(6)
137 #define GMII_LED2_LINK_10 BIT(8)
138 #define GMII_LED2_LINK_100 BIT(9)
139 #define GMII_LED2_LINK_1000 BIT(10)
140 #define LED0_ACTIVE BIT(0)
141 #define LED0_LINK_10 BIT(1)
142 #define LED0_LINK_100 BIT(2)
143 #define LED0_LINK_1000 BIT(3)
144 #define LED0_FD BIT(4)
145 #define LED0_USB3_MASK 0x001f
146 #define LED1_ACTIVE BIT(5)
147 #define LED1_LINK_10 BIT(6)
148 #define LED1_LINK_100 BIT(7)
149 #define LED1_LINK_1000 BIT(8)
150 #define LED1_FD BIT(9)
151 #define LED1_USB3_MASK 0x03e0
152 #define LED2_ACTIVE BIT(10)
153 #define LED2_LINK_1000 BIT(13)
154 #define LED2_LINK_100 BIT(12)
155 #define LED2_LINK_10 BIT(11)
156 #define LED2_FD BIT(14)
157 #define LED_VALID BIT(15)
158 #define LED2_USB3_MASK 0x7c00
159
160#define GMII_PHYPAGE 0x1e
161#define GMII_PHY_PAGE_SELECT 0x1f
162 #define GMII_PHY_PGSEL_EXT 0x0007
163 #define GMII_PHY_PGSEL_PAGE0 0x0000
164 #define GMII_PHY_PGSEL_PAGE3 0x0003
165 #define GMII_PHY_PGSEL_PAGE5 0x0005
166
167static int ax88179_reset(struct usbnet *dev);
168
169struct ax88179_data {
170 u8 eee_enabled;
171 u8 eee_active;
172 u16 rxctl;
173 u8 in_pm;
174 u32 wol_supported;
175 u32 wolopts;
176 u8 disconnecting;
177};
178
179struct ax88179_int_data {
180 __le32 intdata1;
181 __le32 intdata2;
182};
183
184static const struct {
185 unsigned char ctrl, timer_l, timer_h, size, ifg;
186} AX88179_BULKIN_SIZE[] = {
187 {7, 0x4f, 0, 0x12, 0xff},
188 {7, 0x20, 3, 0x16, 0xff},
189 {7, 0xae, 7, 0x18, 0xff},
190 {7, 0xcc, 0x4c, 0x18, 8},
191};
192
193static void ax88179_set_pm_mode(struct usbnet *dev, bool pm_mode)
194{
195 struct ax88179_data *ax179_data = dev->driver_priv;
196
197 ax179_data->in_pm = pm_mode;
198}
199
200static int ax88179_in_pm(struct usbnet *dev)
201{
202 struct ax88179_data *ax179_data = dev->driver_priv;
203
204 return ax179_data->in_pm;
205}
206
207static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
208 u16 size, void *data)
209{
210 int ret;
211 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
212 struct ax88179_data *ax179_data = dev->driver_priv;
213
214 BUG_ON(!dev);
215
216 if (!ax88179_in_pm(dev))
217 fn = usbnet_read_cmd;
218 else
219 fn = usbnet_read_cmd_nopm;
220
221 ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
222 value, index, data, size);
223
224 if (unlikely((ret < 0) && !(ret == -ENODEV && ax179_data->disconnecting)))
225 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
226 index, ret);
227
228 return ret;
229}
230
231static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
232 u16 size, const void *data)
233{
234 int ret;
235 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
236 struct ax88179_data *ax179_data = dev->driver_priv;
237
238 BUG_ON(!dev);
239
240 if (!ax88179_in_pm(dev))
241 fn = usbnet_write_cmd;
242 else
243 fn = usbnet_write_cmd_nopm;
244
245 ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
246 value, index, data, size);
247
248 if (unlikely((ret < 0) && !(ret == -ENODEV && ax179_data->disconnecting)))
249 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
250 index, ret);
251
252 return ret;
253}
254
255static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
256 u16 index, u16 size, void *data)
257{
258 u16 buf;
259
260 if (2 == size) {
261 buf = *((u16 *)data);
262 cpu_to_le16s(&buf);
263 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
264 USB_RECIP_DEVICE, value, index, &buf,
265 size);
266 } else {
267 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
268 USB_RECIP_DEVICE, value, index, data,
269 size);
270 }
271}
272
273static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
274 u16 size, void *data)
275{
276 int ret;
277
278 if (2 == size) {
279 u16 buf = 0;
280 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
281 le16_to_cpus(&buf);
282 *((u16 *)data) = buf;
283 } else if (4 == size) {
284 u32 buf = 0;
285 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
286 le32_to_cpus(&buf);
287 *((u32 *)data) = buf;
288 } else {
289 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data);
290 }
291
292 return ret;
293}
294
295static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
296 u16 size, const void *data)
297{
298 int ret;
299
300 if (2 == size) {
301 u16 buf;
302 buf = *((u16 *)data);
303 cpu_to_le16s(&buf);
304 ret = __ax88179_write_cmd(dev, cmd, value, index,
305 size, &buf);
306 } else {
307 ret = __ax88179_write_cmd(dev, cmd, value, index,
308 size, data);
309 }
310
311 return ret;
312}
313
314static void ax88179_status(struct usbnet *dev, struct urb *urb)
315{
316 struct ax88179_int_data *event;
317 u32 link;
318
319 if (urb->actual_length < 8)
320 return;
321
322 event = urb->transfer_buffer;
323 le32_to_cpus((void *)&event->intdata1);
324
325 link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
326
327 if (netif_carrier_ok(dev->net) != link) {
328 usbnet_link_change(dev, link, 1);
329 if (!link)
330 netdev_info(dev->net, "ax88179 - Link status is: 0\n");
331 }
332}
333
334static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
335{
336 struct usbnet *dev = netdev_priv(netdev);
337 u16 res;
338
339 ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
340 return res;
341}
342
343static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
344 int val)
345{
346 struct usbnet *dev = netdev_priv(netdev);
347 u16 res = (u16) val;
348
349 ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
350}
351
352static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
353 u16 devad)
354{
355 u16 tmp16;
356 int ret;
357
358 tmp16 = devad;
359 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
360 MII_MMD_CTRL, 2, &tmp16);
361
362 tmp16 = prtad;
363 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
364 MII_MMD_DATA, 2, &tmp16);
365
366 tmp16 = devad | MII_MMD_CTRL_NOINCR;
367 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
368 MII_MMD_CTRL, 2, &tmp16);
369
370 return ret;
371}
372
373static int
374ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
375{
376 int ret;
377 u16 tmp16;
378
379 ax88179_phy_mmd_indirect(dev, prtad, devad);
380
381 ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
382 MII_MMD_DATA, 2, &tmp16);
383 if (ret < 0)
384 return ret;
385
386 return tmp16;
387}
388
389static int
390ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
391 u16 data)
392{
393 int ret;
394
395 ax88179_phy_mmd_indirect(dev, prtad, devad);
396
397 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
398 MII_MMD_DATA, 2, &data);
399
400 if (ret < 0)
401 return ret;
402
403 return 0;
404}
405
406static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
407{
408 struct usbnet *dev = usb_get_intfdata(intf);
409 struct ax88179_data *priv = dev->driver_priv;
410 u16 tmp16;
411 u8 tmp8;
412
413 ax88179_set_pm_mode(dev, true);
414
415 usbnet_suspend(intf, message);
416
417 /* Enable WoL */
418 if (priv->wolopts) {
419 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
420 1, 1, &tmp8);
421 if (priv->wolopts & WAKE_PHY)
422 tmp8 |= AX_MONITOR_MODE_RWLC;
423 if (priv->wolopts & WAKE_MAGIC)
424 tmp8 |= AX_MONITOR_MODE_RWMP;
425
426 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
427 1, 1, &tmp8);
428 }
429
430 /* Disable RX path */
431 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
432 2, 2, &tmp16);
433 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
434 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
435 2, 2, &tmp16);
436
437 /* Force bulk-in zero length */
438 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
439 2, 2, &tmp16);
440
441 tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
442 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
443 2, 2, &tmp16);
444
445 /* change clock */
446 tmp8 = 0;
447 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
448
449 /* Configure RX control register => stop operation */
450 tmp16 = AX_RX_CTL_STOP;
451 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
452
453 ax88179_set_pm_mode(dev, false);
454
455 return 0;
456}
457
458/* This function is used to enable the autodetach function. */
459/* This function is determined by offset 0x43 of EEPROM */
460static int ax88179_auto_detach(struct usbnet *dev)
461{
462 u16 tmp16;
463 u8 tmp8;
464
465 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
466 return 0;
467
468 if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
469 return 0;
470
471 /* Enable Auto Detach bit */
472 tmp8 = 0;
473 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
474 tmp8 |= AX_CLK_SELECT_ULR;
475 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
476
477 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
478 tmp16 |= AX_PHYPWR_RSTCTL_AT;
479 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
480
481 return 0;
482}
483
484static int ax88179_resume(struct usb_interface *intf)
485{
486 struct usbnet *dev = usb_get_intfdata(intf);
487
488 ax88179_set_pm_mode(dev, true);
489
490 usbnet_link_change(dev, 0, 0);
491
492 ax88179_reset(dev);
493
494 ax88179_set_pm_mode(dev, false);
495
496 return usbnet_resume(intf);
497}
498
499static void ax88179_disconnect(struct usb_interface *intf)
500{
501 struct usbnet *dev = usb_get_intfdata(intf);
502 struct ax88179_data *ax179_data;
503
504 if (!dev)
505 return;
506
507 ax179_data = dev->driver_priv;
508 ax179_data->disconnecting = 1;
509
510 usbnet_disconnect(intf);
511}
512
513static void
514ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
515{
516 struct usbnet *dev = netdev_priv(net);
517 struct ax88179_data *priv = dev->driver_priv;
518
519 wolinfo->supported = priv->wol_supported;
520 wolinfo->wolopts = priv->wolopts;
521}
522
523static int
524ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
525{
526 struct usbnet *dev = netdev_priv(net);
527 struct ax88179_data *priv = dev->driver_priv;
528
529 if (wolinfo->wolopts & ~(priv->wol_supported))
530 return -EINVAL;
531
532 priv->wolopts = wolinfo->wolopts;
533
534 return 0;
535}
536
537static int ax88179_get_eeprom_len(struct net_device *net)
538{
539 return AX_EEPROM_LEN;
540}
541
542static int
543ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
544 u8 *data)
545{
546 struct usbnet *dev = netdev_priv(net);
547 u16 *eeprom_buff;
548 int first_word, last_word;
549 int i, ret;
550
551 if (eeprom->len == 0)
552 return -EINVAL;
553
554 eeprom->magic = AX88179_EEPROM_MAGIC;
555
556 first_word = eeprom->offset >> 1;
557 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
558 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
559 GFP_KERNEL);
560 if (!eeprom_buff)
561 return -ENOMEM;
562
563 /* ax88179/178A returns 2 bytes from eeprom on read */
564 for (i = first_word; i <= last_word; i++) {
565 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
566 &eeprom_buff[i - first_word]);
567 if (ret < 0) {
568 kfree(eeprom_buff);
569 return -EIO;
570 }
571 }
572
573 memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
574 kfree(eeprom_buff);
575 return 0;
576}
577
578static int
579ax88179_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
580 u8 *data)
581{
582 struct usbnet *dev = netdev_priv(net);
583 u16 *eeprom_buff;
584 int first_word;
585 int last_word;
586 int ret;
587 int i;
588
589 netdev_dbg(net, "write EEPROM len %d, offset %d, magic 0x%x\n",
590 eeprom->len, eeprom->offset, eeprom->magic);
591
592 if (eeprom->len == 0)
593 return -EINVAL;
594
595 if (eeprom->magic != AX88179_EEPROM_MAGIC)
596 return -EINVAL;
597
598 first_word = eeprom->offset >> 1;
599 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
600
601 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
602 GFP_KERNEL);
603 if (!eeprom_buff)
604 return -ENOMEM;
605
606 /* align data to 16 bit boundaries, read the missing data from
607 the EEPROM */
608 if (eeprom->offset & 1) {
609 ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, first_word, 1, 2,
610 &eeprom_buff[0]);
611 if (ret < 0) {
612 netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", first_word);
613 goto free;
614 }
615 }
616
617 if ((eeprom->offset + eeprom->len) & 1) {
618 ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, last_word, 1, 2,
619 &eeprom_buff[last_word - first_word]);
620 if (ret < 0) {
621 netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", last_word);
622 goto free;
623 }
624 }
625
626 memcpy((u8 *)eeprom_buff + (eeprom->offset & 1), data, eeprom->len);
627
628 for (i = first_word; i <= last_word; i++) {
629 netdev_dbg(net, "write to EEPROM at offset 0x%02x, data 0x%04x\n",
630 i, eeprom_buff[i - first_word]);
631 ret = ax88179_write_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
632 &eeprom_buff[i - first_word]);
633 if (ret < 0) {
634 netdev_err(net, "Failed to write EEPROM at offset 0x%02x.\n", i);
635 goto free;
636 }
637 msleep(20);
638 }
639
640 /* reload EEPROM data */
641 ret = ax88179_write_cmd(dev, AX_RELOAD_EEPROM_EFUSE, 0x0000, 0, 0, NULL);
642 if (ret < 0) {
643 netdev_err(net, "Failed to reload EEPROM data\n");
644 goto free;
645 }
646
647 ret = 0;
648free:
649 kfree(eeprom_buff);
650 return ret;
651}
652
653static int ax88179_get_link_ksettings(struct net_device *net,
654 struct ethtool_link_ksettings *cmd)
655{
656 struct usbnet *dev = netdev_priv(net);
657
658 mii_ethtool_get_link_ksettings(&dev->mii, cmd);
659
660 return 0;
661}
662
663static int ax88179_set_link_ksettings(struct net_device *net,
664 const struct ethtool_link_ksettings *cmd)
665{
666 struct usbnet *dev = netdev_priv(net);
667 return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
668}
669
670static int
671ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_keee *data)
672{
673 int val;
674
675 /* Get Supported EEE */
676 val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
677 MDIO_MMD_PCS);
678 if (val < 0)
679 return val;
680 mii_eee_cap1_mod_linkmode_t(data->supported, val);
681
682 /* Get advertisement EEE */
683 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
684 MDIO_MMD_AN);
685 if (val < 0)
686 return val;
687 mii_eee_cap1_mod_linkmode_t(data->advertised, val);
688
689 /* Get LP advertisement EEE */
690 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
691 MDIO_MMD_AN);
692 if (val < 0)
693 return val;
694 mii_eee_cap1_mod_linkmode_t(data->lp_advertised, val);
695
696 return 0;
697}
698
699static int
700ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_keee *data)
701{
702 u16 tmp16 = linkmode_to_mii_eee_cap1_t(data->advertised);
703
704 return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
705 MDIO_MMD_AN, tmp16);
706}
707
708static int ax88179_chk_eee(struct usbnet *dev)
709{
710 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
711 struct ax88179_data *priv = dev->driver_priv;
712
713 mii_ethtool_gset(&dev->mii, &ecmd);
714
715 if (ecmd.duplex & DUPLEX_FULL) {
716 int eee_lp, eee_cap, eee_adv;
717 u32 lp, cap, adv, supported = 0;
718
719 eee_cap = ax88179_phy_read_mmd_indirect(dev,
720 MDIO_PCS_EEE_ABLE,
721 MDIO_MMD_PCS);
722 if (eee_cap < 0) {
723 priv->eee_active = 0;
724 return false;
725 }
726
727 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
728 if (!cap) {
729 priv->eee_active = 0;
730 return false;
731 }
732
733 eee_lp = ax88179_phy_read_mmd_indirect(dev,
734 MDIO_AN_EEE_LPABLE,
735 MDIO_MMD_AN);
736 if (eee_lp < 0) {
737 priv->eee_active = 0;
738 return false;
739 }
740
741 eee_adv = ax88179_phy_read_mmd_indirect(dev,
742 MDIO_AN_EEE_ADV,
743 MDIO_MMD_AN);
744
745 if (eee_adv < 0) {
746 priv->eee_active = 0;
747 return false;
748 }
749
750 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
751 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
752 supported = (ecmd.speed == SPEED_1000) ?
753 SUPPORTED_1000baseT_Full :
754 SUPPORTED_100baseT_Full;
755
756 if (!(lp & adv & supported)) {
757 priv->eee_active = 0;
758 return false;
759 }
760
761 priv->eee_active = 1;
762 return true;
763 }
764
765 priv->eee_active = 0;
766 return false;
767}
768
769static void ax88179_disable_eee(struct usbnet *dev)
770{
771 u16 tmp16;
772
773 tmp16 = GMII_PHY_PGSEL_PAGE3;
774 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
775 GMII_PHY_PAGE_SELECT, 2, &tmp16);
776
777 tmp16 = 0x3246;
778 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
779 MII_PHYADDR, 2, &tmp16);
780
781 tmp16 = GMII_PHY_PGSEL_PAGE0;
782 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
783 GMII_PHY_PAGE_SELECT, 2, &tmp16);
784}
785
786static void ax88179_enable_eee(struct usbnet *dev)
787{
788 u16 tmp16;
789
790 tmp16 = GMII_PHY_PGSEL_PAGE3;
791 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
792 GMII_PHY_PAGE_SELECT, 2, &tmp16);
793
794 tmp16 = 0x3247;
795 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
796 MII_PHYADDR, 2, &tmp16);
797
798 tmp16 = GMII_PHY_PGSEL_PAGE5;
799 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
800 GMII_PHY_PAGE_SELECT, 2, &tmp16);
801
802 tmp16 = 0x0680;
803 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
804 MII_BMSR, 2, &tmp16);
805
806 tmp16 = GMII_PHY_PGSEL_PAGE0;
807 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
808 GMII_PHY_PAGE_SELECT, 2, &tmp16);
809}
810
811static int ax88179_get_eee(struct net_device *net, struct ethtool_keee *edata)
812{
813 struct usbnet *dev = netdev_priv(net);
814 struct ax88179_data *priv = dev->driver_priv;
815
816 edata->eee_enabled = priv->eee_enabled;
817 edata->eee_active = priv->eee_active;
818
819 return ax88179_ethtool_get_eee(dev, edata);
820}
821
822static int ax88179_set_eee(struct net_device *net, struct ethtool_keee *edata)
823{
824 struct usbnet *dev = netdev_priv(net);
825 struct ax88179_data *priv = dev->driver_priv;
826 int ret;
827
828 priv->eee_enabled = edata->eee_enabled;
829 if (!priv->eee_enabled) {
830 ax88179_disable_eee(dev);
831 } else {
832 priv->eee_enabled = ax88179_chk_eee(dev);
833 if (!priv->eee_enabled)
834 return -EOPNOTSUPP;
835
836 ax88179_enable_eee(dev);
837 }
838
839 ret = ax88179_ethtool_set_eee(dev, edata);
840 if (ret)
841 return ret;
842
843 mii_nway_restart(&dev->mii);
844
845 usbnet_link_change(dev, 0, 0);
846
847 return ret;
848}
849
850static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
851{
852 struct usbnet *dev = netdev_priv(net);
853 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
854}
855
856static const struct ethtool_ops ax88179_ethtool_ops = {
857 .get_link = ethtool_op_get_link,
858 .get_msglevel = usbnet_get_msglevel,
859 .set_msglevel = usbnet_set_msglevel,
860 .get_wol = ax88179_get_wol,
861 .set_wol = ax88179_set_wol,
862 .get_eeprom_len = ax88179_get_eeprom_len,
863 .get_eeprom = ax88179_get_eeprom,
864 .set_eeprom = ax88179_set_eeprom,
865 .get_eee = ax88179_get_eee,
866 .set_eee = ax88179_set_eee,
867 .nway_reset = usbnet_nway_reset,
868 .get_link_ksettings = ax88179_get_link_ksettings,
869 .set_link_ksettings = ax88179_set_link_ksettings,
870 .get_ts_info = ethtool_op_get_ts_info,
871};
872
873static void ax88179_set_multicast(struct net_device *net)
874{
875 struct usbnet *dev = netdev_priv(net);
876 struct ax88179_data *data = dev->driver_priv;
877 u8 *m_filter = ((u8 *)dev->data);
878
879 data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
880
881 if (net->flags & IFF_PROMISC) {
882 data->rxctl |= AX_RX_CTL_PRO;
883 } else if (net->flags & IFF_ALLMULTI ||
884 netdev_mc_count(net) > AX_MAX_MCAST) {
885 data->rxctl |= AX_RX_CTL_AMALL;
886 } else if (netdev_mc_empty(net)) {
887 /* just broadcast and directed */
888 } else {
889 /* We use dev->data for our 8 byte filter buffer
890 * to avoid allocating memory that is tricky to free later
891 */
892 u32 crc_bits;
893 struct netdev_hw_addr *ha;
894
895 memset(m_filter, 0, AX_MCAST_FLTSIZE);
896
897 netdev_for_each_mc_addr(ha, net) {
898 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
899 *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
900 }
901
902 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
903 AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
904 m_filter);
905
906 data->rxctl |= AX_RX_CTL_AM;
907 }
908
909 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
910 2, 2, &data->rxctl);
911}
912
913static int
914ax88179_set_features(struct net_device *net, netdev_features_t features)
915{
916 u8 tmp;
917 struct usbnet *dev = netdev_priv(net);
918 netdev_features_t changed = net->features ^ features;
919
920 if (changed & NETIF_F_IP_CSUM) {
921 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
922 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
923 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
924 }
925
926 if (changed & NETIF_F_IPV6_CSUM) {
927 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
928 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
929 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
930 }
931
932 if (changed & NETIF_F_RXCSUM) {
933 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
934 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
935 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
936 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
937 }
938
939 return 0;
940}
941
942static int ax88179_change_mtu(struct net_device *net, int new_mtu)
943{
944 struct usbnet *dev = netdev_priv(net);
945 u16 tmp16;
946
947 WRITE_ONCE(net->mtu, new_mtu);
948 dev->hard_mtu = net->mtu + net->hard_header_len;
949
950 if (net->mtu > 1500) {
951 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
952 2, 2, &tmp16);
953 tmp16 |= AX_MEDIUM_JUMBO_EN;
954 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
955 2, 2, &tmp16);
956 } else {
957 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
958 2, 2, &tmp16);
959 tmp16 &= ~AX_MEDIUM_JUMBO_EN;
960 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
961 2, 2, &tmp16);
962 }
963
964 /* max qlen depend on hard_mtu and rx_urb_size */
965 usbnet_update_max_qlen(dev);
966
967 return 0;
968}
969
970static int ax88179_set_mac_addr(struct net_device *net, void *p)
971{
972 struct usbnet *dev = netdev_priv(net);
973 struct sockaddr *addr = p;
974 int ret;
975
976 if (netif_running(net))
977 return -EBUSY;
978 if (!is_valid_ether_addr(addr->sa_data))
979 return -EADDRNOTAVAIL;
980
981 eth_hw_addr_set(net, addr->sa_data);
982
983 /* Set the MAC address */
984 ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
985 ETH_ALEN, net->dev_addr);
986 if (ret < 0)
987 return ret;
988
989 return 0;
990}
991
992static const struct net_device_ops ax88179_netdev_ops = {
993 .ndo_open = usbnet_open,
994 .ndo_stop = usbnet_stop,
995 .ndo_start_xmit = usbnet_start_xmit,
996 .ndo_tx_timeout = usbnet_tx_timeout,
997 .ndo_get_stats64 = dev_get_tstats64,
998 .ndo_change_mtu = ax88179_change_mtu,
999 .ndo_set_mac_address = ax88179_set_mac_addr,
1000 .ndo_validate_addr = eth_validate_addr,
1001 .ndo_eth_ioctl = ax88179_ioctl,
1002 .ndo_set_rx_mode = ax88179_set_multicast,
1003 .ndo_set_features = ax88179_set_features,
1004};
1005
1006static int ax88179_check_eeprom(struct usbnet *dev)
1007{
1008 u8 i, buf, eeprom[20];
1009 u16 csum, delay = HZ / 10;
1010 unsigned long jtimeout;
1011
1012 /* Read EEPROM content */
1013 for (i = 0; i < 6; i++) {
1014 buf = i;
1015 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1016 1, 1, &buf) < 0)
1017 return -EINVAL;
1018
1019 buf = EEP_RD;
1020 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1021 1, 1, &buf) < 0)
1022 return -EINVAL;
1023
1024 jtimeout = jiffies + delay;
1025 do {
1026 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1027 1, 1, &buf);
1028
1029 if (time_after(jiffies, jtimeout))
1030 return -EINVAL;
1031
1032 } while (buf & EEP_BUSY);
1033
1034 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1035 2, 2, &eeprom[i * 2]);
1036
1037 if ((i == 0) && (eeprom[0] == 0xFF))
1038 return -EINVAL;
1039 }
1040
1041 csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
1042 csum = (csum >> 8) + (csum & 0xff);
1043 if ((csum + eeprom[10]) != 0xff)
1044 return -EINVAL;
1045
1046 return 0;
1047}
1048
1049static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
1050{
1051 u8 i;
1052 u8 efuse[64];
1053 u16 csum = 0;
1054
1055 if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
1056 return -EINVAL;
1057
1058 if (*efuse == 0xFF)
1059 return -EINVAL;
1060
1061 for (i = 0; i < 64; i++)
1062 csum = csum + efuse[i];
1063
1064 while (csum > 255)
1065 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
1066
1067 if (csum != 0xFF)
1068 return -EINVAL;
1069
1070 *ledmode = (efuse[51] << 8) | efuse[52];
1071
1072 return 0;
1073}
1074
1075static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
1076{
1077 u16 led;
1078
1079 /* Loaded the old eFuse LED Mode */
1080 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
1081 return -EINVAL;
1082
1083 led >>= 8;
1084 switch (led) {
1085 case 0xFF:
1086 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1087 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1088 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1089 break;
1090 case 0xFE:
1091 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
1092 break;
1093 case 0xFD:
1094 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
1095 LED2_LINK_10 | LED_VALID;
1096 break;
1097 case 0xFC:
1098 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
1099 LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
1100 break;
1101 default:
1102 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1103 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1104 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1105 break;
1106 }
1107
1108 *ledvalue = led;
1109
1110 return 0;
1111}
1112
1113static int ax88179_led_setting(struct usbnet *dev)
1114{
1115 u8 ledfd, value = 0;
1116 u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
1117 unsigned long jtimeout;
1118
1119 /* Check AX88179 version. UA1 or UA2*/
1120 ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
1121
1122 if (!(value & AX_SECLD)) { /* UA1 */
1123 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
1124 AX_GPIO_CTRL_GPIO1EN;
1125 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
1126 1, 1, &value) < 0)
1127 return -EINVAL;
1128 }
1129
1130 /* Check EEPROM */
1131 if (!ax88179_check_eeprom(dev)) {
1132 value = 0x42;
1133 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1134 1, 1, &value) < 0)
1135 return -EINVAL;
1136
1137 value = EEP_RD;
1138 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1139 1, 1, &value) < 0)
1140 return -EINVAL;
1141
1142 jtimeout = jiffies + delay;
1143 do {
1144 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1145 1, 1, &value);
1146
1147 if (time_after(jiffies, jtimeout))
1148 return -EINVAL;
1149
1150 } while (value & EEP_BUSY);
1151
1152 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
1153 1, 1, &value);
1154 ledvalue = (value << 8);
1155
1156 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1157 1, 1, &value);
1158 ledvalue |= value;
1159
1160 /* load internal ROM for defaule setting */
1161 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1162 ax88179_convert_old_led(dev, &ledvalue);
1163
1164 } else if (!ax88179_check_efuse(dev, &ledvalue)) {
1165 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1166 ax88179_convert_old_led(dev, &ledvalue);
1167 } else {
1168 ax88179_convert_old_led(dev, &ledvalue);
1169 }
1170
1171 tmp = GMII_PHY_PGSEL_EXT;
1172 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1173 GMII_PHY_PAGE_SELECT, 2, &tmp);
1174
1175 tmp = 0x2c;
1176 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1177 GMII_PHYPAGE, 2, &tmp);
1178
1179 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1180 GMII_LED_ACT, 2, &ledact);
1181
1182 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1183 GMII_LED_LINK, 2, &ledlink);
1184
1185 ledact &= GMII_LED_ACTIVE_MASK;
1186 ledlink &= GMII_LED_LINK_MASK;
1187
1188 if (ledvalue & LED0_ACTIVE)
1189 ledact |= GMII_LED0_ACTIVE;
1190
1191 if (ledvalue & LED1_ACTIVE)
1192 ledact |= GMII_LED1_ACTIVE;
1193
1194 if (ledvalue & LED2_ACTIVE)
1195 ledact |= GMII_LED2_ACTIVE;
1196
1197 if (ledvalue & LED0_LINK_10)
1198 ledlink |= GMII_LED0_LINK_10;
1199
1200 if (ledvalue & LED1_LINK_10)
1201 ledlink |= GMII_LED1_LINK_10;
1202
1203 if (ledvalue & LED2_LINK_10)
1204 ledlink |= GMII_LED2_LINK_10;
1205
1206 if (ledvalue & LED0_LINK_100)
1207 ledlink |= GMII_LED0_LINK_100;
1208
1209 if (ledvalue & LED1_LINK_100)
1210 ledlink |= GMII_LED1_LINK_100;
1211
1212 if (ledvalue & LED2_LINK_100)
1213 ledlink |= GMII_LED2_LINK_100;
1214
1215 if (ledvalue & LED0_LINK_1000)
1216 ledlink |= GMII_LED0_LINK_1000;
1217
1218 if (ledvalue & LED1_LINK_1000)
1219 ledlink |= GMII_LED1_LINK_1000;
1220
1221 if (ledvalue & LED2_LINK_1000)
1222 ledlink |= GMII_LED2_LINK_1000;
1223
1224 tmp = ledact;
1225 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1226 GMII_LED_ACT, 2, &tmp);
1227
1228 tmp = ledlink;
1229 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1230 GMII_LED_LINK, 2, &tmp);
1231
1232 tmp = GMII_PHY_PGSEL_PAGE0;
1233 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1234 GMII_PHY_PAGE_SELECT, 2, &tmp);
1235
1236 /* LED full duplex setting */
1237 ledfd = 0;
1238 if (ledvalue & LED0_FD)
1239 ledfd |= 0x01;
1240 else if ((ledvalue & LED0_USB3_MASK) == 0)
1241 ledfd |= 0x02;
1242
1243 if (ledvalue & LED1_FD)
1244 ledfd |= 0x04;
1245 else if ((ledvalue & LED1_USB3_MASK) == 0)
1246 ledfd |= 0x08;
1247
1248 if (ledvalue & LED2_FD)
1249 ledfd |= 0x10;
1250 else if ((ledvalue & LED2_USB3_MASK) == 0)
1251 ledfd |= 0x20;
1252
1253 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
1254
1255 return 0;
1256}
1257
1258static void ax88179_get_mac_addr(struct usbnet *dev)
1259{
1260 u8 mac[ETH_ALEN];
1261
1262 memset(mac, 0, sizeof(mac));
1263
1264 /* Maybe the boot loader passed the MAC address via device tree */
1265 if (!eth_platform_get_mac_address(&dev->udev->dev, mac)) {
1266 netif_dbg(dev, ifup, dev->net,
1267 "MAC address read from device tree");
1268 } else {
1269 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1270 ETH_ALEN, mac);
1271 netif_dbg(dev, ifup, dev->net,
1272 "MAC address read from ASIX chip");
1273 }
1274
1275 if (is_valid_ether_addr(mac)) {
1276 eth_hw_addr_set(dev->net, mac);
1277 if (!is_local_ether_addr(mac))
1278 dev->net->addr_assign_type = NET_ADDR_PERM;
1279 } else {
1280 netdev_info(dev->net, "invalid MAC address, using random\n");
1281 }
1282
1283 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1284 dev->net->dev_addr);
1285}
1286
1287static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
1288{
1289 struct ax88179_data *ax179_data;
1290 int ret;
1291
1292 ret = usbnet_get_endpoints(dev, intf);
1293 if (ret < 0)
1294 return ret;
1295
1296 ax179_data = kzalloc(sizeof(*ax179_data), GFP_KERNEL);
1297 if (!ax179_data)
1298 return -ENOMEM;
1299
1300 dev->driver_priv = ax179_data;
1301
1302 dev->net->netdev_ops = &ax88179_netdev_ops;
1303 dev->net->ethtool_ops = &ax88179_ethtool_ops;
1304 dev->net->needed_headroom = 8;
1305 dev->net->max_mtu = 4088;
1306
1307 /* Initialize MII structure */
1308 dev->mii.dev = dev->net;
1309 dev->mii.mdio_read = ax88179_mdio_read;
1310 dev->mii.mdio_write = ax88179_mdio_write;
1311 dev->mii.phy_id_mask = 0xff;
1312 dev->mii.reg_num_mask = 0xff;
1313 dev->mii.phy_id = 0x03;
1314 dev->mii.supports_gmii = 1;
1315
1316 dev->net->features |= NETIF_F_SG | NETIF_F_IP_CSUM |
1317 NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | NETIF_F_TSO;
1318
1319 dev->net->hw_features |= dev->net->features;
1320
1321 netif_set_tso_max_size(dev->net, 16384);
1322
1323 ax88179_reset(dev);
1324
1325 return 0;
1326}
1327
1328static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1329{
1330 struct ax88179_data *ax179_data = dev->driver_priv;
1331 u16 tmp16;
1332
1333 /* Configure RX control register => stop operation */
1334 tmp16 = AX_RX_CTL_STOP;
1335 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1336
1337 tmp16 = 0;
1338 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1339
1340 /* Power down ethernet PHY */
1341 tmp16 = 0;
1342 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1343
1344 kfree(ax179_data);
1345}
1346
1347static void
1348ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1349{
1350 skb->ip_summed = CHECKSUM_NONE;
1351
1352 /* checksum error bit is set */
1353 if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1354 (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1355 return;
1356
1357 /* It must be a TCP or UDP packet with a valid checksum */
1358 if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1359 ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1360 skb->ip_summed = CHECKSUM_UNNECESSARY;
1361}
1362
1363static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1364{
1365 struct sk_buff *ax_skb;
1366 int pkt_cnt;
1367 u32 rx_hdr;
1368 u16 hdr_off;
1369 u32 *pkt_hdr;
1370
1371 /* At the end of the SKB, there's a header telling us how many packets
1372 * are bundled into this buffer and where we can find an array of
1373 * per-packet metadata (which contains elements encoded into u16).
1374 */
1375
1376 /* SKB contents for current firmware:
1377 * <packet 1> <padding>
1378 * ...
1379 * <packet N> <padding>
1380 * <per-packet metadata entry 1> <dummy header>
1381 * ...
1382 * <per-packet metadata entry N> <dummy header>
1383 * <padding2> <rx_hdr>
1384 *
1385 * where:
1386 * <packet N> contains pkt_len bytes:
1387 * 2 bytes of IP alignment pseudo header
1388 * packet received
1389 * <per-packet metadata entry N> contains 4 bytes:
1390 * pkt_len and fields AX_RXHDR_*
1391 * <padding> 0-7 bytes to terminate at
1392 * 8 bytes boundary (64-bit).
1393 * <padding2> 4 bytes to make rx_hdr terminate at
1394 * 8 bytes boundary (64-bit)
1395 * <dummy-header> contains 4 bytes:
1396 * pkt_len=0 and AX_RXHDR_DROP_ERR
1397 * <rx-hdr> contains 4 bytes:
1398 * pkt_cnt and hdr_off (offset of
1399 * <per-packet metadata entry 1>)
1400 *
1401 * pkt_cnt is number of entrys in the per-packet metadata.
1402 * In current firmware there is 2 entrys per packet.
1403 * The first points to the packet and the
1404 * second is a dummy header.
1405 * This was done probably to align fields in 64-bit and
1406 * maintain compatibility with old firmware.
1407 * This code assumes that <dummy header> and <padding2> are
1408 * optional.
1409 */
1410
1411 if (skb->len < 4)
1412 return 0;
1413 skb_trim(skb, skb->len - 4);
1414 rx_hdr = get_unaligned_le32(skb_tail_pointer(skb));
1415 pkt_cnt = (u16)rx_hdr;
1416 hdr_off = (u16)(rx_hdr >> 16);
1417
1418 if (pkt_cnt == 0)
1419 return 0;
1420
1421 /* Make sure that the bounds of the metadata array are inside the SKB
1422 * (and in front of the counter at the end).
1423 */
1424 if (pkt_cnt * 4 + hdr_off > skb->len)
1425 return 0;
1426 pkt_hdr = (u32 *)(skb->data + hdr_off);
1427
1428 /* Packets must not overlap the metadata array */
1429 skb_trim(skb, hdr_off);
1430
1431 for (; pkt_cnt > 0; pkt_cnt--, pkt_hdr++) {
1432 u16 pkt_len_plus_padd;
1433 u16 pkt_len;
1434
1435 le32_to_cpus(pkt_hdr);
1436 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1437 pkt_len_plus_padd = (pkt_len + 7) & 0xfff8;
1438
1439 /* Skip dummy header used for alignment
1440 */
1441 if (pkt_len == 0)
1442 continue;
1443
1444 if (pkt_len_plus_padd > skb->len)
1445 return 0;
1446
1447 /* Check CRC or runt packet */
1448 if ((*pkt_hdr & (AX_RXHDR_CRC_ERR | AX_RXHDR_DROP_ERR)) ||
1449 pkt_len < 2 + ETH_HLEN) {
1450 dev->net->stats.rx_errors++;
1451 skb_pull(skb, pkt_len_plus_padd);
1452 continue;
1453 }
1454
1455 /* last packet */
1456 if (pkt_len_plus_padd == skb->len) {
1457 skb_trim(skb, pkt_len);
1458
1459 /* Skip IP alignment pseudo header */
1460 skb_pull(skb, 2);
1461
1462 ax88179_rx_checksum(skb, pkt_hdr);
1463 return 1;
1464 }
1465
1466 ax_skb = netdev_alloc_skb_ip_align(dev->net, pkt_len);
1467 if (!ax_skb)
1468 return 0;
1469 skb_put(ax_skb, pkt_len);
1470 memcpy(ax_skb->data, skb->data + 2, pkt_len);
1471
1472 ax88179_rx_checksum(ax_skb, pkt_hdr);
1473 usbnet_skb_return(dev, ax_skb);
1474
1475 skb_pull(skb, pkt_len_plus_padd);
1476 }
1477
1478 return 0;
1479}
1480
1481static struct sk_buff *
1482ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1483{
1484 u32 tx_hdr1, tx_hdr2;
1485 int frame_size = dev->maxpacket;
1486 int headroom;
1487 void *ptr;
1488
1489 tx_hdr1 = skb->len;
1490 tx_hdr2 = skb_shinfo(skb)->gso_size; /* Set TSO mss */
1491 if (((skb->len + 8) % frame_size) == 0)
1492 tx_hdr2 |= 0x80008000; /* Enable padding */
1493
1494 headroom = skb_headroom(skb) - 8;
1495
1496 if ((dev->net->features & NETIF_F_SG) && skb_linearize(skb))
1497 return NULL;
1498
1499 if ((skb_header_cloned(skb) || headroom < 0) &&
1500 pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1501 dev_kfree_skb_any(skb);
1502 return NULL;
1503 }
1504
1505 ptr = skb_push(skb, 8);
1506 put_unaligned_le32(tx_hdr1, ptr);
1507 put_unaligned_le32(tx_hdr2, ptr + 4);
1508
1509 usbnet_set_skb_tx_stats(skb, (skb_shinfo(skb)->gso_segs ?: 1), 0);
1510
1511 return skb;
1512}
1513
1514static int ax88179_link_reset(struct usbnet *dev)
1515{
1516 struct ax88179_data *ax179_data = dev->driver_priv;
1517 u8 tmp[5], link_sts;
1518 u16 mode, tmp16, delay = HZ / 10;
1519 u32 tmp32 = 0x40000000;
1520 unsigned long jtimeout;
1521
1522 jtimeout = jiffies + delay;
1523 while (tmp32 & 0x40000000) {
1524 mode = 0;
1525 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1526 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1527 &ax179_data->rxctl);
1528
1529 /*link up, check the usb device control TX FIFO full or empty*/
1530 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1531
1532 if (time_after(jiffies, jtimeout))
1533 return 0;
1534 }
1535
1536 mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1537 AX_MEDIUM_RXFLOW_CTRLEN;
1538
1539 ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1540 1, 1, &link_sts);
1541
1542 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1543 GMII_PHY_PHYSR, 2, &tmp16);
1544
1545 if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1546 netdev_info(dev->net, "ax88179 - Link status is: 0\n");
1547 return 0;
1548 } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1549 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1550 if (dev->net->mtu > 1500)
1551 mode |= AX_MEDIUM_JUMBO_EN;
1552
1553 if (link_sts & AX_USB_SS)
1554 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1555 else if (link_sts & AX_USB_HS)
1556 memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1557 else
1558 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1559 } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1560 mode |= AX_MEDIUM_PS;
1561
1562 if (link_sts & (AX_USB_SS | AX_USB_HS))
1563 memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1564 else
1565 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1566 } else {
1567 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1568 }
1569
1570 /* RX bulk configuration */
1571 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1572
1573 dev->rx_urb_size = (1024 * (tmp[3] + 2));
1574
1575 if (tmp16 & GMII_PHY_PHYSR_FULL)
1576 mode |= AX_MEDIUM_FULL_DUPLEX;
1577 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1578 2, 2, &mode);
1579
1580 ax179_data->eee_enabled = ax88179_chk_eee(dev);
1581
1582 netif_carrier_on(dev->net);
1583
1584 netdev_info(dev->net, "ax88179 - Link status is: 1\n");
1585
1586 return 0;
1587}
1588
1589static int ax88179_reset(struct usbnet *dev)
1590{
1591 u8 buf[5];
1592 u16 *tmp16;
1593 u8 *tmp;
1594 struct ax88179_data *ax179_data = dev->driver_priv;
1595 struct ethtool_keee eee_data;
1596
1597 tmp16 = (u16 *)buf;
1598 tmp = (u8 *)buf;
1599
1600 /* Power up ethernet PHY */
1601 *tmp16 = 0;
1602 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1603
1604 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1605 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1606 msleep(500);
1607
1608 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1609 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1610 msleep(200);
1611
1612 /* Ethernet PHY Auto Detach*/
1613 ax88179_auto_detach(dev);
1614
1615 /* Read MAC address from DTB or asix chip */
1616 ax88179_get_mac_addr(dev);
1617 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1618
1619 /* RX bulk configuration */
1620 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1621 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1622
1623 dev->rx_urb_size = 1024 * 20;
1624
1625 *tmp = 0x34;
1626 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1627
1628 *tmp = 0x52;
1629 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1630 1, 1, tmp);
1631
1632 /* Enable checksum offload */
1633 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1634 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1635 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1636
1637 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1638 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1639 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1640
1641 /* Configure RX control register => start operation */
1642 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1643 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1644 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1645
1646 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1647 AX_MONITOR_MODE_RWMP;
1648 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1649
1650 /* Configure default medium type => giga */
1651 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1652 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1653 AX_MEDIUM_GIGAMODE;
1654 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1655 2, 2, tmp16);
1656
1657 /* Check if WoL is supported */
1658 ax179_data->wol_supported = 0;
1659 if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
1660 1, 1, &tmp) > 0)
1661 ax179_data->wol_supported = WAKE_MAGIC | WAKE_PHY;
1662
1663 ax88179_led_setting(dev);
1664
1665 ax179_data->eee_enabled = 0;
1666 ax179_data->eee_active = 0;
1667
1668 ax88179_disable_eee(dev);
1669
1670 ax88179_ethtool_get_eee(dev, &eee_data);
1671 linkmode_zero(eee_data.advertised);
1672 ax88179_ethtool_set_eee(dev, &eee_data);
1673
1674 /* Restart autoneg */
1675 mii_nway_restart(&dev->mii);
1676
1677 usbnet_link_change(dev, 0, 0);
1678
1679 return 0;
1680}
1681
1682static int ax88179_net_reset(struct usbnet *dev)
1683{
1684 u16 tmp16;
1685
1686 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, GMII_PHY_PHYSR,
1687 2, &tmp16);
1688 if (tmp16) {
1689 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1690 2, 2, &tmp16);
1691 if (!(tmp16 & AX_MEDIUM_RECEIVE_EN)) {
1692 tmp16 |= AX_MEDIUM_RECEIVE_EN;
1693 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1694 2, 2, &tmp16);
1695 }
1696 } else {
1697 ax88179_reset(dev);
1698 }
1699
1700 return 0;
1701}
1702
1703static int ax88179_stop(struct usbnet *dev)
1704{
1705 u16 tmp16;
1706
1707 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1708 2, 2, &tmp16);
1709 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1710 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1711 2, 2, &tmp16);
1712
1713 return 0;
1714}
1715
1716static const struct driver_info ax88179_info = {
1717 .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1718 .bind = ax88179_bind,
1719 .unbind = ax88179_unbind,
1720 .status = ax88179_status,
1721 .link_reset = ax88179_link_reset,
1722 .reset = ax88179_net_reset,
1723 .stop = ax88179_stop,
1724 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1725 .rx_fixup = ax88179_rx_fixup,
1726 .tx_fixup = ax88179_tx_fixup,
1727};
1728
1729static const struct driver_info ax88178a_info = {
1730 .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1731 .bind = ax88179_bind,
1732 .unbind = ax88179_unbind,
1733 .status = ax88179_status,
1734 .link_reset = ax88179_link_reset,
1735 .reset = ax88179_net_reset,
1736 .stop = ax88179_stop,
1737 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1738 .rx_fixup = ax88179_rx_fixup,
1739 .tx_fixup = ax88179_tx_fixup,
1740};
1741
1742static const struct driver_info cypress_GX3_info = {
1743 .description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
1744 .bind = ax88179_bind,
1745 .unbind = ax88179_unbind,
1746 .status = ax88179_status,
1747 .link_reset = ax88179_link_reset,
1748 .reset = ax88179_net_reset,
1749 .stop = ax88179_stop,
1750 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1751 .rx_fixup = ax88179_rx_fixup,
1752 .tx_fixup = ax88179_tx_fixup,
1753};
1754
1755static const struct driver_info dlink_dub1312_info = {
1756 .description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
1757 .bind = ax88179_bind,
1758 .unbind = ax88179_unbind,
1759 .status = ax88179_status,
1760 .link_reset = ax88179_link_reset,
1761 .reset = ax88179_net_reset,
1762 .stop = ax88179_stop,
1763 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1764 .rx_fixup = ax88179_rx_fixup,
1765 .tx_fixup = ax88179_tx_fixup,
1766};
1767
1768static const struct driver_info sitecom_info = {
1769 .description = "Sitecom USB 3.0 to Gigabit Adapter",
1770 .bind = ax88179_bind,
1771 .unbind = ax88179_unbind,
1772 .status = ax88179_status,
1773 .link_reset = ax88179_link_reset,
1774 .reset = ax88179_net_reset,
1775 .stop = ax88179_stop,
1776 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1777 .rx_fixup = ax88179_rx_fixup,
1778 .tx_fixup = ax88179_tx_fixup,
1779};
1780
1781static const struct driver_info samsung_info = {
1782 .description = "Samsung USB Ethernet Adapter",
1783 .bind = ax88179_bind,
1784 .unbind = ax88179_unbind,
1785 .status = ax88179_status,
1786 .link_reset = ax88179_link_reset,
1787 .reset = ax88179_net_reset,
1788 .stop = ax88179_stop,
1789 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1790 .rx_fixup = ax88179_rx_fixup,
1791 .tx_fixup = ax88179_tx_fixup,
1792};
1793
1794static const struct driver_info lenovo_info = {
1795 .description = "Lenovo OneLinkDock Gigabit LAN",
1796 .bind = ax88179_bind,
1797 .unbind = ax88179_unbind,
1798 .status = ax88179_status,
1799 .link_reset = ax88179_link_reset,
1800 .reset = ax88179_net_reset,
1801 .stop = ax88179_stop,
1802 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1803 .rx_fixup = ax88179_rx_fixup,
1804 .tx_fixup = ax88179_tx_fixup,
1805};
1806
1807static const struct driver_info belkin_info = {
1808 .description = "Belkin USB Ethernet Adapter",
1809 .bind = ax88179_bind,
1810 .unbind = ax88179_unbind,
1811 .status = ax88179_status,
1812 .link_reset = ax88179_link_reset,
1813 .reset = ax88179_net_reset,
1814 .stop = ax88179_stop,
1815 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1816 .rx_fixup = ax88179_rx_fixup,
1817 .tx_fixup = ax88179_tx_fixup,
1818};
1819
1820static const struct driver_info toshiba_info = {
1821 .description = "Toshiba USB Ethernet Adapter",
1822 .bind = ax88179_bind,
1823 .unbind = ax88179_unbind,
1824 .status = ax88179_status,
1825 .link_reset = ax88179_link_reset,
1826 .reset = ax88179_net_reset,
1827 .stop = ax88179_stop,
1828 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1829 .rx_fixup = ax88179_rx_fixup,
1830 .tx_fixup = ax88179_tx_fixup,
1831};
1832
1833static const struct driver_info mct_info = {
1834 .description = "MCT USB 3.0 Gigabit Ethernet Adapter",
1835 .bind = ax88179_bind,
1836 .unbind = ax88179_unbind,
1837 .status = ax88179_status,
1838 .link_reset = ax88179_link_reset,
1839 .reset = ax88179_net_reset,
1840 .stop = ax88179_stop,
1841 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1842 .rx_fixup = ax88179_rx_fixup,
1843 .tx_fixup = ax88179_tx_fixup,
1844};
1845
1846static const struct driver_info at_umc2000_info = {
1847 .description = "AT-UMC2000 USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter",
1848 .bind = ax88179_bind,
1849 .unbind = ax88179_unbind,
1850 .status = ax88179_status,
1851 .link_reset = ax88179_link_reset,
1852 .reset = ax88179_net_reset,
1853 .stop = ax88179_stop,
1854 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1855 .rx_fixup = ax88179_rx_fixup,
1856 .tx_fixup = ax88179_tx_fixup,
1857};
1858
1859static const struct driver_info at_umc200_info = {
1860 .description = "AT-UMC200 USB 3.0/USB 3.1 Gen 1 to Fast Ethernet Adapter",
1861 .bind = ax88179_bind,
1862 .unbind = ax88179_unbind,
1863 .status = ax88179_status,
1864 .link_reset = ax88179_link_reset,
1865 .reset = ax88179_net_reset,
1866 .stop = ax88179_stop,
1867 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1868 .rx_fixup = ax88179_rx_fixup,
1869 .tx_fixup = ax88179_tx_fixup,
1870};
1871
1872static const struct driver_info at_umc2000sp_info = {
1873 .description = "AT-UMC2000/SP USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter",
1874 .bind = ax88179_bind,
1875 .unbind = ax88179_unbind,
1876 .status = ax88179_status,
1877 .link_reset = ax88179_link_reset,
1878 .reset = ax88179_net_reset,
1879 .stop = ax88179_stop,
1880 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1881 .rx_fixup = ax88179_rx_fixup,
1882 .tx_fixup = ax88179_tx_fixup,
1883};
1884
1885static const struct usb_device_id products[] = {
1886{
1887 /* ASIX AX88179 10/100/1000 */
1888 USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x1790, 0xff, 0xff, 0),
1889 .driver_info = (unsigned long)&ax88179_info,
1890}, {
1891 /* ASIX AX88178A 10/100/1000 */
1892 USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x178a, 0xff, 0xff, 0),
1893 .driver_info = (unsigned long)&ax88178a_info,
1894}, {
1895 /* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */
1896 USB_DEVICE_AND_INTERFACE_INFO(0x04b4, 0x3610, 0xff, 0xff, 0),
1897 .driver_info = (unsigned long)&cypress_GX3_info,
1898}, {
1899 /* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
1900 USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x4a00, 0xff, 0xff, 0),
1901 .driver_info = (unsigned long)&dlink_dub1312_info,
1902}, {
1903 /* Sitecom USB 3.0 to Gigabit Adapter */
1904 USB_DEVICE_AND_INTERFACE_INFO(0x0df6, 0x0072, 0xff, 0xff, 0),
1905 .driver_info = (unsigned long)&sitecom_info,
1906}, {
1907 /* Samsung USB Ethernet Adapter */
1908 USB_DEVICE_AND_INTERFACE_INFO(0x04e8, 0xa100, 0xff, 0xff, 0),
1909 .driver_info = (unsigned long)&samsung_info,
1910}, {
1911 /* Lenovo OneLinkDock Gigabit LAN */
1912 USB_DEVICE_AND_INTERFACE_INFO(0x17ef, 0x304b, 0xff, 0xff, 0),
1913 .driver_info = (unsigned long)&lenovo_info,
1914}, {
1915 /* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */
1916 USB_DEVICE_AND_INTERFACE_INFO(0x050d, 0x0128, 0xff, 0xff, 0),
1917 .driver_info = (unsigned long)&belkin_info,
1918}, {
1919 /* Toshiba USB 3.0 GBit Ethernet Adapter */
1920 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x0a13, 0xff, 0xff, 0),
1921 .driver_info = (unsigned long)&toshiba_info,
1922}, {
1923 /* Magic Control Technology U3-A9003 USB 3.0 Gigabit Ethernet Adapter */
1924 USB_DEVICE_AND_INTERFACE_INFO(0x0711, 0x0179, 0xff, 0xff, 0),
1925 .driver_info = (unsigned long)&mct_info,
1926}, {
1927 /* Allied Telesis AT-UMC2000 USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter */
1928 USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x000e, 0xff, 0xff, 0),
1929 .driver_info = (unsigned long)&at_umc2000_info,
1930}, {
1931 /* Allied Telesis AT-UMC200 USB 3.0/USB 3.1 Gen 1 to Fast Ethernet Adapter */
1932 USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x000f, 0xff, 0xff, 0),
1933 .driver_info = (unsigned long)&at_umc200_info,
1934}, {
1935 /* Allied Telesis AT-UMC2000/SP USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter */
1936 USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x0010, 0xff, 0xff, 0),
1937 .driver_info = (unsigned long)&at_umc2000sp_info,
1938},
1939 { },
1940};
1941MODULE_DEVICE_TABLE(usb, products);
1942
1943static struct usb_driver ax88179_178a_driver = {
1944 .name = "ax88179_178a",
1945 .id_table = products,
1946 .probe = usbnet_probe,
1947 .suspend = ax88179_suspend,
1948 .resume = ax88179_resume,
1949 .reset_resume = ax88179_resume,
1950 .disconnect = ax88179_disconnect,
1951 .supports_autosuspend = 1,
1952 .disable_hub_initiated_lpm = 1,
1953};
1954
1955module_usb_driver(ax88179_178a_driver);
1956
1957MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1958MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
4 *
5 * Copyright (C) 2011-2013 ASIX
6 */
7
8#include <linux/module.h>
9#include <linux/etherdevice.h>
10#include <linux/mii.h>
11#include <linux/usb.h>
12#include <linux/crc32.h>
13#include <linux/usb/usbnet.h>
14#include <uapi/linux/mdio.h>
15#include <linux/mdio.h>
16
17#define AX88179_PHY_ID 0x03
18#define AX_EEPROM_LEN 0x100
19#define AX88179_EEPROM_MAGIC 0x17900b95
20#define AX_MCAST_FLTSIZE 8
21#define AX_MAX_MCAST 64
22#define AX_INT_PPLS_LINK ((u32)BIT(16))
23#define AX_RXHDR_L4_TYPE_MASK 0x1c
24#define AX_RXHDR_L4_TYPE_UDP 4
25#define AX_RXHDR_L4_TYPE_TCP 16
26#define AX_RXHDR_L3CSUM_ERR 2
27#define AX_RXHDR_L4CSUM_ERR 1
28#define AX_RXHDR_CRC_ERR ((u32)BIT(29))
29#define AX_RXHDR_DROP_ERR ((u32)BIT(31))
30#define AX_ACCESS_MAC 0x01
31#define AX_ACCESS_PHY 0x02
32#define AX_ACCESS_EEPROM 0x04
33#define AX_ACCESS_EFUS 0x05
34#define AX_PAUSE_WATERLVL_HIGH 0x54
35#define AX_PAUSE_WATERLVL_LOW 0x55
36
37#define PHYSICAL_LINK_STATUS 0x02
38 #define AX_USB_SS 0x04
39 #define AX_USB_HS 0x02
40
41#define GENERAL_STATUS 0x03
42/* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 */
43 #define AX_SECLD 0x04
44
45#define AX_SROM_ADDR 0x07
46#define AX_SROM_CMD 0x0a
47 #define EEP_RD 0x04
48 #define EEP_BUSY 0x10
49
50#define AX_SROM_DATA_LOW 0x08
51#define AX_SROM_DATA_HIGH 0x09
52
53#define AX_RX_CTL 0x0b
54 #define AX_RX_CTL_DROPCRCERR 0x0100
55 #define AX_RX_CTL_IPE 0x0200
56 #define AX_RX_CTL_START 0x0080
57 #define AX_RX_CTL_AP 0x0020
58 #define AX_RX_CTL_AM 0x0010
59 #define AX_RX_CTL_AB 0x0008
60 #define AX_RX_CTL_AMALL 0x0002
61 #define AX_RX_CTL_PRO 0x0001
62 #define AX_RX_CTL_STOP 0x0000
63
64#define AX_NODE_ID 0x10
65#define AX_MULFLTARY 0x16
66
67#define AX_MEDIUM_STATUS_MODE 0x22
68 #define AX_MEDIUM_GIGAMODE 0x01
69 #define AX_MEDIUM_FULL_DUPLEX 0x02
70 #define AX_MEDIUM_EN_125MHZ 0x08
71 #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
72 #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
73 #define AX_MEDIUM_RECEIVE_EN 0x100
74 #define AX_MEDIUM_PS 0x200
75 #define AX_MEDIUM_JUMBO_EN 0x8040
76
77#define AX_MONITOR_MOD 0x24
78 #define AX_MONITOR_MODE_RWLC 0x02
79 #define AX_MONITOR_MODE_RWMP 0x04
80 #define AX_MONITOR_MODE_PMEPOL 0x20
81 #define AX_MONITOR_MODE_PMETYPE 0x40
82
83#define AX_GPIO_CTRL 0x25
84 #define AX_GPIO_CTRL_GPIO3EN 0x80
85 #define AX_GPIO_CTRL_GPIO2EN 0x40
86 #define AX_GPIO_CTRL_GPIO1EN 0x20
87
88#define AX_PHYPWR_RSTCTL 0x26
89 #define AX_PHYPWR_RSTCTL_BZ 0x0010
90 #define AX_PHYPWR_RSTCTL_IPRL 0x0020
91 #define AX_PHYPWR_RSTCTL_AT 0x1000
92
93#define AX_RX_BULKIN_QCTRL 0x2e
94#define AX_CLK_SELECT 0x33
95 #define AX_CLK_SELECT_BCS 0x01
96 #define AX_CLK_SELECT_ACS 0x02
97 #define AX_CLK_SELECT_ULR 0x08
98
99#define AX_RXCOE_CTL 0x34
100 #define AX_RXCOE_IP 0x01
101 #define AX_RXCOE_TCP 0x02
102 #define AX_RXCOE_UDP 0x04
103 #define AX_RXCOE_TCPV6 0x20
104 #define AX_RXCOE_UDPV6 0x40
105
106#define AX_TXCOE_CTL 0x35
107 #define AX_TXCOE_IP 0x01
108 #define AX_TXCOE_TCP 0x02
109 #define AX_TXCOE_UDP 0x04
110 #define AX_TXCOE_TCPV6 0x20
111 #define AX_TXCOE_UDPV6 0x40
112
113#define AX_LEDCTRL 0x73
114
115#define GMII_PHY_PHYSR 0x11
116 #define GMII_PHY_PHYSR_SMASK 0xc000
117 #define GMII_PHY_PHYSR_GIGA 0x8000
118 #define GMII_PHY_PHYSR_100 0x4000
119 #define GMII_PHY_PHYSR_FULL 0x2000
120 #define GMII_PHY_PHYSR_LINK 0x400
121
122#define GMII_LED_ACT 0x1a
123 #define GMII_LED_ACTIVE_MASK 0xff8f
124 #define GMII_LED0_ACTIVE BIT(4)
125 #define GMII_LED1_ACTIVE BIT(5)
126 #define GMII_LED2_ACTIVE BIT(6)
127
128#define GMII_LED_LINK 0x1c
129 #define GMII_LED_LINK_MASK 0xf888
130 #define GMII_LED0_LINK_10 BIT(0)
131 #define GMII_LED0_LINK_100 BIT(1)
132 #define GMII_LED0_LINK_1000 BIT(2)
133 #define GMII_LED1_LINK_10 BIT(4)
134 #define GMII_LED1_LINK_100 BIT(5)
135 #define GMII_LED1_LINK_1000 BIT(6)
136 #define GMII_LED2_LINK_10 BIT(8)
137 #define GMII_LED2_LINK_100 BIT(9)
138 #define GMII_LED2_LINK_1000 BIT(10)
139 #define LED0_ACTIVE BIT(0)
140 #define LED0_LINK_10 BIT(1)
141 #define LED0_LINK_100 BIT(2)
142 #define LED0_LINK_1000 BIT(3)
143 #define LED0_FD BIT(4)
144 #define LED0_USB3_MASK 0x001f
145 #define LED1_ACTIVE BIT(5)
146 #define LED1_LINK_10 BIT(6)
147 #define LED1_LINK_100 BIT(7)
148 #define LED1_LINK_1000 BIT(8)
149 #define LED1_FD BIT(9)
150 #define LED1_USB3_MASK 0x03e0
151 #define LED2_ACTIVE BIT(10)
152 #define LED2_LINK_1000 BIT(13)
153 #define LED2_LINK_100 BIT(12)
154 #define LED2_LINK_10 BIT(11)
155 #define LED2_FD BIT(14)
156 #define LED_VALID BIT(15)
157 #define LED2_USB3_MASK 0x7c00
158
159#define GMII_PHYPAGE 0x1e
160#define GMII_PHY_PAGE_SELECT 0x1f
161 #define GMII_PHY_PGSEL_EXT 0x0007
162 #define GMII_PHY_PGSEL_PAGE0 0x0000
163 #define GMII_PHY_PGSEL_PAGE3 0x0003
164 #define GMII_PHY_PGSEL_PAGE5 0x0005
165
166struct ax88179_data {
167 u8 eee_enabled;
168 u8 eee_active;
169 u16 rxctl;
170 u16 reserved;
171};
172
173struct ax88179_int_data {
174 __le32 intdata1;
175 __le32 intdata2;
176};
177
178static const struct {
179 unsigned char ctrl, timer_l, timer_h, size, ifg;
180} AX88179_BULKIN_SIZE[] = {
181 {7, 0x4f, 0, 0x12, 0xff},
182 {7, 0x20, 3, 0x16, 0xff},
183 {7, 0xae, 7, 0x18, 0xff},
184 {7, 0xcc, 0x4c, 0x18, 8},
185};
186
187static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
188 u16 size, void *data, int in_pm)
189{
190 int ret;
191 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
192
193 BUG_ON(!dev);
194
195 if (!in_pm)
196 fn = usbnet_read_cmd;
197 else
198 fn = usbnet_read_cmd_nopm;
199
200 ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
201 value, index, data, size);
202
203 if (unlikely(ret < 0))
204 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
205 index, ret);
206
207 return ret;
208}
209
210static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
211 u16 size, void *data, int in_pm)
212{
213 int ret;
214 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
215
216 BUG_ON(!dev);
217
218 if (!in_pm)
219 fn = usbnet_write_cmd;
220 else
221 fn = usbnet_write_cmd_nopm;
222
223 ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
224 value, index, data, size);
225
226 if (unlikely(ret < 0))
227 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
228 index, ret);
229
230 return ret;
231}
232
233static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
234 u16 index, u16 size, void *data)
235{
236 u16 buf;
237
238 if (2 == size) {
239 buf = *((u16 *)data);
240 cpu_to_le16s(&buf);
241 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
242 USB_RECIP_DEVICE, value, index, &buf,
243 size);
244 } else {
245 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
246 USB_RECIP_DEVICE, value, index, data,
247 size);
248 }
249}
250
251static int ax88179_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
252 u16 index, u16 size, void *data)
253{
254 int ret;
255
256 if (2 == size) {
257 u16 buf;
258 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
259 le16_to_cpus(&buf);
260 *((u16 *)data) = buf;
261 } else if (4 == size) {
262 u32 buf;
263 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
264 le32_to_cpus(&buf);
265 *((u32 *)data) = buf;
266 } else {
267 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 1);
268 }
269
270 return ret;
271}
272
273static int ax88179_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
274 u16 index, u16 size, void *data)
275{
276 int ret;
277
278 if (2 == size) {
279 u16 buf;
280 buf = *((u16 *)data);
281 cpu_to_le16s(&buf);
282 ret = __ax88179_write_cmd(dev, cmd, value, index,
283 size, &buf, 1);
284 } else {
285 ret = __ax88179_write_cmd(dev, cmd, value, index,
286 size, data, 1);
287 }
288
289 return ret;
290}
291
292static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
293 u16 size, void *data)
294{
295 int ret;
296
297 if (2 == size) {
298 u16 buf;
299 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
300 le16_to_cpus(&buf);
301 *((u16 *)data) = buf;
302 } else if (4 == size) {
303 u32 buf;
304 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
305 le32_to_cpus(&buf);
306 *((u32 *)data) = buf;
307 } else {
308 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 0);
309 }
310
311 return ret;
312}
313
314static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
315 u16 size, void *data)
316{
317 int ret;
318
319 if (2 == size) {
320 u16 buf;
321 buf = *((u16 *)data);
322 cpu_to_le16s(&buf);
323 ret = __ax88179_write_cmd(dev, cmd, value, index,
324 size, &buf, 0);
325 } else {
326 ret = __ax88179_write_cmd(dev, cmd, value, index,
327 size, data, 0);
328 }
329
330 return ret;
331}
332
333static void ax88179_status(struct usbnet *dev, struct urb *urb)
334{
335 struct ax88179_int_data *event;
336 u32 link;
337
338 if (urb->actual_length < 8)
339 return;
340
341 event = urb->transfer_buffer;
342 le32_to_cpus((void *)&event->intdata1);
343
344 link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
345
346 if (netif_carrier_ok(dev->net) != link) {
347 usbnet_link_change(dev, link, 1);
348 netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
349 }
350}
351
352static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
353{
354 struct usbnet *dev = netdev_priv(netdev);
355 u16 res;
356
357 ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
358 return res;
359}
360
361static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
362 int val)
363{
364 struct usbnet *dev = netdev_priv(netdev);
365 u16 res = (u16) val;
366
367 ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
368}
369
370static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
371 u16 devad)
372{
373 u16 tmp16;
374 int ret;
375
376 tmp16 = devad;
377 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
378 MII_MMD_CTRL, 2, &tmp16);
379
380 tmp16 = prtad;
381 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
382 MII_MMD_DATA, 2, &tmp16);
383
384 tmp16 = devad | MII_MMD_CTRL_NOINCR;
385 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
386 MII_MMD_CTRL, 2, &tmp16);
387
388 return ret;
389}
390
391static int
392ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
393{
394 int ret;
395 u16 tmp16;
396
397 ax88179_phy_mmd_indirect(dev, prtad, devad);
398
399 ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
400 MII_MMD_DATA, 2, &tmp16);
401 if (ret < 0)
402 return ret;
403
404 return tmp16;
405}
406
407static int
408ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
409 u16 data)
410{
411 int ret;
412
413 ax88179_phy_mmd_indirect(dev, prtad, devad);
414
415 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
416 MII_MMD_DATA, 2, &data);
417
418 if (ret < 0)
419 return ret;
420
421 return 0;
422}
423
424static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
425{
426 struct usbnet *dev = usb_get_intfdata(intf);
427 u16 tmp16;
428 u8 tmp8;
429
430 usbnet_suspend(intf, message);
431
432 /* Disable RX path */
433 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
434 2, 2, &tmp16);
435 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
436 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
437 2, 2, &tmp16);
438
439 /* Force bulk-in zero length */
440 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
441 2, 2, &tmp16);
442
443 tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
444 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
445 2, 2, &tmp16);
446
447 /* change clock */
448 tmp8 = 0;
449 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
450
451 /* Configure RX control register => stop operation */
452 tmp16 = AX_RX_CTL_STOP;
453 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
454
455 return 0;
456}
457
458/* This function is used to enable the autodetach function. */
459/* This function is determined by offset 0x43 of EEPROM */
460static int ax88179_auto_detach(struct usbnet *dev, int in_pm)
461{
462 u16 tmp16;
463 u8 tmp8;
464 int (*fnr)(struct usbnet *, u8, u16, u16, u16, void *);
465 int (*fnw)(struct usbnet *, u8, u16, u16, u16, void *);
466
467 if (!in_pm) {
468 fnr = ax88179_read_cmd;
469 fnw = ax88179_write_cmd;
470 } else {
471 fnr = ax88179_read_cmd_nopm;
472 fnw = ax88179_write_cmd_nopm;
473 }
474
475 if (fnr(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
476 return 0;
477
478 if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
479 return 0;
480
481 /* Enable Auto Detach bit */
482 tmp8 = 0;
483 fnr(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
484 tmp8 |= AX_CLK_SELECT_ULR;
485 fnw(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
486
487 fnr(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
488 tmp16 |= AX_PHYPWR_RSTCTL_AT;
489 fnw(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
490
491 return 0;
492}
493
494static int ax88179_resume(struct usb_interface *intf)
495{
496 struct usbnet *dev = usb_get_intfdata(intf);
497 u16 tmp16;
498 u8 tmp8;
499
500 usbnet_link_change(dev, 0, 0);
501
502 /* Power up ethernet PHY */
503 tmp16 = 0;
504 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
505 2, 2, &tmp16);
506 udelay(1000);
507
508 tmp16 = AX_PHYPWR_RSTCTL_IPRL;
509 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
510 2, 2, &tmp16);
511 msleep(200);
512
513 /* Ethernet PHY Auto Detach*/
514 ax88179_auto_detach(dev, 1);
515
516 /* Enable clock */
517 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
518 tmp8 |= AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
519 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
520 msleep(100);
521
522 /* Configure RX control register => start operation */
523 tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
524 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
525 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
526
527 return usbnet_resume(intf);
528}
529
530static void
531ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
532{
533 struct usbnet *dev = netdev_priv(net);
534 u8 opt;
535
536 if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
537 1, 1, &opt) < 0) {
538 wolinfo->supported = 0;
539 wolinfo->wolopts = 0;
540 return;
541 }
542
543 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
544 wolinfo->wolopts = 0;
545 if (opt & AX_MONITOR_MODE_RWLC)
546 wolinfo->wolopts |= WAKE_PHY;
547 if (opt & AX_MONITOR_MODE_RWMP)
548 wolinfo->wolopts |= WAKE_MAGIC;
549}
550
551static int
552ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
553{
554 struct usbnet *dev = netdev_priv(net);
555 u8 opt = 0;
556
557 if (wolinfo->wolopts & ~(WAKE_PHY | WAKE_MAGIC))
558 return -EINVAL;
559
560 if (wolinfo->wolopts & WAKE_PHY)
561 opt |= AX_MONITOR_MODE_RWLC;
562 if (wolinfo->wolopts & WAKE_MAGIC)
563 opt |= AX_MONITOR_MODE_RWMP;
564
565 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
566 1, 1, &opt) < 0)
567 return -EINVAL;
568
569 return 0;
570}
571
572static int ax88179_get_eeprom_len(struct net_device *net)
573{
574 return AX_EEPROM_LEN;
575}
576
577static int
578ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
579 u8 *data)
580{
581 struct usbnet *dev = netdev_priv(net);
582 u16 *eeprom_buff;
583 int first_word, last_word;
584 int i, ret;
585
586 if (eeprom->len == 0)
587 return -EINVAL;
588
589 eeprom->magic = AX88179_EEPROM_MAGIC;
590
591 first_word = eeprom->offset >> 1;
592 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
593 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
594 GFP_KERNEL);
595 if (!eeprom_buff)
596 return -ENOMEM;
597
598 /* ax88179/178A returns 2 bytes from eeprom on read */
599 for (i = first_word; i <= last_word; i++) {
600 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
601 &eeprom_buff[i - first_word],
602 0);
603 if (ret < 0) {
604 kfree(eeprom_buff);
605 return -EIO;
606 }
607 }
608
609 memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
610 kfree(eeprom_buff);
611 return 0;
612}
613
614static int ax88179_get_link_ksettings(struct net_device *net,
615 struct ethtool_link_ksettings *cmd)
616{
617 struct usbnet *dev = netdev_priv(net);
618
619 mii_ethtool_get_link_ksettings(&dev->mii, cmd);
620
621 return 0;
622}
623
624static int ax88179_set_link_ksettings(struct net_device *net,
625 const struct ethtool_link_ksettings *cmd)
626{
627 struct usbnet *dev = netdev_priv(net);
628 return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
629}
630
631static int
632ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_eee *data)
633{
634 int val;
635
636 /* Get Supported EEE */
637 val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
638 MDIO_MMD_PCS);
639 if (val < 0)
640 return val;
641 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
642
643 /* Get advertisement EEE */
644 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
645 MDIO_MMD_AN);
646 if (val < 0)
647 return val;
648 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
649
650 /* Get LP advertisement EEE */
651 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
652 MDIO_MMD_AN);
653 if (val < 0)
654 return val;
655 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
656
657 return 0;
658}
659
660static int
661ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_eee *data)
662{
663 u16 tmp16 = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
664
665 return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
666 MDIO_MMD_AN, tmp16);
667}
668
669static int ax88179_chk_eee(struct usbnet *dev)
670{
671 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
672 struct ax88179_data *priv = (struct ax88179_data *)dev->data;
673
674 mii_ethtool_gset(&dev->mii, &ecmd);
675
676 if (ecmd.duplex & DUPLEX_FULL) {
677 int eee_lp, eee_cap, eee_adv;
678 u32 lp, cap, adv, supported = 0;
679
680 eee_cap = ax88179_phy_read_mmd_indirect(dev,
681 MDIO_PCS_EEE_ABLE,
682 MDIO_MMD_PCS);
683 if (eee_cap < 0) {
684 priv->eee_active = 0;
685 return false;
686 }
687
688 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
689 if (!cap) {
690 priv->eee_active = 0;
691 return false;
692 }
693
694 eee_lp = ax88179_phy_read_mmd_indirect(dev,
695 MDIO_AN_EEE_LPABLE,
696 MDIO_MMD_AN);
697 if (eee_lp < 0) {
698 priv->eee_active = 0;
699 return false;
700 }
701
702 eee_adv = ax88179_phy_read_mmd_indirect(dev,
703 MDIO_AN_EEE_ADV,
704 MDIO_MMD_AN);
705
706 if (eee_adv < 0) {
707 priv->eee_active = 0;
708 return false;
709 }
710
711 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
712 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
713 supported = (ecmd.speed == SPEED_1000) ?
714 SUPPORTED_1000baseT_Full :
715 SUPPORTED_100baseT_Full;
716
717 if (!(lp & adv & supported)) {
718 priv->eee_active = 0;
719 return false;
720 }
721
722 priv->eee_active = 1;
723 return true;
724 }
725
726 priv->eee_active = 0;
727 return false;
728}
729
730static void ax88179_disable_eee(struct usbnet *dev)
731{
732 u16 tmp16;
733
734 tmp16 = GMII_PHY_PGSEL_PAGE3;
735 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
736 GMII_PHY_PAGE_SELECT, 2, &tmp16);
737
738 tmp16 = 0x3246;
739 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
740 MII_PHYADDR, 2, &tmp16);
741
742 tmp16 = GMII_PHY_PGSEL_PAGE0;
743 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
744 GMII_PHY_PAGE_SELECT, 2, &tmp16);
745}
746
747static void ax88179_enable_eee(struct usbnet *dev)
748{
749 u16 tmp16;
750
751 tmp16 = GMII_PHY_PGSEL_PAGE3;
752 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
753 GMII_PHY_PAGE_SELECT, 2, &tmp16);
754
755 tmp16 = 0x3247;
756 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
757 MII_PHYADDR, 2, &tmp16);
758
759 tmp16 = GMII_PHY_PGSEL_PAGE5;
760 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
761 GMII_PHY_PAGE_SELECT, 2, &tmp16);
762
763 tmp16 = 0x0680;
764 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
765 MII_BMSR, 2, &tmp16);
766
767 tmp16 = GMII_PHY_PGSEL_PAGE0;
768 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
769 GMII_PHY_PAGE_SELECT, 2, &tmp16);
770}
771
772static int ax88179_get_eee(struct net_device *net, struct ethtool_eee *edata)
773{
774 struct usbnet *dev = netdev_priv(net);
775 struct ax88179_data *priv = (struct ax88179_data *)dev->data;
776
777 edata->eee_enabled = priv->eee_enabled;
778 edata->eee_active = priv->eee_active;
779
780 return ax88179_ethtool_get_eee(dev, edata);
781}
782
783static int ax88179_set_eee(struct net_device *net, struct ethtool_eee *edata)
784{
785 struct usbnet *dev = netdev_priv(net);
786 struct ax88179_data *priv = (struct ax88179_data *)dev->data;
787 int ret = -EOPNOTSUPP;
788
789 priv->eee_enabled = edata->eee_enabled;
790 if (!priv->eee_enabled) {
791 ax88179_disable_eee(dev);
792 } else {
793 priv->eee_enabled = ax88179_chk_eee(dev);
794 if (!priv->eee_enabled)
795 return -EOPNOTSUPP;
796
797 ax88179_enable_eee(dev);
798 }
799
800 ret = ax88179_ethtool_set_eee(dev, edata);
801 if (ret)
802 return ret;
803
804 mii_nway_restart(&dev->mii);
805
806 usbnet_link_change(dev, 0, 0);
807
808 return ret;
809}
810
811static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
812{
813 struct usbnet *dev = netdev_priv(net);
814 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
815}
816
817static const struct ethtool_ops ax88179_ethtool_ops = {
818 .get_link = ethtool_op_get_link,
819 .get_msglevel = usbnet_get_msglevel,
820 .set_msglevel = usbnet_set_msglevel,
821 .get_wol = ax88179_get_wol,
822 .set_wol = ax88179_set_wol,
823 .get_eeprom_len = ax88179_get_eeprom_len,
824 .get_eeprom = ax88179_get_eeprom,
825 .get_eee = ax88179_get_eee,
826 .set_eee = ax88179_set_eee,
827 .nway_reset = usbnet_nway_reset,
828 .get_link_ksettings = ax88179_get_link_ksettings,
829 .set_link_ksettings = ax88179_set_link_ksettings,
830};
831
832static void ax88179_set_multicast(struct net_device *net)
833{
834 struct usbnet *dev = netdev_priv(net);
835 struct ax88179_data *data = (struct ax88179_data *)dev->data;
836 u8 *m_filter = ((u8 *)dev->data) + 12;
837
838 data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
839
840 if (net->flags & IFF_PROMISC) {
841 data->rxctl |= AX_RX_CTL_PRO;
842 } else if (net->flags & IFF_ALLMULTI ||
843 netdev_mc_count(net) > AX_MAX_MCAST) {
844 data->rxctl |= AX_RX_CTL_AMALL;
845 } else if (netdev_mc_empty(net)) {
846 /* just broadcast and directed */
847 } else {
848 /* We use the 20 byte dev->data for our 8 byte filter buffer
849 * to avoid allocating memory that is tricky to free later
850 */
851 u32 crc_bits;
852 struct netdev_hw_addr *ha;
853
854 memset(m_filter, 0, AX_MCAST_FLTSIZE);
855
856 netdev_for_each_mc_addr(ha, net) {
857 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
858 *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
859 }
860
861 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
862 AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
863 m_filter);
864
865 data->rxctl |= AX_RX_CTL_AM;
866 }
867
868 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
869 2, 2, &data->rxctl);
870}
871
872static int
873ax88179_set_features(struct net_device *net, netdev_features_t features)
874{
875 u8 tmp;
876 struct usbnet *dev = netdev_priv(net);
877 netdev_features_t changed = net->features ^ features;
878
879 if (changed & NETIF_F_IP_CSUM) {
880 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
881 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
882 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
883 }
884
885 if (changed & NETIF_F_IPV6_CSUM) {
886 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
887 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
888 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
889 }
890
891 if (changed & NETIF_F_RXCSUM) {
892 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
893 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
894 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
895 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
896 }
897
898 return 0;
899}
900
901static int ax88179_change_mtu(struct net_device *net, int new_mtu)
902{
903 struct usbnet *dev = netdev_priv(net);
904 u16 tmp16;
905
906 net->mtu = new_mtu;
907 dev->hard_mtu = net->mtu + net->hard_header_len;
908
909 if (net->mtu > 1500) {
910 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
911 2, 2, &tmp16);
912 tmp16 |= AX_MEDIUM_JUMBO_EN;
913 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
914 2, 2, &tmp16);
915 } else {
916 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
917 2, 2, &tmp16);
918 tmp16 &= ~AX_MEDIUM_JUMBO_EN;
919 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
920 2, 2, &tmp16);
921 }
922
923 /* max qlen depend on hard_mtu and rx_urb_size */
924 usbnet_update_max_qlen(dev);
925
926 return 0;
927}
928
929static int ax88179_set_mac_addr(struct net_device *net, void *p)
930{
931 struct usbnet *dev = netdev_priv(net);
932 struct sockaddr *addr = p;
933 int ret;
934
935 if (netif_running(net))
936 return -EBUSY;
937 if (!is_valid_ether_addr(addr->sa_data))
938 return -EADDRNOTAVAIL;
939
940 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
941
942 /* Set the MAC address */
943 ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
944 ETH_ALEN, net->dev_addr);
945 if (ret < 0)
946 return ret;
947
948 return 0;
949}
950
951static const struct net_device_ops ax88179_netdev_ops = {
952 .ndo_open = usbnet_open,
953 .ndo_stop = usbnet_stop,
954 .ndo_start_xmit = usbnet_start_xmit,
955 .ndo_tx_timeout = usbnet_tx_timeout,
956 .ndo_get_stats64 = usbnet_get_stats64,
957 .ndo_change_mtu = ax88179_change_mtu,
958 .ndo_set_mac_address = ax88179_set_mac_addr,
959 .ndo_validate_addr = eth_validate_addr,
960 .ndo_do_ioctl = ax88179_ioctl,
961 .ndo_set_rx_mode = ax88179_set_multicast,
962 .ndo_set_features = ax88179_set_features,
963};
964
965static int ax88179_check_eeprom(struct usbnet *dev)
966{
967 u8 i, buf, eeprom[20];
968 u16 csum, delay = HZ / 10;
969 unsigned long jtimeout;
970
971 /* Read EEPROM content */
972 for (i = 0; i < 6; i++) {
973 buf = i;
974 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
975 1, 1, &buf) < 0)
976 return -EINVAL;
977
978 buf = EEP_RD;
979 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
980 1, 1, &buf) < 0)
981 return -EINVAL;
982
983 jtimeout = jiffies + delay;
984 do {
985 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
986 1, 1, &buf);
987
988 if (time_after(jiffies, jtimeout))
989 return -EINVAL;
990
991 } while (buf & EEP_BUSY);
992
993 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
994 2, 2, &eeprom[i * 2], 0);
995
996 if ((i == 0) && (eeprom[0] == 0xFF))
997 return -EINVAL;
998 }
999
1000 csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
1001 csum = (csum >> 8) + (csum & 0xff);
1002 if ((csum + eeprom[10]) != 0xff)
1003 return -EINVAL;
1004
1005 return 0;
1006}
1007
1008static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
1009{
1010 u8 i;
1011 u8 efuse[64];
1012 u16 csum = 0;
1013
1014 if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
1015 return -EINVAL;
1016
1017 if (*efuse == 0xFF)
1018 return -EINVAL;
1019
1020 for (i = 0; i < 64; i++)
1021 csum = csum + efuse[i];
1022
1023 while (csum > 255)
1024 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
1025
1026 if (csum != 0xFF)
1027 return -EINVAL;
1028
1029 *ledmode = (efuse[51] << 8) | efuse[52];
1030
1031 return 0;
1032}
1033
1034static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
1035{
1036 u16 led;
1037
1038 /* Loaded the old eFuse LED Mode */
1039 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
1040 return -EINVAL;
1041
1042 led >>= 8;
1043 switch (led) {
1044 case 0xFF:
1045 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1046 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1047 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1048 break;
1049 case 0xFE:
1050 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
1051 break;
1052 case 0xFD:
1053 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
1054 LED2_LINK_10 | LED_VALID;
1055 break;
1056 case 0xFC:
1057 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
1058 LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
1059 break;
1060 default:
1061 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1062 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1063 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1064 break;
1065 }
1066
1067 *ledvalue = led;
1068
1069 return 0;
1070}
1071
1072static int ax88179_led_setting(struct usbnet *dev)
1073{
1074 u8 ledfd, value = 0;
1075 u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
1076 unsigned long jtimeout;
1077
1078 /* Check AX88179 version. UA1 or UA2*/
1079 ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
1080
1081 if (!(value & AX_SECLD)) { /* UA1 */
1082 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
1083 AX_GPIO_CTRL_GPIO1EN;
1084 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
1085 1, 1, &value) < 0)
1086 return -EINVAL;
1087 }
1088
1089 /* Check EEPROM */
1090 if (!ax88179_check_eeprom(dev)) {
1091 value = 0x42;
1092 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1093 1, 1, &value) < 0)
1094 return -EINVAL;
1095
1096 value = EEP_RD;
1097 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1098 1, 1, &value) < 0)
1099 return -EINVAL;
1100
1101 jtimeout = jiffies + delay;
1102 do {
1103 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1104 1, 1, &value);
1105
1106 if (time_after(jiffies, jtimeout))
1107 return -EINVAL;
1108
1109 } while (value & EEP_BUSY);
1110
1111 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
1112 1, 1, &value);
1113 ledvalue = (value << 8);
1114
1115 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1116 1, 1, &value);
1117 ledvalue |= value;
1118
1119 /* load internal ROM for defaule setting */
1120 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1121 ax88179_convert_old_led(dev, &ledvalue);
1122
1123 } else if (!ax88179_check_efuse(dev, &ledvalue)) {
1124 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1125 ax88179_convert_old_led(dev, &ledvalue);
1126 } else {
1127 ax88179_convert_old_led(dev, &ledvalue);
1128 }
1129
1130 tmp = GMII_PHY_PGSEL_EXT;
1131 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1132 GMII_PHY_PAGE_SELECT, 2, &tmp);
1133
1134 tmp = 0x2c;
1135 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1136 GMII_PHYPAGE, 2, &tmp);
1137
1138 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1139 GMII_LED_ACT, 2, &ledact);
1140
1141 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1142 GMII_LED_LINK, 2, &ledlink);
1143
1144 ledact &= GMII_LED_ACTIVE_MASK;
1145 ledlink &= GMII_LED_LINK_MASK;
1146
1147 if (ledvalue & LED0_ACTIVE)
1148 ledact |= GMII_LED0_ACTIVE;
1149
1150 if (ledvalue & LED1_ACTIVE)
1151 ledact |= GMII_LED1_ACTIVE;
1152
1153 if (ledvalue & LED2_ACTIVE)
1154 ledact |= GMII_LED2_ACTIVE;
1155
1156 if (ledvalue & LED0_LINK_10)
1157 ledlink |= GMII_LED0_LINK_10;
1158
1159 if (ledvalue & LED1_LINK_10)
1160 ledlink |= GMII_LED1_LINK_10;
1161
1162 if (ledvalue & LED2_LINK_10)
1163 ledlink |= GMII_LED2_LINK_10;
1164
1165 if (ledvalue & LED0_LINK_100)
1166 ledlink |= GMII_LED0_LINK_100;
1167
1168 if (ledvalue & LED1_LINK_100)
1169 ledlink |= GMII_LED1_LINK_100;
1170
1171 if (ledvalue & LED2_LINK_100)
1172 ledlink |= GMII_LED2_LINK_100;
1173
1174 if (ledvalue & LED0_LINK_1000)
1175 ledlink |= GMII_LED0_LINK_1000;
1176
1177 if (ledvalue & LED1_LINK_1000)
1178 ledlink |= GMII_LED1_LINK_1000;
1179
1180 if (ledvalue & LED2_LINK_1000)
1181 ledlink |= GMII_LED2_LINK_1000;
1182
1183 tmp = ledact;
1184 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1185 GMII_LED_ACT, 2, &tmp);
1186
1187 tmp = ledlink;
1188 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1189 GMII_LED_LINK, 2, &tmp);
1190
1191 tmp = GMII_PHY_PGSEL_PAGE0;
1192 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1193 GMII_PHY_PAGE_SELECT, 2, &tmp);
1194
1195 /* LED full duplex setting */
1196 ledfd = 0;
1197 if (ledvalue & LED0_FD)
1198 ledfd |= 0x01;
1199 else if ((ledvalue & LED0_USB3_MASK) == 0)
1200 ledfd |= 0x02;
1201
1202 if (ledvalue & LED1_FD)
1203 ledfd |= 0x04;
1204 else if ((ledvalue & LED1_USB3_MASK) == 0)
1205 ledfd |= 0x08;
1206
1207 if (ledvalue & LED2_FD)
1208 ledfd |= 0x10;
1209 else if ((ledvalue & LED2_USB3_MASK) == 0)
1210 ledfd |= 0x20;
1211
1212 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
1213
1214 return 0;
1215}
1216
1217static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
1218{
1219 u8 buf[5];
1220 u16 *tmp16;
1221 u8 *tmp;
1222 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1223 struct ethtool_eee eee_data;
1224
1225 usbnet_get_endpoints(dev, intf);
1226
1227 tmp16 = (u16 *)buf;
1228 tmp = (u8 *)buf;
1229
1230 memset(ax179_data, 0, sizeof(*ax179_data));
1231
1232 /* Power up ethernet PHY */
1233 *tmp16 = 0;
1234 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1235 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1236 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1237 msleep(200);
1238
1239 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1240 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1241 msleep(100);
1242
1243 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1244 ETH_ALEN, dev->net->dev_addr);
1245 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1246
1247 /* RX bulk configuration */
1248 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1249 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1250
1251 dev->rx_urb_size = 1024 * 20;
1252
1253 *tmp = 0x34;
1254 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1255
1256 *tmp = 0x52;
1257 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1258 1, 1, tmp);
1259
1260 dev->net->netdev_ops = &ax88179_netdev_ops;
1261 dev->net->ethtool_ops = &ax88179_ethtool_ops;
1262 dev->net->needed_headroom = 8;
1263 dev->net->max_mtu = 4088;
1264
1265 /* Initialize MII structure */
1266 dev->mii.dev = dev->net;
1267 dev->mii.mdio_read = ax88179_mdio_read;
1268 dev->mii.mdio_write = ax88179_mdio_write;
1269 dev->mii.phy_id_mask = 0xff;
1270 dev->mii.reg_num_mask = 0xff;
1271 dev->mii.phy_id = 0x03;
1272 dev->mii.supports_gmii = 1;
1273
1274 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1275 NETIF_F_RXCSUM;
1276
1277 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1278 NETIF_F_RXCSUM;
1279
1280 /* Enable checksum offload */
1281 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1282 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1283 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1284
1285 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1286 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1287 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1288
1289 /* Configure RX control register => start operation */
1290 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1291 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1292 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1293
1294 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1295 AX_MONITOR_MODE_RWMP;
1296 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1297
1298 /* Configure default medium type => giga */
1299 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1300 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1301 AX_MEDIUM_GIGAMODE;
1302 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1303 2, 2, tmp16);
1304
1305 ax88179_led_setting(dev);
1306
1307 ax179_data->eee_enabled = 0;
1308 ax179_data->eee_active = 0;
1309
1310 ax88179_disable_eee(dev);
1311
1312 ax88179_ethtool_get_eee(dev, &eee_data);
1313 eee_data.advertised = 0;
1314 ax88179_ethtool_set_eee(dev, &eee_data);
1315
1316 /* Restart autoneg */
1317 mii_nway_restart(&dev->mii);
1318
1319 usbnet_link_change(dev, 0, 0);
1320
1321 return 0;
1322}
1323
1324static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1325{
1326 u16 tmp16;
1327
1328 /* Configure RX control register => stop operation */
1329 tmp16 = AX_RX_CTL_STOP;
1330 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1331
1332 tmp16 = 0;
1333 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1334
1335 /* Power down ethernet PHY */
1336 tmp16 = 0;
1337 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1338}
1339
1340static void
1341ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1342{
1343 skb->ip_summed = CHECKSUM_NONE;
1344
1345 /* checksum error bit is set */
1346 if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1347 (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1348 return;
1349
1350 /* It must be a TCP or UDP packet with a valid checksum */
1351 if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1352 ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1353 skb->ip_summed = CHECKSUM_UNNECESSARY;
1354}
1355
1356static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1357{
1358 struct sk_buff *ax_skb;
1359 int pkt_cnt;
1360 u32 rx_hdr;
1361 u16 hdr_off;
1362 u32 *pkt_hdr;
1363
1364 /* This check is no longer done by usbnet */
1365 if (skb->len < dev->net->hard_header_len)
1366 return 0;
1367
1368 skb_trim(skb, skb->len - 4);
1369 rx_hdr = get_unaligned_le32(skb_tail_pointer(skb));
1370
1371 pkt_cnt = (u16)rx_hdr;
1372 hdr_off = (u16)(rx_hdr >> 16);
1373 pkt_hdr = (u32 *)(skb->data + hdr_off);
1374
1375 while (pkt_cnt--) {
1376 u16 pkt_len;
1377
1378 le32_to_cpus(pkt_hdr);
1379 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1380
1381 /* Check CRC or runt packet */
1382 if ((*pkt_hdr & AX_RXHDR_CRC_ERR) ||
1383 (*pkt_hdr & AX_RXHDR_DROP_ERR)) {
1384 skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1385 pkt_hdr++;
1386 continue;
1387 }
1388
1389 if (pkt_cnt == 0) {
1390 /* Skip IP alignment psudo header */
1391 skb_pull(skb, 2);
1392 skb->len = pkt_len;
1393 skb_set_tail_pointer(skb, pkt_len);
1394 skb->truesize = pkt_len + sizeof(struct sk_buff);
1395 ax88179_rx_checksum(skb, pkt_hdr);
1396 return 1;
1397 }
1398
1399 ax_skb = skb_clone(skb, GFP_ATOMIC);
1400 if (ax_skb) {
1401 ax_skb->len = pkt_len;
1402 ax_skb->data = skb->data + 2;
1403 skb_set_tail_pointer(ax_skb, pkt_len);
1404 ax_skb->truesize = pkt_len + sizeof(struct sk_buff);
1405 ax88179_rx_checksum(ax_skb, pkt_hdr);
1406 usbnet_skb_return(dev, ax_skb);
1407 } else {
1408 return 0;
1409 }
1410
1411 skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1412 pkt_hdr++;
1413 }
1414 return 1;
1415}
1416
1417static struct sk_buff *
1418ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1419{
1420 u32 tx_hdr1, tx_hdr2;
1421 int frame_size = dev->maxpacket;
1422 int mss = skb_shinfo(skb)->gso_size;
1423 int headroom;
1424 void *ptr;
1425
1426 tx_hdr1 = skb->len;
1427 tx_hdr2 = mss;
1428 if (((skb->len + 8) % frame_size) == 0)
1429 tx_hdr2 |= 0x80008000; /* Enable padding */
1430
1431 headroom = skb_headroom(skb) - 8;
1432
1433 if ((skb_header_cloned(skb) || headroom < 0) &&
1434 pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1435 dev_kfree_skb_any(skb);
1436 return NULL;
1437 }
1438
1439 ptr = skb_push(skb, 8);
1440 put_unaligned_le32(tx_hdr1, ptr);
1441 put_unaligned_le32(tx_hdr2, ptr + 4);
1442
1443 return skb;
1444}
1445
1446static int ax88179_link_reset(struct usbnet *dev)
1447{
1448 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1449 u8 tmp[5], link_sts;
1450 u16 mode, tmp16, delay = HZ / 10;
1451 u32 tmp32 = 0x40000000;
1452 unsigned long jtimeout;
1453
1454 jtimeout = jiffies + delay;
1455 while (tmp32 & 0x40000000) {
1456 mode = 0;
1457 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1458 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1459 &ax179_data->rxctl);
1460
1461 /*link up, check the usb device control TX FIFO full or empty*/
1462 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1463
1464 if (time_after(jiffies, jtimeout))
1465 return 0;
1466 }
1467
1468 mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1469 AX_MEDIUM_RXFLOW_CTRLEN;
1470
1471 ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1472 1, 1, &link_sts);
1473
1474 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1475 GMII_PHY_PHYSR, 2, &tmp16);
1476
1477 if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1478 return 0;
1479 } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1480 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1481 if (dev->net->mtu > 1500)
1482 mode |= AX_MEDIUM_JUMBO_EN;
1483
1484 if (link_sts & AX_USB_SS)
1485 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1486 else if (link_sts & AX_USB_HS)
1487 memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1488 else
1489 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1490 } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1491 mode |= AX_MEDIUM_PS;
1492
1493 if (link_sts & (AX_USB_SS | AX_USB_HS))
1494 memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1495 else
1496 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1497 } else {
1498 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1499 }
1500
1501 /* RX bulk configuration */
1502 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1503
1504 dev->rx_urb_size = (1024 * (tmp[3] + 2));
1505
1506 if (tmp16 & GMII_PHY_PHYSR_FULL)
1507 mode |= AX_MEDIUM_FULL_DUPLEX;
1508 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1509 2, 2, &mode);
1510
1511 ax179_data->eee_enabled = ax88179_chk_eee(dev);
1512
1513 netif_carrier_on(dev->net);
1514
1515 return 0;
1516}
1517
1518static int ax88179_reset(struct usbnet *dev)
1519{
1520 u8 buf[5];
1521 u16 *tmp16;
1522 u8 *tmp;
1523 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1524 struct ethtool_eee eee_data;
1525
1526 tmp16 = (u16 *)buf;
1527 tmp = (u8 *)buf;
1528
1529 /* Power up ethernet PHY */
1530 *tmp16 = 0;
1531 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1532
1533 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1534 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1535 msleep(200);
1536
1537 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1538 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1539 msleep(100);
1540
1541 /* Ethernet PHY Auto Detach*/
1542 ax88179_auto_detach(dev, 0);
1543
1544 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1545 dev->net->dev_addr);
1546
1547 /* RX bulk configuration */
1548 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1549 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1550
1551 dev->rx_urb_size = 1024 * 20;
1552
1553 *tmp = 0x34;
1554 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1555
1556 *tmp = 0x52;
1557 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1558 1, 1, tmp);
1559
1560 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1561 NETIF_F_RXCSUM;
1562
1563 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1564 NETIF_F_RXCSUM;
1565
1566 /* Enable checksum offload */
1567 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1568 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1569 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1570
1571 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1572 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1573 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1574
1575 /* Configure RX control register => start operation */
1576 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1577 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1578 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1579
1580 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1581 AX_MONITOR_MODE_RWMP;
1582 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1583
1584 /* Configure default medium type => giga */
1585 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1586 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1587 AX_MEDIUM_GIGAMODE;
1588 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1589 2, 2, tmp16);
1590
1591 ax88179_led_setting(dev);
1592
1593 ax179_data->eee_enabled = 0;
1594 ax179_data->eee_active = 0;
1595
1596 ax88179_disable_eee(dev);
1597
1598 ax88179_ethtool_get_eee(dev, &eee_data);
1599 eee_data.advertised = 0;
1600 ax88179_ethtool_set_eee(dev, &eee_data);
1601
1602 /* Restart autoneg */
1603 mii_nway_restart(&dev->mii);
1604
1605 usbnet_link_change(dev, 0, 0);
1606
1607 return 0;
1608}
1609
1610static int ax88179_stop(struct usbnet *dev)
1611{
1612 u16 tmp16;
1613
1614 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1615 2, 2, &tmp16);
1616 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1617 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1618 2, 2, &tmp16);
1619
1620 return 0;
1621}
1622
1623static const struct driver_info ax88179_info = {
1624 .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1625 .bind = ax88179_bind,
1626 .unbind = ax88179_unbind,
1627 .status = ax88179_status,
1628 .link_reset = ax88179_link_reset,
1629 .reset = ax88179_reset,
1630 .stop = ax88179_stop,
1631 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1632 .rx_fixup = ax88179_rx_fixup,
1633 .tx_fixup = ax88179_tx_fixup,
1634};
1635
1636static const struct driver_info ax88178a_info = {
1637 .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1638 .bind = ax88179_bind,
1639 .unbind = ax88179_unbind,
1640 .status = ax88179_status,
1641 .link_reset = ax88179_link_reset,
1642 .reset = ax88179_reset,
1643 .stop = ax88179_stop,
1644 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1645 .rx_fixup = ax88179_rx_fixup,
1646 .tx_fixup = ax88179_tx_fixup,
1647};
1648
1649static const struct driver_info cypress_GX3_info = {
1650 .description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
1651 .bind = ax88179_bind,
1652 .unbind = ax88179_unbind,
1653 .status = ax88179_status,
1654 .link_reset = ax88179_link_reset,
1655 .reset = ax88179_reset,
1656 .stop = ax88179_stop,
1657 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1658 .rx_fixup = ax88179_rx_fixup,
1659 .tx_fixup = ax88179_tx_fixup,
1660};
1661
1662static const struct driver_info dlink_dub1312_info = {
1663 .description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
1664 .bind = ax88179_bind,
1665 .unbind = ax88179_unbind,
1666 .status = ax88179_status,
1667 .link_reset = ax88179_link_reset,
1668 .reset = ax88179_reset,
1669 .stop = ax88179_stop,
1670 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1671 .rx_fixup = ax88179_rx_fixup,
1672 .tx_fixup = ax88179_tx_fixup,
1673};
1674
1675static const struct driver_info sitecom_info = {
1676 .description = "Sitecom USB 3.0 to Gigabit Adapter",
1677 .bind = ax88179_bind,
1678 .unbind = ax88179_unbind,
1679 .status = ax88179_status,
1680 .link_reset = ax88179_link_reset,
1681 .reset = ax88179_reset,
1682 .stop = ax88179_stop,
1683 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1684 .rx_fixup = ax88179_rx_fixup,
1685 .tx_fixup = ax88179_tx_fixup,
1686};
1687
1688static const struct driver_info samsung_info = {
1689 .description = "Samsung USB Ethernet Adapter",
1690 .bind = ax88179_bind,
1691 .unbind = ax88179_unbind,
1692 .status = ax88179_status,
1693 .link_reset = ax88179_link_reset,
1694 .reset = ax88179_reset,
1695 .stop = ax88179_stop,
1696 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1697 .rx_fixup = ax88179_rx_fixup,
1698 .tx_fixup = ax88179_tx_fixup,
1699};
1700
1701static const struct driver_info lenovo_info = {
1702 .description = "Lenovo OneLinkDock Gigabit LAN",
1703 .bind = ax88179_bind,
1704 .unbind = ax88179_unbind,
1705 .status = ax88179_status,
1706 .link_reset = ax88179_link_reset,
1707 .reset = ax88179_reset,
1708 .stop = ax88179_stop,
1709 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1710 .rx_fixup = ax88179_rx_fixup,
1711 .tx_fixup = ax88179_tx_fixup,
1712};
1713
1714static const struct driver_info belkin_info = {
1715 .description = "Belkin USB Ethernet Adapter",
1716 .bind = ax88179_bind,
1717 .unbind = ax88179_unbind,
1718 .status = ax88179_status,
1719 .link_reset = ax88179_link_reset,
1720 .reset = ax88179_reset,
1721 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1722 .rx_fixup = ax88179_rx_fixup,
1723 .tx_fixup = ax88179_tx_fixup,
1724};
1725
1726static const struct usb_device_id products[] = {
1727{
1728 /* ASIX AX88179 10/100/1000 */
1729 USB_DEVICE(0x0b95, 0x1790),
1730 .driver_info = (unsigned long)&ax88179_info,
1731}, {
1732 /* ASIX AX88178A 10/100/1000 */
1733 USB_DEVICE(0x0b95, 0x178a),
1734 .driver_info = (unsigned long)&ax88178a_info,
1735}, {
1736 /* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */
1737 USB_DEVICE(0x04b4, 0x3610),
1738 .driver_info = (unsigned long)&cypress_GX3_info,
1739}, {
1740 /* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
1741 USB_DEVICE(0x2001, 0x4a00),
1742 .driver_info = (unsigned long)&dlink_dub1312_info,
1743}, {
1744 /* Sitecom USB 3.0 to Gigabit Adapter */
1745 USB_DEVICE(0x0df6, 0x0072),
1746 .driver_info = (unsigned long)&sitecom_info,
1747}, {
1748 /* Samsung USB Ethernet Adapter */
1749 USB_DEVICE(0x04e8, 0xa100),
1750 .driver_info = (unsigned long)&samsung_info,
1751}, {
1752 /* Lenovo OneLinkDock Gigabit LAN */
1753 USB_DEVICE(0x17ef, 0x304b),
1754 .driver_info = (unsigned long)&lenovo_info,
1755}, {
1756 /* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */
1757 USB_DEVICE(0x050d, 0x0128),
1758 .driver_info = (unsigned long)&belkin_info,
1759},
1760 { },
1761};
1762MODULE_DEVICE_TABLE(usb, products);
1763
1764static struct usb_driver ax88179_178a_driver = {
1765 .name = "ax88179_178a",
1766 .id_table = products,
1767 .probe = usbnet_probe,
1768 .suspend = ax88179_suspend,
1769 .resume = ax88179_resume,
1770 .reset_resume = ax88179_resume,
1771 .disconnect = usbnet_disconnect,
1772 .supports_autosuspend = 1,
1773 .disable_hub_initiated_lpm = 1,
1774};
1775
1776module_usb_driver(ax88179_178a_driver);
1777
1778MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1779MODULE_LICENSE("GPL");